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From: Samuel Holland <samuel@sholland.org>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Maxime Ripard <mripard@kernel.org>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <maxime@cerno.tech>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 4/8] dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
Date: Thu, 25 Aug 2022 09:37:37 -0500	[thread overview]
Message-ID: <95464d37-6da5-1f63-8f21-93ede5666312@sholland.org> (raw)
In-Reply-To: <YwdRvBSGDNIUOMnH@aptenodytes>

On 8/25/22 5:41 AM, Paul Kocialkowski wrote:
> Hi Samuel,
> 
> On Fri 12 Aug 22, 02:55, Samuel Holland wrote:
>> A100 features an updated DPHY, which moves PLL control inside the DPHY
>> register space. (Previously PLL-MIPI was controlled from the CCU. This
>> does not affect the "clocks" property because the link between PLL-MIPI
>> and the DPHY was never represented in the devicetree.) It also requires
>> a modified analog power-on sequence. Finally, the new DPHY adds support
>> for operating as an LVDS PHY. D1 uses this same variant.
> 
> Do you have some pointers about that? I'd be surprised that this PHY is now
> used for "traditional" LVDS display output, which is usually done with a simpler
> LVDS phy attached to the display controller.

Yes, this is documented in the A133 User Manual. As for the BSP code, see:

https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/lowlevel_v2x/de_dsi.c#L773
https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/lowlevel_v2x/de_lcd_sun50iw10.c#L390
https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/disp_lcd.c#L786

Regards,
Samuel

> However I've seen that some new Allwinner SoCs come with sub-LVDS camera input,
> which typically requires a more complex PHY due to the high number of lanes.
> 
> Anyway for now this is:
> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> 
> Cheers,
> 
> Paul
> 
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>
>>  .../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml           | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> index cf49bd99b3e2..b88c4b52af7d 100644
>> --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> @@ -17,9 +17,13 @@ properties:
>>    compatible:
>>      oneOf:
>>        - const: allwinner,sun6i-a31-mipi-dphy
>> +      - const: allwinner,sun50i-a100-mipi-dphy
>>        - items:
>>            - const: allwinner,sun50i-a64-mipi-dphy
>>            - const: allwinner,sun6i-a31-mipi-dphy
>> +      - items:
>> +          - const: allwinner,sun20i-d1-mipi-dphy
>> +          - const: allwinner,sun50i-a100-mipi-dphy
>>  
>>    reg:
>>      maxItems: 1
>> -- 
>> 2.35.1
>>
> 


WARNING: multiple messages have this Message-ID (diff)
From: Samuel Holland <samuel@sholland.org>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Maxime Ripard <mripard@kernel.org>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <maxime@cerno.tech>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 4/8] dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
Date: Thu, 25 Aug 2022 09:37:37 -0500	[thread overview]
Message-ID: <95464d37-6da5-1f63-8f21-93ede5666312@sholland.org> (raw)
In-Reply-To: <YwdRvBSGDNIUOMnH@aptenodytes>

On 8/25/22 5:41 AM, Paul Kocialkowski wrote:
> Hi Samuel,
> 
> On Fri 12 Aug 22, 02:55, Samuel Holland wrote:
>> A100 features an updated DPHY, which moves PLL control inside the DPHY
>> register space. (Previously PLL-MIPI was controlled from the CCU. This
>> does not affect the "clocks" property because the link between PLL-MIPI
>> and the DPHY was never represented in the devicetree.) It also requires
>> a modified analog power-on sequence. Finally, the new DPHY adds support
>> for operating as an LVDS PHY. D1 uses this same variant.
> 
> Do you have some pointers about that? I'd be surprised that this PHY is now
> used for "traditional" LVDS display output, which is usually done with a simpler
> LVDS phy attached to the display controller.

Yes, this is documented in the A133 User Manual. As for the BSP code, see:

https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/lowlevel_v2x/de_dsi.c#L773
https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/lowlevel_v2x/de_lcd_sun50iw10.c#L390
https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/disp_lcd.c#L786

Regards,
Samuel

> However I've seen that some new Allwinner SoCs come with sub-LVDS camera input,
> which typically requires a more complex PHY due to the high number of lanes.
> 
> Anyway for now this is:
> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> 
> Cheers,
> 
> Paul
> 
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>
>>  .../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml           | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> index cf49bd99b3e2..b88c4b52af7d 100644
>> --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> @@ -17,9 +17,13 @@ properties:
>>    compatible:
>>      oneOf:
>>        - const: allwinner,sun6i-a31-mipi-dphy
>> +      - const: allwinner,sun50i-a100-mipi-dphy
>>        - items:
>>            - const: allwinner,sun50i-a64-mipi-dphy
>>            - const: allwinner,sun6i-a31-mipi-dphy
>> +      - items:
>> +          - const: allwinner,sun20i-d1-mipi-dphy
>> +          - const: allwinner,sun50i-a100-mipi-dphy
>>  
>>    reg:
>>      maxItems: 1
>> -- 
>> 2.35.1
>>
> 


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Samuel Holland <samuel@sholland.org>
To: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Maxime Ripard <mripard@kernel.org>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Maxime Ripard <maxime@cerno.tech>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 4/8] dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
Date: Thu, 25 Aug 2022 09:37:37 -0500	[thread overview]
Message-ID: <95464d37-6da5-1f63-8f21-93ede5666312@sholland.org> (raw)
In-Reply-To: <YwdRvBSGDNIUOMnH@aptenodytes>

On 8/25/22 5:41 AM, Paul Kocialkowski wrote:
> Hi Samuel,
> 
> On Fri 12 Aug 22, 02:55, Samuel Holland wrote:
>> A100 features an updated DPHY, which moves PLL control inside the DPHY
>> register space. (Previously PLL-MIPI was controlled from the CCU. This
>> does not affect the "clocks" property because the link between PLL-MIPI
>> and the DPHY was never represented in the devicetree.) It also requires
>> a modified analog power-on sequence. Finally, the new DPHY adds support
>> for operating as an LVDS PHY. D1 uses this same variant.
> 
> Do you have some pointers about that? I'd be surprised that this PHY is now
> used for "traditional" LVDS display output, which is usually done with a simpler
> LVDS phy attached to the display controller.

Yes, this is documented in the A133 User Manual. As for the BSP code, see:

https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/lowlevel_v2x/de_dsi.c#L773
https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/lowlevel_v2x/de_lcd_sun50iw10.c#L390
https://github.com/Tina-Linux/tina-d1x-linux-5.4/blob/master/drivers/video/fbdev/sunxi/disp2/disp/de/disp_lcd.c#L786

Regards,
Samuel

> However I've seen that some new Allwinner SoCs come with sub-LVDS camera input,
> which typically requires a more complex PHY due to the high number of lanes.
> 
> Anyway for now this is:
> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
> 
> Cheers,
> 
> Paul
> 
>> Signed-off-by: Samuel Holland <samuel@sholland.org>
>> ---
>>
>>  .../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml           | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> index cf49bd99b3e2..b88c4b52af7d 100644
>> --- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
>> @@ -17,9 +17,13 @@ properties:
>>    compatible:
>>      oneOf:
>>        - const: allwinner,sun6i-a31-mipi-dphy
>> +      - const: allwinner,sun50i-a100-mipi-dphy
>>        - items:
>>            - const: allwinner,sun50i-a64-mipi-dphy
>>            - const: allwinner,sun6i-a31-mipi-dphy
>> +      - items:
>> +          - const: allwinner,sun20i-d1-mipi-dphy
>> +          - const: allwinner,sun50i-a100-mipi-dphy
>>  
>>    reg:
>>      maxItems: 1
>> -- 
>> 2.35.1
>>
> 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-08-25 14:37 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-12  7:55 [PATCH 0/8] phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY Samuel Holland
2022-08-12  7:55 ` Samuel Holland
2022-08-12  7:55 ` Samuel Holland
2022-08-12  7:55 ` [PATCH 1/8] dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12 10:45   ` Krzysztof Kozlowski
2022-08-12 10:45     ` Krzysztof Kozlowski
2022-08-12 10:45     ` Krzysztof Kozlowski
2022-08-12 22:19     ` Samuel Holland
2022-08-12 22:19       ` Samuel Holland
2022-08-12 22:19       ` Samuel Holland
2022-08-16 10:18       ` Krzysztof Kozlowski
2022-08-16 10:18         ` Krzysztof Kozlowski
2022-08-16 10:18         ` Krzysztof Kozlowski
2022-09-26  9:28       ` Paul Kocialkowski
2022-09-26  9:28         ` Paul Kocialkowski
2022-09-26  9:28         ` Paul Kocialkowski
2022-09-27  9:36         ` Paul Kocialkowski
2022-09-27  9:36           ` Paul Kocialkowski
2022-09-27  9:36           ` Paul Kocialkowski
2022-08-12 12:22   ` Paul Kocialkowski
2022-08-12 12:22     ` Paul Kocialkowski
2022-08-12 12:22     ` Paul Kocialkowski
2022-08-12 22:44     ` Samuel Holland
2022-08-12 22:44       ` Samuel Holland
2022-08-12 22:44       ` Samuel Holland
2022-11-08  5:17       ` Samuel Holland
2022-11-08  5:17         ` Samuel Holland
2022-11-08  5:17         ` Samuel Holland
2022-08-12 15:13   ` Rob Herring
2022-08-12 15:13     ` Rob Herring
2022-08-12 15:13     ` Rob Herring
2022-08-12  7:55 ` [PATCH 2/8] ARM: dts: sun8i: a33: Add DPHY interrupt Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12  7:55 ` [PATCH 3/8] arm64: dts: allwinner: a64: " Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12  7:55 ` [PATCH 4/8] dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12  7:55   ` Samuel Holland
2022-08-12 10:47   ` Krzysztof Kozlowski
2022-08-12 10:47     ` Krzysztof Kozlowski
2022-08-12 10:47     ` Krzysztof Kozlowski
2022-08-25 10:41   ` Paul Kocialkowski
2022-08-25 10:41     ` Paul Kocialkowski
2022-08-25 10:41     ` Paul Kocialkowski
2022-08-25 14:37     ` Samuel Holland [this message]
2022-08-25 14:37       ` Samuel Holland
2022-08-25 14:37       ` Samuel Holland
2022-08-12  7:56 ` [PATCH 5/8] phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-09-26  9:30   ` Paul Kocialkowski
2022-09-26  9:30     ` Paul Kocialkowski
2022-09-26  9:30     ` Paul Kocialkowski
2022-08-12  7:56 ` [PATCH 6/8] phy: allwinner: phy-sun6i-mipi-dphy: Set enable bit last Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-08-12 12:03   ` Paul Kocialkowski
2022-08-12 12:03     ` Paul Kocialkowski
2022-08-12 12:03     ` Paul Kocialkowski
2022-08-12 22:31     ` Samuel Holland
2022-08-12 22:31       ` Samuel Holland
2022-08-12 22:31       ` Samuel Holland
2022-08-25 10:26       ` Paul Kocialkowski
2022-08-25 10:26         ` Paul Kocialkowski
2022-08-25 10:26         ` Paul Kocialkowski
2022-08-12  7:56 ` [PATCH 7/8] phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-08-12  7:56 ` [PATCH 8/8] phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant Samuel Holland
2022-08-12  7:56   ` Samuel Holland
2022-08-12  7:56   ` Samuel Holland

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