[PATCH 0/3] Mark clocks as critical for MT6797

[PATCH 0/3] Mark clocks as critical for MT6797

[Jasper Mattsson]

Hi,

Currently, DRAM-related clocks and the axi_sel MUX are not marked with
CLK_IS_CRITICAL for MT6797. This causes memory corruption when the
system is booted without clk_ignore_unused.

This patchset

1. Makes it possible to mark outputs of MUXes as critical by introducing
   a new macro, MUX_FLAGS,
2. Makes it possible to mark gates as critical by adding flags to
   mtk_gate, and
3. Marks axi_sel, ddrphycfg_sel, infra_dramc_f26m and infra_dramc_b_f26m
   as critical.

The addition of flags to mtk_gate also exists in the patch series "Add
basic and clock support for Mediatek MT8183 SoC" [1].  The type of
flags is unsigned int in that series, but the real type is unsigned
long, so my patch differs from that patch.

[1] https://patchwork.kernel.org/patch/10549953/


Jasper Mattsson (3):
  clk: mediatek: Add MUX_FLAGS macro
  clk: mediatek: Add flags to mtk_gate
  clk: mediatek: Mark bus and DRAM related clocks as critical

 drivers/clk/mediatek/clk-gate.c   |  4 +-
 drivers/clk/mediatek/clk-gate.h   |  3 +-
 drivers/clk/mediatek/clk-mt6797.c | 64 ++++++++++++++++++-------------
 drivers/clk/mediatek/clk-mtk.c    |  2 +-
 drivers/clk/mediatek/clk-mtk.h    |  9 ++++-
 5 files changed, 50 insertions(+), 32 deletions(-)

--
2.18.0

Re: [PATCH 0/3] Mark clocks as critical for MT6797

[Matthias Brugger]

Hi Jasper,

On 28/08/2018 22:49, Jasper Mattsson wrote:
> Hi,
> 
> Currently, DRAM-related clocks and the axi_sel MUX are not marked with
> CLK_IS_CRITICAL for MT6797. This causes memory corruption when the
> system is booted without clk_ignore_unused.
> 
> This patchset
> 
> 1. Makes it possible to mark outputs of MUXes as critical by introducing
>    a new macro, MUX_FLAGS,
> 2. Makes it possible to mark gates as critical by adding flags to
>    mtk_gate, and
> 3. Marks axi_sel, ddrphycfg_sel, infra_dramc_f26m and infra_dramc_b_f26m
>    as critical.
> 

I just tested your patches and they are actually fixing the problem.
Great, I wasn't even aware of it!

You can add a
Tested-by: Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Please resend and use ./scripts/get_maintainers.pl on the whole series to see
whom you should send and CC.

Especially as this series should go through the clk tree. The normal is, to add
maintainers with To and all the rest including mailinglists with CC. Beware that
you will need to send this to several mailinglists.

If you study a bit git send-email, there is an option to send the series as a
thread, that helps normally to get things in your maintainers inbox in a sorted
way :)

Thanks for the patches and hope to see more of them in the future.

Best regards,
Matthias

> The addition of flags to mtk_gate also exists in the patch series "Add
> basic and clock support for Mediatek MT8183 SoC" [1].  The type of
> flags is unsigned int in that series, but the real type is unsigned
> long, so my patch differs from that patch.
> 
> [1] https://patchwork.kernel.org/patch/10549953/
> 
> 
> Jasper Mattsson (3):
>   clk: mediatek: Add MUX_FLAGS macro
>   clk: mediatek: Add flags to mtk_gate
>   clk: mediatek: Mark bus and DRAM related clocks as critical
> 
>  drivers/clk/mediatek/clk-gate.c   |  4 +-
>  drivers/clk/mediatek/clk-gate.h   |  3 +-
>  drivers/clk/mediatek/clk-mt6797.c | 64 ++++++++++++++++++-------------
>  drivers/clk/mediatek/clk-mtk.c    |  2 +-
>  drivers/clk/mediatek/clk-mtk.h    |  9 ++++-
>  5 files changed, 50 insertions(+), 32 deletions(-)
> 
> --
> 2.18.0
> 

Re: [PATCH 0/3] Mark clocks as critical for MT6797

[Matthias Brugger]

On 02/10/2018 23:25, Matthias Brugger wrote:
> Hi Jasper,
> 
> On 28/08/2018 22:49, Jasper Mattsson wrote:
>> Hi,
>>
>> Currently, DRAM-related clocks and the axi_sel MUX are not marked with
>> CLK_IS_CRITICAL for MT6797. This causes memory corruption when the
>> system is booted without clk_ignore_unused.
>>
>> This patchset
>>
>> 1. Makes it possible to mark outputs of MUXes as critical by introducing
>>    a new macro, MUX_FLAGS,
>> 2. Makes it possible to mark gates as critical by adding flags to
>>    mtk_gate, and
>> 3. Marks axi_sel, ddrphycfg_sel, infra_dramc_f26m and infra_dramc_b_f26m
>>    as critical.
>>
> 
> I just tested your patches and they are actually fixing the problem.
> Great, I wasn't even aware of it!
> 
> You can add a
> Tested-by: Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> 
> Please resend and use ./scripts/get_maintainers.pl on the whole series to see
> whom you should send and CC.
> 
> Especially as this series should go through the clk tree. The normal is, to add
> maintainers with To and all the rest including mailinglists with CC. Beware that
> you will need to send this to several mailinglists.
> 
> If you study a bit git send-email, there is an option to send the series as a
> thread, that helps normally to get things in your maintainers inbox in a sorted
> way :)
> 
> Thanks for the patches and hope to see more of them in the future.
> 

I forgot one thing. You are actually fixing a (quite severe) bug here. So you
should provide a fixes tag, something like:
Fixes: 96596aa06628 ("clk: mediatek: add clk support for MT6797")

Beware that I haven't checked if this is the commit you are fixing with that.
This will tell the stable maintainer that they should backport the patch to the
respective branches. I don't suppose that anyone uses mt6797 via the stable
branch, but better add the fixes always then forget it on a important fix.

Thanks a lot,
Matthias