Re: Preparing isar-cip-core for RZ/Five

From: Jan Kiszka <jan.kiszka@siemens.com>
To: Chris Paterson <Chris.Paterson2@renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Hung Tran <hung.tran.jy@renesas.com>
Cc: cip-dev <cip-dev@lists.cip-project.org>
Subject: Re: Preparing isar-cip-core for RZ/Five
Date: Tue, 4 Oct 2022 21:36:11 +0200	[thread overview]
Message-ID: <964bc8ff-9118-77b9-118f-6b979cedbb8b@siemens.com> (raw)
In-Reply-To: <38ce5ead-f7b8-e8f0-52a3-dff81f0f5045@siemens.com>

On 04.10.22 20:28, Jan Kiszka wrote:
> On 04.10.22 09:15, Jan Kiszka wrote:
>> On 03.10.22 22:12, Chris Paterson wrote:
>>> Hello Jan,
>>>
>>>> From: Jan Kiszka <jan.kiszka@siemens.com>
>>>> Sent: 03 October 2022 19:36
>>>>
>>>> Hi Chris,
>>>>
>>>> after getting qemu-riscv64 ready (patches will come tomorrow), I also
>>>
>>> Huzzah
>>>
>>>> had a quick look at the RZ/Five eval board you shared with us. But that
>>>> raised a couple of questions, maybe you can help:
>>>
>>> I can try :)
>>>
>>>>
>>>>  - Why is the default U-Boot hard-wired to a very special boot mode? I'm
>>>>    missing standard distro boot - which would include UEFI as well.
>>>
>>> Good question.
>>> @Prabhakar Mahadev Lad or @Hung Tran, could you help answer this?
>>>
>>>>
>>>>  - Where is the U-Boot tree (upstream support is apparently missing)?
>>>>    I'm still trying to understand the instructions how to replace it in
>>>>    QSPI, but first I need a fixable source tree.
>>>
>>> The Yocto BSP is here: https://github.com/renesas-rz/meta-rzg2/tree/dunfell/rzfive
>>> The U-Boot recipe points to https://github.com/renesas-rz/renesas-u-boot-cip/tree/v2021.12/rzf-smarc
>>>
>>> You're obviously welcome to fork/fixup as you like.
>>>
>>
>> How is the upstreaming status here? For UEFI, a U-Boot from this year is
>> needed.
>>
>>>>
>>>>  - Where is the kernel tree (also no upstream support yet)?
>>>
>>> Kernel tree used by the current BSP is here: https://github.com/renesas-rz/rz_linux-cip/tree/rzfive-5.10-cip1
>>>
>>> Upstreaming is still in progress.
>>> We're having some fun sharing things between arm64 and riscv, but we're getting there.
>>> I'm hoping we'll have something bootable in v6.2. 
>>>
>>
>> I see - over 700 patches for 5.10-cip...
>>
> 
> ...and it's based on an outdated CIP baseline. We are specifically
> missing "riscv: fix build with binutils 2.38", compared to latest CIP
> kernels. Those happily build with the Debian toolchain.
> 
> Fixing up locally for now.
> 

root@demo:~# cat /sys/firmware/devicetree/base/model ; echo
Renesas SMARC EVK based on r9a07g043f01
root@demo:~# cat /etc/os-release
PRETTY_NAME="Debian GNU/Linux bookworm/sid"
NAME="Debian GNU/Linux"
ID=debian
HOME_URL="https://www.debian.org/"
SUPPORT_URL="https://www.debian.org/support"
BUG_REPORT_URL="https://bugs.debian.org/"
BUILD_ID="698957d5-dirty"
VARIANT="CIP Core image"
VARIANT_VERSION="1.0"

But due to the weird U-Boot setup, I had to add some hacks, rather than
a proper boot process.

Jan

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