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* [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
@ 2020-04-17 17:46 ` Daniel Walker
  0 siblings, 0 replies; 10+ messages in thread
From: Daniel Walker @ 2020-04-17 17:46 UTC (permalink / raw)
  To: Tudor Ambarus
  Cc: xe-linux-external, Miquel Raynal, Richard Weinberger,
	Vignesh Raghavendra, linux-mtd, linux-kernel

The n25q256a supports 4-byte opcodes so lets add the flag.
Tested on Cisco IoT platform hardware using Marvell A7040 SoC.

This patch was base on one from Guo Yi <yi.guo@cavium.com>.

Cc: xe-linux-external@cisco.com
Signed-off-by: Daniel Walker <danielwa@cisco.com>
---
 drivers/mtd/spi-nor/micron-st.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 6c034b9718e2..471fe2bc2ba4 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -37,7 +37,7 @@ static const struct flash_info st_parts[] = {
 			       SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K |
 			      USE_FSR | SPI_NOR_DUAL_READ |
-			      SPI_NOR_QUAD_READ) },
+			      SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ "mt25qu256a",  INFO6(0x20bb19, 0x104400, 64 * 1024,  512,
 			       SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
 			       SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
@ 2020-04-17 17:46 ` Daniel Walker
  0 siblings, 0 replies; 10+ messages in thread
From: Daniel Walker @ 2020-04-17 17:46 UTC (permalink / raw)
  To: Tudor Ambarus
  Cc: Vignesh Raghavendra, Richard Weinberger, xe-linux-external,
	linux-kernel, linux-mtd, Miquel Raynal

The n25q256a supports 4-byte opcodes so lets add the flag.
Tested on Cisco IoT platform hardware using Marvell A7040 SoC.

This patch was base on one from Guo Yi <yi.guo@cavium.com>.

Cc: xe-linux-external@cisco.com
Signed-off-by: Daniel Walker <danielwa@cisco.com>
---
 drivers/mtd/spi-nor/micron-st.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 6c034b9718e2..471fe2bc2ba4 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -37,7 +37,7 @@ static const struct flash_info st_parts[] = {
 			       SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K |
 			      USE_FSR | SPI_NOR_DUAL_READ |
-			      SPI_NOR_QUAD_READ) },
+			      SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ "mt25qu256a",  INFO6(0x20bb19, 0x104400, 64 * 1024,  512,
 			       SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
 			       SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
-- 
2.17.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
  2020-04-17 17:46 ` Daniel Walker
@ 2020-04-20 15:45   ` Tudor.Ambarus
  -1 siblings, 0 replies; 10+ messages in thread
From: Tudor.Ambarus @ 2020-04-20 15:45 UTC (permalink / raw)
  To: danielwa
  Cc: xe-linux-external, miquel.raynal, richard, vigneshr, linux-mtd,
	linux-kernel

Hi, Daniel,

On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> The n25q256a supports 4-byte opcodes so lets add the flag.

This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B, 
SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers 
N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.

You need to differentiate between the aforementioned flashes and the rest in 
the n25q256a, in order to add the 4-byte opcodes flag.

Cheers,
ta

> Tested on Cisco IoT platform hardware using Marvell A7040 SoC.
> 
> This patch was base on one from Guo Yi <yi.guo@cavium.com>.
> 
> Cc: xe-linux-external@cisco.com
> Signed-off-by: Daniel Walker <danielwa@cisco.com>
> ---
>  drivers/mtd/spi-nor/micron-st.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi-nor/micron-st.c
> b/drivers/mtd/spi-nor/micron-st.c index 6c034b9718e2..471fe2bc2ba4 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -37,7 +37,7 @@ static const struct flash_info st_parts[] = {
>                                SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>         { "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K |
>                               USE_FSR | SPI_NOR_DUAL_READ |
> -                             SPI_NOR_QUAD_READ) },
> +                             SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>         { "mt25qu256a",  INFO6(0x20bb19, 0x104400, 64 * 1024,  512,
>                                SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
>                                SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> --
> 2.17.1




^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
@ 2020-04-20 15:45   ` Tudor.Ambarus
  0 siblings, 0 replies; 10+ messages in thread
From: Tudor.Ambarus @ 2020-04-20 15:45 UTC (permalink / raw)
  To: danielwa
  Cc: vigneshr, richard, xe-linux-external, linux-kernel, linux-mtd,
	miquel.raynal

Hi, Daniel,

On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> 
> The n25q256a supports 4-byte opcodes so lets add the flag.

This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B, 
SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers 
N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.

You need to differentiate between the aforementioned flashes and the rest in 
the n25q256a, in order to add the 4-byte opcodes flag.

Cheers,
ta

> Tested on Cisco IoT platform hardware using Marvell A7040 SoC.
> 
> This patch was base on one from Guo Yi <yi.guo@cavium.com>.
> 
> Cc: xe-linux-external@cisco.com
> Signed-off-by: Daniel Walker <danielwa@cisco.com>
> ---
>  drivers/mtd/spi-nor/micron-st.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi-nor/micron-st.c
> b/drivers/mtd/spi-nor/micron-st.c index 6c034b9718e2..471fe2bc2ba4 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -37,7 +37,7 @@ static const struct flash_info st_parts[] = {
>                                SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>         { "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K |
>                               USE_FSR | SPI_NOR_DUAL_READ |
> -                             SPI_NOR_QUAD_READ) },
> +                             SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>         { "mt25qu256a",  INFO6(0x20bb19, 0x104400, 64 * 1024,  512,
>                                SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
>                                SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> --
> 2.17.1




______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
  2020-04-20 15:45   ` Tudor.Ambarus
@ 2020-04-20 16:25     ` Daniel Walker (danielwa)
  -1 siblings, 0 replies; 10+ messages in thread
From: Daniel Walker (danielwa) @ 2020-04-20 16:25 UTC (permalink / raw)
  To: Tudor.Ambarus
  Cc: xe-linux-external(mailer list),
	miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel

On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> Hi, Daniel,
> 
> On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> > 
> > The n25q256a supports 4-byte opcodes so lets add the flag.
> 
> This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B, 
> SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers 
> N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> 
> You need to differentiate between the aforementioned flashes and the rest in 
> the n25q256a, in order to add the 4-byte opcodes flag.

How do you suggest I do that ? Can I add a new entry into this table with more
specific information about the chips ?

Daniel

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
@ 2020-04-20 16:25     ` Daniel Walker (danielwa)
  0 siblings, 0 replies; 10+ messages in thread
From: Daniel Walker (danielwa) @ 2020-04-20 16:25 UTC (permalink / raw)
  To: Tudor.Ambarus
  Cc: vigneshr, richard, xe-linux-external(mailer list),
	linux-kernel, linux-mtd, miquel.raynal

On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> Hi, Daniel,
> 
> On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> > 
> > The n25q256a supports 4-byte opcodes so lets add the flag.
> 
> This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B, 
> SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers 
> N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> 
> You need to differentiate between the aforementioned flashes and the rest in 
> the n25q256a, in order to add the 4-byte opcodes flag.

How do you suggest I do that ? Can I add a new entry into this table with more
specific information about the chips ?

Daniel
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
  2020-04-20 16:25     ` Daniel Walker (danielwa)
@ 2020-04-21  4:52       ` Tudor.Ambarus
  -1 siblings, 0 replies; 10+ messages in thread
From: Tudor.Ambarus @ 2020-04-21  4:52 UTC (permalink / raw)
  To: danielwa
  Cc: xe-linux-external, miquel.raynal, richard, vigneshr, linux-mtd,
	linux-kernel

On Monday, April 20, 2020 7:25:51 PM EEST Daniel Walker (danielwa) wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> > Hi, Daniel,
> > 
> > On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the
> > > content is safe
> > > 
> > > The n25q256a supports 4-byte opcodes so lets add the flag.
> > 
> > This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B,
> > SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers
> > N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> > 
> > You need to differentiate between the aforementioned flashes and the rest
> > in the n25q256a, in order to add the 4-byte opcodes flag.
> 
> How do you suggest I do that ? Can I add a new entry into this table with
> more specific information about the chips ?
> 

We need to find a differentiator at runtime. If we are lucky, there might be 
some SFDP changes between the 4-byte opcodes capable flashes and the rest. 
Please dump all the sfdp tables, we can start from there. There's a thread 
that might interest you, see http://u-boot.10912.n7.nabble.com/Regressions-in-MTD-SPI-FLASH-td382956.html#a383126.

A more elegant way to solve it, is by parsing the 4bait sfdp table, but I 
haven't checked if this flash supports it or not. Anyway, not something that 
we can control, the manufacturer should add it.

Cheers,
ta



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
@ 2020-04-21  4:52       ` Tudor.Ambarus
  0 siblings, 0 replies; 10+ messages in thread
From: Tudor.Ambarus @ 2020-04-21  4:52 UTC (permalink / raw)
  To: danielwa
  Cc: vigneshr, richard, xe-linux-external, linux-kernel, linux-mtd,
	miquel.raynal

On Monday, April 20, 2020 7:25:51 PM EEST Daniel Walker (danielwa) wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
> On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> > Hi, Daniel,
> > 
> > On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > the
> > > content is safe
> > > 
> > > The n25q256a supports 4-byte opcodes so lets add the flag.
> > 
> > This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B,
> > SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers
> > N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> > 
> > You need to differentiate between the aforementioned flashes and the rest
> > in the n25q256a, in order to add the 4-byte opcodes flag.
> 
> How do you suggest I do that ? Can I add a new entry into this table with
> more specific information about the chips ?
> 

We need to find a differentiator at runtime. If we are lucky, there might be 
some SFDP changes between the 4-byte opcodes capable flashes and the rest. 
Please dump all the sfdp tables, we can start from there. There's a thread 
that might interest you, see http://u-boot.10912.n7.nabble.com/Regressions-in-MTD-SPI-FLASH-td382956.html#a383126.

A more elegant way to solve it, is by parsing the 4bait sfdp table, but I 
haven't checked if this flash supports it or not. Anyway, not something that 
we can control, the manufacturer should add it.

Cheers,
ta



______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
  2020-04-21  4:52       ` Tudor.Ambarus
@ 2020-04-21 16:24         ` Daniel Walker (danielwa)
  -1 siblings, 0 replies; 10+ messages in thread
From: Daniel Walker (danielwa) @ 2020-04-21 16:24 UTC (permalink / raw)
  To: Tudor.Ambarus
  Cc: xe-linux-external(mailer list),
	miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel

On Tue, Apr 21, 2020 at 04:52:01AM +0000, Tudor.Ambarus@microchip.com wrote:
> On Monday, April 20, 2020 7:25:51 PM EEST Daniel Walker (danielwa) wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> > On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> > > Hi, Daniel,
> > > 
> > > On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > > the
> > > > content is safe
> > > > 
> > > > The n25q256a supports 4-byte opcodes so lets add the flag.
> > > 
> > > This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B,
> > > SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers
> > > N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> > > 
> > > You need to differentiate between the aforementioned flashes and the rest
> > > in the n25q256a, in order to add the 4-byte opcodes flag.
> > 
> > How do you suggest I do that ? Can I add a new entry into this table with
> > more specific information about the chips ?
> > 
> 
> We need to find a differentiator at runtime. If we are lucky, there might be 
> some SFDP changes between the 4-byte opcodes capable flashes and the rest. 
> Please dump all the sfdp tables, we can start from there. There's a thread 
> that might interest you, see http://u-boot.10912.n7.nabble.com/Regressions-in-MTD-SPI-FLASH-td382956.html#a383126.
 
The thread seems to indicate that it's not easy to identify the chips which
support this.

Inside our device tree we identify that our flash is compatible with,
compatible = "jedec,spi-nor";

Would it make sense to add further identification of the chips into the device
tree, or allow some level of control over the SPI_NOR_4B_OPCODES flag into the
device tree. Since it would seems identification of the chips is not trivial.

> A more elegant way to solve it, is by parsing the 4bait sfdp table, but I 
> haven't checked if this flash supports it or not. Anyway, not something that 
> we can control, the manufacturer should add it.

We can investigate, our hardware team is claiming the only way to know if
physically reading what's on the chip.

Daniel

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a
@ 2020-04-21 16:24         ` Daniel Walker (danielwa)
  0 siblings, 0 replies; 10+ messages in thread
From: Daniel Walker (danielwa) @ 2020-04-21 16:24 UTC (permalink / raw)
  To: Tudor.Ambarus
  Cc: vigneshr, richard, xe-linux-external(mailer list),
	linux-kernel, linux-mtd, miquel.raynal

On Tue, Apr 21, 2020 at 04:52:01AM +0000, Tudor.Ambarus@microchip.com wrote:
> On Monday, April 20, 2020 7:25:51 PM EEST Daniel Walker (danielwa) wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> > On Mon, Apr 20, 2020 at 03:45:59PM +0000, Tudor.Ambarus@microchip.com wrote:
> > > Hi, Daniel,
> > > 
> > > On Friday, April 17, 2020 8:46:19 PM EEST Daniel Walker wrote:
> > > > EXTERNAL EMAIL: Do not click links or open attachments unless you know
> > > > the
> > > > content is safe
> > > > 
> > > > The n25q256a supports 4-byte opcodes so lets add the flag.
> > > 
> > > This is not true for all the n25q256a flashes. SPINOR_OP_PP_4B,
> > > SPINOR_OP_BE_4K_4B and SPINOR_OP_SE_4B are valid just for the part numbers
> > > N25Q256A83ESF40x, N25Q256A83E1240x, and N25Q256A83ESFA0F.
> > > 
> > > You need to differentiate between the aforementioned flashes and the rest
> > > in the n25q256a, in order to add the 4-byte opcodes flag.
> > 
> > How do you suggest I do that ? Can I add a new entry into this table with
> > more specific information about the chips ?
> > 
> 
> We need to find a differentiator at runtime. If we are lucky, there might be 
> some SFDP changes between the 4-byte opcodes capable flashes and the rest. 
> Please dump all the sfdp tables, we can start from there. There's a thread 
> that might interest you, see http://u-boot.10912.n7.nabble.com/Regressions-in-MTD-SPI-FLASH-td382956.html#a383126.
 
The thread seems to indicate that it's not easy to identify the chips which
support this.

Inside our device tree we identify that our flash is compatible with,
compatible = "jedec,spi-nor";

Would it make sense to add further identification of the chips into the device
tree, or allow some level of control over the SPI_NOR_4B_OPCODES flag into the
device tree. Since it would seems identification of the chips is not trivial.

> A more elegant way to solve it, is by parsing the 4bait sfdp table, but I 
> haven't checked if this flash supports it or not. Anyway, not something that 
> we can control, the manufacturer should add it.

We can investigate, our hardware team is claiming the only way to know if
physically reading what's on the chip.

Daniel
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2020-04-21 16:24 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-17 17:46 [PATCH] mtd: spi-nor: Add 4B_OPCODES flag to n25q256a Daniel Walker
2020-04-17 17:46 ` Daniel Walker
2020-04-20 15:45 ` Tudor.Ambarus
2020-04-20 15:45   ` Tudor.Ambarus
2020-04-20 16:25   ` Daniel Walker (danielwa)
2020-04-20 16:25     ` Daniel Walker (danielwa)
2020-04-21  4:52     ` Tudor.Ambarus
2020-04-21  4:52       ` Tudor.Ambarus
2020-04-21 16:24       ` Daniel Walker (danielwa)
2020-04-21 16:24         ` Daniel Walker (danielwa)

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