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From: <sean.wang@mediatek.com>
To: <robh+dt@kernel.org>, <matthias.bgg@gmail.com>,
	<mark.rutland@arm.com>, <devicetree@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Sean Wang <sean.wang@mediatek.com>
Subject: [PATCH v2 04/16] arm64: dts: mt7622: add pinctrl related device nodes
Date: Tue, 6 Feb 2018 17:52:53 +0800	[thread overview]
Message-ID: <98781a6d32fcc8d42e4646a183246e70d5139154.1517910489.git.sean.wang@mediatek.com> (raw)
In-Reply-To: <cover.1517910489.git.sean.wang@mediatek.com>

From: Sean Wang <sean.wang@mediatek.com>

add pinctrl device nodes and rfb1 board, additionally include all pin
groups possible being used on rfb1 board and available gpio keys.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 200 +++++++++++++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt7622.dtsi     |   7 +
 2 files changed, 207 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index c08309d..bd1093a 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -7,6 +7,8 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/input/input.h>
+
 #include "mt7622.dtsi"
 
 / {
@@ -17,11 +19,209 @@
 		bootargs = "console=ttyS0,115200n1";
 	};
 
+	gpio-keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+
+		factory {
+			label = "factory";
+			linux,code = <BTN_0>;
+			gpios = <&pio 0 0>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 102 0>;
+		};
+	};
+
 	memory {
 		reg = <0 0x40000000 0 0x3F000000>;
 	};
 };
 
+&pio {
+	/* eMMC is shared pin with parallel NAND */
+	emmc_pins_default: emmc-pins-default {
+		mux {
+			function = "emmc", "emmc_rst";
+			groups = "emmc";
+		};
+	};
+
+	emmc_pins_uhs: emmc-pins-uhs {
+		mux {
+			function = "emmc";
+			groups = "emmc";
+		};
+	};
+
+	eth_pins: eth-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio", "rgmii_via_gmac2";
+		};
+	};
+
+	i2c1_pins: i2c1-pins {
+		mux {
+			function = "i2c";
+			groups =  "i2c1_0";
+		};
+	};
+
+	i2c2_pins: i2c2-pins {
+		mux {
+			function = "i2c";
+			groups =  "i2c2_0";
+		};
+	};
+
+	i2s1_pins: i2s1-pins {
+		mux {
+			function = "i2s";
+			groups =  "i2s_out_bclk_ws_mclk",
+				  "i2s1_in_data",
+				  "i2s1_out_data";
+		};
+	};
+
+	irrx_pins: irrx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_rx";
+		};
+	};
+
+	irtx_pins: irtx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_tx";
+		};
+	};
+
+	/* Parallel nand is shared pin with eMMC */
+	parallel_nand_pins: parallel-nand-pins {
+		mux {
+			function = "flash";
+			groups = "par_nand";
+		};
+	};
+
+	pcie0_pins: pcie0-pins {
+		mux {
+			groups = "pcie0_pad_perst",
+				 "pcie0_1_waken",
+				 "pcie0_1_clkreq";
+			function = "pcie";
+		};
+	};
+
+	pcie1_pins: pcie1-pins {
+		mux {
+			groups = "pcie1_pad_perst",
+				 "pcie1_0_waken",
+				 "pcie1_0_clkreq";
+			function = "pcie";
+		};
+	};
+
+	pmic_bus_pins: pmic-bus-pins {
+		mux {
+			groups = "pmic_bus";
+			function = "pmic";
+		};
+	};
+
+	pwm7_pins: pwm1-2-pins {
+		mux {
+			function = "pwm";
+			groups = "pwm_ch7_2";
+		};
+	};
+
+	wled_pins: wled-pins {
+		mux {
+			function = "led";
+			groups = "wled";
+		};
+	};
+
+	sd0_pins_default: sd0-pins-default {
+		mux {
+			function = "sd";
+			groups = "sd_0";
+		};
+	};
+
+	sd0_pins_uhs: sd0-pins-uhs {
+		mux {
+			function = "sd";
+			groups = "sd_0";
+		};
+	};
+
+	/* Serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	spic0_pins: spic0-pins {
+		mux {
+			function = "spi";
+			groups = "spic0_0";
+		};
+	};
+
+	spic1_pins: spic1-pins {
+		mux {
+			function = "spi";
+			groups = "spic1_0";
+		};
+	};
+
+	/* SPI-NOR is shared pin with serial NAND */
+	spi_nor_pins: spi-nor-pins {
+		mux {
+			function = "flash";
+			groups = "spi_nor";
+		};
+	};
+
+	/* serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	uart0_pins: uart0-pins {
+		mux {
+			function = "uart";
+			groups = "uart0_0_tx_rx" ;
+		};
+	};
+
+	uart2_pins: uart2-pins {
+		mux {
+			function = "uart";
+			groups = "uart2_1_tx_rx" ;
+		};
+	};
+
+	watchdog_pins: watchdog-pins {
+		mux {
+			function = "watchdog";
+			groups = "watchdog";
+		};
+	};
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 81207e6..8211bf7 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -147,6 +147,13 @@
 		#clock-cells = <1>;
 	};
 
+	pio: pinctrl@10211000 {
+		compatible = "mediatek,mt7622-pinctrl";
+		reg = <0 0x10211000 0 0x1000>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
 	gic: interrupt-controller@10300000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Subject: [PATCH v2 04/16] arm64: dts: mt7622: add pinctrl related device nodes
Date: Tue, 6 Feb 2018 17:52:53 +0800	[thread overview]
Message-ID: <98781a6d32fcc8d42e4646a183246e70d5139154.1517910489.git.sean.wang@mediatek.com> (raw)
In-Reply-To: <cover.1517910489.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>

From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>

add pinctrl device nodes and rfb1 board, additionally include all pin
groups possible being used on rfb1 board and available gpio keys.

Signed-off-by: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 200 +++++++++++++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt7622.dtsi     |   7 +
 2 files changed, 207 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index c08309d..bd1093a 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -7,6 +7,8 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/input/input.h>
+
 #include "mt7622.dtsi"
 
 / {
@@ -17,11 +19,209 @@
 		bootargs = "console=ttyS0,115200n1";
 	};
 
+	gpio-keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+
+		factory {
+			label = "factory";
+			linux,code = <BTN_0>;
+			gpios = <&pio 0 0>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 102 0>;
+		};
+	};
+
 	memory {
 		reg = <0 0x40000000 0 0x3F000000>;
 	};
 };
 
+&pio {
+	/* eMMC is shared pin with parallel NAND */
+	emmc_pins_default: emmc-pins-default {
+		mux {
+			function = "emmc", "emmc_rst";
+			groups = "emmc";
+		};
+	};
+
+	emmc_pins_uhs: emmc-pins-uhs {
+		mux {
+			function = "emmc";
+			groups = "emmc";
+		};
+	};
+
+	eth_pins: eth-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio", "rgmii_via_gmac2";
+		};
+	};
+
+	i2c1_pins: i2c1-pins {
+		mux {
+			function = "i2c";
+			groups =  "i2c1_0";
+		};
+	};
+
+	i2c2_pins: i2c2-pins {
+		mux {
+			function = "i2c";
+			groups =  "i2c2_0";
+		};
+	};
+
+	i2s1_pins: i2s1-pins {
+		mux {
+			function = "i2s";
+			groups =  "i2s_out_bclk_ws_mclk",
+				  "i2s1_in_data",
+				  "i2s1_out_data";
+		};
+	};
+
+	irrx_pins: irrx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_rx";
+		};
+	};
+
+	irtx_pins: irtx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_tx";
+		};
+	};
+
+	/* Parallel nand is shared pin with eMMC */
+	parallel_nand_pins: parallel-nand-pins {
+		mux {
+			function = "flash";
+			groups = "par_nand";
+		};
+	};
+
+	pcie0_pins: pcie0-pins {
+		mux {
+			groups = "pcie0_pad_perst",
+				 "pcie0_1_waken",
+				 "pcie0_1_clkreq";
+			function = "pcie";
+		};
+	};
+
+	pcie1_pins: pcie1-pins {
+		mux {
+			groups = "pcie1_pad_perst",
+				 "pcie1_0_waken",
+				 "pcie1_0_clkreq";
+			function = "pcie";
+		};
+	};
+
+	pmic_bus_pins: pmic-bus-pins {
+		mux {
+			groups = "pmic_bus";
+			function = "pmic";
+		};
+	};
+
+	pwm7_pins: pwm1-2-pins {
+		mux {
+			function = "pwm";
+			groups = "pwm_ch7_2";
+		};
+	};
+
+	wled_pins: wled-pins {
+		mux {
+			function = "led";
+			groups = "wled";
+		};
+	};
+
+	sd0_pins_default: sd0-pins-default {
+		mux {
+			function = "sd";
+			groups = "sd_0";
+		};
+	};
+
+	sd0_pins_uhs: sd0-pins-uhs {
+		mux {
+			function = "sd";
+			groups = "sd_0";
+		};
+	};
+
+	/* Serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	spic0_pins: spic0-pins {
+		mux {
+			function = "spi";
+			groups = "spic0_0";
+		};
+	};
+
+	spic1_pins: spic1-pins {
+		mux {
+			function = "spi";
+			groups = "spic1_0";
+		};
+	};
+
+	/* SPI-NOR is shared pin with serial NAND */
+	spi_nor_pins: spi-nor-pins {
+		mux {
+			function = "flash";
+			groups = "spi_nor";
+		};
+	};
+
+	/* serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	uart0_pins: uart0-pins {
+		mux {
+			function = "uart";
+			groups = "uart0_0_tx_rx" ;
+		};
+	};
+
+	uart2_pins: uart2-pins {
+		mux {
+			function = "uart";
+			groups = "uart2_1_tx_rx" ;
+		};
+	};
+
+	watchdog_pins: watchdog-pins {
+		mux {
+			function = "watchdog";
+			groups = "watchdog";
+		};
+	};
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 81207e6..8211bf7 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -147,6 +147,13 @@
 		#clock-cells = <1>;
 	};
 
+	pio: pinctrl@10211000 {
+		compatible = "mediatek,mt7622-pinctrl";
+		reg = <0 0x10211000 0 0x1000>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
 	gic: interrupt-controller@10300000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
2.7.4

--
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WARNING: multiple messages have this Message-ID (diff)
From: sean.wang@mediatek.com (sean.wang at mediatek.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 04/16] arm64: dts: mt7622: add pinctrl related device nodes
Date: Tue, 6 Feb 2018 17:52:53 +0800	[thread overview]
Message-ID: <98781a6d32fcc8d42e4646a183246e70d5139154.1517910489.git.sean.wang@mediatek.com> (raw)
In-Reply-To: <cover.1517910489.git.sean.wang@mediatek.com>

From: Sean Wang <sean.wang@mediatek.com>

add pinctrl device nodes and rfb1 board, additionally include all pin
groups possible being used on rfb1 board and available gpio keys.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 200 +++++++++++++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt7622.dtsi     |   7 +
 2 files changed, 207 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
index c08309d..bd1093a 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -7,6 +7,8 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/input/input.h>
+
 #include "mt7622.dtsi"
 
 / {
@@ -17,11 +19,209 @@
 		bootargs = "console=ttyS0,115200n1";
 	};
 
+	gpio-keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+
+		factory {
+			label = "factory";
+			linux,code = <BTN_0>;
+			gpios = <&pio 0 0>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 102 0>;
+		};
+	};
+
 	memory {
 		reg = <0 0x40000000 0 0x3F000000>;
 	};
 };
 
+&pio {
+	/* eMMC is shared pin with parallel NAND */
+	emmc_pins_default: emmc-pins-default {
+		mux {
+			function = "emmc", "emmc_rst";
+			groups = "emmc";
+		};
+	};
+
+	emmc_pins_uhs: emmc-pins-uhs {
+		mux {
+			function = "emmc";
+			groups = "emmc";
+		};
+	};
+
+	eth_pins: eth-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio", "rgmii_via_gmac2";
+		};
+	};
+
+	i2c1_pins: i2c1-pins {
+		mux {
+			function = "i2c";
+			groups =  "i2c1_0";
+		};
+	};
+
+	i2c2_pins: i2c2-pins {
+		mux {
+			function = "i2c";
+			groups =  "i2c2_0";
+		};
+	};
+
+	i2s1_pins: i2s1-pins {
+		mux {
+			function = "i2s";
+			groups =  "i2s_out_bclk_ws_mclk",
+				  "i2s1_in_data",
+				  "i2s1_out_data";
+		};
+	};
+
+	irrx_pins: irrx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_rx";
+		};
+	};
+
+	irtx_pins: irtx-pins {
+		mux {
+			function = "ir";
+			groups =  "ir_1_tx";
+		};
+	};
+
+	/* Parallel nand is shared pin with eMMC */
+	parallel_nand_pins: parallel-nand-pins {
+		mux {
+			function = "flash";
+			groups = "par_nand";
+		};
+	};
+
+	pcie0_pins: pcie0-pins {
+		mux {
+			groups = "pcie0_pad_perst",
+				 "pcie0_1_waken",
+				 "pcie0_1_clkreq";
+			function = "pcie";
+		};
+	};
+
+	pcie1_pins: pcie1-pins {
+		mux {
+			groups = "pcie1_pad_perst",
+				 "pcie1_0_waken",
+				 "pcie1_0_clkreq";
+			function = "pcie";
+		};
+	};
+
+	pmic_bus_pins: pmic-bus-pins {
+		mux {
+			groups = "pmic_bus";
+			function = "pmic";
+		};
+	};
+
+	pwm7_pins: pwm1-2-pins {
+		mux {
+			function = "pwm";
+			groups = "pwm_ch7_2";
+		};
+	};
+
+	wled_pins: wled-pins {
+		mux {
+			function = "led";
+			groups = "wled";
+		};
+	};
+
+	sd0_pins_default: sd0-pins-default {
+		mux {
+			function = "sd";
+			groups = "sd_0";
+		};
+	};
+
+	sd0_pins_uhs: sd0-pins-uhs {
+		mux {
+			function = "sd";
+			groups = "sd_0";
+		};
+	};
+
+	/* Serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	spic0_pins: spic0-pins {
+		mux {
+			function = "spi";
+			groups = "spic0_0";
+		};
+	};
+
+	spic1_pins: spic1-pins {
+		mux {
+			function = "spi";
+			groups = "spic1_0";
+		};
+	};
+
+	/* SPI-NOR is shared pin with serial NAND */
+	spi_nor_pins: spi-nor-pins {
+		mux {
+			function = "flash";
+			groups = "spi_nor";
+		};
+	};
+
+	/* serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	uart0_pins: uart0-pins {
+		mux {
+			function = "uart";
+			groups = "uart0_0_tx_rx" ;
+		};
+	};
+
+	uart2_pins: uart2-pins {
+		mux {
+			function = "uart";
+			groups = "uart2_1_tx_rx" ;
+		};
+	};
+
+	watchdog_pins: watchdog-pins {
+		mux {
+			function = "watchdog";
+			groups = "watchdog";
+		};
+	};
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
index 81207e6..8211bf7 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -147,6 +147,13 @@
 		#clock-cells = <1>;
 	};
 
+	pio: pinctrl at 10211000 {
+		compatible = "mediatek,mt7622-pinctrl";
+		reg = <0 0x10211000 0 0x1000>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
 	gic: interrupt-controller at 10300000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
-- 
2.7.4

  parent reply	other threads:[~2018-02-06  9:53 UTC|newest]

Thread overview: 85+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-06  9:52 [PATCH v2 00/16] add dts nodes to MT7622 SoC sean.wang
2018-02-06  9:52 ` sean.wang at mediatek.com
2018-02-06  9:52 ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:52 ` [PATCH v2 01/16] dt-bindings: clock: mediatek: add missing required #reset-cells sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang
2018-02-07 10:45   ` Matthias Brugger
2018-02-07 10:45     ` Matthias Brugger
2018-02-07 10:45     ` Matthias Brugger
2018-02-09  3:38     ` Sean Wang
2018-02-09  3:38       ` Sean Wang
2018-02-09  3:38       ` Sean Wang
2018-02-06  9:52 ` [PATCH v2 02/16] arm64: dts: mt7622: add clock controller device nodes sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:52 ` [PATCH v2 03/16] arm64: dts: mt7622: add power domain " sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:52 ` sean.wang [this message]
2018-02-06  9:52   ` [PATCH v2 04/16] arm64: dts: mt7622: add pinctrl related " sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-07 11:31   ` Matthias Brugger
2018-02-07 11:31     ` Matthias Brugger
2018-02-09  3:41     ` Sean Wang
2018-02-09  3:41       ` Sean Wang
2018-02-09  3:41       ` Sean Wang
2018-02-06  9:52 ` [PATCH v2 05/16] arm64: dts: mt7622: add PMIC MT6380 related nodes sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-08 14:46   ` Philippe Ombredanne
2018-02-08 14:46     ` Philippe Ombredanne
2018-02-08 14:46     ` Philippe Ombredanne
2018-02-06  9:52 ` [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-07  3:33   ` Viresh Kumar
2018-02-07  3:33     ` Viresh Kumar
2018-02-07  3:33     ` Viresh Kumar
2018-02-07  6:16     ` Sean Wang
2018-02-07  6:16       ` Sean Wang
2018-02-07  6:16       ` Sean Wang
2018-02-07  6:18       ` Viresh Kumar
2018-02-07  6:18         ` Viresh Kumar
2018-02-07  6:18         ` Viresh Kumar
2018-02-07  8:34         ` Sean Wang
2018-02-07  8:34           ` Sean Wang
2018-02-07  8:34           ` Sean Wang
2018-02-06  9:52 ` [PATCH v2 07/16] arm64: dts: mt7622: turn uart0 clock to real ones sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:52 ` [PATCH v2 08/16] arm64: dts: mt7622: add SoC and peripheral related device nodes sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang
2018-02-06  9:52 ` [PATCH v2 09/16] arm64: dts: mt7622: add flash " sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang
2018-02-06  9:52 ` [PATCH v2 10/16] arm64: dts: mt7622: add ethernet " sean.wang
2018-02-06  9:52   ` sean.wang at mediatek.com
2018-02-06  9:52   ` sean.wang
2018-02-06  9:53 ` [PATCH v2 11/16] arm64: dts: mt7622: add PCIe " sean.wang
2018-02-06  9:53   ` sean.wang at mediatek.com
2018-02-06  9:53   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:53 ` [PATCH v2 12/16] arm64: dts: mt7622: add SATA " sean.wang
2018-02-06  9:53   ` sean.wang at mediatek.com
2018-02-06  9:53   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:53 ` [PATCH v2 13/16] arm64: dts: mt7622: add usb " sean.wang
2018-02-06  9:53   ` sean.wang at mediatek.com
2018-02-06  9:53   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:53 ` [PATCH v2 14/16] arm64: dts: mt7622: add thermal and related nodes sean.wang
2018-02-06  9:53   ` sean.wang at mediatek.com
2018-02-06  9:53   ` sean.wang
2018-02-07 11:43   ` Matthias Brugger
2018-02-07 11:43     ` Matthias Brugger
2018-02-07 11:43     ` Matthias Brugger
2018-02-09  3:51     ` Sean Wang
2018-02-09  3:51       ` Sean Wang
2018-02-09  3:51       ` Sean Wang
2018-02-12 11:55       ` Matthias Brugger
2018-02-12 11:55         ` Matthias Brugger
2018-02-06  9:53 ` [PATCH v2 15/16] arm64: dts: mt7622: add High-Speed DMA device nodes sean.wang
2018-02-06  9:53   ` sean.wang at mediatek.com
2018-02-06  9:53   ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-06  9:53 ` [PATCH v2 16/16] arm64: dts: mt7622: add mmc related " sean.wang
2018-02-06  9:53   ` sean.wang at mediatek.com
2018-02-06  9:53   ` sean.wang

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