[PATCH 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[PATCH 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Andrey Grodzovsky]

and amdgpu_bo_create_reserved.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 48e0115..11673c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -171,7 +171,7 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr: resulting BO (new BO is created if bo_ptr is NULL)
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
@@ -240,7 +240,7 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr: resulting BO (new BO is created if bo_ptr is NULL)
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
-- 
2.7.4

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[PATCH 2/2] drm/amd/powerplay: Fix KASAN user after free on driver unload.

[Andrey Grodzovsky]

Reusing local handle to initialize BO without resetting it to
NULL is wrong since it causes amdgpu_bo_create_reserved to skip
new BO creation and just reuse the given pointer for pinning.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c     |  7 ++-----
 drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 16 +++++-----------
 2 files changed, 7 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
index e2ee23a..65c6ca7 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
@@ -327,7 +327,6 @@ static int rv_start_smu(struct pp_hwmgr *hwmgr)
 
 static int rv_smu_init(struct pp_hwmgr *hwmgr)
 {
-	struct amdgpu_bo *handle = NULL;
 	struct rv_smumgr *priv;
 	uint64_t mc_addr;
 	void *kaddr = NULL;
@@ -345,7 +344,7 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
 			sizeof(Watermarks_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
+			&priv->smu_tables.entry[WMTABLE].handle,
 			&mc_addr,
 			&kaddr);
 
@@ -357,14 +356,13 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
 	priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
 	priv->smu_tables.entry[WMTABLE].table = kaddr;
-	priv->smu_tables.entry[WMTABLE].handle = handle;
 
 	/* allocate space for watermarks table */
 	r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
 			sizeof(DpmClocks_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
+			&priv->smu_tables.entry[CLOCKTABLE].handle,
 			&mc_addr,
 			&kaddr);
 
@@ -380,7 +378,6 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[CLOCKTABLE].table_id = TABLE_DPMCLOCKS;
 	priv->smu_tables.entry[CLOCKTABLE].mc_addr = mc_addr;
 	priv->smu_tables.entry[CLOCKTABLE].table = kaddr;
-	priv->smu_tables.entry[CLOCKTABLE].handle = handle;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
index 15e1afa..c8b326e 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
@@ -377,7 +377,6 @@ static int vega10_verify_smc_interface(struct pp_hwmgr *hwmgr)
 
 static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 {
-	struct amdgpu_bo *handle = NULL;
 	struct vega10_smumgr *priv;
 	uint64_t mc_addr;
 	void *kaddr = NULL;
@@ -403,7 +402,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 			sizeof(PPTable_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
+			&priv->smu_tables.entry[PPTABLE].handle,
 			&mc_addr,
 			&kaddr);
 
@@ -415,14 +414,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[PPTABLE].table_id = TABLE_PPTABLE;
 	priv->smu_tables.entry[PPTABLE].mc_addr = mc_addr;
 	priv->smu_tables.entry[PPTABLE].table = kaddr;
-	priv->smu_tables.entry[PPTABLE].handle = handle;
 
 	/* allocate space for watermarks table */
 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
 			sizeof(Watermarks_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
+			&priv->smu_tables.entry[WMTABLE].handle,
 			&mc_addr,
 			&kaddr);
 
@@ -434,14 +432,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
 	priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
 	priv->smu_tables.entry[WMTABLE].table = kaddr;
-	priv->smu_tables.entry[WMTABLE].handle = handle;
 
 	/* allocate space for AVFS table */
 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
 			sizeof(AvfsTable_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
+			&priv->smu_tables.entry[AVFSTABLE].handle,
 			&mc_addr,
 			&kaddr);
 
@@ -453,7 +450,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[AVFSTABLE].table_id = TABLE_AVFS;
 	priv->smu_tables.entry[AVFSTABLE].mc_addr = mc_addr;
 	priv->smu_tables.entry[AVFSTABLE].table = kaddr;
-	priv->smu_tables.entry[AVFSTABLE].handle = handle;
 
 	tools_size = 0x19000;
 	if (tools_size) {
@@ -461,7 +457,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 				tools_size,
 				PAGE_SIZE,
 				AMDGPU_GEM_DOMAIN_VRAM,
-				&handle,
+				&priv->smu_tables.entry[TOOLSTABLE].handle,
 				&mc_addr,
 				&kaddr);
 		if (ret)
@@ -471,7 +467,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 		priv->smu_tables.entry[TOOLSTABLE].table_id = TABLE_PMSTATUSLOG;
 		priv->smu_tables.entry[TOOLSTABLE].mc_addr = mc_addr;
 		priv->smu_tables.entry[TOOLSTABLE].table = kaddr;
-		priv->smu_tables.entry[TOOLSTABLE].handle = handle;
 	}
 
 	/* allocate space for AVFS Fuse table */
@@ -479,7 +474,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 			sizeof(AvfsFuseOverride_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
+			&priv->smu_tables.entry[AVFSFUSETABLE].handle,
 			&mc_addr,
 			&kaddr);
 	if (ret)
@@ -490,7 +485,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[AVFSFUSETABLE].table_id = TABLE_AVFS_FUSE_OVERRIDE;
 	priv->smu_tables.entry[AVFSFUSETABLE].mc_addr = mc_addr;
 	priv->smu_tables.entry[AVFSFUSETABLE].table = kaddr;
-	priv->smu_tables.entry[AVFSFUSETABLE].handle = handle;
 
 	return 0;
 
-- 
2.7.4

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Re: [PATCH 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Christian König]

Am 14.03.2018 um 19:07 schrieb Andrey Grodzovsky:
> and amdgpu_bo_create_reserved.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 48e0115..11673c3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -171,7 +171,7 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
>    * @size: size for the new BO
>    * @align: alignment for the new BO
>    * @domain: where to place it
> - * @bo_ptr: resulting BO
> + * @bo_ptr: resulting BO (new BO is created if bo_ptr is NULL)

Maybe add "only" here, e.g. new BO is only created if bo_ptr points to NULL.

And add something like "used to initialize BOs in structures".

Either way the patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>.

Christian.

>    * @gpu_addr: GPU addr of the pinned BO
>    * @cpu_addr: optional CPU address mapping
>    *
> @@ -240,7 +240,7 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
>    * @size: size for the new BO
>    * @align: alignment for the new BO
>    * @domain: where to place it
> - * @bo_ptr: resulting BO
> + * @bo_ptr: resulting BO (new BO is created if bo_ptr is NULL)
>    * @gpu_addr: GPU addr of the pinned BO
>    * @cpu_addr: optional CPU address mapping
>    *

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Re: [PATCH 2/2] drm/amd/powerplay: Fix KASAN user after free on driver unload.

[Christian König]

Am 14.03.2018 um 19:07 schrieb Andrey Grodzovsky:
> Reusing local handle to initialize BO without resetting it to
> NULL is wrong since it causes amdgpu_bo_create_reserved to skip
> new BO creation and just reuse the given pointer for pinning.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
> ---
>   drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c     |  7 ++-----
>   drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 16 +++++-----------
>   2 files changed, 7 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> index e2ee23a..65c6ca7 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> @@ -327,7 +327,6 @@ static int rv_start_smu(struct pp_hwmgr *hwmgr)
>   
>   static int rv_smu_init(struct pp_hwmgr *hwmgr)
>   {
> -	struct amdgpu_bo *handle = NULL;
>   	struct rv_smumgr *priv;
>   	uint64_t mc_addr;
>   	void *kaddr = NULL;
> @@ -345,7 +344,7 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
>   			sizeof(Watermarks_t),
>   			PAGE_SIZE,
>   			AMDGPU_GEM_DOMAIN_VRAM,
> -			&handle,
> +			&priv->smu_tables.entry[WMTABLE].handle,
>   			&mc_addr,
>   			&kaddr);
>   
> @@ -357,14 +356,13 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
>   	priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
>   	priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
>   	priv->smu_tables.entry[WMTABLE].table = kaddr;
> -	priv->smu_tables.entry[WMTABLE].handle = handle;
>   
>   	/* allocate space for watermarks table */
>   	r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
>   			sizeof(DpmClocks_t),
>   			PAGE_SIZE,
>   			AMDGPU_GEM_DOMAIN_VRAM,
> -			&handle,
> +			&priv->smu_tables.entry[CLOCKTABLE].handle,
>   			&mc_addr,
>   			&kaddr);
>   
> @@ -380,7 +378,6 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
>   	priv->smu_tables.entry[CLOCKTABLE].table_id = TABLE_DPMCLOCKS;
>   	priv->smu_tables.entry[CLOCKTABLE].mc_addr = mc_addr;
>   	priv->smu_tables.entry[CLOCKTABLE].table = kaddr;
> -	priv->smu_tables.entry[CLOCKTABLE].handle = handle;
>   
>   	return 0;
>   }
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
> index 15e1afa..c8b326e 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
> @@ -377,7 +377,6 @@ static int vega10_verify_smc_interface(struct pp_hwmgr *hwmgr)
>   
>   static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   {
> -	struct amdgpu_bo *handle = NULL;
>   	struct vega10_smumgr *priv;
>   	uint64_t mc_addr;
>   	void *kaddr = NULL;
> @@ -403,7 +402,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   			sizeof(PPTable_t),
>   			PAGE_SIZE,
>   			AMDGPU_GEM_DOMAIN_VRAM,
> -			&handle,
> +			&priv->smu_tables.entry[PPTABLE].handle,
>   			&mc_addr,
>   			&kaddr);
>   
> @@ -415,14 +414,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   	priv->smu_tables.entry[PPTABLE].table_id = TABLE_PPTABLE;
>   	priv->smu_tables.entry[PPTABLE].mc_addr = mc_addr;
>   	priv->smu_tables.entry[PPTABLE].table = kaddr;
> -	priv->smu_tables.entry[PPTABLE].handle = handle;
>   
>   	/* allocate space for watermarks table */
>   	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
>   			sizeof(Watermarks_t),
>   			PAGE_SIZE,
>   			AMDGPU_GEM_DOMAIN_VRAM,
> -			&handle,
> +			&priv->smu_tables.entry[WMTABLE].handle,
>   			&mc_addr,
>   			&kaddr);
>   
> @@ -434,14 +432,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   	priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
>   	priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
>   	priv->smu_tables.entry[WMTABLE].table = kaddr;
> -	priv->smu_tables.entry[WMTABLE].handle = handle;
>   
>   	/* allocate space for AVFS table */
>   	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
>   			sizeof(AvfsTable_t),
>   			PAGE_SIZE,
>   			AMDGPU_GEM_DOMAIN_VRAM,
> -			&handle,
> +			&priv->smu_tables.entry[AVFSTABLE].handle,
>   			&mc_addr,
>   			&kaddr);
>   
> @@ -453,7 +450,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   	priv->smu_tables.entry[AVFSTABLE].table_id = TABLE_AVFS;
>   	priv->smu_tables.entry[AVFSTABLE].mc_addr = mc_addr;
>   	priv->smu_tables.entry[AVFSTABLE].table = kaddr;
> -	priv->smu_tables.entry[AVFSTABLE].handle = handle;
>   
>   	tools_size = 0x19000;
>   	if (tools_size) {
> @@ -461,7 +457,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   				tools_size,
>   				PAGE_SIZE,
>   				AMDGPU_GEM_DOMAIN_VRAM,
> -				&handle,
> +				&priv->smu_tables.entry[TOOLSTABLE].handle,
>   				&mc_addr,
>   				&kaddr);

I think it would be better to specify mc_addr and kaddr directly as well.

Christian.

>   		if (ret)
> @@ -471,7 +467,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   		priv->smu_tables.entry[TOOLSTABLE].table_id = TABLE_PMSTATUSLOG;
>   		priv->smu_tables.entry[TOOLSTABLE].mc_addr = mc_addr;
>   		priv->smu_tables.entry[TOOLSTABLE].table = kaddr;
> -		priv->smu_tables.entry[TOOLSTABLE].handle = handle;
>   	}
>   
>   	/* allocate space for AVFS Fuse table */
> @@ -479,7 +474,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   			sizeof(AvfsFuseOverride_t),
>   			PAGE_SIZE,
>   			AMDGPU_GEM_DOMAIN_VRAM,
> -			&handle,
> +			&priv->smu_tables.entry[AVFSFUSETABLE].handle,
>   			&mc_addr,
>   			&kaddr);
>   	if (ret)
> @@ -490,7 +485,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   	priv->smu_tables.entry[AVFSFUSETABLE].table_id = TABLE_AVFS_FUSE_OVERRIDE;
>   	priv->smu_tables.entry[AVFSFUSETABLE].mc_addr = mc_addr;
>   	priv->smu_tables.entry[AVFSFUSETABLE].table = kaddr;
> -	priv->smu_tables.entry[AVFSFUSETABLE].handle = handle;
>   
>   	return 0;
>   

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Re: [PATCH 2/2] drm/amd/powerplay: Fix KASAN user after free on driver unload.

[Zhu, Rex]

[-- Attachment #1.1: Type: text/plain, Size: 7670 bytes --]

Apply this patch with Christian's suggestions.


Thanks.


Best Regards

Rex


________________________________
From: Christian König <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Sent: Thursday, March 15, 2018 2:21 AM
To: Grodzovsky, Andrey; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Zhu, Rex; Koenig, Christian
Subject: Re: [PATCH 2/2] drm/amd/powerplay: Fix KASAN user after free on driver unload.

Am 14.03.2018 um 19:07 schrieb Andrey Grodzovsky:
> Reusing local handle to initialize BO without resetting it to
> NULL is wrong since it causes amdgpu_bo_create_reserved to skip
> new BO creation and just reuse the given pointer for pinning.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
> ---
>   drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c     |  7 ++-----
>   drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 16 +++++-----------
>   2 files changed, 7 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> index e2ee23a..65c6ca7 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
> @@ -327,7 +327,6 @@ static int rv_start_smu(struct pp_hwmgr *hwmgr)
>
>   static int rv_smu_init(struct pp_hwmgr *hwmgr)
>   {
> -     struct amdgpu_bo *handle = NULL;
>        struct rv_smumgr *priv;
>        uint64_t mc_addr;
>        void *kaddr = NULL;
> @@ -345,7 +344,7 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
>                        sizeof(Watermarks_t),
>                        PAGE_SIZE,
>                        AMDGPU_GEM_DOMAIN_VRAM,
> -                     &handle,
> +                     &priv->smu_tables.entry[WMTABLE].handle,
>                        &mc_addr,
>                        &kaddr);
>
> @@ -357,14 +356,13 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
>        priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
>        priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
>        priv->smu_tables.entry[WMTABLE].table = kaddr;
> -     priv->smu_tables.entry[WMTABLE].handle = handle;
>
>        /* allocate space for watermarks table */
>        r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
>                        sizeof(DpmClocks_t),
>                        PAGE_SIZE,
>                        AMDGPU_GEM_DOMAIN_VRAM,
> -                     &handle,
> +                     &priv->smu_tables.entry[CLOCKTABLE].handle,
>                        &mc_addr,
>                        &kaddr);
>
> @@ -380,7 +378,6 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
>        priv->smu_tables.entry[CLOCKTABLE].table_id = TABLE_DPMCLOCKS;
>        priv->smu_tables.entry[CLOCKTABLE].mc_addr = mc_addr;
>        priv->smu_tables.entry[CLOCKTABLE].table = kaddr;
> -     priv->smu_tables.entry[CLOCKTABLE].handle = handle;
>
>        return 0;
>   }
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
> index 15e1afa..c8b326e 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
> @@ -377,7 +377,6 @@ static int vega10_verify_smc_interface(struct pp_hwmgr *hwmgr)
>
>   static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>   {
> -     struct amdgpu_bo *handle = NULL;
>        struct vega10_smumgr *priv;
>        uint64_t mc_addr;
>        void *kaddr = NULL;
> @@ -403,7 +402,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>                        sizeof(PPTable_t),
>                        PAGE_SIZE,
>                        AMDGPU_GEM_DOMAIN_VRAM,
> -                     &handle,
> +                     &priv->smu_tables.entry[PPTABLE].handle,
>                        &mc_addr,
>                        &kaddr);
>
> @@ -415,14 +414,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>        priv->smu_tables.entry[PPTABLE].table_id = TABLE_PPTABLE;
>        priv->smu_tables.entry[PPTABLE].mc_addr = mc_addr;
>        priv->smu_tables.entry[PPTABLE].table = kaddr;
> -     priv->smu_tables.entry[PPTABLE].handle = handle;
>
>        /* allocate space for watermarks table */
>        ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
>                        sizeof(Watermarks_t),
>                        PAGE_SIZE,
>                        AMDGPU_GEM_DOMAIN_VRAM,
> -                     &handle,
> +                     &priv->smu_tables.entry[WMTABLE].handle,
>                        &mc_addr,
>                        &kaddr);
>
> @@ -434,14 +432,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>        priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
>        priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
>        priv->smu_tables.entry[WMTABLE].table = kaddr;
> -     priv->smu_tables.entry[WMTABLE].handle = handle;
>
>        /* allocate space for AVFS table */
>        ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
>                        sizeof(AvfsTable_t),
>                        PAGE_SIZE,
>                        AMDGPU_GEM_DOMAIN_VRAM,
> -                     &handle,
> +                     &priv->smu_tables.entry[AVFSTABLE].handle,
>                        &mc_addr,
>                        &kaddr);
>
> @@ -453,7 +450,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>        priv->smu_tables.entry[AVFSTABLE].table_id = TABLE_AVFS;
>        priv->smu_tables.entry[AVFSTABLE].mc_addr = mc_addr;
>        priv->smu_tables.entry[AVFSTABLE].table = kaddr;
> -     priv->smu_tables.entry[AVFSTABLE].handle = handle;
>
>        tools_size = 0x19000;
>        if (tools_size) {
> @@ -461,7 +457,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>                                tools_size,
>                                PAGE_SIZE,
>                                AMDGPU_GEM_DOMAIN_VRAM,
> -                             &handle,
> +                             &priv->smu_tables.entry[TOOLSTABLE].handle,
>                                &mc_addr,
>                                &kaddr);

I think it would be better to specify mc_addr and kaddr directly as well.

Christian.

>                if (ret)
> @@ -471,7 +467,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>                priv->smu_tables.entry[TOOLSTABLE].table_id = TABLE_PMSTATUSLOG;
>                priv->smu_tables.entry[TOOLSTABLE].mc_addr = mc_addr;
>                priv->smu_tables.entry[TOOLSTABLE].table = kaddr;
> -             priv->smu_tables.entry[TOOLSTABLE].handle = handle;
>        }
>
>        /* allocate space for AVFS Fuse table */
> @@ -479,7 +474,7 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>                        sizeof(AvfsFuseOverride_t),
>                        PAGE_SIZE,
>                        AMDGPU_GEM_DOMAIN_VRAM,
> -                     &handle,
> +                     &priv->smu_tables.entry[AVFSFUSETABLE].handle,
>                        &mc_addr,
>                        &kaddr);
>        if (ret)
> @@ -490,7 +485,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
>        priv->smu_tables.entry[AVFSFUSETABLE].table_id = TABLE_AVFS_FUSE_OVERRIDE;
>        priv->smu_tables.entry[AVFSFUSETABLE].mc_addr = mc_addr;
>        priv->smu_tables.entry[AVFSFUSETABLE].table = kaddr;
> -     priv->smu_tables.entry[AVFSFUSETABLE].handle = handle;
>
>        return 0;
>


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[PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Andrey Grodzovsky]

and amdgpu_bo_create_reserved.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 48e0115..ac1fa33 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -171,13 +171,15 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr: used to initialize BOs in structures
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
  * Allocates and pins a BO for kernel internal use, and returns it still
  * reserved.
  *
+ * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
+ *
  * Returns 0 on success, negative error code otherwise.
  */
 int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
@@ -240,12 +242,14 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr:  used to initialize BOs in structures
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
  * Allocates and pins a BO for kernel internal use.
  *
+ * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
+ *
  * Returns 0 on success, negative error code otherwise.
  */
 int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
-- 
2.7.4

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[PATCH v2 2/2] drm/amd/powerplay: Fix KASAN user after after free on driver unload.

[Andrey Grodzovsky]

Reusing local handle to initialize BO without resetting it to
NULL is wrong since it causes amdgpu_bo_create_reserved to skip
new BO creation and just reuse the given pointer for pinning.

v2:
Get rid of mc_addr and kaddr.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c   | 21 +++-------
 .../gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c   | 48 +++++++---------------
 2 files changed, 21 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
index e2ee23a..01fcfb9 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/rv_smumgr.c
@@ -327,10 +327,7 @@ static int rv_start_smu(struct pp_hwmgr *hwmgr)
 
 static int rv_smu_init(struct pp_hwmgr *hwmgr)
 {
-	struct amdgpu_bo *handle = NULL;
 	struct rv_smumgr *priv;
-	uint64_t mc_addr;
-	void *kaddr = NULL;
 	int r;
 
 	priv = kzalloc(sizeof(struct rv_smumgr), GFP_KERNEL);
@@ -345,9 +342,9 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
 			sizeof(Watermarks_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
-			&mc_addr,
-			&kaddr);
+			&priv->smu_tables.entry[WMTABLE].handle,
+			&priv->smu_tables.entry[WMTABLE].mc_addr,
+			&priv->smu_tables.entry[WMTABLE].table);
 
 	if (r)
 		return -EINVAL;
@@ -355,18 +352,15 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[WMTABLE].version = 0x01;
 	priv->smu_tables.entry[WMTABLE].size = sizeof(Watermarks_t);
 	priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
-	priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
-	priv->smu_tables.entry[WMTABLE].table = kaddr;
-	priv->smu_tables.entry[WMTABLE].handle = handle;
 
 	/* allocate space for watermarks table */
 	r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
 			sizeof(DpmClocks_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
-			&mc_addr,
-			&kaddr);
+			&priv->smu_tables.entry[CLOCKTABLE].handle,
+			&priv->smu_tables.entry[CLOCKTABLE].mc_addr,
+			&priv->smu_tables.entry[CLOCKTABLE].table);
 
 	if (r) {
 		amdgpu_bo_free_kernel(&priv->smu_tables.entry[WMTABLE].handle,
@@ -378,9 +372,6 @@ static int rv_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[CLOCKTABLE].version = 0x01;
 	priv->smu_tables.entry[CLOCKTABLE].size = sizeof(DpmClocks_t);
 	priv->smu_tables.entry[CLOCKTABLE].table_id = TABLE_DPMCLOCKS;
-	priv->smu_tables.entry[CLOCKTABLE].mc_addr = mc_addr;
-	priv->smu_tables.entry[CLOCKTABLE].table = kaddr;
-	priv->smu_tables.entry[CLOCKTABLE].handle = handle;
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
index 15e1afa..c13cf4e 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
@@ -377,10 +377,7 @@ static int vega10_verify_smc_interface(struct pp_hwmgr *hwmgr)
 
 static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 {
-	struct amdgpu_bo *handle = NULL;
 	struct vega10_smumgr *priv;
-	uint64_t mc_addr;
-	void *kaddr = NULL;
 	unsigned long tools_size;
 	int ret;
 	struct cgs_firmware_info info = {0};
@@ -403,9 +400,9 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 			sizeof(PPTable_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
-			&mc_addr,
-			&kaddr);
+			&priv->smu_tables.entry[PPTABLE].handle,
+			&priv->smu_tables.entry[PPTABLE].mc_addr,
+			&priv->smu_tables.entry[PPTABLE].table);
 
 	if (ret)
 		return -EINVAL;
@@ -413,18 +410,15 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[PPTABLE].version = 0x01;
 	priv->smu_tables.entry[PPTABLE].size = sizeof(PPTable_t);
 	priv->smu_tables.entry[PPTABLE].table_id = TABLE_PPTABLE;
-	priv->smu_tables.entry[PPTABLE].mc_addr = mc_addr;
-	priv->smu_tables.entry[PPTABLE].table = kaddr;
-	priv->smu_tables.entry[PPTABLE].handle = handle;
 
 	/* allocate space for watermarks table */
 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
 			sizeof(Watermarks_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
-			&mc_addr,
-			&kaddr);
+			&priv->smu_tables.entry[WMTABLE].handle,
+			&priv->smu_tables.entry[WMTABLE].mc_addr,
+			&priv->smu_tables.entry[WMTABLE].table);
 
 	if (ret)
 		goto err0;
@@ -432,18 +426,15 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[WMTABLE].version = 0x01;
 	priv->smu_tables.entry[WMTABLE].size = sizeof(Watermarks_t);
 	priv->smu_tables.entry[WMTABLE].table_id = TABLE_WATERMARKS;
-	priv->smu_tables.entry[WMTABLE].mc_addr = mc_addr;
-	priv->smu_tables.entry[WMTABLE].table = kaddr;
-	priv->smu_tables.entry[WMTABLE].handle = handle;
 
 	/* allocate space for AVFS table */
 	ret = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
 			sizeof(AvfsTable_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
-			&mc_addr,
-			&kaddr);
+			&priv->smu_tables.entry[AVFSTABLE].handle,
+			&priv->smu_tables.entry[AVFSTABLE].mc_addr,
+			&priv->smu_tables.entry[AVFSTABLE].table);
 
 	if (ret)
 		goto err1;
@@ -451,9 +442,6 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 	priv->smu_tables.entry[AVFSTABLE].version = 0x01;
 	priv->smu_tables.entry[AVFSTABLE].size = sizeof(AvfsTable_t);
 	priv->smu_tables.entry[AVFSTABLE].table_id = TABLE_AVFS;
-	priv->smu_tables.entry[AVFSTABLE].mc_addr = mc_addr;
-	priv->smu_tables.entry[AVFSTABLE].table = kaddr;
-	priv->smu_tables.entry[AVFSTABLE].handle = handle;
 
 	tools_size = 0x19000;
 	if (tools_size) {
@@ -461,17 +449,14 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 				tools_size,
 				PAGE_SIZE,
 				AMDGPU_GEM_DOMAIN_VRAM,
-				&handle,
-				&mc_addr,
-				&kaddr);
+				&priv->smu_tables.entry[TOOLSTABLE].handle,
+				&priv->smu_tables.entry[TOOLSTABLE].mc_addr,
+				&priv->smu_tables.entry[TOOLSTABLE].table);
 		if (ret)
 			goto err2;
 		priv->smu_tables.entry[TOOLSTABLE].version = 0x01;
 		priv->smu_tables.entry[TOOLSTABLE].size = tools_size;
 		priv->smu_tables.entry[TOOLSTABLE].table_id = TABLE_PMSTATUSLOG;
-		priv->smu_tables.entry[TOOLSTABLE].mc_addr = mc_addr;
-		priv->smu_tables.entry[TOOLSTABLE].table = kaddr;
-		priv->smu_tables.entry[TOOLSTABLE].handle = handle;
 	}
 
 	/* allocate space for AVFS Fuse table */
@@ -479,18 +464,15 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr)
 			sizeof(AvfsFuseOverride_t),
 			PAGE_SIZE,
 			AMDGPU_GEM_DOMAIN_VRAM,
-			&handle,
-			&mc_addr,
-			&kaddr);
+			&priv->smu_tables.entry[AVFSFUSETABLE].handle,
+			&priv->smu_tables.entry[AVFSFUSETABLE].mc_addr,
+			&priv->smu_tables.entry[AVFSFUSETABLE].table);
 	if (ret)
 		goto err3;
 
 	priv->smu_tables.entry[AVFSFUSETABLE].version = 0x01;
 	priv->smu_tables.entry[AVFSFUSETABLE].size = sizeof(AvfsFuseOverride_t);
 	priv->smu_tables.entry[AVFSFUSETABLE].table_id = TABLE_AVFS_FUSE_OVERRIDE;
-	priv->smu_tables.entry[AVFSFUSETABLE].mc_addr = mc_addr;
-	priv->smu_tables.entry[AVFSFUSETABLE].table = kaddr;
-	priv->smu_tables.entry[AVFSFUSETABLE].handle = handle;
 
 	return 0;
 
-- 
2.7.4

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Re: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Deucher, Alexander]

[-- Attachment #1.1: Type: text/plain, Size: 2581 bytes --]

For the series:

Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>

I think Rex already applied the second one.


________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
Sent: Thursday, March 15, 2018 12:15 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; Zhu, Rex
Cc: Grodzovsky, Andrey
Subject: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

and amdgpu_bo_create_reserved.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 48e0115..ac1fa33 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -171,13 +171,15 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr: used to initialize BOs in structures
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
  * Allocates and pins a BO for kernel internal use, and returns it still
  * reserved.
  *
+ * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
+ *
  * Returns 0 on success, negative error code otherwise.
  */
 int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
@@ -240,12 +242,14 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr:  used to initialize BOs in structures
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
  * Allocates and pins a BO for kernel internal use.
  *
+ * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
+ *
  * Returns 0 on success, negative error code otherwise.
  */
 int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
--
2.7.4

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Re: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Andrey Grodzovsky]

[-- Attachment #1.1: Type: text/plain, Size: 2858 bytes --]

That explains the merge conflict that surprised me :)


Thanks,

Andrey


On 03/15/2018 12:18 PM, Deucher, Alexander wrote:
>
> For the series:
>
> Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
>
> I think Rex already applied the second one.
>
>
> ------------------------------------------------------------------------
> *From:* amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of 
> Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
> *Sent:* Thursday, March 15, 2018 12:15 PM
> *To:* amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; 
> Zhu, Rex
> *Cc:* Grodzovsky, Andrey
> *Subject:* [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr 
> in amdgpu_bo_create_kernel
> and amdgpu_bo_create_reserved.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 48e0115..ac1fa33 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -171,13 +171,15 @@ void amdgpu_ttm_placement_from_domain(struct 
> amdgpu_bo *abo, u32 domain)
>   * @size: size for the new BO
>   * @align: alignment for the new BO
>   * @domain: where to place it
> - * @bo_ptr: resulting BO
> + * @bo_ptr: used to initialize BOs in structures
>   * @gpu_addr: GPU addr of the pinned BO
>   * @cpu_addr: optional CPU address mapping
>   *
>   * Allocates and pins a BO for kernel internal use, and returns it still
>   * reserved.
>   *
> + * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
> + *
>   * Returns 0 on success, negative error code otherwise.
>   */
>  int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
> @@ -240,12 +242,14 @@ int amdgpu_bo_create_reserved(struct 
> amdgpu_device *adev,
>   * @size: size for the new BO
>   * @align: alignment for the new BO
>   * @domain: where to place it
> - * @bo_ptr: resulting BO
> + * @bo_ptr:  used to initialize BOs in structures
>   * @gpu_addr: GPU addr of the pinned BO
>   * @cpu_addr: optional CPU address mapping
>   *
>   * Allocates and pins a BO for kernel internal use.
>   *
> + * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
> + *
>   * Returns 0 on success, negative error code otherwise.
>   */
>  int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
> -- 
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


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Re: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Christian König]

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Yeah, not really the usually flow.

Either way Reviewed-by: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org> for both.

Christian.

Am 15.03.2018 um 17:19 schrieb Andrey Grodzovsky:
>
> That explains the merge conflict that surprised me :)
>
>
> Thanks,
>
> Andrey
>
>
> On 03/15/2018 12:18 PM, Deucher, Alexander wrote:
>>
>> For the series:
>>
>> Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
>>
>> I think Rex already applied the second one.
>>
>>
>> ------------------------------------------------------------------------
>> *From:* amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of 
>> Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
>> *Sent:* Thursday, March 15, 2018 12:15 PM
>> *To:* amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; 
>> ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; Zhu, Rex
>> *Cc:* Grodzovsky, Andrey
>> *Subject:* [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr 
>> in amdgpu_bo_create_kernel
>> and amdgpu_bo_create_reserved.
>>
>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
>>  1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index 48e0115..ac1fa33 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -171,13 +171,15 @@ void amdgpu_ttm_placement_from_domain(struct 
>> amdgpu_bo *abo, u32 domain)
>>   * @size: size for the new BO
>>   * @align: alignment for the new BO
>>   * @domain: where to place it
>> - * @bo_ptr: resulting BO
>> + * @bo_ptr: used to initialize BOs in structures
>>   * @gpu_addr: GPU addr of the pinned BO
>>   * @cpu_addr: optional CPU address mapping
>>   *
>>   * Allocates and pins a BO for kernel internal use, and returns it still
>>   * reserved.
>>   *
>> + * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
>> + *
>>   * Returns 0 on success, negative error code otherwise.
>>   */
>>  int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
>> @@ -240,12 +242,14 @@ int amdgpu_bo_create_reserved(struct 
>> amdgpu_device *adev,
>>   * @size: size for the new BO
>>   * @align: alignment for the new BO
>>   * @domain: where to place it
>> - * @bo_ptr: resulting BO
>> + * @bo_ptr:  used to initialize BOs in structures
>>   * @gpu_addr: GPU addr of the pinned BO
>>   * @cpu_addr: optional CPU address mapping
>>   *
>>   * Allocates and pins a BO for kernel internal use.
>>   *
>> + * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
>> + *
>>   * Returns 0 on success, negative error code otherwise.
>>   */
>>  int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
>> -- 
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>


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RE: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Zhu, Rex]

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Hi Andrey,

Sorry for the confusion.
I just need to push a bunch of patches that conflict with  your patch.
So apply your patch first.


Best Regards
Rex

From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of Andrey Grodzovsky
Sent: Friday, March 16, 2018 12:20 AM
To: Deucher, Alexander; amd-gfx@lists.freedesktop.org; ckoenig.leichtzumerken@gmail.com; Zhu, Rex
Subject: Re: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel


That explains the merge conflict that surprised me :)



Thanks,

Andrey

On 03/15/2018 12:18 PM, Deucher, Alexander wrote:

For the series:

Reviewed-by: Alex Deucher <alexander.deucher@amd.com><mailto:alexander.deucher@amd.com>
I think Rex already applied the second one.

________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org><mailto:amd-gfx-bounces@lists.freedesktop.org> on behalf of Andrey Grodzovsky <andrey.grodzovsky@amd.com><mailto:andrey.grodzovsky@amd.com>
Sent: Thursday, March 15, 2018 12:15 PM
To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>; ckoenig.leichtzumerken@gmail.com<mailto:ckoenig.leichtzumerken@gmail.com>; Zhu, Rex
Cc: Grodzovsky, Andrey
Subject: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

and amdgpu_bo_create_reserved.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com><mailto:andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 48e0115..ac1fa33 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -171,13 +171,15 @@ void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr: used to initialize BOs in structures
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
  * Allocates and pins a BO for kernel internal use, and returns it still
  * reserved.
  *
+ * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
+ *
  * Returns 0 on success, negative error code otherwise.
  */
 int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
@@ -240,12 +242,14 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
  * @size: size for the new BO
  * @align: alignment for the new BO
  * @domain: where to place it
- * @bo_ptr: resulting BO
+ * @bo_ptr:  used to initialize BOs in structures
  * @gpu_addr: GPU addr of the pinned BO
  * @cpu_addr: optional CPU address mapping
  *
  * Allocates and pins a BO for kernel internal use.
  *
+ * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
+ *
  * Returns 0 on success, negative error code otherwise.
  */
 int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
--
2.7.4

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Re: [PATCH v2 1/2] drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel

[Andrey Grodzovsky]

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NP, makes sense what you did.


Andrey


On 03/16/2018 01:44 AM, Zhu, Rex wrote:
>
> Hi Andrey,
>
> Sorry for the confusion.
>
> I just need to push a bunch of patches that conflict with  your patch.
>
> So apply your patch first.
>
> Best Regards
>
> Rex
>
> *From:*amd-gfx [mailto:amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org] *On 
> Behalf Of *Andrey Grodzovsky
> *Sent:* Friday, March 16, 2018 12:20 AM
> *To:* Deucher, Alexander; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; 
> ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org; Zhu, Rex
> *Subject:* Re: [PATCH v2 1/2] drm/amdgpu: Improve documentation of 
> bo_ptr in amdgpu_bo_create_kernel
>
> That explains the merge conflict that surprised me :)
>
> Thanks,
>
> Andrey
>
> On 03/15/2018 12:18 PM, Deucher, Alexander wrote:
>
>     For the series:
>
>     Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
>     <mailto:alexander.deucher-5C7GfCeVMHo@public.gmane.org>
>
>     I think Rex already applied the second one.
>
>     ------------------------------------------------------------------------
>
>     *From:*amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>     <mailto:amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Andrey
>     Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
>     <mailto:andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
>     *Sent:* Thursday, March 15, 2018 12:15 PM
>     *To:* amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
>     <mailto:amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>;
>     ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
>     <mailto:ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>; Zhu, Rex
>     *Cc:* Grodzovsky, Andrey
>     *Subject:* [PATCH v2 1/2] drm/amdgpu: Improve documentation of
>     bo_ptr in amdgpu_bo_create_kernel
>
>     and amdgpu_bo_create_reserved.
>
>     Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
>     <mailto:andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
>     ---
>      drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 8 ++++++--
>      1 file changed, 6 insertions(+), 2 deletions(-)
>
>     diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     index 48e0115..ac1fa33 100644
>     --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>     @@ -171,13 +171,15 @@ void amdgpu_ttm_placement_from_domain(struct
>     amdgpu_bo *abo, u32 domain)
>       * @size: size for the new BO
>       * @align: alignment for the new BO
>       * @domain: where to place it
>     - * @bo_ptr: resulting BO
>     + * @bo_ptr: used to initialize BOs in structures
>       * @gpu_addr: GPU addr of the pinned BO
>       * @cpu_addr: optional CPU address mapping
>       *
>       * Allocates and pins a BO for kernel internal use, and returns
>     it still
>       * reserved.
>       *
>     + * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
>     + *
>       * Returns 0 on success, negative error code otherwise.
>       */
>      int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
>     @@ -240,12 +242,14 @@ int amdgpu_bo_create_reserved(struct
>     amdgpu_device *adev,
>       * @size: size for the new BO
>       * @align: alignment for the new BO
>       * @domain: where to place it
>     - * @bo_ptr: resulting BO
>     + * @bo_ptr:  used to initialize BOs in structures
>       * @gpu_addr: GPU addr of the pinned BO
>       * @cpu_addr: optional CPU address mapping
>       *
>       * Allocates and pins a BO for kernel internal use.
>       *
>     + * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
>     + *
>       * Returns 0 on success, negative error code otherwise.
>       */
>      int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
>     -- 
>     2.7.4
>
>     _______________________________________________
>     amd-gfx mailing list
>     amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org <mailto:amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
>     https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>


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