[PATCH] DTS: Add compatible list for eSDHC

[PATCH] DTS: Add compatible list for eSDHC

[Haijun Zhang]

Add compatible of esdhc for below board:
p2041   p3041   p4080   p5020   p5040

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
---
 arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 +
 arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 1 +
 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 1 +
 arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 1 +
 arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 1 +
 5 files changed, 5 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 531eab8..0a8f1bd 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -299,6 +299,7 @@
 
 /include/ "qoriq-esdhc-0.dtsi"
 	sdhc@114000 {
+		compatible = "fsl,p2041-esdhc", "fsl,esdhc";
 		sdhci,auto-cmd12;
 	};
 
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index af4ebc8..2165e17 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -326,6 +326,7 @@
 
 /include/ "qoriq-esdhc-0.dtsi"
 	sdhc@114000 {
+		compatible = "fsl,p3041-esdhc", "fsl,esdhc";
 		sdhci,auto-cmd12;
 	};
 
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 4f9c9f6..cadd81e 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -335,6 +335,7 @@
 
 /include/ "qoriq-esdhc-0.dtsi"
 	sdhc@114000 {
+		compatible = "fsl,p4080-esdhc", "fsl,esdhc";
 		voltage-ranges = <3300 3300>;
 		sdhci,auto-cmd12;
 	};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 5d7205b..bb0de92 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -329,6 +329,7 @@
 
 /include/ "qoriq-esdhc-0.dtsi"
 	sdhc@114000 {
+		compatible = "fsl,p5020-esdhc", "fsl,esdhc";
 		sdhci,auto-cmd12;
 	};
 
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index db2c9a7..bcd0f7a 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -292,6 +292,7 @@
 
 /include/ "qoriq-esdhc-0.dtsi"
 	sdhc@114000 {
+		compatible = "fsl,p5040-esdhc", "fsl,esdhc";
 		sdhci,auto-cmd12;
 	};
 
-- 
1.8.0

Re: [PATCH] DTS: Add compatible list for eSDHC

[Scott Wood]

On 07/01/2013 12:21:50 AM, Haijun Zhang wrote:
> Add compatible of esdhc for below board:
> p2041   p3041   p4080   p5020   p5040
>=20
> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> CC: Scott Wood <scottwood@freescale.com>
> CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
> ---
>  arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 +
>  arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 1 +
>  arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 1 +
>  arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 1 +
>  arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 1 +
>  5 files changed, 5 insertions(+)

Is there something specific that depends on this, or are you just =20
trying to conform to other examples?

I don't think we need the SoC name here, given that eSDHC has a version =20
register that you can read (and an SVR in the unlikely case that that =20
isn't adequate).  If you did end up relying on this device tree change, =20
you'd be broken if an older device trees is used.

-Scott=

RE: [PATCH] DTS: Add compatible list for eSDHC

[Zhang Haijun-B42677]

Regards
Haijun.

> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Tuesday, July 02, 2013 8:05 AM
> To: Zhang Haijun-B42677
> Cc: galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Zhang
> Haijun-B42677; Fleming Andy-AFLEMING
> Subject: Re: [PATCH] DTS: Add compatible list for eSDHC
>=20
> On 07/01/2013 12:21:50 AM, Haijun Zhang wrote:
> > Add compatible of esdhc for below board:
> > p2041   p3041   p4080   p5020   p5040
> >
> > Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> > CC: Scott Wood <scottwood@freescale.com>
> > CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
> > ---
> >  arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 +
> > arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 1 +
> > arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 1 +
> > arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 1 +
> > arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 1 +
> >  5 files changed, 5 insertions(+)
>=20
> Is there something specific that depends on this, or are you just trying
> to conform to other examples?
>=20
> I don't think we need the SoC name here, given that eSDHC has a version
> register that you can read (and an SVR in the unlikely case that that
> isn't adequate).  If you did end up relying on this device tree change,
> you'd be broken if an older device trees is used.
>=20
[Haijun Wrote:] Yes, in mmc driver (sdhci-pltfm.c)some quirks depends on So=
c name and its Soc version (sdhci-of-esdhc.c), even if they had the same eS=
DHC version.

> -Scott

Re: [PATCH] DTS: Add compatible list for eSDHC

[Scott Wood]

On 07/02/2013 03:00:43 AM, Zhang Haijun-B42677 wrote:
>=20
>=20
>=20
> Regards
> Haijun.
>=20
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Tuesday, July 02, 2013 8:05 AM
> > To: Zhang Haijun-B42677
> > Cc: galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Zhang
> > Haijun-B42677; Fleming Andy-AFLEMING
> > Subject: Re: [PATCH] DTS: Add compatible list for eSDHC
> >
> > On 07/01/2013 12:21:50 AM, Haijun Zhang wrote:
> > > Add compatible of esdhc for below board:
> > > p2041   p3041   p4080   p5020   p5040
> > >
> > > Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> > > CC: Scott Wood <scottwood@freescale.com>
> > > CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
> > > ---
> > >  arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 +
> > > arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 1 +
> > > arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 1 +
> > > arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 1 +
> > > arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 1 +
> > >  5 files changed, 5 insertions(+)
> >
> > Is there something specific that depends on this, or are you just =20
> trying
> > to conform to other examples?
> >
> > I don't think we need the SoC name here, given that eSDHC has a =20
> version
> > register that you can read (and an SVR in the unlikely case that =20
> that
> > isn't adequate).  If you did end up relying on this device tree =20
> change,
> > you'd be broken if an older device trees is used.
> >
> [Haijun Wrote:] Yes, in mmc driver (sdhci-pltfm.c)some quirks depends =20
> on Soc name and its Soc version (sdhci-of-esdhc.c), even if they had =20
> the same eSDHC version.

Then please use SVR for applying errata workarounds to these chips, =20
rather than rely on the device tree being updated.  The SVR approach =20
also lets you deal with cases where the erratum is present in one rev =20
of an SoC but not another.

Is SDHCI_QUIRK_BROKEN_TIMEOUT_VAL present on these chips?  If so, which =20
chips (of the same eSDHC version) is it not present on?

-Scott=

RE: [PATCH] DTS: Add compatible list for eSDHC

[Zhang Haijun-B42677]

Regards
Haijun.


> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Wednesday, July 03, 2013 2:55 AM
> To: Zhang Haijun-B42677
> Cc: Wood Scott-B07421; galak@kernel.crashing.org; linuxppc-
> dev@lists.ozlabs.org; Fleming Andy-AFLEMING
> Subject: Re: [PATCH] DTS: Add compatible list for eSDHC
>=20
> On 07/02/2013 03:00:43 AM, Zhang Haijun-B42677 wrote:
> >
> >
> >
> > Regards
> > Haijun.
> >
> > > -----Original Message-----
> > > From: Wood Scott-B07421
> > > Sent: Tuesday, July 02, 2013 8:05 AM
> > > To: Zhang Haijun-B42677
> > > Cc: galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Zhang
> > > Haijun-B42677; Fleming Andy-AFLEMING
> > > Subject: Re: [PATCH] DTS: Add compatible list for eSDHC
> > >
> > > On 07/01/2013 12:21:50 AM, Haijun Zhang wrote:
> > > > Add compatible of esdhc for below board:
> > > > p2041   p3041   p4080   p5020   p5040
> > > >
> > > > Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
> > > > CC: Scott Wood <scottwood@freescale.com>
> > > > CC: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
> > > > ---
> > > >  arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 +
> > > > arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 1 +
> > > > arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 1 +
> > > > arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 1 +
> > > > arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 1 +
> > > >  5 files changed, 5 insertions(+)
> > >
> > > Is there something specific that depends on this, or are you just
> > trying
> > > to conform to other examples?
> > >
> > > I don't think we need the SoC name here, given that eSDHC has a
> > version
> > > register that you can read (and an SVR in the unlikely case that
> > that
> > > isn't adequate).  If you did end up relying on this device tree
> > change,
> > > you'd be broken if an older device trees is used.
> > >
> > [Haijun Wrote:] Yes, in mmc driver (sdhci-pltfm.c)some quirks depends
> > on Soc name and its Soc version (sdhci-of-esdhc.c), even if they had
> > the same eSDHC version.
>=20
> Then please use SVR for applying errata workarounds to these chips,
> rather than rely on the device tree being updated.  The SVR approach also
> lets you deal with cases where the erratum is present in one rev of an
> SoC but not another.
[Haijun Wrote:] Ok, I'll update this in mmc driver.
>=20
> Is SDHCI_QUIRK_BROKEN_TIMEOUT_VAL present on these chips?  If so, which
> chips (of the same eSDHC version) is it not present on?
>=20
[Haijun Wrote:] I also confused about this quirk, I'm not sure if this quir=
k is indeed need by them. The calculation of the timeout value used to have=
 some defect, so some board may encounter timeout err when using sd card. I=
 had send patch to change it, but I'm not sure which of them is due to the =
calculation err. This quirk just let the card use the max value to wait for=
 data or command transfer complete. No impact to performance and function. =
So I leave them no changed.
> -Scott