[PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC

[PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC

[Samin Guo]

This series adds ethernet support for the StarFive JH7110 RISC-V SoC.
The series includes MAC driver. The MAC version is dwmac-5.20 (from
Synopsys DesignWare). For more information and support, you can visit
RVspace wiki[1].

You can simply review or test the patches at the link [2].

This patchset should be applied after the patchset [3], [4], [5].
[1]: https://wiki.rvspace.org/
[2]: https://github.com/SaminGuo/linux/tree/vf2-6.2-gmac
[3]: https://lore.kernel.org/all/20230221024645.127922-1-hal.feng@starfivetech.com/
[4]: https://lore.kernel.org/all/20230202030037.9075-1-Frank.Sae@motor-comm.com/
[5]: https://lore.kernel.org/all/20230215113249.47727-5-william.qiu@starfivetech.com/

Changes since v4:
- Supported both visionfive 2 v1.2A and visionfive 2 v1.3B.
- Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.
- Suggested by Emil, dropped the _PLAT/_plat from the config/function/struct/file names.
- Suggested by Emil, added MODULE_DEVICE_TABLE().
- Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
- Added phy interface mode configuration function.
- Rebased on tag v6.2.

Patch 12:
- No update
Patch 11:
- Configuration of gmac and phy for visionfive 2 v1.2A.
Patch 10:
- Configuration of gmac and phy for visionfive 2 v1.3B.
Patch 9:
- Added starfive,syscon for gmac nodes in jh7110.dtsi.
Patch 8:
- Added starfive_dwmac_set_mode to set PHY interface mode.
Patch 7:
- Added starfive,syscon item in StarFive-dwmac dt-bindings.
Patch 6:
- Moved SOC_STARFIVE to ARCH_STARFIVE in Kconfig.
- Dropped the _PLAT/_plat from the config/function/struct names. (by Emil)
- Added MODULE_DEVICE_TABLE() and udev will load the module automatically. (by Emil)
- Used { /* sentinel */ } for the last entry of starfive_eth_match. (by Emil)
- Added 'tx_use_rgmii_rxin_clk' to struct starfive_dwmac, to mark the clk_tx'parent is rgmii.
- Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
Patch 5:
- Suggested by Emil, dropped mdio0/1 labels because there is no reference elsewhere.
Patch 4:
- Removed GTXC clk in StarFive-dwmac dt-bindings.
- Added starfive,tx-use-rgmii-clk item in StarFive-dwmac dt-bindings.
Patch 3:
- Added an optional reset single 'ahb' in 'snps,dwmac.yaml', according to
  stmmac_probe_config_dt/stmmac_dvr_probe.
Patch 2:
- No update
Patch 1:
- No update

Changes since v3:
- Reworded the maxitems number of resets property in 'snps,dwmac.yaml'
- Removed the unused code in 'dwmac-starfive-plat.c'.
- Reworded the return statement in 'starfive_eth_plat_fix_mac_speed' function.

Changes since v2:
- Renamed the dt-bindings 'starfive,jh71x0-dwmac.yaml' to 'starfive,jh7110-dwmac.yaml'.
- Reworded the commit messages.
- Reworded the example context in the dt-binding 'starfive,jh7110-dwmac.yaml'.
- Removed "starfive,jh7100-dwmac" compatible string and special initialization of jh7100.
- Removed the parts of YT8531,so dropped patch 5 and 6.
- Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.

Changes since v1:
- Recovered the author of the 1st and 3rd patches back to Emil Renner Berthing.
- Added a new patch to update maxitems number of resets property in 'snps,dwmac.yaml'.
- Fixed the check errors reported by "make dt_binding_check".
- Renamed the dt-binding 'starfive,dwmac-plat.yaml' to 'starfive,jh71x0-dwmac.yaml'.
- Updated the example context in the dt-binding 'starfive,jh71x0-dwmac.yaml'.
- Added new dt-binding 'motorcomm,yt8531.yaml' to describe details of phy clock
  delay configuration parameters.
- Added more comments for PHY driver setting. For more details, see
  'motorcomm,yt8531.yaml'.
- Moved mdio device tree node from 'jh7110-starfive-visionfive-v2.dts' to 'jh7110.dtsi'.
- Re-worded the commit message of several patches.
- Renamed all the functions with starfive_eth_plat prefix in 'dwmac-starfive-plat.c'.
- Added "starfive,jh7100-dwmac" compatible string and special init to support JH7100.

Previous versions:
v1 - https://patchwork.kernel.org/project/linux-riscv/cover/20221201090242.2381-1-yanhong.wang@starfivetech.com/
v2 - https://patchwork.kernel.org/project/linux-riscv/cover/20221216070632.11444-1-yanhong.wang@starfivetech.com/
v3 - https://patchwork.kernel.org/project/linux-riscv/cover/20230106030001.1952-1-yanhong.wang@starfivetech.com/
v4 - https://patchwork.kernel.org/project/linux-riscv/cover/20230118061701.30047-1-yanhong.wang@starfivetech.com/

Emil Renner Berthing (2):
  dt-bindings: net: snps,dwmac: Add dwmac-5.20 version
  net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string

Samin Guo (8):
  dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'
  riscv: dts: starfive: jh7110: Add ethernet device nodes
  net: stmmac: Add glue layer for StarFive JH7110 SoC
  dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon
  net: stmmac: starfive_dmac: Add phy interface settings
  riscv: dts: starfive: jh7110: Add syscon to support phy interface
    settings
  riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay
    configuration
  riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay
    configuration

Yanhong Wang (2):
  dt-bindings: net: Add support StarFive dwmac
  riscv: dts: starfive: visionfive 2: Enable gmac device tree node

 .../devicetree/bindings/net/snps,dwmac.yaml   |  19 +-
 .../bindings/net/starfive,jh7110-dwmac.yaml   | 130 +++++++++++++
 MAINTAINERS                                   |   7 +
 .../jh7110-starfive-visionfive-2-v1.2a.dts    |  13 ++
 .../jh7110-starfive-visionfive-2-v1.3b.dts    |  27 +++
 .../jh7110-starfive-visionfive-2.dtsi         |  10 +
 arch/riscv/boot/dts/starfive/jh7110.dtsi      |  93 ++++++++++
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 171 ++++++++++++++++++
 .../ethernet/stmicro/stmmac/stmmac_platform.c |   3 +-
 11 files changed, 481 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c


base-commit: 11934a315b671ddb09bc7ac5f505649e9f2623c7
prerequisite-patch-id: ad56ef54d3f2a18025abc9e27321c25beda16422
prerequisite-patch-id: 1be0fb49e0fbe293ca8fa94601e191b13c8c67d9
prerequisite-patch-id: 8b402a8d97294a9b568595816b0dc96afc5e6f5d
prerequisite-patch-id: 5c149662674f9e7dd888e2028fd8c9772948273f
prerequisite-patch-id: 0caf8a313a9f161447e0480a93b42467378b2164
prerequisite-patch-id: b2422f7a12f1e86e38c563139f3c1dbafc158efd
prerequisite-patch-id: be612664eca7049e987bfae15bb460caa82eb211
prerequisite-patch-id: 8300965cc6c55cad69f009da7916cf9e8ce628e7
-- 
2.17.1

[PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC

[Samin Guo]

This series adds ethernet support for the StarFive JH7110 RISC-V SoC.
The series includes MAC driver. The MAC version is dwmac-5.20 (from
Synopsys DesignWare). For more information and support, you can visit
RVspace wiki[1].

You can simply review or test the patches at the link [2].

This patchset should be applied after the patchset [3], [4], [5].
[1]: https://wiki.rvspace.org/
[2]: https://github.com/SaminGuo/linux/tree/vf2-6.2-gmac
[3]: https://lore.kernel.org/all/20230221024645.127922-1-hal.feng@starfivetech.com/
[4]: https://lore.kernel.org/all/20230202030037.9075-1-Frank.Sae@motor-comm.com/
[5]: https://lore.kernel.org/all/20230215113249.47727-5-william.qiu@starfivetech.com/

Changes since v4:
- Supported both visionfive 2 v1.2A and visionfive 2 v1.3B.
- Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.
- Suggested by Emil, dropped the _PLAT/_plat from the config/function/struct/file names.
- Suggested by Emil, added MODULE_DEVICE_TABLE().
- Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
- Added phy interface mode configuration function.
- Rebased on tag v6.2.

Patch 12:
- No update
Patch 11:
- Configuration of gmac and phy for visionfive 2 v1.2A.
Patch 10:
- Configuration of gmac and phy for visionfive 2 v1.3B.
Patch 9:
- Added starfive,syscon for gmac nodes in jh7110.dtsi.
Patch 8:
- Added starfive_dwmac_set_mode to set PHY interface mode.
Patch 7:
- Added starfive,syscon item in StarFive-dwmac dt-bindings.
Patch 6:
- Moved SOC_STARFIVE to ARCH_STARFIVE in Kconfig.
- Dropped the _PLAT/_plat from the config/function/struct names. (by Emil)
- Added MODULE_DEVICE_TABLE() and udev will load the module automatically. (by Emil)
- Used { /* sentinel */ } for the last entry of starfive_eth_match. (by Emil)
- Added 'tx_use_rgmii_rxin_clk' to struct starfive_dwmac, to mark the clk_tx'parent is rgmii.
- Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
Patch 5:
- Suggested by Emil, dropped mdio0/1 labels because there is no reference elsewhere.
Patch 4:
- Removed GTXC clk in StarFive-dwmac dt-bindings.
- Added starfive,tx-use-rgmii-clk item in StarFive-dwmac dt-bindings.
Patch 3:
- Added an optional reset single 'ahb' in 'snps,dwmac.yaml', according to
  stmmac_probe_config_dt/stmmac_dvr_probe.
Patch 2:
- No update
Patch 1:
- No update

Changes since v3:
- Reworded the maxitems number of resets property in 'snps,dwmac.yaml'
- Removed the unused code in 'dwmac-starfive-plat.c'.
- Reworded the return statement in 'starfive_eth_plat_fix_mac_speed' function.

Changes since v2:
- Renamed the dt-bindings 'starfive,jh71x0-dwmac.yaml' to 'starfive,jh7110-dwmac.yaml'.
- Reworded the commit messages.
- Reworded the example context in the dt-binding 'starfive,jh7110-dwmac.yaml'.
- Removed "starfive,jh7100-dwmac" compatible string and special initialization of jh7100.
- Removed the parts of YT8531,so dropped patch 5 and 6.
- Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.

Changes since v1:
- Recovered the author of the 1st and 3rd patches back to Emil Renner Berthing.
- Added a new patch to update maxitems number of resets property in 'snps,dwmac.yaml'.
- Fixed the check errors reported by "make dt_binding_check".
- Renamed the dt-binding 'starfive,dwmac-plat.yaml' to 'starfive,jh71x0-dwmac.yaml'.
- Updated the example context in the dt-binding 'starfive,jh71x0-dwmac.yaml'.
- Added new dt-binding 'motorcomm,yt8531.yaml' to describe details of phy clock
  delay configuration parameters.
- Added more comments for PHY driver setting. For more details, see
  'motorcomm,yt8531.yaml'.
- Moved mdio device tree node from 'jh7110-starfive-visionfive-v2.dts' to 'jh7110.dtsi'.
- Re-worded the commit message of several patches.
- Renamed all the functions with starfive_eth_plat prefix in 'dwmac-starfive-plat.c'.
- Added "starfive,jh7100-dwmac" compatible string and special init to support JH7100.

Previous versions:
v1 - https://patchwork.kernel.org/project/linux-riscv/cover/20221201090242.2381-1-yanhong.wang@starfivetech.com/
v2 - https://patchwork.kernel.org/project/linux-riscv/cover/20221216070632.11444-1-yanhong.wang@starfivetech.com/
v3 - https://patchwork.kernel.org/project/linux-riscv/cover/20230106030001.1952-1-yanhong.wang@starfivetech.com/
v4 - https://patchwork.kernel.org/project/linux-riscv/cover/20230118061701.30047-1-yanhong.wang@starfivetech.com/

Emil Renner Berthing (2):
  dt-bindings: net: snps,dwmac: Add dwmac-5.20 version
  net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string

Samin Guo (8):
  dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'
  riscv: dts: starfive: jh7110: Add ethernet device nodes
  net: stmmac: Add glue layer for StarFive JH7110 SoC
  dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon
  net: stmmac: starfive_dmac: Add phy interface settings
  riscv: dts: starfive: jh7110: Add syscon to support phy interface
    settings
  riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay
    configuration
  riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay
    configuration

Yanhong Wang (2):
  dt-bindings: net: Add support StarFive dwmac
  riscv: dts: starfive: visionfive 2: Enable gmac device tree node

 .../devicetree/bindings/net/snps,dwmac.yaml   |  19 +-
 .../bindings/net/starfive,jh7110-dwmac.yaml   | 130 +++++++++++++
 MAINTAINERS                                   |   7 +
 .../jh7110-starfive-visionfive-2-v1.2a.dts    |  13 ++
 .../jh7110-starfive-visionfive-2-v1.3b.dts    |  27 +++
 .../jh7110-starfive-visionfive-2.dtsi         |  10 +
 arch/riscv/boot/dts/starfive/jh7110.dtsi      |  93 ++++++++++
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 171 ++++++++++++++++++
 .../ethernet/stmicro/stmmac/stmmac_platform.c |   3 +-
 11 files changed, 481 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c


base-commit: 11934a315b671ddb09bc7ac5f505649e9f2623c7
prerequisite-patch-id: ad56ef54d3f2a18025abc9e27321c25beda16422
prerequisite-patch-id: 1be0fb49e0fbe293ca8fa94601e191b13c8c67d9
prerequisite-patch-id: 8b402a8d97294a9b568595816b0dc96afc5e6f5d
prerequisite-patch-id: 5c149662674f9e7dd888e2028fd8c9772948273f
prerequisite-patch-id: 0caf8a313a9f161447e0480a93b42467378b2164
prerequisite-patch-id: b2422f7a12f1e86e38c563139f3c1dbafc158efd
prerequisite-patch-id: be612664eca7049e987bfae15bb460caa82eb211
prerequisite-patch-id: 8300965cc6c55cad69f009da7916cf9e8ce628e7
-- 
2.17.1


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[PATCH v5 01/12] dt-bindings: net: snps,dwmac: Add dwmac-5.20 version

[Samin Guo]

From: Emil Renner Berthing <kernel@esmil.dk>

Add dwmac-5.20 IP version to snps.dwmac.yaml

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/net/snps,dwmac.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index e88a86623fce..b4135d5297b4 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -30,6 +30,7 @@ select:
           - snps,dwmac-4.10a
           - snps,dwmac-4.20a
           - snps,dwmac-5.10a
+          - snps,dwmac-5.20
           - snps,dwxgmac
           - snps,dwxgmac-2.10
 
@@ -87,6 +88,7 @@ properties:
         - snps,dwmac-4.10a
         - snps,dwmac-4.20a
         - snps,dwmac-5.10a
+        - snps,dwmac-5.20
         - snps,dwxgmac
         - snps,dwxgmac-2.10
 
@@ -575,6 +577,7 @@ allOf:
               - snps,dwmac-3.50a
               - snps,dwmac-4.10a
               - snps,dwmac-4.20a
+              - snps,dwmac-5.20
               - snps,dwxgmac
               - snps,dwxgmac-2.10
               - st,spear600-gmac
@@ -629,6 +632,7 @@ allOf:
               - snps,dwmac-4.10a
               - snps,dwmac-4.20a
               - snps,dwmac-5.10a
+              - snps,dwmac-5.20
               - snps,dwxgmac
               - snps,dwxgmac-2.10
               - st,spear600-gmac
-- 
2.17.1

[PATCH v5 01/12] dt-bindings: net: snps,dwmac: Add dwmac-5.20 version

[Samin Guo]

From: Emil Renner Berthing <kernel@esmil.dk>

Add dwmac-5.20 IP version to snps.dwmac.yaml

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/net/snps,dwmac.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index e88a86623fce..b4135d5297b4 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -30,6 +30,7 @@ select:
           - snps,dwmac-4.10a
           - snps,dwmac-4.20a
           - snps,dwmac-5.10a
+          - snps,dwmac-5.20
           - snps,dwxgmac
           - snps,dwxgmac-2.10
 
@@ -87,6 +88,7 @@ properties:
         - snps,dwmac-4.10a
         - snps,dwmac-4.20a
         - snps,dwmac-5.10a
+        - snps,dwmac-5.20
         - snps,dwxgmac
         - snps,dwxgmac-2.10
 
@@ -575,6 +577,7 @@ allOf:
               - snps,dwmac-3.50a
               - snps,dwmac-4.10a
               - snps,dwmac-4.20a
+              - snps,dwmac-5.20
               - snps,dwxgmac
               - snps,dwxgmac-2.10
               - st,spear600-gmac
@@ -629,6 +632,7 @@ allOf:
               - snps,dwmac-4.10a
               - snps,dwmac-4.20a
               - snps,dwmac-5.10a
+              - snps,dwmac-5.20
               - snps,dwxgmac
               - snps,dwxgmac-2.10
               - st,spear600-gmac
-- 
2.17.1


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[PATCH v5 02/12] net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string

[Samin Guo]

From: Emil Renner Berthing <kernel@esmil.dk>

Add "snps,dwmac-5.20" compatible string for 5.20 version that can avoid
to define some platform data in the glue layer.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 0046a4ee6e64..807eca7edf53 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -519,7 +519,8 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
 	if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
 	    of_device_is_compatible(np, "snps,dwmac-4.10a") ||
 	    of_device_is_compatible(np, "snps,dwmac-4.20a") ||
-	    of_device_is_compatible(np, "snps,dwmac-5.10a")) {
+	    of_device_is_compatible(np, "snps,dwmac-5.10a") ||
+	    of_device_is_compatible(np, "snps,dwmac-5.20")) {
 		plat->has_gmac4 = 1;
 		plat->has_gmac = 0;
 		plat->pmt = 1;
-- 
2.17.1

[PATCH v5 02/12] net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string

[Samin Guo]

From: Emil Renner Berthing <kernel@esmil.dk>

Add "snps,dwmac-5.20" compatible string for 5.20 version that can avoid
to define some platform data in the glue layer.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 0046a4ee6e64..807eca7edf53 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -519,7 +519,8 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
 	if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
 	    of_device_is_compatible(np, "snps,dwmac-4.10a") ||
 	    of_device_is_compatible(np, "snps,dwmac-4.20a") ||
-	    of_device_is_compatible(np, "snps,dwmac-5.10a")) {
+	    of_device_is_compatible(np, "snps,dwmac-5.10a") ||
+	    of_device_is_compatible(np, "snps,dwmac-5.20")) {
 		plat->has_gmac4 = 1;
 		plat->has_gmac = 0;
 		plat->pmt = 1;
-- 
2.17.1


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[PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'

[Samin Guo]

According to:
stmmac_platform.c: stmmac_probe_config_dt
stmmac_main.c: stmmac_dvr_probe

dwmac controller may require one (stmmaceth) or two (stmmaceth+ahb)
reset signals, and the maxItems of resets/reset-names is going to be 2.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../devicetree/bindings/net/snps,dwmac.yaml        | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index b4135d5297b4..89099a888f0b 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -133,12 +133,18 @@ properties:
         - ptp_ref
 
   resets:
-    maxItems: 1
-    description:
-      MAC Reset signal.
+    minItems: 1
+    items:
+      - description: GMAC stmmaceth reset
+      - description: AHB reset
 
   reset-names:
-    const: stmmaceth
+    minItems: 1
+    maxItems: 2
+    contains:
+      enum:
+        - stmmaceth
+        - ahb
 
   power-domains:
     maxItems: 1
-- 
2.17.1

[PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'

[Samin Guo]

According to:
stmmac_platform.c: stmmac_probe_config_dt
stmmac_main.c: stmmac_dvr_probe

dwmac controller may require one (stmmaceth) or two (stmmaceth+ahb)
reset signals, and the maxItems of resets/reset-names is going to be 2.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../devicetree/bindings/net/snps,dwmac.yaml        | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index b4135d5297b4..89099a888f0b 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -133,12 +133,18 @@ properties:
         - ptp_ref
 
   resets:
-    maxItems: 1
-    description:
-      MAC Reset signal.
+    minItems: 1
+    items:
+      - description: GMAC stmmaceth reset
+      - description: AHB reset
 
   reset-names:
-    const: stmmaceth
+    minItems: 1
+    maxItems: 2
+    contains:
+      enum:
+        - stmmaceth
+        - ahb
 
   power-domains:
     maxItems: 1
-- 
2.17.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

[PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac

[Samin Guo]

From: Yanhong Wang <yanhong.wang@starfivetech.com>

Add documentation to describe StarFive dwmac driver(GMAC).

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../devicetree/bindings/net/snps,dwmac.yaml   |   1 +
 .../bindings/net/starfive,jh7110-dwmac.yaml   | 117 ++++++++++++++++++
 MAINTAINERS                                   |   6 +
 3 files changed, 124 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 89099a888f0b..395f081161ce 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -91,6 +91,7 @@ properties:
         - snps,dwmac-5.20
         - snps,dwxgmac
         - snps,dwxgmac-2.10
+        - starfive,jh7110-dwmac
 
   reg:
     minItems: 1
diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
new file mode 100644
index 000000000000..ca49f08d50dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
@@ -0,0 +1,117 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 StarFive Technology Co., Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 DWMAC glue layer
+
+maintainers:
+  - Emil Renner Berthing <kernel@esmil.dk>
+  - Samin Guo <samin.guo@starfivetech.com>
+
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - starfive,jh7110-dwmac
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - starfive,jh7110-dwmac
+      - const: snps,dwmac-5.20
+
+  clocks:
+    items:
+      - description: GMAC main clock
+      - description: GMAC AHB clock
+      - description: PTP clock
+      - description: TX clock
+      - description: GTX clock
+
+  clock-names:
+    items:
+      - const: stmmaceth
+      - const: pclk
+      - const: ptp_ref
+      - const: tx
+      - const: gtx
+
+  resets:
+    items:
+      - description: MAC Reset signal.
+      - description: AHB Reset signal.
+
+  reset-names:
+    items:
+      - const: stmmaceth
+      - const: ahb
+
+  starfive,tx-use-rgmii-clk:
+    description:
+      Tx clock is provided by external rgmii clock.
+    type: boolean
+
+allOf:
+  - $ref: snps,dwmac.yaml#
+
+unevaluatedProperties: true
+
+required:
+  - compatible
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+examples:
+  - |
+    ethernet@16030000 {
+        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+        reg = <0x16030000 0x10000>;
+        clocks = <&clk 3>, <&clk 2>, <&clk 109>,
+                 <&clk 6>, <&clk 111>;
+        clock-names = "stmmaceth", "pclk", "ptp_ref",
+                      "tx", "gtx";
+        resets = <&rst 1>, <&rst 2>;
+        reset-names = "stmmaceth", "ahb";
+        interrupts = <7>, <6>, <5>;
+        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+        phy-mode = "rgmii-id";
+        snps,multicast-filter-bins = <64>;
+        snps,perfect-filter-entries = <8>;
+        rx-fifo-depth = <2048>;
+        tx-fifo-depth = <2048>;
+        snps,fixed-burst;
+        snps,no-pbl-x8;
+        snps,tso;
+        snps,force_thresh_dma_mode;
+        snps,axi-config = <&stmmac_axi_setup>;
+        snps,en-tx-lpi-clockgating;
+        snps,txpbl = <16>;
+        snps,rxpbl = <16>;
+        phy-handle = <&phy0>;
+
+        mdio {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            compatible = "snps,dwmac-mdio";
+
+            phy0: ethernet-phy@0 {
+                reg = <0>;
+            };
+        };
+
+        stmmac_axi_setup: stmmac-axi-config {
+            snps,lpi_en;
+            snps,wr_osr_lmt = <4>;
+            snps,rd_osr_lmt = <4>;
+            snps,blen = <256 128 64 32 0 0 0>;
+        };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 5c67c75a940f..4e236b7c7fd2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19912,6 +19912,12 @@ M:	Emil Renner Berthing <kernel@esmil.dk>
 S:	Maintained
 F:	arch/riscv/boot/dts/starfive/
 
+STARFIVE DWMAC GLUE LAYER
+M:	Emil Renner Berthing <kernel@esmil.dk>
+M:	Samin Guo <samin.guo@starfivetech.com>
+S:	Maintained
+F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
+
 STARFIVE JH71X0 CLOCK DRIVERS
 M:	Emil Renner Berthing <kernel@esmil.dk>
 M:	Hal Feng <hal.feng@starfivetech.com>
-- 
2.17.1

[PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac

[Samin Guo]

From: Yanhong Wang <yanhong.wang@starfivetech.com>

Add documentation to describe StarFive dwmac driver(GMAC).

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../devicetree/bindings/net/snps,dwmac.yaml   |   1 +
 .../bindings/net/starfive,jh7110-dwmac.yaml   | 117 ++++++++++++++++++
 MAINTAINERS                                   |   6 +
 3 files changed, 124 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 89099a888f0b..395f081161ce 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -91,6 +91,7 @@ properties:
         - snps,dwmac-5.20
         - snps,dwxgmac
         - snps,dwxgmac-2.10
+        - starfive,jh7110-dwmac
 
   reg:
     minItems: 1
diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
new file mode 100644
index 000000000000..ca49f08d50dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
@@ -0,0 +1,117 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 StarFive Technology Co., Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 DWMAC glue layer
+
+maintainers:
+  - Emil Renner Berthing <kernel@esmil.dk>
+  - Samin Guo <samin.guo@starfivetech.com>
+
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - starfive,jh7110-dwmac
+  required:
+    - compatible
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - starfive,jh7110-dwmac
+      - const: snps,dwmac-5.20
+
+  clocks:
+    items:
+      - description: GMAC main clock
+      - description: GMAC AHB clock
+      - description: PTP clock
+      - description: TX clock
+      - description: GTX clock
+
+  clock-names:
+    items:
+      - const: stmmaceth
+      - const: pclk
+      - const: ptp_ref
+      - const: tx
+      - const: gtx
+
+  resets:
+    items:
+      - description: MAC Reset signal.
+      - description: AHB Reset signal.
+
+  reset-names:
+    items:
+      - const: stmmaceth
+      - const: ahb
+
+  starfive,tx-use-rgmii-clk:
+    description:
+      Tx clock is provided by external rgmii clock.
+    type: boolean
+
+allOf:
+  - $ref: snps,dwmac.yaml#
+
+unevaluatedProperties: true
+
+required:
+  - compatible
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+
+examples:
+  - |
+    ethernet@16030000 {
+        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+        reg = <0x16030000 0x10000>;
+        clocks = <&clk 3>, <&clk 2>, <&clk 109>,
+                 <&clk 6>, <&clk 111>;
+        clock-names = "stmmaceth", "pclk", "ptp_ref",
+                      "tx", "gtx";
+        resets = <&rst 1>, <&rst 2>;
+        reset-names = "stmmaceth", "ahb";
+        interrupts = <7>, <6>, <5>;
+        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+        phy-mode = "rgmii-id";
+        snps,multicast-filter-bins = <64>;
+        snps,perfect-filter-entries = <8>;
+        rx-fifo-depth = <2048>;
+        tx-fifo-depth = <2048>;
+        snps,fixed-burst;
+        snps,no-pbl-x8;
+        snps,tso;
+        snps,force_thresh_dma_mode;
+        snps,axi-config = <&stmmac_axi_setup>;
+        snps,en-tx-lpi-clockgating;
+        snps,txpbl = <16>;
+        snps,rxpbl = <16>;
+        phy-handle = <&phy0>;
+
+        mdio {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            compatible = "snps,dwmac-mdio";
+
+            phy0: ethernet-phy@0 {
+                reg = <0>;
+            };
+        };
+
+        stmmac_axi_setup: stmmac-axi-config {
+            snps,lpi_en;
+            snps,wr_osr_lmt = <4>;
+            snps,rd_osr_lmt = <4>;
+            snps,blen = <256 128 64 32 0 0 0>;
+        };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 5c67c75a940f..4e236b7c7fd2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19912,6 +19912,12 @@ M:	Emil Renner Berthing <kernel@esmil.dk>
 S:	Maintained
 F:	arch/riscv/boot/dts/starfive/
 
+STARFIVE DWMAC GLUE LAYER
+M:	Emil Renner Berthing <kernel@esmil.dk>
+M:	Samin Guo <samin.guo@starfivetech.com>
+S:	Maintained
+F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
+
 STARFIVE JH71X0 CLOCK DRIVERS
 M:	Emil Renner Berthing <kernel@esmil.dk>
 M:	Hal Feng <hal.feng@starfivetech.com>
-- 
2.17.1


_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

[PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Samin Guo]

Add JH7110 ethernet device node to support gmac driver for the JH7110
RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 91 ++++++++++++++++++++++++
 1 file changed, 91 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 09806418ed1b..2ce28292b721 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -233,6 +233,13 @@
 		#clock-cells = <0>;
 	};
 
+	stmmac_axi_setup: stmmac-axi-config {
+		snps,lpi_en;
+		snps,wr_osr_lmt = <4>;
+		snps,rd_osr_lmt = <4>;
+		snps,blen = <256 128 64 32 0 0 0>;
+	};
+
 	tdm_ext: tdm-ext-clock {
 		compatible = "fixed-clock";
 		clock-output-names = "tdm_ext";
@@ -518,5 +525,89 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		gmac0: ethernet@16030000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16030000 0x0 0x10000>;
+			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <7>, <6>, <5>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			phy-mode = "rgmii-id";
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			status = "disabled";
+			phy-handle = <&phy0>;
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy0: ethernet-phy@0 {
+					reg = <0>;
+				};
+			};
+		};
+
+		gmac1: ethernet@16040000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16040000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSRST_GMAC1_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <78>, <77>, <76>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			phy-mode = "rgmii-id";
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			status = "disabled";
+			phy-handle = <&phy1>;
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy1: ethernet-phy@1 {
+					reg = <0>;
+				};
+			};
+		};
 	};
 };
-- 
2.17.1

[PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Samin Guo]

Add JH7110 ethernet device node to support gmac driver for the JH7110
RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 91 ++++++++++++++++++++++++
 1 file changed, 91 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 09806418ed1b..2ce28292b721 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -233,6 +233,13 @@
 		#clock-cells = <0>;
 	};
 
+	stmmac_axi_setup: stmmac-axi-config {
+		snps,lpi_en;
+		snps,wr_osr_lmt = <4>;
+		snps,rd_osr_lmt = <4>;
+		snps,blen = <256 128 64 32 0 0 0>;
+	};
+
 	tdm_ext: tdm-ext-clock {
 		compatible = "fixed-clock";
 		clock-output-names = "tdm_ext";
@@ -518,5 +525,89 @@
 			gpio-controller;
 			#gpio-cells = <2>;
 		};
+
+		gmac0: ethernet@16030000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16030000 0x0 0x10000>;
+			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
+				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
+				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <7>, <6>, <5>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			phy-mode = "rgmii-id";
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			status = "disabled";
+			phy-handle = <&phy0>;
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy0: ethernet-phy@0 {
+					reg = <0>;
+				};
+			};
+		};
+
+		gmac1: ethernet@16040000 {
+			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
+			reg = <0x0 0x16040000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
+			clock-names = "stmmaceth", "pclk", "ptp_ref",
+				      "tx", "gtx";
+			resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
+				 <&syscrg JH7110_SYSRST_GMAC1_AHB>;
+			reset-names = "stmmaceth", "ahb";
+			interrupts = <78>, <77>, <76>;
+			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+			phy-mode = "rgmii-id";
+			snps,multicast-filter-bins = <64>;
+			snps,perfect-filter-entries = <8>;
+			rx-fifo-depth = <2048>;
+			tx-fifo-depth = <2048>;
+			snps,fixed-burst;
+			snps,no-pbl-x8;
+			snps,force_thresh_dma_mode;
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,tso;
+			snps,en-tx-lpi-clockgating;
+			snps,txpbl = <16>;
+			snps,rxpbl = <16>;
+			status = "disabled";
+			phy-handle = <&phy1>;
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "snps,dwmac-mdio";
+
+				phy1: ethernet-phy@1 {
+					reg = <0>;
+				};
+			};
+		};
 	};
 };
-- 
2.17.1


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[PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Samin Guo]

This adds StarFive dwmac driver support on the StarFive JH7110 SoC.

Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 MAINTAINERS                                   |   1 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
 4 files changed, 139 insertions(+)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 4e236b7c7fd2..91a4f190c827 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
 M:	Emil Renner Berthing <kernel@esmil.dk>
 M:	Samin Guo <samin.guo@starfivetech.com>
 S:	Maintained
+F:	Documentation/devicetree/bindings/net/dwmac-starfive.c
 F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
 
 STARFIVE JH71X0 CLOCK DRIVERS
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index f77511fe4e87..47fbccef9d04 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
 	  for the stmmac device driver. This driver is used for
 	  arria5 and cyclone5 FPGA SoCs.
 
+config DWMAC_STARFIVE
+	tristate "StarFive dwmac support"
+	depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
+	depends on STMMAC_ETH
+	default ARCH_STARFIVE
+	help
+	  Support for ethernet controllers on StarFive RISC-V SoCs
+
+	  This selects the StarFive platform specific glue layer support for
+	  the stmmac device driver. This driver is used for StarFive JH7110
+	  ethernet controller.
+
 config DWMAC_STI
 	tristate "STi GMAC support"
 	default ARCH_STI
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 057e4bab5c08..8738fdbb4b2d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)	+= dwmac-oxnas.o
 obj-$(CONFIG_DWMAC_QCOM_ETHQOS)	+= dwmac-qcom-ethqos.o
 obj-$(CONFIG_DWMAC_ROCKCHIP)	+= dwmac-rk.o
 obj-$(CONFIG_DWMAC_SOCFPGA)	+= dwmac-altr-socfpga.o
+obj-$(CONFIG_DWMAC_STARFIVE)	+= dwmac-starfive.o
 obj-$(CONFIG_DWMAC_STI)		+= dwmac-sti.o
 obj-$(CONFIG_DWMAC_STM32)	+= dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)	+= dwmac-sunxi.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
new file mode 100644
index 000000000000..566378306f67
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * StarFive DWMAC platform driver
+ *
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
+ *
+ */
+
+#include <linux/of_device.h>
+
+#include "stmmac_platform.h"
+
+struct starfive_dwmac {
+	struct device *dev;
+	struct clk *clk_tx;
+	struct clk *clk_gtx;
+	bool tx_use_rgmii_rxin_clk;
+};
+
+static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
+{
+	struct starfive_dwmac *dwmac = priv;
+	unsigned long rate;
+	int err;
+
+	/* Generally, the rgmii_tx clock is provided by the internal clock,
+	 * which needs to match the corresponding clock frequency according
+	 * to different speeds. If the rgmii_tx clock is provided by the
+	 * external rgmii_rxin, there is no need to configure the clock
+	 * internally, because rgmii_rxin will be adaptively adjusted.
+	 */
+	if (dwmac->tx_use_rgmii_rxin_clk)
+		return;
+
+	switch (speed) {
+	case SPEED_1000:
+		rate = 125000000;
+		break;
+	case SPEED_100:
+		rate = 25000000;
+		break;
+	case SPEED_10:
+		rate = 2500000;
+		break;
+	default:
+		dev_err(dwmac->dev, "invalid speed %u\n", speed);
+		break;
+	}
+
+	err = clk_set_rate(dwmac->clk_tx, rate);
+	if (err)
+		dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
+}
+
+static int starfive_dwmac_probe(struct platform_device *pdev)
+{
+	struct plat_stmmacenet_data *plat_dat;
+	struct stmmac_resources stmmac_res;
+	struct starfive_dwmac *dwmac;
+	int err;
+
+	err = stmmac_get_platform_resources(pdev, &stmmac_res);
+	if (err)
+		return err;
+
+	plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
+	if (IS_ERR(plat_dat)) {
+		dev_err(&pdev->dev, "dt configuration failed\n");
+		return PTR_ERR(plat_dat);
+	}
+
+	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
+	if (!dwmac)
+		return -ENOMEM;
+
+	dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
+	if (IS_ERR(dwmac->clk_tx))
+		return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
+				    "error getting tx clock\n");
+
+	dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
+	if (IS_ERR(dwmac->clk_gtx))
+		return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
+				    "error getting gtx clock\n");
+
+	if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
+		dwmac->tx_use_rgmii_rxin_clk = true;
+
+	dwmac->dev = &pdev->dev;
+	plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
+	plat_dat->init = NULL;
+	plat_dat->bsp_priv = dwmac;
+	plat_dat->dma_cfg->dche = true;
+
+	err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+	if (err) {
+		stmmac_remove_config_dt(pdev, plat_dat);
+		return err;
+	}
+
+	return 0;
+}
+
+static const struct of_device_id starfive_dwmac_match[] = {
+	{ .compatible = "starfive,jh7110-dwmac"	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
+
+static struct platform_driver starfive_dwmac_driver = {
+	.probe  = starfive_dwmac_probe,
+	.remove = stmmac_pltfr_remove,
+	.driver = {
+		.name = "starfive-dwmac",
+		.pm = &stmmac_pltfr_pm_ops,
+		.of_match_table = starfive_dwmac_match,
+	},
+};
+module_platform_driver(starfive_dwmac_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("StarFive DWMAC platform driver");
+MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
+MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
-- 
2.17.1

[PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Samin Guo]

This adds StarFive dwmac driver support on the StarFive JH7110 SoC.

Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 MAINTAINERS                                   |   1 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
 4 files changed, 139 insertions(+)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 4e236b7c7fd2..91a4f190c827 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
 M:	Emil Renner Berthing <kernel@esmil.dk>
 M:	Samin Guo <samin.guo@starfivetech.com>
 S:	Maintained
+F:	Documentation/devicetree/bindings/net/dwmac-starfive.c
 F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
 
 STARFIVE JH71X0 CLOCK DRIVERS
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index f77511fe4e87..47fbccef9d04 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
 	  for the stmmac device driver. This driver is used for
 	  arria5 and cyclone5 FPGA SoCs.
 
+config DWMAC_STARFIVE
+	tristate "StarFive dwmac support"
+	depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
+	depends on STMMAC_ETH
+	default ARCH_STARFIVE
+	help
+	  Support for ethernet controllers on StarFive RISC-V SoCs
+
+	  This selects the StarFive platform specific glue layer support for
+	  the stmmac device driver. This driver is used for StarFive JH7110
+	  ethernet controller.
+
 config DWMAC_STI
 	tristate "STi GMAC support"
 	default ARCH_STI
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 057e4bab5c08..8738fdbb4b2d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)	+= dwmac-oxnas.o
 obj-$(CONFIG_DWMAC_QCOM_ETHQOS)	+= dwmac-qcom-ethqos.o
 obj-$(CONFIG_DWMAC_ROCKCHIP)	+= dwmac-rk.o
 obj-$(CONFIG_DWMAC_SOCFPGA)	+= dwmac-altr-socfpga.o
+obj-$(CONFIG_DWMAC_STARFIVE)	+= dwmac-starfive.o
 obj-$(CONFIG_DWMAC_STI)		+= dwmac-sti.o
 obj-$(CONFIG_DWMAC_STM32)	+= dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)	+= dwmac-sunxi.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
new file mode 100644
index 000000000000..566378306f67
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * StarFive DWMAC platform driver
+ *
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
+ *
+ */
+
+#include <linux/of_device.h>
+
+#include "stmmac_platform.h"
+
+struct starfive_dwmac {
+	struct device *dev;
+	struct clk *clk_tx;
+	struct clk *clk_gtx;
+	bool tx_use_rgmii_rxin_clk;
+};
+
+static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
+{
+	struct starfive_dwmac *dwmac = priv;
+	unsigned long rate;
+	int err;
+
+	/* Generally, the rgmii_tx clock is provided by the internal clock,
+	 * which needs to match the corresponding clock frequency according
+	 * to different speeds. If the rgmii_tx clock is provided by the
+	 * external rgmii_rxin, there is no need to configure the clock
+	 * internally, because rgmii_rxin will be adaptively adjusted.
+	 */
+	if (dwmac->tx_use_rgmii_rxin_clk)
+		return;
+
+	switch (speed) {
+	case SPEED_1000:
+		rate = 125000000;
+		break;
+	case SPEED_100:
+		rate = 25000000;
+		break;
+	case SPEED_10:
+		rate = 2500000;
+		break;
+	default:
+		dev_err(dwmac->dev, "invalid speed %u\n", speed);
+		break;
+	}
+
+	err = clk_set_rate(dwmac->clk_tx, rate);
+	if (err)
+		dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
+}
+
+static int starfive_dwmac_probe(struct platform_device *pdev)
+{
+	struct plat_stmmacenet_data *plat_dat;
+	struct stmmac_resources stmmac_res;
+	struct starfive_dwmac *dwmac;
+	int err;
+
+	err = stmmac_get_platform_resources(pdev, &stmmac_res);
+	if (err)
+		return err;
+
+	plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
+	if (IS_ERR(plat_dat)) {
+		dev_err(&pdev->dev, "dt configuration failed\n");
+		return PTR_ERR(plat_dat);
+	}
+
+	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
+	if (!dwmac)
+		return -ENOMEM;
+
+	dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
+	if (IS_ERR(dwmac->clk_tx))
+		return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
+				    "error getting tx clock\n");
+
+	dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
+	if (IS_ERR(dwmac->clk_gtx))
+		return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
+				    "error getting gtx clock\n");
+
+	if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
+		dwmac->tx_use_rgmii_rxin_clk = true;
+
+	dwmac->dev = &pdev->dev;
+	plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
+	plat_dat->init = NULL;
+	plat_dat->bsp_priv = dwmac;
+	plat_dat->dma_cfg->dche = true;
+
+	err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+	if (err) {
+		stmmac_remove_config_dt(pdev, plat_dat);
+		return err;
+	}
+
+	return 0;
+}
+
+static const struct of_device_id starfive_dwmac_match[] = {
+	{ .compatible = "starfive,jh7110-dwmac"	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
+
+static struct platform_driver starfive_dwmac_driver = {
+	.probe  = starfive_dwmac_probe,
+	.remove = stmmac_pltfr_remove,
+	.driver = {
+		.name = "starfive-dwmac",
+		.pm = &stmmac_pltfr_pm_ops,
+		.of_match_table = starfive_dwmac_match,
+	},
+};
+module_platform_driver(starfive_dwmac_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("StarFive DWMAC platform driver");
+MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
+MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
-- 
2.17.1


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[PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon

[Samin Guo]

A phandle to syscon with two arguments that configure phy mode.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../bindings/net/starfive,jh7110-dwmac.yaml         | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
index ca49f08d50dd..79ae635db0a5 100644
--- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
@@ -58,6 +58,18 @@ properties:
       Tx clock is provided by external rgmii clock.
     type: boolean
 
+  starfive,syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - items:
+          - description: phandle to syscon that configures phy mode
+          - description: Offset of phy mode selection
+          - description: Mask of phy mode selection
+    description:
+      A phandle to syscon with two arguments that configure phy mode.
+      The argument one is the offset of phy mode selection, the
+      argument two is the mask of phy mode selection.
+
 allOf:
   - $ref: snps,dwmac.yaml#
 
@@ -96,6 +108,7 @@ examples:
         snps,en-tx-lpi-clockgating;
         snps,txpbl = <16>;
         snps,rxpbl = <16>;
+        starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
         phy-handle = <&phy0>;
 
         mdio {
-- 
2.17.1

[PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon

[Samin Guo]

A phandle to syscon with two arguments that configure phy mode.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../bindings/net/starfive,jh7110-dwmac.yaml         | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
index ca49f08d50dd..79ae635db0a5 100644
--- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
@@ -58,6 +58,18 @@ properties:
       Tx clock is provided by external rgmii clock.
     type: boolean
 
+  starfive,syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - items:
+          - description: phandle to syscon that configures phy mode
+          - description: Offset of phy mode selection
+          - description: Mask of phy mode selection
+    description:
+      A phandle to syscon with two arguments that configure phy mode.
+      The argument one is the offset of phy mode selection, the
+      argument two is the mask of phy mode selection.
+
 allOf:
   - $ref: snps,dwmac.yaml#
 
@@ -96,6 +108,7 @@ examples:
         snps,en-tx-lpi-clockgating;
         snps,txpbl = <16>;
         snps,rxpbl = <16>;
+        starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
         phy-handle = <&phy0>;
 
         mdio {
-- 
2.17.1


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[PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Samin Guo]

dwmac supports multiple modess. When working under rmii and rgmii,
you need to set different phy interfaces.

According to the dwmac document, when working in rmii, it needs to be
set to 0x4, and rgmii needs to be set to 0x1.

The phy interface needs to be set in syscon, the format is as follows:
starfive,syscon: <&syscon, offset, mask>

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
index 566378306f67..40fdd7036127 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
@@ -7,10 +7,15 @@
  *
  */
 
+#include <linux/mfd/syscon.h>
 #include <linux/of_device.h>
+#include <linux/regmap.h>
 
 #include "stmmac_platform.h"
 
+#define MACPHYC_PHY_INFT_RMII	0x4
+#define MACPHYC_PHY_INFT_RGMII	0x1
+
 struct starfive_dwmac {
 	struct device *dev;
 	struct clk *clk_tx;
@@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
 		dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
 }
 
+static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
+{
+	struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
+	struct of_phandle_args args;
+	struct regmap *regmap;
+	unsigned int reg, mask, mode;
+	int err;
+
+	switch (plat_dat->interface) {
+	case PHY_INTERFACE_MODE_RMII:
+		mode = MACPHYC_PHY_INFT_RMII;
+		break;
+
+	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_ID:
+		mode = MACPHYC_PHY_INFT_RGMII;
+		break;
+
+	default:
+		dev_err(dwmac->dev, "Unsupported interface %d\n",
+			plat_dat->interface);
+	}
+
+	err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
+					       "starfive,syscon", 2, 0, &args);
+	if (err) {
+		dev_dbg(dwmac->dev, "syscon reg not found\n");
+		return -EINVAL;
+	}
+
+	reg = args.args[0];
+	mask = args.args[1];
+	regmap = syscon_node_to_regmap(args.np);
+	of_node_put(args.np);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
+}
+
 static int starfive_dwmac_probe(struct platform_device *pdev)
 {
 	struct plat_stmmacenet_data *plat_dat;
@@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
 	plat_dat->bsp_priv = dwmac;
 	plat_dat->dma_cfg->dche = true;
 
+	starfive_dwmac_set_mode(plat_dat);
 	err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
 	if (err) {
 		stmmac_remove_config_dt(pdev, plat_dat);
-- 
2.17.1

[PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Samin Guo]

dwmac supports multiple modess. When working under rmii and rgmii,
you need to set different phy interfaces.

According to the dwmac document, when working in rmii, it needs to be
set to 0x4, and rgmii needs to be set to 0x1.

The phy interface needs to be set in syscon, the format is as follows:
starfive,syscon: <&syscon, offset, mask>

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
index 566378306f67..40fdd7036127 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
@@ -7,10 +7,15 @@
  *
  */
 
+#include <linux/mfd/syscon.h>
 #include <linux/of_device.h>
+#include <linux/regmap.h>
 
 #include "stmmac_platform.h"
 
+#define MACPHYC_PHY_INFT_RMII	0x4
+#define MACPHYC_PHY_INFT_RGMII	0x1
+
 struct starfive_dwmac {
 	struct device *dev;
 	struct clk *clk_tx;
@@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
 		dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
 }
 
+static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
+{
+	struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
+	struct of_phandle_args args;
+	struct regmap *regmap;
+	unsigned int reg, mask, mode;
+	int err;
+
+	switch (plat_dat->interface) {
+	case PHY_INTERFACE_MODE_RMII:
+		mode = MACPHYC_PHY_INFT_RMII;
+		break;
+
+	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_ID:
+		mode = MACPHYC_PHY_INFT_RGMII;
+		break;
+
+	default:
+		dev_err(dwmac->dev, "Unsupported interface %d\n",
+			plat_dat->interface);
+	}
+
+	err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
+					       "starfive,syscon", 2, 0, &args);
+	if (err) {
+		dev_dbg(dwmac->dev, "syscon reg not found\n");
+		return -EINVAL;
+	}
+
+	reg = args.args[0];
+	mask = args.args[1];
+	regmap = syscon_node_to_regmap(args.np);
+	of_node_put(args.np);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
+}
+
 static int starfive_dwmac_probe(struct platform_device *pdev)
 {
 	struct plat_stmmacenet_data *plat_dat;
@@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
 	plat_dat->bsp_priv = dwmac;
 	plat_dat->dma_cfg->dche = true;
 
+	starfive_dwmac_set_mode(plat_dat);
 	err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
 	if (err) {
 		stmmac_remove_config_dt(pdev, plat_dat);
-- 
2.17.1


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[PATCH v5 09/12] riscv: dts: starfive: jh7110: Add syscon to support phy interface settings

[Samin Guo]

The phy interface needs to be set in syscon, the format is as follows:
starfive,syscon: <&syscon, offset, mask>

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 2ce28292b721..c1c5085dab72 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -554,6 +554,7 @@
 			snps,en-tx-lpi-clockgating;
 			snps,txpbl = <16>;
 			snps,rxpbl = <16>;
+			starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
 			status = "disabled";
 			phy-handle = <&phy0>;
 
@@ -596,6 +597,7 @@
 			snps,en-tx-lpi-clockgating;
 			snps,txpbl = <16>;
 			snps,rxpbl = <16>;
+			starfive,syscon = <&sys_syscon 0x90 0x1c>;
 			status = "disabled";
 			phy-handle = <&phy1>;
 
-- 
2.17.1

[PATCH v5 09/12] riscv: dts: starfive: jh7110: Add syscon to support phy interface settings

[Samin Guo]

The phy interface needs to be set in syscon, the format is as follows:
starfive,syscon: <&syscon, offset, mask>

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 2ce28292b721..c1c5085dab72 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -554,6 +554,7 @@
 			snps,en-tx-lpi-clockgating;
 			snps,txpbl = <16>;
 			snps,rxpbl = <16>;
+			starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
 			status = "disabled";
 			phy-handle = <&phy0>;
 
@@ -596,6 +597,7 @@
 			snps,en-tx-lpi-clockgating;
 			snps,txpbl = <16>;
 			snps,rxpbl = <16>;
+			starfive,syscon = <&sys_syscon 0x90 0x1c>;
 			status = "disabled";
 			phy-handle = <&phy1>;
 
-- 
2.17.1


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[PATCH v5 10/12] riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay configuration

[Samin Guo]

v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and
inverse configurations.

The tx_clk of v1.3B uses an external clock and needs to be
switched to an external clock source.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../jh7110-starfive-visionfive-2-v1.3b.dts    | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
index 9230cc3d8946..32fae0de9a44 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -11,3 +11,30 @@
 	model = "StarFive VisionFive 2 v1.3B";
 	compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
 };
+
+&gmac0 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+};
+
+&gmac1 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,tx-clk-1000-inverted;
+	rx-internal-delay-ps = <1900>;
+	tx-internal-delay-ps = <1500>;
+};
+
+&phy1 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <0>;
+};
-- 
2.17.1

[PATCH v5 10/12] riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay configuration

[Samin Guo]

v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and
inverse configurations.

The tx_clk of v1.3B uses an external clock and needs to be
switched to an external clock source.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../jh7110-starfive-visionfive-2-v1.3b.dts    | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
index 9230cc3d8946..32fae0de9a44 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts
@@ -11,3 +11,30 @@
 	model = "StarFive VisionFive 2 v1.3B";
 	compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
 };
+
+&gmac0 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+};
+
+&gmac1 {
+	starfive,tx-use-rgmii-clk;
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	motorcomm,tx-clk-1000-inverted;
+	rx-internal-delay-ps = <1900>;
+	tx-internal-delay-ps = <1500>;
+};
+
+&phy1 {
+	motorcomm,tx-clk-adj-enabled;
+	motorcomm,tx-clk-100-inverted;
+	rx-internal-delay-ps = <0>;
+	tx-internal-delay-ps = <0>;
+};
-- 
2.17.1


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[PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Samin Guo]

v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
configurations.

v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
switch rx and rx to external clock sources.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
index 4af3300f3cf3..205a13d8c8b1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
@@ -11,3 +11,16 @@
 	model = "StarFive VisionFive 2 v1.2A";
 	compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
 };
+
+&gmac1 {
+	phy-mode = "rmii";
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
+			  <&syscrg JH7110_SYSCLK_GMAC1_RX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	rx-internal-delay-ps = <1900>;
+	tx-internal-delay-ps = <1350>;
+};
-- 
2.17.1

[PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Samin Guo]

v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
configurations.

v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
switch rx and rx to external clock sources.

Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
index 4af3300f3cf3..205a13d8c8b1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
@@ -11,3 +11,16 @@
 	model = "StarFive VisionFive 2 v1.2A";
 	compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
 };
+
+&gmac1 {
+	phy-mode = "rmii";
+	assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
+			  <&syscrg JH7110_SYSCLK_GMAC1_RX>;
+	assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
+				 <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
+};
+
+&phy0 {
+	rx-internal-delay-ps = <1900>;
+	tx-internal-delay-ps = <1350>;
+};
-- 
2.17.1


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[PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Samin Guo]

From: Yanhong Wang <yanhong.wang@starfivetech.com>

Update gmac device tree node status to okay.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index c2aa8946a0f1..d1c409f40014 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -12,6 +12,8 @@
 / {
 	aliases {
 		serial0 = &uart0;
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 		i2c0 = &i2c0;
 		i2c2 = &i2c2;
 		i2c5 = &i2c5;
@@ -92,6 +94,14 @@
 	status = "okay";
 };
 
+&gmac0 {
+	status = "okay";
+};
+
+&gmac1 {
+	status = "okay";
+};
+
 &i2c0 {
 	clock-frequency = <100000>;
 	i2c-sda-hold-time-ns = <300>;
-- 
2.17.1

[PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Samin Guo]

From: Yanhong Wang <yanhong.wang@starfivetech.com>

Update gmac device tree node status to okay.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
---
 .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index c2aa8946a0f1..d1c409f40014 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -12,6 +12,8 @@
 / {
 	aliases {
 		serial0 = &uart0;
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 		i2c0 = &i2c0;
 		i2c2 = &i2c2;
 		i2c5 = &i2c5;
@@ -92,6 +94,14 @@
 	status = "okay";
 };
 
+&gmac0 {
+	status = "okay";
+};
+
+&gmac1 {
+	status = "okay";
+};
+
 &i2c0 {
 	clock-frequency = <100000>;
 	i2c-sda-hold-time-ns = <300>;
-- 
2.17.1


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Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Andrew Lunn]

> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +{
> +	struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
> +	struct of_phandle_args args;
> +	struct regmap *regmap;
> +	unsigned int reg, mask, mode;
> +	int err;
> +
> +	switch (plat_dat->interface) {
> +	case PHY_INTERFACE_MODE_RMII:
> +		mode = MACPHYC_PHY_INFT_RMII;
> +		break;
> +
> +	case PHY_INTERFACE_MODE_RGMII:
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		mode = MACPHYC_PHY_INFT_RGMII;
> +		break;
> +
> +	default:
> +		dev_err(dwmac->dev, "Unsupported interface %d\n",
> +			plat_dat->interface);
> +	}

Please add a return -EINVAL;

> +
> +	err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
> +					       "starfive,syscon", 2, 0, &args);
> +	if (err) {
> +		dev_dbg(dwmac->dev, "syscon reg not found\n");
> +		return -EINVAL;
> +	}
> +
> +	reg = args.args[0];
> +	mask = args.args[1];
> +	regmap = syscon_node_to_regmap(args.np);
> +	of_node_put(args.np);
> +	if (IS_ERR(regmap))
> +		return PTR_ERR(regmap);
> +
> +	return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));

This is a poor device tree binding. We generally don't allow bindings
which say put value X in register Y.

Could you add a table: interface mode, reg, mask? You can then do a
simple lookup based on the interface mode? No device tree binding
needed at all?

       Andrew

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Andrew Lunn]

> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +{
> +	struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
> +	struct of_phandle_args args;
> +	struct regmap *regmap;
> +	unsigned int reg, mask, mode;
> +	int err;
> +
> +	switch (plat_dat->interface) {
> +	case PHY_INTERFACE_MODE_RMII:
> +		mode = MACPHYC_PHY_INFT_RMII;
> +		break;
> +
> +	case PHY_INTERFACE_MODE_RGMII:
> +	case PHY_INTERFACE_MODE_RGMII_ID:
> +		mode = MACPHYC_PHY_INFT_RGMII;
> +		break;
> +
> +	default:
> +		dev_err(dwmac->dev, "Unsupported interface %d\n",
> +			plat_dat->interface);
> +	}

Please add a return -EINVAL;

> +
> +	err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
> +					       "starfive,syscon", 2, 0, &args);
> +	if (err) {
> +		dev_dbg(dwmac->dev, "syscon reg not found\n");
> +		return -EINVAL;
> +	}
> +
> +	reg = args.args[0];
> +	mask = args.args[1];
> +	regmap = syscon_node_to_regmap(args.np);
> +	of_node_put(args.np);
> +	if (IS_ERR(regmap))
> +		return PTR_ERR(regmap);
> +
> +	return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));

This is a poor device tree binding. We generally don't allow bindings
which say put value X in register Y.

Could you add a table: interface mode, reg, mask? You can then do a
simple lookup based on the interface mode? No device tree binding
needed at all?

       Andrew

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Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Andrew Lunn]

> +		gmac0: ethernet@16030000 {
> +			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +			reg = <0x0 0x16030000 0x0 0x10000>;
> +			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
> +			clock-names = "stmmaceth", "pclk", "ptp_ref",
> +				      "tx", "gtx";
> +			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
> +			reset-names = "stmmaceth", "ahb";
> +			interrupts = <7>, <6>, <5>;
> +			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +			phy-mode = "rgmii-id";

phy-mode is a board property, not a SoC property. It should be in the
board .dts file, not the SoC .dtsi file.

> +			snps,multicast-filter-bins = <64>;
> +			snps,perfect-filter-entries = <8>;
> +			rx-fifo-depth = <2048>;
> +			tx-fifo-depth = <2048>;
> +			snps,fixed-burst;
> +			snps,no-pbl-x8;
> +			snps,force_thresh_dma_mode;
> +			snps,axi-config = <&stmmac_axi_setup>;
> +			snps,tso;
> +			snps,en-tx-lpi-clockgating;
> +			snps,txpbl = <16>;
> +			snps,rxpbl = <16>;
> +			status = "disabled";
> +			phy-handle = <&phy0>;

The PHY is external, so this is also a board property, not a SoC
property. 

> +
> +			mdio {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "snps,dwmac-mdio";
> +
> +				phy0: ethernet-phy@0 {
> +					reg = <0>;
> +				};

The PHY is also a board property. You could for example design a board
where both PHYs are on one MDIO bus, in order to save two SoC pins.

      Andrew

Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Andrew Lunn]

> +		gmac0: ethernet@16030000 {
> +			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +			reg = <0x0 0x16030000 0x0 0x10000>;
> +			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
> +				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
> +				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
> +			clock-names = "stmmaceth", "pclk", "ptp_ref",
> +				      "tx", "gtx";
> +			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
> +				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
> +			reset-names = "stmmaceth", "ahb";
> +			interrupts = <7>, <6>, <5>;
> +			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +			phy-mode = "rgmii-id";

phy-mode is a board property, not a SoC property. It should be in the
board .dts file, not the SoC .dtsi file.

> +			snps,multicast-filter-bins = <64>;
> +			snps,perfect-filter-entries = <8>;
> +			rx-fifo-depth = <2048>;
> +			tx-fifo-depth = <2048>;
> +			snps,fixed-burst;
> +			snps,no-pbl-x8;
> +			snps,force_thresh_dma_mode;
> +			snps,axi-config = <&stmmac_axi_setup>;
> +			snps,tso;
> +			snps,en-tx-lpi-clockgating;
> +			snps,txpbl = <16>;
> +			snps,rxpbl = <16>;
> +			status = "disabled";
> +			phy-handle = <&phy0>;

The PHY is external, so this is also a board property, not a SoC
property. 

> +
> +			mdio {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				compatible = "snps,dwmac-mdio";
> +
> +				phy0: ethernet-phy@0 {
> +					reg = <0>;
> +				};

The PHY is also a board property. You could for example design a board
where both PHYs are on one MDIO bus, in order to save two SoC pins.

      Andrew

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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>
> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  MAINTAINERS                                   |   1 +
>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>  4 files changed, 139 insertions(+)
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4e236b7c7fd2..91a4f190c827 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>  M:     Emil Renner Berthing <kernel@esmil.dk>
>  M:     Samin Guo <samin.guo@starfivetech.com>
>  S:     Maintained
> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>
>  STARFIVE JH71X0 CLOCK DRIVERS
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index f77511fe4e87..47fbccef9d04 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>           for the stmmac device driver. This driver is used for
>           arria5 and cyclone5 FPGA SoCs.
>
> +config DWMAC_STARFIVE
> +       tristate "StarFive dwmac support"
> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)

There is an extra space between "OF" and "&&" here.


> +       depends on STMMAC_ETH

It's not visible in this patch context, but this whole config option
is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
on STMMAC_ETH" should not be needed.

> +       default ARCH_STARFIVE

This driver is not required to boot the JH7110, so we should just
default to building it as a module. Eg.
default m if ARCH_STARFIVE

> +       help
> +         Support for ethernet controllers on StarFive RISC-V SoCs
> +
> +         This selects the StarFive platform specific glue layer support for
> +         the stmmac device driver. This driver is used for StarFive JH7110
> +         ethernet controller.
> +
>  config DWMAC_STI
>         tristate "STi GMAC support"
>         default ARCH_STI
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 057e4bab5c08..8738fdbb4b2d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> new file mode 100644
> index 000000000000..566378306f67
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive DWMAC platform driver
> + *
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>

Sorry, after looking at my old git branches where this started as a
driver for the JH7100 this should really be
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
* Copyright (C) 2022 StarFive Technology Co., Ltd.

> + */
> +
> +#include <linux/of_device.h>
> +
> +#include "stmmac_platform.h"
> +
> +struct starfive_dwmac {
> +       struct device *dev;
> +       struct clk *clk_tx;
> +       struct clk *clk_gtx;

This pointer is only set, but never read. Please remove it.

> +       bool tx_use_rgmii_rxin_clk;
> +};
> +
> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)

This should be starfive_dwmac_fix_mac_speed for consistency.

> +{
> +       struct starfive_dwmac *dwmac = priv;
> +       unsigned long rate;
> +       int err;
> +
> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> +        * which needs to match the corresponding clock frequency according
> +        * to different speeds. If the rgmii_tx clock is provided by the
> +        * external rgmii_rxin, there is no need to configure the clock
> +        * internally, because rgmii_rxin will be adaptively adjusted.
> +        */
> +       if (dwmac->tx_use_rgmii_rxin_clk)
> +               return;

If this function is only needed in certain situations, why not just
set the plat_dat->fix_mac_speed callback when it is needed?

> +       switch (speed) {
> +       case SPEED_1000:
> +               rate = 125000000;
> +               break;
> +       case SPEED_100:
> +               rate = 25000000;
> +               break;
> +       case SPEED_10:
> +               rate = 2500000;
> +               break;
> +       default:
> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> +               break;
> +       }
> +
> +       err = clk_set_rate(dwmac->clk_tx, rate);
> +       if (err)
> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> +}
> +
> +static int starfive_dwmac_probe(struct platform_device *pdev)
> +{
> +       struct plat_stmmacenet_data *plat_dat;
> +       struct stmmac_resources stmmac_res;
> +       struct starfive_dwmac *dwmac;
> +       int err;
> +
> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> +       if (err)
> +               return err;
> +
> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> +       if (IS_ERR(plat_dat)) {
> +               dev_err(&pdev->dev, "dt configuration failed\n");
> +               return PTR_ERR(plat_dat);
> +       }
> +
> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> +       if (!dwmac)
> +               return -ENOMEM;
> +
> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> +       if (IS_ERR(dwmac->clk_tx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> +                                   "error getting tx clock\n");
> +
> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> +       if (IS_ERR(dwmac->clk_gtx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> +                                   "error getting gtx clock\n");
> +
> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> +               dwmac->tx_use_rgmii_rxin_clk = true;
> +
> +       dwmac->dev = &pdev->dev;
> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;

Eg.:
if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
  plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;

> +       plat_dat->init = NULL;
> +       plat_dat->bsp_priv = dwmac;
> +       plat_dat->dma_cfg->dche = true;
> +
> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> +       if (err) {
> +               stmmac_remove_config_dt(pdev, plat_dat);
> +               return err;
> +       }
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id starfive_dwmac_match[] = {
> +       { .compatible = "starfive,jh7110-dwmac" },
> +       { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> +
> +static struct platform_driver starfive_dwmac_driver = {
> +       .probe  = starfive_dwmac_probe,
> +       .remove = stmmac_pltfr_remove,
> +       .driver = {
> +               .name = "starfive-dwmac",
> +               .pm = &stmmac_pltfr_pm_ops,
> +               .of_match_table = starfive_dwmac_match,
> +       },
> +};
> +module_platform_driver(starfive_dwmac_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> --
> 2.17.1
>
>
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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>
> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  MAINTAINERS                                   |   1 +
>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>  4 files changed, 139 insertions(+)
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4e236b7c7fd2..91a4f190c827 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>  M:     Emil Renner Berthing <kernel@esmil.dk>
>  M:     Samin Guo <samin.guo@starfivetech.com>
>  S:     Maintained
> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>
>  STARFIVE JH71X0 CLOCK DRIVERS
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index f77511fe4e87..47fbccef9d04 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>           for the stmmac device driver. This driver is used for
>           arria5 and cyclone5 FPGA SoCs.
>
> +config DWMAC_STARFIVE
> +       tristate "StarFive dwmac support"
> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)

There is an extra space between "OF" and "&&" here.


> +       depends on STMMAC_ETH

It's not visible in this patch context, but this whole config option
is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
on STMMAC_ETH" should not be needed.

> +       default ARCH_STARFIVE

This driver is not required to boot the JH7110, so we should just
default to building it as a module. Eg.
default m if ARCH_STARFIVE

> +       help
> +         Support for ethernet controllers on StarFive RISC-V SoCs
> +
> +         This selects the StarFive platform specific glue layer support for
> +         the stmmac device driver. This driver is used for StarFive JH7110
> +         ethernet controller.
> +
>  config DWMAC_STI
>         tristate "STi GMAC support"
>         default ARCH_STI
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 057e4bab5c08..8738fdbb4b2d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> new file mode 100644
> index 000000000000..566378306f67
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive DWMAC platform driver
> + *
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>

Sorry, after looking at my old git branches where this started as a
driver for the JH7100 this should really be
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
* Copyright (C) 2022 StarFive Technology Co., Ltd.

> + */
> +
> +#include <linux/of_device.h>
> +
> +#include "stmmac_platform.h"
> +
> +struct starfive_dwmac {
> +       struct device *dev;
> +       struct clk *clk_tx;
> +       struct clk *clk_gtx;

This pointer is only set, but never read. Please remove it.

> +       bool tx_use_rgmii_rxin_clk;
> +};
> +
> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)

This should be starfive_dwmac_fix_mac_speed for consistency.

> +{
> +       struct starfive_dwmac *dwmac = priv;
> +       unsigned long rate;
> +       int err;
> +
> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> +        * which needs to match the corresponding clock frequency according
> +        * to different speeds. If the rgmii_tx clock is provided by the
> +        * external rgmii_rxin, there is no need to configure the clock
> +        * internally, because rgmii_rxin will be adaptively adjusted.
> +        */
> +       if (dwmac->tx_use_rgmii_rxin_clk)
> +               return;

If this function is only needed in certain situations, why not just
set the plat_dat->fix_mac_speed callback when it is needed?

> +       switch (speed) {
> +       case SPEED_1000:
> +               rate = 125000000;
> +               break;
> +       case SPEED_100:
> +               rate = 25000000;
> +               break;
> +       case SPEED_10:
> +               rate = 2500000;
> +               break;
> +       default:
> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> +               break;
> +       }
> +
> +       err = clk_set_rate(dwmac->clk_tx, rate);
> +       if (err)
> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> +}
> +
> +static int starfive_dwmac_probe(struct platform_device *pdev)
> +{
> +       struct plat_stmmacenet_data *plat_dat;
> +       struct stmmac_resources stmmac_res;
> +       struct starfive_dwmac *dwmac;
> +       int err;
> +
> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> +       if (err)
> +               return err;
> +
> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> +       if (IS_ERR(plat_dat)) {
> +               dev_err(&pdev->dev, "dt configuration failed\n");
> +               return PTR_ERR(plat_dat);
> +       }
> +
> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> +       if (!dwmac)
> +               return -ENOMEM;
> +
> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> +       if (IS_ERR(dwmac->clk_tx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> +                                   "error getting tx clock\n");
> +
> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> +       if (IS_ERR(dwmac->clk_gtx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> +                                   "error getting gtx clock\n");
> +
> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> +               dwmac->tx_use_rgmii_rxin_clk = true;
> +
> +       dwmac->dev = &pdev->dev;
> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;

Eg.:
if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
  plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;

> +       plat_dat->init = NULL;
> +       plat_dat->bsp_priv = dwmac;
> +       plat_dat->dma_cfg->dche = true;
> +
> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> +       if (err) {
> +               stmmac_remove_config_dt(pdev, plat_dat);
> +               return err;
> +       }
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id starfive_dwmac_match[] = {
> +       { .compatible = "starfive,jh7110-dwmac" },
> +       { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> +
> +static struct platform_driver starfive_dwmac_driver = {
> +       .probe  = starfive_dwmac_probe,
> +       .remove = stmmac_pltfr_remove,
> +       .driver = {
> +               .name = "starfive-dwmac",
> +               .pm = &stmmac_pltfr_pm_ops,
> +               .of_match_table = starfive_dwmac_match,
> +       },
> +};
> +module_platform_driver(starfive_dwmac_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> --
> 2.17.1
>
>
> _______________________________________________
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> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>
> dwmac supports multiple modess. When working under rmii and rgmii,
> you need to set different phy interfaces.
>
> According to the dwmac document, when working in rmii, it needs to be
> set to 0x4, and rgmii needs to be set to 0x1.
>
> The phy interface needs to be set in syscon, the format is as follows:
> starfive,syscon: <&syscon, offset, mask>
>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
>  1 file changed, 46 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> index 566378306f67..40fdd7036127 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -7,10 +7,15 @@
>   *
>   */
>
> +#include <linux/mfd/syscon.h>
>  #include <linux/of_device.h>
> +#include <linux/regmap.h>
>
>  #include "stmmac_platform.h"
>
> +#define MACPHYC_PHY_INFT_RMII  0x4
> +#define MACPHYC_PHY_INFT_RGMII 0x1

Please prefix these with something like STARFIVE_DWMAC_

>  struct starfive_dwmac {
>         struct device *dev;
>         struct clk *clk_tx;
> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>  }
>
> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +{
> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
> +       struct of_phandle_args args;
> +       struct regmap *regmap;
> +       unsigned int reg, mask, mode;
> +       int err;
> +
> +       switch (plat_dat->interface) {
> +       case PHY_INTERFACE_MODE_RMII:
> +               mode = MACPHYC_PHY_INFT_RMII;
> +               break;
> +
> +       case PHY_INTERFACE_MODE_RGMII:
> +       case PHY_INTERFACE_MODE_RGMII_ID:
> +               mode = MACPHYC_PHY_INFT_RGMII;
> +               break;
> +
> +       default:
> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
> +                       plat_dat->interface);
> +       }
> +
> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
> +                                              "starfive,syscon", 2, 0, &args);
> +       if (err) {
> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
> +               return -EINVAL;
> +       }
> +
> +       reg = args.args[0];
> +       mask = args.args[1];
> +       regmap = syscon_node_to_regmap(args.np);
> +       of_node_put(args.np);

I think the above is basically
unsigned int args[2];
syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
"starfive,syscon", 2, args);

..but as Andrew points out another solution is to use platform match
data for this. Eg.

static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
  .phy_interface_offset = 0xc,
  .phy_interface_mask = 0x1c0000,
};

static const struct of_device_id starfive_dwmac_match[] = {
  { .compatible = "starfive,jh7110-dwmac", .data =
&starfive_dwmac_jh7110_data },
  { /* sentinel */ }
};

and in the probe function:

struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);

> +       if (IS_ERR(regmap))
> +               return PTR_ERR(regmap);
> +
> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
> +}
> +
>  static int starfive_dwmac_probe(struct platform_device *pdev)
>  {
>         struct plat_stmmacenet_data *plat_dat;
> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>         plat_dat->bsp_priv = dwmac;
>         plat_dat->dma_cfg->dche = true;
>
> +       starfive_dwmac_set_mode(plat_dat);

The function returns errors in an int, but you never check it :(

>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>         if (err) {
>                 stmmac_remove_config_dt(pdev, plat_dat);
> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>
> dwmac supports multiple modess. When working under rmii and rgmii,
> you need to set different phy interfaces.
>
> According to the dwmac document, when working in rmii, it needs to be
> set to 0x4, and rgmii needs to be set to 0x1.
>
> The phy interface needs to be set in syscon, the format is as follows:
> starfive,syscon: <&syscon, offset, mask>
>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
>  1 file changed, 46 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> index 566378306f67..40fdd7036127 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -7,10 +7,15 @@
>   *
>   */
>
> +#include <linux/mfd/syscon.h>
>  #include <linux/of_device.h>
> +#include <linux/regmap.h>
>
>  #include "stmmac_platform.h"
>
> +#define MACPHYC_PHY_INFT_RMII  0x4
> +#define MACPHYC_PHY_INFT_RGMII 0x1

Please prefix these with something like STARFIVE_DWMAC_

>  struct starfive_dwmac {
>         struct device *dev;
>         struct clk *clk_tx;
> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>  }
>
> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> +{
> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
> +       struct of_phandle_args args;
> +       struct regmap *regmap;
> +       unsigned int reg, mask, mode;
> +       int err;
> +
> +       switch (plat_dat->interface) {
> +       case PHY_INTERFACE_MODE_RMII:
> +               mode = MACPHYC_PHY_INFT_RMII;
> +               break;
> +
> +       case PHY_INTERFACE_MODE_RGMII:
> +       case PHY_INTERFACE_MODE_RGMII_ID:
> +               mode = MACPHYC_PHY_INFT_RGMII;
> +               break;
> +
> +       default:
> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
> +                       plat_dat->interface);
> +       }
> +
> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
> +                                              "starfive,syscon", 2, 0, &args);
> +       if (err) {
> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
> +               return -EINVAL;
> +       }
> +
> +       reg = args.args[0];
> +       mask = args.args[1];
> +       regmap = syscon_node_to_regmap(args.np);
> +       of_node_put(args.np);

I think the above is basically
unsigned int args[2];
syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
"starfive,syscon", 2, args);

..but as Andrew points out another solution is to use platform match
data for this. Eg.

static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
  .phy_interface_offset = 0xc,
  .phy_interface_mask = 0x1c0000,
};

static const struct of_device_id starfive_dwmac_match[] = {
  { .compatible = "starfive,jh7110-dwmac", .data =
&starfive_dwmac_jh7110_data },
  { /* sentinel */ }
};

and in the probe function:

struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);

> +       if (IS_ERR(regmap))
> +               return PTR_ERR(regmap);
> +
> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
> +}
> +
>  static int starfive_dwmac_probe(struct platform_device *pdev)
>  {
>         struct plat_stmmacenet_data *plat_dat;
> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>         plat_dat->bsp_priv = dwmac;
>         plat_dat->dma_cfg->dche = true;
>
> +       starfive_dwmac_set_mode(plat_dat);

The function returns errors in an int, but you never check it :(

>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>         if (err) {
>                 stmmac_remove_config_dt(pdev, plat_dat);
> --
> 2.17.1
>
>
> _______________________________________________
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> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>
> Add JH7110 ethernet device node to support gmac driver for the JH7110
> RISC-V SoC.
>
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 91 ++++++++++++++++++++++++
>  1 file changed, 91 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 09806418ed1b..2ce28292b721 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -233,6 +233,13 @@
>                 #clock-cells = <0>;
>         };
>
> +       stmmac_axi_setup: stmmac-axi-config {
> +               snps,lpi_en;
> +               snps,wr_osr_lmt = <4>;
> +               snps,rd_osr_lmt = <4>;
> +               snps,blen = <256 128 64 32 0 0 0>;
> +       };
> +
>         tdm_ext: tdm-ext-clock {
>                 compatible = "fixed-clock";
>                 clock-output-names = "tdm_ext";
> @@ -518,5 +525,89 @@
>                         gpio-controller;
>                         #gpio-cells = <2>;
>                 };
> +
> +               gmac0: ethernet@16030000 {
> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +                       reg = <0x0 0x16030000 0x0 0x10000>;
> +                       clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
> +                                <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
> +                                <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
> +                                <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
> +                                <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                                     "tx", "gtx";
> +                       resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
> +                                <&aoncrg JH7110_AONRST_GMAC0_AHB>;
> +                       reset-names = "stmmaceth", "ahb";
> +                       interrupts = <7>, <6>, <5>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +                       phy-mode = "rgmii-id";
> +                       snps,multicast-filter-bins = <64>;
> +                       snps,perfect-filter-entries = <8>;
> +                       rx-fifo-depth = <2048>;
> +                       tx-fifo-depth = <2048>;
> +                       snps,fixed-burst;
> +                       snps,no-pbl-x8;
> +                       snps,force_thresh_dma_mode;
> +                       snps,axi-config = <&stmmac_axi_setup>;
> +                       snps,tso;
> +                       snps,en-tx-lpi-clockgating;
> +                       snps,txpbl = <16>;
> +                       snps,rxpbl = <16>;
> +                       status = "disabled";
> +                       phy-handle = <&phy0>;
> +
> +                       mdio {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               compatible = "snps,dwmac-mdio";
> +
> +                               phy0: ethernet-phy@0 {
> +                                       reg = <0>;
> +                               };
> +                       };
> +               };
> +
> +               gmac1: ethernet@16040000 {
> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +                       reg = <0x0 0x16040000 0x0 0x10000>;
> +                       clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                                     "tx", "gtx";
> +                       resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
> +                                <&syscrg JH7110_SYSRST_GMAC1_AHB>;
> +                       reset-names = "stmmaceth", "ahb";
> +                       interrupts = <78>, <77>, <76>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +                       phy-mode = "rgmii-id";
> +                       snps,multicast-filter-bins = <64>;
> +                       snps,perfect-filter-entries = <8>;
> +                       rx-fifo-depth = <2048>;
> +                       tx-fifo-depth = <2048>;
> +                       snps,fixed-burst;
> +                       snps,no-pbl-x8;
> +                       snps,force_thresh_dma_mode;
> +                       snps,axi-config = <&stmmac_axi_setup>;
> +                       snps,tso;
> +                       snps,en-tx-lpi-clockgating;
> +                       snps,txpbl = <16>;
> +                       snps,rxpbl = <16>;
> +                       status = "disabled";
> +                       phy-handle = <&phy1>;
> +
> +                       mdio {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               compatible = "snps,dwmac-mdio";
> +
> +                               phy1: ethernet-phy@1 {
> +                                       reg = <0>;

I'm getting errors on eth1 unless this is set to <1>. In any case the
number after @ in the node name should match the reg value.

> +                               };
> +                       };
> +               };
>         };
>  };
> --
> 2.17.1
>
>
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> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>
> Add JH7110 ethernet device node to support gmac driver for the JH7110
> RISC-V SoC.
>
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 91 ++++++++++++++++++++++++
>  1 file changed, 91 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 09806418ed1b..2ce28292b721 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -233,6 +233,13 @@
>                 #clock-cells = <0>;
>         };
>
> +       stmmac_axi_setup: stmmac-axi-config {
> +               snps,lpi_en;
> +               snps,wr_osr_lmt = <4>;
> +               snps,rd_osr_lmt = <4>;
> +               snps,blen = <256 128 64 32 0 0 0>;
> +       };
> +
>         tdm_ext: tdm-ext-clock {
>                 compatible = "fixed-clock";
>                 clock-output-names = "tdm_ext";
> @@ -518,5 +525,89 @@
>                         gpio-controller;
>                         #gpio-cells = <2>;
>                 };
> +
> +               gmac0: ethernet@16030000 {
> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +                       reg = <0x0 0x16030000 0x0 0x10000>;
> +                       clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
> +                                <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
> +                                <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
> +                                <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
> +                                <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                                     "tx", "gtx";
> +                       resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
> +                                <&aoncrg JH7110_AONRST_GMAC0_AHB>;
> +                       reset-names = "stmmaceth", "ahb";
> +                       interrupts = <7>, <6>, <5>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +                       phy-mode = "rgmii-id";
> +                       snps,multicast-filter-bins = <64>;
> +                       snps,perfect-filter-entries = <8>;
> +                       rx-fifo-depth = <2048>;
> +                       tx-fifo-depth = <2048>;
> +                       snps,fixed-burst;
> +                       snps,no-pbl-x8;
> +                       snps,force_thresh_dma_mode;
> +                       snps,axi-config = <&stmmac_axi_setup>;
> +                       snps,tso;
> +                       snps,en-tx-lpi-clockgating;
> +                       snps,txpbl = <16>;
> +                       snps,rxpbl = <16>;
> +                       status = "disabled";
> +                       phy-handle = <&phy0>;
> +
> +                       mdio {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               compatible = "snps,dwmac-mdio";
> +
> +                               phy0: ethernet-phy@0 {
> +                                       reg = <0>;
> +                               };
> +                       };
> +               };
> +
> +               gmac1: ethernet@16040000 {
> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +                       reg = <0x0 0x16040000 0x0 0x10000>;
> +                       clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                                     "tx", "gtx";
> +                       resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
> +                                <&syscrg JH7110_SYSRST_GMAC1_AHB>;
> +                       reset-names = "stmmaceth", "ahb";
> +                       interrupts = <78>, <77>, <76>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +                       phy-mode = "rgmii-id";
> +                       snps,multicast-filter-bins = <64>;
> +                       snps,perfect-filter-entries = <8>;
> +                       rx-fifo-depth = <2048>;
> +                       tx-fifo-depth = <2048>;
> +                       snps,fixed-burst;
> +                       snps,no-pbl-x8;
> +                       snps,force_thresh_dma_mode;
> +                       snps,axi-config = <&stmmac_axi_setup>;
> +                       snps,tso;
> +                       snps,en-tx-lpi-clockgating;
> +                       snps,txpbl = <16>;
> +                       snps,rxpbl = <16>;
> +                       status = "disabled";
> +                       phy-handle = <&phy1>;
> +
> +                       mdio {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               compatible = "snps,dwmac-mdio";
> +
> +                               phy1: ethernet-phy@1 {
> +                                       reg = <0>;

I'm getting errors on eth1 unless this is set to <1>. In any case the
number after @ in the node name should match the reg value.

> +                               };
> +                       };
> +               };
>         };
>  };
> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Guo Samin]

在 2023/3/3 21:45:44, Andrew Lunn 写道:
>> +		gmac0: ethernet@16030000 {
>> +			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +			reg = <0x0 0x16030000 0x0 0x10000>;
>> +			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
>> +				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
>> +				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
>> +				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
>> +				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
>> +			clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +				      "tx", "gtx";
>> +			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
>> +				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
>> +			reset-names = "stmmaceth", "ahb";
>> +			interrupts = <7>, <6>, <5>;
>> +			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +			phy-mode = "rgmii-id";
> 
> phy-mode is a board property, not a SoC property. It should be in the
> board .dts file, not the SoC .dtsi file.

Thanks. I will fix it in the next version.
> 
>> +			snps,multicast-filter-bins = <64>;
>> +			snps,perfect-filter-entries = <8>;
>> +			rx-fifo-depth = <2048>;
>> +			tx-fifo-depth = <2048>;
>> +			snps,fixed-burst;
>> +			snps,no-pbl-x8;
>> +			snps,force_thresh_dma_mode;
>> +			snps,axi-config = <&stmmac_axi_setup>;
>> +			snps,tso;
>> +			snps,en-tx-lpi-clockgating;
>> +			snps,txpbl = <16>;
>> +			snps,rxpbl = <16>;
>> +			status = "disabled";
>> +			phy-handle = <&phy0>;
> 
> The PHY is external, so this is also a board property, not a SoC
> property. 
Will fix, thanks.
> 
>> +
>> +			mdio {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
>> +				compatible = "snps,dwmac-mdio";
>> +
>> +				phy0: ethernet-phy@0 {
>> +					reg = <0>;
>> +				};
> 
> The PHY is also a board property. You could for example design a board
> where both PHYs are on one MDIO bus, in order to save two SoC pins.

Sounds like a good idea.
> 
>       Andrew

Thank you for taking the time to review.
-- 
Best regards,
Samin

Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Guo Samin]

在 2023/3/3 21:45:44, Andrew Lunn 写道:
>> +		gmac0: ethernet@16030000 {
>> +			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +			reg = <0x0 0x16030000 0x0 0x10000>;
>> +			clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
>> +				 <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
>> +				 <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
>> +				 <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
>> +				 <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
>> +			clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +				      "tx", "gtx";
>> +			resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
>> +				 <&aoncrg JH7110_AONRST_GMAC0_AHB>;
>> +			reset-names = "stmmaceth", "ahb";
>> +			interrupts = <7>, <6>, <5>;
>> +			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +			phy-mode = "rgmii-id";
> 
> phy-mode is a board property, not a SoC property. It should be in the
> board .dts file, not the SoC .dtsi file.

Thanks. I will fix it in the next version.
> 
>> +			snps,multicast-filter-bins = <64>;
>> +			snps,perfect-filter-entries = <8>;
>> +			rx-fifo-depth = <2048>;
>> +			tx-fifo-depth = <2048>;
>> +			snps,fixed-burst;
>> +			snps,no-pbl-x8;
>> +			snps,force_thresh_dma_mode;
>> +			snps,axi-config = <&stmmac_axi_setup>;
>> +			snps,tso;
>> +			snps,en-tx-lpi-clockgating;
>> +			snps,txpbl = <16>;
>> +			snps,rxpbl = <16>;
>> +			status = "disabled";
>> +			phy-handle = <&phy0>;
> 
> The PHY is external, so this is also a board property, not a SoC
> property. 
Will fix, thanks.
> 
>> +
>> +			mdio {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
>> +				compatible = "snps,dwmac-mdio";
>> +
>> +				phy0: ethernet-phy@0 {
>> +					reg = <0>;
>> +				};
> 
> The PHY is also a board property. You could for example design a board
> where both PHYs are on one MDIO bus, in order to save two SoC pins.

Sounds like a good idea.
> 
>       Andrew

Thank you for taking the time to review.
-- 
Best regards,
Samin

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Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Guo Samin]

在 2023/3/4 0:50:54, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>
>> dwmac supports multiple modess. When working under rmii and rgmii,
>> you need to set different phy interfaces.
>>
>> According to the dwmac document, when working in rmii, it needs to be
>> set to 0x4, and rgmii needs to be set to 0x1.
>>
>> The phy interface needs to be set in syscon, the format is as follows:
>> starfive,syscon: <&syscon, offset, mask>
>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
>>  1 file changed, 46 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> index 566378306f67..40fdd7036127 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> @@ -7,10 +7,15 @@
>>   *
>>   */
>>
>> +#include <linux/mfd/syscon.h>
>>  #include <linux/of_device.h>
>> +#include <linux/regmap.h>
>>
>>  #include "stmmac_platform.h"
>>
>> +#define MACPHYC_PHY_INFT_RMII  0x4
>> +#define MACPHYC_PHY_INFT_RGMII 0x1
> 
> Please prefix these with something like STARFIVE_DWMAC_
>
Hi, Emil, These definitions come from the datasheet of dwmac. However, add STARDRIVE_ DWMAC is a good idea. I will fix it,thanks.
>>  struct starfive_dwmac {
>>         struct device *dev;
>>         struct clk *clk_tx;
>> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>  }
>>
>> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
>> +{
>> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
>> +       struct of_phandle_args args;
>> +       struct regmap *regmap;
>> +       unsigned int reg, mask, mode;
>> +       int err;
>> +
>> +       switch (plat_dat->interface) {
>> +       case PHY_INTERFACE_MODE_RMII:
>> +               mode = MACPHYC_PHY_INFT_RMII;
>> +               break;
>> +
>> +       case PHY_INTERFACE_MODE_RGMII:
>> +       case PHY_INTERFACE_MODE_RGMII_ID:
>> +               mode = MACPHYC_PHY_INFT_RGMII;
>> +               break;
>> +
>> +       default:
>> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
>> +                       plat_dat->interface);
>> +       }
>> +
>> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
>> +                                              "starfive,syscon", 2, 0, &args);
>> +       if (err) {
>> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
>> +               return -EINVAL;
>> +       }
>> +
>> +       reg = args.args[0];
>> +       mask = args.args[1];
>> +       regmap = syscon_node_to_regmap(args.np);
>> +       of_node_put(args.np);
> 
> I think the above is basically
> unsigned int args[2];
> syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
> "starfive,syscon", 2, args);
> 
> ..but as Andrew points out another solution is to use platform match
> data for this. Eg.
> 
> static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
>   .phy_interface_offset = 0xc,
>   .phy_interface_mask = 0x1c0000,
> };
> 
> static const struct of_device_id starfive_dwmac_match[] = {
>   { .compatible = "starfive,jh7110-dwmac", .data =
> &starfive_dwmac_jh7110_data },
>   { /* sentinel */ }
> };
> 
> and in the probe function:
> 
Hi Emil, Yes，this is usually a good solution, and I have considered this plan before.
However, gmac0 of jh7110 is different from the reg/mask of gmac1.
You can find it in patch-9:

&gmac0 {
	starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
};

&gmac1 {
	starfive,syscon = <&sys_syscon 0x90 0x1c>;
};

In this case, using match_data of starfive,jh7110-dwma does not seem to be compatible.

> struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);
> 
>> +       if (IS_ERR(regmap))
>> +               return PTR_ERR(regmap);
>> +
>> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
>> +}
>> +
>>  static int starfive_dwmac_probe(struct platform_device *pdev)
>>  {
>>         struct plat_stmmacenet_data *plat_dat;
>> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>>         plat_dat->bsp_priv = dwmac;
>>         plat_dat->dma_cfg->dche = true;
>>
>> +       starfive_dwmac_set_mode(plat_dat);
> 
> The function returns errors in an int, but you never check it :(
> 
Thank you for pointing out that it will be added in the next version.
>>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>         if (err) {
>>                 stmmac_remove_config_dt(pdev, plat_dat);


Best regards,
Samin

>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Guo Samin]

在 2023/3/4 0:50:54, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>
>> dwmac supports multiple modess. When working under rmii and rgmii,
>> you need to set different phy interfaces.
>>
>> According to the dwmac document, when working in rmii, it needs to be
>> set to 0x4, and rgmii needs to be set to 0x1.
>>
>> The phy interface needs to be set in syscon, the format is as follows:
>> starfive,syscon: <&syscon, offset, mask>
>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
>>  1 file changed, 46 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> index 566378306f67..40fdd7036127 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> @@ -7,10 +7,15 @@
>>   *
>>   */
>>
>> +#include <linux/mfd/syscon.h>
>>  #include <linux/of_device.h>
>> +#include <linux/regmap.h>
>>
>>  #include "stmmac_platform.h"
>>
>> +#define MACPHYC_PHY_INFT_RMII  0x4
>> +#define MACPHYC_PHY_INFT_RGMII 0x1
> 
> Please prefix these with something like STARFIVE_DWMAC_
>
Hi, Emil, These definitions come from the datasheet of dwmac. However, add STARDRIVE_ DWMAC is a good idea. I will fix it,thanks.
>>  struct starfive_dwmac {
>>         struct device *dev;
>>         struct clk *clk_tx;
>> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>  }
>>
>> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
>> +{
>> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
>> +       struct of_phandle_args args;
>> +       struct regmap *regmap;
>> +       unsigned int reg, mask, mode;
>> +       int err;
>> +
>> +       switch (plat_dat->interface) {
>> +       case PHY_INTERFACE_MODE_RMII:
>> +               mode = MACPHYC_PHY_INFT_RMII;
>> +               break;
>> +
>> +       case PHY_INTERFACE_MODE_RGMII:
>> +       case PHY_INTERFACE_MODE_RGMII_ID:
>> +               mode = MACPHYC_PHY_INFT_RGMII;
>> +               break;
>> +
>> +       default:
>> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
>> +                       plat_dat->interface);
>> +       }
>> +
>> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
>> +                                              "starfive,syscon", 2, 0, &args);
>> +       if (err) {
>> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
>> +               return -EINVAL;
>> +       }
>> +
>> +       reg = args.args[0];
>> +       mask = args.args[1];
>> +       regmap = syscon_node_to_regmap(args.np);
>> +       of_node_put(args.np);
> 
> I think the above is basically
> unsigned int args[2];
> syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
> "starfive,syscon", 2, args);
> 
> ..but as Andrew points out another solution is to use platform match
> data for this. Eg.
> 
> static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
>   .phy_interface_offset = 0xc,
>   .phy_interface_mask = 0x1c0000,
> };
> 
> static const struct of_device_id starfive_dwmac_match[] = {
>   { .compatible = "starfive,jh7110-dwmac", .data =
> &starfive_dwmac_jh7110_data },
>   { /* sentinel */ }
> };
> 
> and in the probe function:
> 
Hi Emil, Yes，this is usually a good solution, and I have considered this plan before.
However, gmac0 of jh7110 is different from the reg/mask of gmac1.
You can find it in patch-9:

&gmac0 {
	starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
};

&gmac1 {
	starfive,syscon = <&sys_syscon 0x90 0x1c>;
};

In this case, using match_data of starfive,jh7110-dwma does not seem to be compatible.

> struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);
> 
>> +       if (IS_ERR(regmap))
>> +               return PTR_ERR(regmap);
>> +
>> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
>> +}
>> +
>>  static int starfive_dwmac_probe(struct platform_device *pdev)
>>  {
>>         struct plat_stmmacenet_data *plat_dat;
>> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>>         plat_dat->bsp_priv = dwmac;
>>         plat_dat->dma_cfg->dche = true;
>>
>> +       starfive_dwmac_set_mode(plat_dat);
> 
> The function returns errors in an int, but you never check it :(
> 
Thank you for pointing out that it will be added in the next version.
>>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>         if (err) {
>>                 stmmac_remove_config_dt(pdev, plat_dat);


Best regards,
Samin

>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

_______________________________________________
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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

在 2023/3/4 0:18:20, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>
>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  MAINTAINERS                                   |   1 +
>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>  4 files changed, 139 insertions(+)
>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 4e236b7c7fd2..91a4f190c827 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>  S:     Maintained
>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>
>>  STARFIVE JH71X0 CLOCK DRIVERS
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> index f77511fe4e87..47fbccef9d04 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>           for the stmmac device driver. This driver is used for
>>           arria5 and cyclone5 FPGA SoCs.
>>
>> +config DWMAC_STARFIVE
>> +       tristate "StarFive dwmac support"
>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> 
> There is an extra space between "OF" and "&&" here.
>
will drop it
> 
>> +       depends on STMMAC_ETH
> 
> It's not visible in this patch context, but this whole config option
> is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
> on STMMAC_ETH" should not be needed.
> 
will drop it.
>> +       default ARCH_STARFIVE
> 
> This driver is not required to boot the JH7110, so we should just
> default to building it as a module. Eg.
> default m if ARCH_STARFIVE

Yes, this driver is not required to boot the JH7110, but the network is a very basic module,
it seems that other dwmac-platforms have been compiled into the kernel instead of modules.

> 
>> +       help
>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>> +
>> +         This selects the StarFive platform specific glue layer support for
>> +         the stmmac device driver. This driver is used for StarFive JH7110
>> +         ethernet controller.
>> +
>>  config DWMAC_STI
>>         tristate "STi GMAC support"
>>         default ARCH_STI
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>> index 057e4bab5c08..8738fdbb4b2d 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> new file mode 100644
>> index 000000000000..566378306f67
>> --- /dev/null
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> @@ -0,0 +1,125 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * StarFive DWMAC platform driver
>> + *
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> 
> Sorry, after looking at my old git branches where this started as a
> driver for the JH7100 this should really be
> * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
> * Copyright (C) 2022 StarFive Technology Co., Ltd.
> 
OK, It should be.
>> + */
>> +
>> +#include <linux/of_device.h>
>> +
>> +#include "stmmac_platform.h"
>> +
>> +struct starfive_dwmac {
>> +       struct device *dev;
>> +       struct clk *clk_tx;
>> +       struct clk *clk_gtx;
> 
> This pointer is only set, but never read. Please remove it.
>>
>> +       bool tx_use_rgmii_rxin_clk;
>> +};
>> +
>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> 
> This should be starfive_dwmac_fix_mac_speed for consistency.
> 
Sorry，I missed this, will fix next version.
>> +{
>> +       struct starfive_dwmac *dwmac = priv;
>> +       unsigned long rate;
>> +       int err;
>> +
>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>> +        * which needs to match the corresponding clock frequency according
>> +        * to different speeds. If the rgmii_tx clock is provided by the
>> +        * external rgmii_rxin, there is no need to configure the clock
>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>> +        */
>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>> +               return;
> 
> If this function is only needed in certain situations, why not just
> set the plat_dat->fix_mac_speed callback when it is needed?
> 
Sounds good idea.
>> +       switch (speed) {
>> +       case SPEED_1000:
>> +               rate = 125000000;
>> +               break;
>> +       case SPEED_100:
>> +               rate = 25000000;
>> +               break;
>> +       case SPEED_10:
>> +               rate = 2500000;
>> +               break;
>> +       default:
>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>> +               break;
>> +       }
>> +
>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>> +       if (err)
>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>> +}
>> +
>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>> +{
>> +       struct plat_stmmacenet_data *plat_dat;
>> +       struct stmmac_resources stmmac_res;
>> +       struct starfive_dwmac *dwmac;
>> +       int err;
>> +
>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>> +       if (err)
>> +               return err;
>> +
>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>> +       if (IS_ERR(plat_dat)) {
>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>> +               return PTR_ERR(plat_dat);
>> +       }
>> +
>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>> +       if (!dwmac)
>> +               return -ENOMEM;
>> +
>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>> +       if (IS_ERR(dwmac->clk_tx))
>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>> +                                   "error getting tx clock\n");
>> +
>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>> +       if (IS_ERR(dwmac->clk_gtx))
>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>> +                                   "error getting gtx clock\n");
>> +
>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>> +
>> +       dwmac->dev = &pdev->dev;
>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> 
> Eg.:
> if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
>   plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
> 
Good idea, so we can remove flag 'tx_use_rgmii_rxin_clk' in struct starfive_dwmac.
>> +       plat_dat->init = NULL;
>> +       plat_dat->bsp_priv = dwmac;
>> +       plat_dat->dma_cfg->dche = true;
>> +
>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>> +       if (err) {
>> +               stmmac_remove_config_dt(pdev, plat_dat);
>> +               return err;
>> +       }
>> +
>> +       return 0;
>> +}
>> +
>> +static const struct of_device_id starfive_dwmac_match[] = {
>> +       { .compatible = "starfive,jh7110-dwmac" },
>> +       { /* sentinel */ }
>> +};
>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>> +
>> +static struct platform_driver starfive_dwmac_driver = {
>> +       .probe  = starfive_dwmac_probe,
>> +       .remove = stmmac_pltfr_remove,
>> +       .driver = {
>> +               .name = "starfive-dwmac",
>> +               .pm = &stmmac_pltfr_pm_ops,
>> +               .of_match_table = starfive_dwmac_match,
>> +       },
>> +};
>> +module_platform_driver(starfive_dwmac_driver);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
Best regards,
Samin

-- 
Best regards,
Samin

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

在 2023/3/4 0:18:20, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>
>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  MAINTAINERS                                   |   1 +
>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>  4 files changed, 139 insertions(+)
>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 4e236b7c7fd2..91a4f190c827 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>  S:     Maintained
>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>
>>  STARFIVE JH71X0 CLOCK DRIVERS
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> index f77511fe4e87..47fbccef9d04 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>           for the stmmac device driver. This driver is used for
>>           arria5 and cyclone5 FPGA SoCs.
>>
>> +config DWMAC_STARFIVE
>> +       tristate "StarFive dwmac support"
>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> 
> There is an extra space between "OF" and "&&" here.
>
will drop it
> 
>> +       depends on STMMAC_ETH
> 
> It's not visible in this patch context, but this whole config option
> is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
> on STMMAC_ETH" should not be needed.
> 
will drop it.
>> +       default ARCH_STARFIVE
> 
> This driver is not required to boot the JH7110, so we should just
> default to building it as a module. Eg.
> default m if ARCH_STARFIVE

Yes, this driver is not required to boot the JH7110, but the network is a very basic module,
it seems that other dwmac-platforms have been compiled into the kernel instead of modules.

> 
>> +       help
>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>> +
>> +         This selects the StarFive platform specific glue layer support for
>> +         the stmmac device driver. This driver is used for StarFive JH7110
>> +         ethernet controller.
>> +
>>  config DWMAC_STI
>>         tristate "STi GMAC support"
>>         default ARCH_STI
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>> index 057e4bab5c08..8738fdbb4b2d 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> new file mode 100644
>> index 000000000000..566378306f67
>> --- /dev/null
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>> @@ -0,0 +1,125 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * StarFive DWMAC platform driver
>> + *
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> 
> Sorry, after looking at my old git branches where this started as a
> driver for the JH7100 this should really be
> * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
> * Copyright (C) 2022 StarFive Technology Co., Ltd.
> 
OK, It should be.
>> + */
>> +
>> +#include <linux/of_device.h>
>> +
>> +#include "stmmac_platform.h"
>> +
>> +struct starfive_dwmac {
>> +       struct device *dev;
>> +       struct clk *clk_tx;
>> +       struct clk *clk_gtx;
> 
> This pointer is only set, but never read. Please remove it.
>>
>> +       bool tx_use_rgmii_rxin_clk;
>> +};
>> +
>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> 
> This should be starfive_dwmac_fix_mac_speed for consistency.
> 
Sorry，I missed this, will fix next version.
>> +{
>> +       struct starfive_dwmac *dwmac = priv;
>> +       unsigned long rate;
>> +       int err;
>> +
>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>> +        * which needs to match the corresponding clock frequency according
>> +        * to different speeds. If the rgmii_tx clock is provided by the
>> +        * external rgmii_rxin, there is no need to configure the clock
>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>> +        */
>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>> +               return;
> 
> If this function is only needed in certain situations, why not just
> set the plat_dat->fix_mac_speed callback when it is needed?
> 
Sounds good idea.
>> +       switch (speed) {
>> +       case SPEED_1000:
>> +               rate = 125000000;
>> +               break;
>> +       case SPEED_100:
>> +               rate = 25000000;
>> +               break;
>> +       case SPEED_10:
>> +               rate = 2500000;
>> +               break;
>> +       default:
>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>> +               break;
>> +       }
>> +
>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>> +       if (err)
>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>> +}
>> +
>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>> +{
>> +       struct plat_stmmacenet_data *plat_dat;
>> +       struct stmmac_resources stmmac_res;
>> +       struct starfive_dwmac *dwmac;
>> +       int err;
>> +
>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>> +       if (err)
>> +               return err;
>> +
>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>> +       if (IS_ERR(plat_dat)) {
>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>> +               return PTR_ERR(plat_dat);
>> +       }
>> +
>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>> +       if (!dwmac)
>> +               return -ENOMEM;
>> +
>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>> +       if (IS_ERR(dwmac->clk_tx))
>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>> +                                   "error getting tx clock\n");
>> +
>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>> +       if (IS_ERR(dwmac->clk_gtx))
>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>> +                                   "error getting gtx clock\n");
>> +
>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>> +
>> +       dwmac->dev = &pdev->dev;
>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> 
> Eg.:
> if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
>   plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
> 
Good idea, so we can remove flag 'tx_use_rgmii_rxin_clk' in struct starfive_dwmac.
>> +       plat_dat->init = NULL;
>> +       plat_dat->bsp_priv = dwmac;
>> +       plat_dat->dma_cfg->dche = true;
>> +
>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>> +       if (err) {
>> +               stmmac_remove_config_dt(pdev, plat_dat);
>> +               return err;
>> +       }
>> +
>> +       return 0;
>> +}
>> +
>> +static const struct of_device_id starfive_dwmac_match[] = {
>> +       { .compatible = "starfive,jh7110-dwmac" },
>> +       { /* sentinel */ }
>> +};
>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>> +
>> +static struct platform_driver starfive_dwmac_driver = {
>> +       .probe  = starfive_dwmac_probe,
>> +       .remove = stmmac_pltfr_remove,
>> +       .driver = {
>> +               .name = "starfive-dwmac",
>> +               .pm = &stmmac_pltfr_pm_ops,
>> +               .of_match_table = starfive_dwmac_match,
>> +       },
>> +};
>> +module_platform_driver(starfive_dwmac_driver);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
Best regards,
Samin

-- 
Best regards,
Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Mon, 6 Mar 2023 at 08:16, Guo Samin <samin.guo@starfivetech.com> wrote:
> 在 2023/3/4 0:18:20, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
> >>
> >> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  MAINTAINERS                                   |   1 +
> >>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
> >>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
> >>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
> >>  4 files changed, 139 insertions(+)
> >>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>
> >> diff --git a/MAINTAINERS b/MAINTAINERS
> >> index 4e236b7c7fd2..91a4f190c827 100644
> >> --- a/MAINTAINERS
> >> +++ b/MAINTAINERS
> >> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
> >>  M:     Emil Renner Berthing <kernel@esmil.dk>
> >>  M:     Samin Guo <samin.guo@starfivetech.com>
> >>  S:     Maintained
> >> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
> >>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> >>
> >>  STARFIVE JH71X0 CLOCK DRIVERS
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >> index f77511fe4e87..47fbccef9d04 100644
> >> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
> >>           for the stmmac device driver. This driver is used for
> >>           arria5 and cyclone5 FPGA SoCs.
> >>
> >> +config DWMAC_STARFIVE
> >> +       tristate "StarFive dwmac support"
> >> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> >
> > There is an extra space between "OF" and "&&" here.
> >
> will drop it
> >
> >> +       depends on STMMAC_ETH
> >
> > It's not visible in this patch context, but this whole config option
> > is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
> > on STMMAC_ETH" should not be needed.
> >
> will drop it.
> >> +       default ARCH_STARFIVE
> >
> > This driver is not required to boot the JH7110, so we should just
> > default to building it as a module. Eg.
> > default m if ARCH_STARFIVE
>
> Yes, this driver is not required to boot the JH7110, but the network is a very basic module,
> it seems that other dwmac-platforms have been compiled into the kernel instead of modules.

Right, but the defconfig should work on as many platforms as possible,
so if we build in every "basic" module for every platform the kernel
will be huge and waste a lot of memory on drivers that will never be
used.

Also even if this driver was built in the gmac0 would still not work
until the driver for the AON CRG is loaded, which also defaults to m
for the same reasons.

> >
> >> +       help
> >> +         Support for ethernet controllers on StarFive RISC-V SoCs
> >> +
> >> +         This selects the StarFive platform specific glue layer support for
> >> +         the stmmac device driver. This driver is used for StarFive JH7110
> >> +         ethernet controller.
> >> +
> >>  config DWMAC_STI
> >>         tristate "STi GMAC support"
> >>         default ARCH_STI
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >> index 057e4bab5c08..8738fdbb4b2d 100644
> >> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
> >>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
> >>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
> >>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> >> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
> >>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
> >>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
> >>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> new file mode 100644
> >> index 000000000000..566378306f67
> >> --- /dev/null
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> @@ -0,0 +1,125 @@
> >> +// SPDX-License-Identifier: GPL-2.0+
> >> +/*
> >> + * StarFive DWMAC platform driver
> >> + *
> >> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> >> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> >
> > Sorry, after looking at my old git branches where this started as a
> > driver for the JH7100 this should really be
> > * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
> > * Copyright (C) 2022 StarFive Technology Co., Ltd.
> >
> OK, It should be.
> >> + */
> >> +
> >> +#include <linux/of_device.h>
> >> +
> >> +#include "stmmac_platform.h"
> >> +
> >> +struct starfive_dwmac {
> >> +       struct device *dev;
> >> +       struct clk *clk_tx;
> >> +       struct clk *clk_gtx;
> >
> > This pointer is only set, but never read. Please remove it.
> >>
> >> +       bool tx_use_rgmii_rxin_clk;
> >> +};
> >> +
> >> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> >
> > This should be starfive_dwmac_fix_mac_speed for consistency.
> >
> Sorry，I missed this, will fix next version.
> >> +{
> >> +       struct starfive_dwmac *dwmac = priv;
> >> +       unsigned long rate;
> >> +       int err;
> >> +
> >> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> >> +        * which needs to match the corresponding clock frequency according
> >> +        * to different speeds. If the rgmii_tx clock is provided by the
> >> +        * external rgmii_rxin, there is no need to configure the clock
> >> +        * internally, because rgmii_rxin will be adaptively adjusted.
> >> +        */
> >> +       if (dwmac->tx_use_rgmii_rxin_clk)
> >> +               return;
> >
> > If this function is only needed in certain situations, why not just
> > set the plat_dat->fix_mac_speed callback when it is needed?
> >
> Sounds good idea.
> >> +       switch (speed) {
> >> +       case SPEED_1000:
> >> +               rate = 125000000;
> >> +               break;
> >> +       case SPEED_100:
> >> +               rate = 25000000;
> >> +               break;
> >> +       case SPEED_10:
> >> +               rate = 2500000;
> >> +               break;
> >> +       default:
> >> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> >> +               break;
> >> +       }
> >> +
> >> +       err = clk_set_rate(dwmac->clk_tx, rate);
> >> +       if (err)
> >> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> >> +}
> >> +
> >> +static int starfive_dwmac_probe(struct platform_device *pdev)
> >> +{
> >> +       struct plat_stmmacenet_data *plat_dat;
> >> +       struct stmmac_resources stmmac_res;
> >> +       struct starfive_dwmac *dwmac;
> >> +       int err;
> >> +
> >> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> >> +       if (err)
> >> +               return err;
> >> +
> >> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> >> +       if (IS_ERR(plat_dat)) {
> >> +               dev_err(&pdev->dev, "dt configuration failed\n");
> >> +               return PTR_ERR(plat_dat);
> >> +       }
> >> +
> >> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> >> +       if (!dwmac)
> >> +               return -ENOMEM;
> >> +
> >> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> >> +       if (IS_ERR(dwmac->clk_tx))
> >> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> >> +                                   "error getting tx clock\n");
> >> +
> >> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> >> +       if (IS_ERR(dwmac->clk_gtx))
> >> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> >> +                                   "error getting gtx clock\n");
> >> +
> >> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> >> +               dwmac->tx_use_rgmii_rxin_clk = true;
> >> +
> >> +       dwmac->dev = &pdev->dev;
> >> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> >
> > Eg.:
> > if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
> >   plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
> >
> Good idea, so we can remove flag 'tx_use_rgmii_rxin_clk' in struct starfive_dwmac.
> >> +       plat_dat->init = NULL;

Btw. plat_dat is initialized by kzalloc in stmmac_probe_config_dt and
I can't seem to find anything that sets plat_dat->init, so I think
this is redundant.

> >> +       plat_dat->bsp_priv = dwmac;
> >> +       plat_dat->dma_cfg->dche = true;
> >> +
> >> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> >> +       if (err) {
> >> +               stmmac_remove_config_dt(pdev, plat_dat);
> >> +               return err;
> >> +       }
> >> +
> >> +       return 0;
> >> +}
> >> +
> >> +static const struct of_device_id starfive_dwmac_match[] = {
> >> +       { .compatible = "starfive,jh7110-dwmac" },
> >> +       { /* sentinel */ }
> >> +};
> >> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> >> +
> >> +static struct platform_driver starfive_dwmac_driver = {
> >> +       .probe  = starfive_dwmac_probe,
> >> +       .remove = stmmac_pltfr_remove,
> >> +       .driver = {
> >> +               .name = "starfive-dwmac",
> >> +               .pm = &stmmac_pltfr_pm_ops,
> >> +               .of_match_table = starfive_dwmac_match,
> >> +       },
> >> +};
> >> +module_platform_driver(starfive_dwmac_driver);
> >> +
> >> +MODULE_LICENSE("GPL");
> >> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> >> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> >> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
> Best regards,
> Samin
>
> --
> Best regards,
> Samin

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Mon, 6 Mar 2023 at 08:16, Guo Samin <samin.guo@starfivetech.com> wrote:
> 在 2023/3/4 0:18:20, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
> >>
> >> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  MAINTAINERS                                   |   1 +
> >>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
> >>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
> >>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
> >>  4 files changed, 139 insertions(+)
> >>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>
> >> diff --git a/MAINTAINERS b/MAINTAINERS
> >> index 4e236b7c7fd2..91a4f190c827 100644
> >> --- a/MAINTAINERS
> >> +++ b/MAINTAINERS
> >> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
> >>  M:     Emil Renner Berthing <kernel@esmil.dk>
> >>  M:     Samin Guo <samin.guo@starfivetech.com>
> >>  S:     Maintained
> >> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
> >>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> >>
> >>  STARFIVE JH71X0 CLOCK DRIVERS
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >> index f77511fe4e87..47fbccef9d04 100644
> >> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
> >>           for the stmmac device driver. This driver is used for
> >>           arria5 and cyclone5 FPGA SoCs.
> >>
> >> +config DWMAC_STARFIVE
> >> +       tristate "StarFive dwmac support"
> >> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> >
> > There is an extra space between "OF" and "&&" here.
> >
> will drop it
> >
> >> +       depends on STMMAC_ETH
> >
> > It's not visible in this patch context, but this whole config option
> > is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
> > on STMMAC_ETH" should not be needed.
> >
> will drop it.
> >> +       default ARCH_STARFIVE
> >
> > This driver is not required to boot the JH7110, so we should just
> > default to building it as a module. Eg.
> > default m if ARCH_STARFIVE
>
> Yes, this driver is not required to boot the JH7110, but the network is a very basic module,
> it seems that other dwmac-platforms have been compiled into the kernel instead of modules.

Right, but the defconfig should work on as many platforms as possible,
so if we build in every "basic" module for every platform the kernel
will be huge and waste a lot of memory on drivers that will never be
used.

Also even if this driver was built in the gmac0 would still not work
until the driver for the AON CRG is loaded, which also defaults to m
for the same reasons.

> >
> >> +       help
> >> +         Support for ethernet controllers on StarFive RISC-V SoCs
> >> +
> >> +         This selects the StarFive platform specific glue layer support for
> >> +         the stmmac device driver. This driver is used for StarFive JH7110
> >> +         ethernet controller.
> >> +
> >>  config DWMAC_STI
> >>         tristate "STi GMAC support"
> >>         default ARCH_STI
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >> index 057e4bab5c08..8738fdbb4b2d 100644
> >> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
> >>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
> >>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
> >>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> >> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
> >>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
> >>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
> >>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> new file mode 100644
> >> index 000000000000..566378306f67
> >> --- /dev/null
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> @@ -0,0 +1,125 @@
> >> +// SPDX-License-Identifier: GPL-2.0+
> >> +/*
> >> + * StarFive DWMAC platform driver
> >> + *
> >> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> >> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> >
> > Sorry, after looking at my old git branches where this started as a
> > driver for the JH7100 this should really be
> > * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
> > * Copyright (C) 2022 StarFive Technology Co., Ltd.
> >
> OK, It should be.
> >> + */
> >> +
> >> +#include <linux/of_device.h>
> >> +
> >> +#include "stmmac_platform.h"
> >> +
> >> +struct starfive_dwmac {
> >> +       struct device *dev;
> >> +       struct clk *clk_tx;
> >> +       struct clk *clk_gtx;
> >
> > This pointer is only set, but never read. Please remove it.
> >>
> >> +       bool tx_use_rgmii_rxin_clk;
> >> +};
> >> +
> >> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> >
> > This should be starfive_dwmac_fix_mac_speed for consistency.
> >
> Sorry，I missed this, will fix next version.
> >> +{
> >> +       struct starfive_dwmac *dwmac = priv;
> >> +       unsigned long rate;
> >> +       int err;
> >> +
> >> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> >> +        * which needs to match the corresponding clock frequency according
> >> +        * to different speeds. If the rgmii_tx clock is provided by the
> >> +        * external rgmii_rxin, there is no need to configure the clock
> >> +        * internally, because rgmii_rxin will be adaptively adjusted.
> >> +        */
> >> +       if (dwmac->tx_use_rgmii_rxin_clk)
> >> +               return;
> >
> > If this function is only needed in certain situations, why not just
> > set the plat_dat->fix_mac_speed callback when it is needed?
> >
> Sounds good idea.
> >> +       switch (speed) {
> >> +       case SPEED_1000:
> >> +               rate = 125000000;
> >> +               break;
> >> +       case SPEED_100:
> >> +               rate = 25000000;
> >> +               break;
> >> +       case SPEED_10:
> >> +               rate = 2500000;
> >> +               break;
> >> +       default:
> >> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> >> +               break;
> >> +       }
> >> +
> >> +       err = clk_set_rate(dwmac->clk_tx, rate);
> >> +       if (err)
> >> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> >> +}
> >> +
> >> +static int starfive_dwmac_probe(struct platform_device *pdev)
> >> +{
> >> +       struct plat_stmmacenet_data *plat_dat;
> >> +       struct stmmac_resources stmmac_res;
> >> +       struct starfive_dwmac *dwmac;
> >> +       int err;
> >> +
> >> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> >> +       if (err)
> >> +               return err;
> >> +
> >> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> >> +       if (IS_ERR(plat_dat)) {
> >> +               dev_err(&pdev->dev, "dt configuration failed\n");
> >> +               return PTR_ERR(plat_dat);
> >> +       }
> >> +
> >> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> >> +       if (!dwmac)
> >> +               return -ENOMEM;
> >> +
> >> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> >> +       if (IS_ERR(dwmac->clk_tx))
> >> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> >> +                                   "error getting tx clock\n");
> >> +
> >> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> >> +       if (IS_ERR(dwmac->clk_gtx))
> >> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> >> +                                   "error getting gtx clock\n");
> >> +
> >> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> >> +               dwmac->tx_use_rgmii_rxin_clk = true;
> >> +
> >> +       dwmac->dev = &pdev->dev;
> >> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> >
> > Eg.:
> > if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
> >   plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
> >
> Good idea, so we can remove flag 'tx_use_rgmii_rxin_clk' in struct starfive_dwmac.
> >> +       plat_dat->init = NULL;

Btw. plat_dat is initialized by kzalloc in stmmac_probe_config_dt and
I can't seem to find anything that sets plat_dat->init, so I think
this is redundant.

> >> +       plat_dat->bsp_priv = dwmac;
> >> +       plat_dat->dma_cfg->dche = true;
> >> +
> >> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> >> +       if (err) {
> >> +               stmmac_remove_config_dt(pdev, plat_dat);
> >> +               return err;
> >> +       }
> >> +
> >> +       return 0;
> >> +}
> >> +
> >> +static const struct of_device_id starfive_dwmac_match[] = {
> >> +       { .compatible = "starfive,jh7110-dwmac" },
> >> +       { /* sentinel */ }
> >> +};
> >> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> >> +
> >> +static struct platform_driver starfive_dwmac_driver = {
> >> +       .probe  = starfive_dwmac_probe,
> >> +       .remove = stmmac_pltfr_remove,
> >> +       .driver = {
> >> +               .name = "starfive-dwmac",
> >> +               .pm = &stmmac_pltfr_pm_ops,
> >> +               .of_match_table = starfive_dwmac_match,
> >> +       },
> >> +};
> >> +module_platform_driver(starfive_dwmac_driver);
> >> +
> >> +MODULE_LICENSE("GPL");
> >> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> >> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> >> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
> Best regards,
> Samin
>
> --
> Best regards,
> Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Emil Renner Berthing]

On Mon, 6 Mar 2023 at 04:07, Guo Samin <samin.guo@starfivetech.com> wrote:
> 在 2023/3/4 0:50:54, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >>
> >> dwmac supports multiple modess. When working under rmii and rgmii,
> >> you need to set different phy interfaces.
> >>
> >> According to the dwmac document, when working in rmii, it needs to be
> >> set to 0x4, and rgmii needs to be set to 0x1.
> >>
> >> The phy interface needs to be set in syscon, the format is as follows:
> >> starfive,syscon: <&syscon, offset, mask>
> >>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
> >>  1 file changed, 46 insertions(+)
> >>
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> index 566378306f67..40fdd7036127 100644
> >> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> @@ -7,10 +7,15 @@
> >>   *
> >>   */
> >>
> >> +#include <linux/mfd/syscon.h>
> >>  #include <linux/of_device.h>
> >> +#include <linux/regmap.h>
> >>
> >>  #include "stmmac_platform.h"
> >>
> >> +#define MACPHYC_PHY_INFT_RMII  0x4
> >> +#define MACPHYC_PHY_INFT_RGMII 0x1
> >
> > Please prefix these with something like STARFIVE_DWMAC_
> >
> Hi, Emil, These definitions come from the datasheet of dwmac. However, add STARDRIVE_ DWMAC is a good idea. I will fix it,thanks.
> >>  struct starfive_dwmac {
> >>         struct device *dev;
> >>         struct clk *clk_tx;
> >> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> >>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> >>  }
> >>
> >> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> >> +{
> >> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
> >> +       struct of_phandle_args args;
> >> +       struct regmap *regmap;
> >> +       unsigned int reg, mask, mode;
> >> +       int err;
> >> +
> >> +       switch (plat_dat->interface) {
> >> +       case PHY_INTERFACE_MODE_RMII:
> >> +               mode = MACPHYC_PHY_INFT_RMII;
> >> +               break;
> >> +
> >> +       case PHY_INTERFACE_MODE_RGMII:
> >> +       case PHY_INTERFACE_MODE_RGMII_ID:
> >> +               mode = MACPHYC_PHY_INFT_RGMII;
> >> +               break;
> >> +
> >> +       default:
> >> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
> >> +                       plat_dat->interface);
> >> +       }
> >> +
> >> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
> >> +                                              "starfive,syscon", 2, 0, &args);
> >> +       if (err) {
> >> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
> >> +               return -EINVAL;
> >> +       }
> >> +
> >> +       reg = args.args[0];
> >> +       mask = args.args[1];
> >> +       regmap = syscon_node_to_regmap(args.np);
> >> +       of_node_put(args.np);
> >
> > I think the above is basically
> > unsigned int args[2];
> > syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
> > "starfive,syscon", 2, args);
> >
> > ..but as Andrew points out another solution is to use platform match
> > data for this. Eg.
> >
> > static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
> >   .phy_interface_offset = 0xc,
> >   .phy_interface_mask = 0x1c0000,
> > };
> >
> > static const struct of_device_id starfive_dwmac_match[] = {
> >   { .compatible = "starfive,jh7110-dwmac", .data =
> > &starfive_dwmac_jh7110_data },
> >   { /* sentinel */ }
> > };
> >
> > and in the probe function:
> >
> Hi Emil, Yes，this is usually a good solution, and I have considered this plan before.
> However, gmac0 of jh7110 is different from the reg/mask of gmac1.
> You can find it in patch-9:
>
> &gmac0 {
>         starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
> };
>
> &gmac1 {
>         starfive,syscon = <&sys_syscon 0x90 0x1c>;
> };
>
> In this case, using match_data of starfive,jh7110-dwma does not seem to be compatible.

Ugh, you're right. Both the syscon block, the register offset and the
bit position in those registers are different from gmac0 to gmac1, and
since we need a phandle to the syscon block anyway passing those two
other parameters as arguments is probably the nicest solution. For the
next version I'd change the 2nd argument from mask to the bit position
though. It seems the field is always 3 bits wide and this makes it a
little clearer that we're not just putting register values in the
device tree. Eg. something like

regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
"starfive,syscon", 2, args);
...
err = regmap_update_bits(regmap, args[0], 7U << args[1], mode << args[1]);
...

Alternatively we'd put data for each gmac interface in the platform
data including the syscon compatible string, and use
syscon_regmap_lookup_by_compatible("starfive,jh7110-aon-syscon"); for
gmac0 fx. This way the dependency from the gmac nodes to the syscon
nodes won't be recorded is the device tree though.

@Andrew is this what you were suggesting?

> > struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);
> >
> >> +       if (IS_ERR(regmap))
> >> +               return PTR_ERR(regmap);
> >> +
> >> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
> >> +}
> >> +
> >>  static int starfive_dwmac_probe(struct platform_device *pdev)
> >>  {
> >>         struct plat_stmmacenet_data *plat_dat;
> >> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
> >>         plat_dat->bsp_priv = dwmac;
> >>         plat_dat->dma_cfg->dche = true;
> >>
> >> +       starfive_dwmac_set_mode(plat_dat);
> >
> > The function returns errors in an int, but you never check it :(
> >
> Thank you for pointing out that it will be added in the next version.
> >>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> >>         if (err) {
> >>                 stmmac_remove_config_dt(pdev, plat_dat);
>
>
> Best regards,
> Samin
>
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> --
> Best regards,
> Samin

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Emil Renner Berthing]

On Mon, 6 Mar 2023 at 04:07, Guo Samin <samin.guo@starfivetech.com> wrote:
> 在 2023/3/4 0:50:54, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >>
> >> dwmac supports multiple modess. When working under rmii and rgmii,
> >> you need to set different phy interfaces.
> >>
> >> According to the dwmac document, when working in rmii, it needs to be
> >> set to 0x4, and rgmii needs to be set to 0x1.
> >>
> >> The phy interface needs to be set in syscon, the format is as follows:
> >> starfive,syscon: <&syscon, offset, mask>
> >>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
> >>  1 file changed, 46 insertions(+)
> >>
> >> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> index 566378306f67..40fdd7036127 100644
> >> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >> @@ -7,10 +7,15 @@
> >>   *
> >>   */
> >>
> >> +#include <linux/mfd/syscon.h>
> >>  #include <linux/of_device.h>
> >> +#include <linux/regmap.h>
> >>
> >>  #include "stmmac_platform.h"
> >>
> >> +#define MACPHYC_PHY_INFT_RMII  0x4
> >> +#define MACPHYC_PHY_INFT_RGMII 0x1
> >
> > Please prefix these with something like STARFIVE_DWMAC_
> >
> Hi, Emil, These definitions come from the datasheet of dwmac. However, add STARDRIVE_ DWMAC is a good idea. I will fix it,thanks.
> >>  struct starfive_dwmac {
> >>         struct device *dev;
> >>         struct clk *clk_tx;
> >> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> >>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> >>  }
> >>
> >> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
> >> +{
> >> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
> >> +       struct of_phandle_args args;
> >> +       struct regmap *regmap;
> >> +       unsigned int reg, mask, mode;
> >> +       int err;
> >> +
> >> +       switch (plat_dat->interface) {
> >> +       case PHY_INTERFACE_MODE_RMII:
> >> +               mode = MACPHYC_PHY_INFT_RMII;
> >> +               break;
> >> +
> >> +       case PHY_INTERFACE_MODE_RGMII:
> >> +       case PHY_INTERFACE_MODE_RGMII_ID:
> >> +               mode = MACPHYC_PHY_INFT_RGMII;
> >> +               break;
> >> +
> >> +       default:
> >> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
> >> +                       plat_dat->interface);
> >> +       }
> >> +
> >> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
> >> +                                              "starfive,syscon", 2, 0, &args);
> >> +       if (err) {
> >> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
> >> +               return -EINVAL;
> >> +       }
> >> +
> >> +       reg = args.args[0];
> >> +       mask = args.args[1];
> >> +       regmap = syscon_node_to_regmap(args.np);
> >> +       of_node_put(args.np);
> >
> > I think the above is basically
> > unsigned int args[2];
> > syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
> > "starfive,syscon", 2, args);
> >
> > ..but as Andrew points out another solution is to use platform match
> > data for this. Eg.
> >
> > static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
> >   .phy_interface_offset = 0xc,
> >   .phy_interface_mask = 0x1c0000,
> > };
> >
> > static const struct of_device_id starfive_dwmac_match[] = {
> >   { .compatible = "starfive,jh7110-dwmac", .data =
> > &starfive_dwmac_jh7110_data },
> >   { /* sentinel */ }
> > };
> >
> > and in the probe function:
> >
> Hi Emil, Yes，this is usually a good solution, and I have considered this plan before.
> However, gmac0 of jh7110 is different from the reg/mask of gmac1.
> You can find it in patch-9:
>
> &gmac0 {
>         starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
> };
>
> &gmac1 {
>         starfive,syscon = <&sys_syscon 0x90 0x1c>;
> };
>
> In this case, using match_data of starfive,jh7110-dwma does not seem to be compatible.

Ugh, you're right. Both the syscon block, the register offset and the
bit position in those registers are different from gmac0 to gmac1, and
since we need a phandle to the syscon block anyway passing those two
other parameters as arguments is probably the nicest solution. For the
next version I'd change the 2nd argument from mask to the bit position
though. It seems the field is always 3 bits wide and this makes it a
little clearer that we're not just putting register values in the
device tree. Eg. something like

regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
"starfive,syscon", 2, args);
...
err = regmap_update_bits(regmap, args[0], 7U << args[1], mode << args[1]);
...

Alternatively we'd put data for each gmac interface in the platform
data including the syscon compatible string, and use
syscon_regmap_lookup_by_compatible("starfive,jh7110-aon-syscon"); for
gmac0 fx. This way the dependency from the gmac nodes to the syscon
nodes won't be recorded is the device tree though.

@Andrew is this what you were suggesting?

> > struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);
> >
> >> +       if (IS_ERR(regmap))
> >> +               return PTR_ERR(regmap);
> >> +
> >> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
> >> +}
> >> +
> >>  static int starfive_dwmac_probe(struct platform_device *pdev)
> >>  {
> >>         struct plat_stmmacenet_data *plat_dat;
> >> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
> >>         plat_dat->bsp_priv = dwmac;
> >>         plat_dat->dma_cfg->dche = true;
> >>
> >> +       starfive_dwmac_set_mode(plat_dat);
> >
> > The function returns errors in an int, but you never check it :(
> >
> Thank you for pointing out that it will be added in the next version.
> >>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> >>         if (err) {
> >>                 stmmac_remove_config_dt(pdev, plat_dat);
>
>
> Best regards,
> Samin
>
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> --
> Best regards,
> Samin

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Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
> configurations.
>
> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
> switch rx and rx to external clock sources.
>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> index 4af3300f3cf3..205a13d8c8b1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> @@ -11,3 +11,16 @@
>         model = "StarFive VisionFive 2 v1.2A";
>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>  };
> +
> +&gmac1 {
> +       phy-mode = "rmii";
> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
> +};
> +
> +&phy0 {
> +       rx-internal-delay-ps = <1900>;
> +       tx-internal-delay-ps = <1350>;
> +};

Here you're not specifying the internal delays for phy1 which means it
defaults to 1950ps for both rx and tx. Is that right or did you mean
to set them to 0 like the v1.3b phy1?

Also your u-boot seems to set what the linux phy driver calls
motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
the phys. Did you leave those out on purpose?

> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
> configurations.
>
> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
> switch rx and rx to external clock sources.
>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> index 4af3300f3cf3..205a13d8c8b1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> @@ -11,3 +11,16 @@
>         model = "StarFive VisionFive 2 v1.2A";
>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>  };
> +
> +&gmac1 {
> +       phy-mode = "rmii";
> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
> +};
> +
> +&phy0 {
> +       rx-internal-delay-ps = <1900>;
> +       tx-internal-delay-ps = <1350>;
> +};

Here you're not specifying the internal delays for phy1 which means it
defaults to 1950ps for both rx and tx. Is that right or did you mean
to set them to 0 like the v1.3b phy1?

Also your u-boot seems to set what the linux phy driver calls
motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
the phys. Did you leave those out on purpose?

> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> From: Yanhong Wang <yanhong.wang@starfivetech.com>
>
> Update gmac device tree node status to okay.
>
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index c2aa8946a0f1..d1c409f40014 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -12,6 +12,8 @@
>  / {
>         aliases {
>                 serial0 = &uart0;
> +               ethernet0 = &gmac0;
> +               ethernet1 = &gmac1;

Please sort these alphabetically.

>                 i2c0 = &i2c0;
>                 i2c2 = &i2c2;
>                 i2c5 = &i2c5;
> @@ -92,6 +94,14 @@
>         status = "okay";
>  };
>
> +&gmac0 {
> +       status = "okay";
> +};
> +
> +&gmac1 {
> +       status = "okay";
> +};

Since you'll need to add to the gmac0 and gmac1 nodes in the board
specific files too and it's only one line, consider just dropping this
here and add the status = "okay" there instead.

>  &i2c0 {
>         clock-frequency = <100000>;
>         i2c-sda-hold-time-ns = <300>;
> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> From: Yanhong Wang <yanhong.wang@starfivetech.com>
>
> Update gmac device tree node status to okay.
>
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index c2aa8946a0f1..d1c409f40014 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -12,6 +12,8 @@
>  / {
>         aliases {
>                 serial0 = &uart0;
> +               ethernet0 = &gmac0;
> +               ethernet1 = &gmac1;

Please sort these alphabetically.

>                 i2c0 = &i2c0;
>                 i2c2 = &i2c2;
>                 i2c5 = &i2c5;
> @@ -92,6 +94,14 @@
>         status = "okay";
>  };
>
> +&gmac0 {
> +       status = "okay";
> +};
> +
> +&gmac1 {
> +       status = "okay";
> +};

Since you'll need to add to the gmac0 and gmac1 nodes in the board
specific files too and it's only one line, consider just dropping this
here and add the status = "okay" there instead.

>  &i2c0 {
>         clock-frequency = <100000>;
>         i2c-sda-hold-time-ns = <300>;
> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Andrew Lunn]

> Ugh, you're right. Both the syscon block, the register offset and the
> bit position in those registers are different from gmac0 to gmac1, and
> since we need a phandle to the syscon block anyway passing those two
> other parameters as arguments is probably the nicest solution. For the
> next version I'd change the 2nd argument from mask to the bit position
> though. It seems the field is always 3 bits wide and this makes it a
> little clearer that we're not just putting register values in the
> device tree.

I prefer bit position over mask.

But please fully document this in the device tree. This is something a
board developer is going to get wrong, because they assume MAC blocks
are identical, and normally need identical configuration.

I assume this is also a hardware 'bug', and the next generation of the
silicon will have this fixed? So this will go away?

	Andrew

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Andrew Lunn]

> Ugh, you're right. Both the syscon block, the register offset and the
> bit position in those registers are different from gmac0 to gmac1, and
> since we need a phandle to the syscon block anyway passing those two
> other parameters as arguments is probably the nicest solution. For the
> next version I'd change the 2nd argument from mask to the bit position
> though. It seems the field is always 3 bits wide and this makes it a
> little clearer that we're not just putting register values in the
> device tree.

I prefer bit position over mask.

But please fully document this in the device tree. This is something a
board developer is going to get wrong, because they assume MAC blocks
are identical, and normally need identical configuration.

I assume this is also a hardware 'bug', and the next generation of the
silicon will have this fixed? So this will go away?

	Andrew

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Re: [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Guo Samin]

在 2023/3/6 21:04:28, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>> From: Yanhong Wang <yanhong.wang@starfivetech.com>
>>
>> Update gmac device tree node status to okay.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index c2aa8946a0f1..d1c409f40014 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -12,6 +12,8 @@
>>  / {
>>         aliases {
>>                 serial0 = &uart0;
>> +               ethernet0 = &gmac0;
>> +               ethernet1 = &gmac1;
> 
> Please sort these alphabetically.
Thanks, will fix.
> 
>>                 i2c0 = &i2c0;
>>                 i2c2 = &i2c2;
>>                 i2c5 = &i2c5;
>> @@ -92,6 +94,14 @@
>>         status = "okay";
>>  };
>>
>> +&gmac0 {
>> +       status = "okay";
>> +};
>> +
>> +&gmac1 {
>> +       status = "okay";
>> +};
> 
> Since you'll need to add to the gmac0 and gmac1 nodes in the board
> specific files too and it's only one line, consider just dropping this
> here and add the status = "okay" there instead.
> 
According to Andrew's suggestion, can I put the nodes of mdio and phy here?
>>  &i2c0 {
>>         clock-frequency = <100000>;
>>         i2c-sda-hold-time-ns = <300>;
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

Best regards,
Samin
-- 
Best regards,
Samin

Re: [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Guo Samin]

在 2023/3/6 21:04:28, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>> From: Yanhong Wang <yanhong.wang@starfivetech.com>
>>
>> Update gmac device tree node status to okay.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
>>  1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index c2aa8946a0f1..d1c409f40014 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -12,6 +12,8 @@
>>  / {
>>         aliases {
>>                 serial0 = &uart0;
>> +               ethernet0 = &gmac0;
>> +               ethernet1 = &gmac1;
> 
> Please sort these alphabetically.
Thanks, will fix.
> 
>>                 i2c0 = &i2c0;
>>                 i2c2 = &i2c2;
>>                 i2c5 = &i2c5;
>> @@ -92,6 +94,14 @@
>>         status = "okay";
>>  };
>>
>> +&gmac0 {
>> +       status = "okay";
>> +};
>> +
>> +&gmac1 {
>> +       status = "okay";
>> +};
> 
> Since you'll need to add to the gmac0 and gmac1 nodes in the board
> specific files too and it's only one line, consider just dropping this
> here and add the status = "okay" there instead.
> 
According to Andrew's suggestion, can I put the nodes of mdio and phy here?
>>  &i2c0 {
>>         clock-frequency = <100000>;
>>         i2c-sda-hold-time-ns = <300>;
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

Best regards,
Samin
-- 
Best regards,
Samin

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Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Guo Samin]

在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
>> configurations.
>>
>> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
>> switch rx and rx to external clock sources.
>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> index 4af3300f3cf3..205a13d8c8b1 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> @@ -11,3 +11,16 @@
>>         model = "StarFive VisionFive 2 v1.2A";
>>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>>  };
>> +
>> +&gmac1 {
>> +       phy-mode = "rmii";
>> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
>> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
>> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
>> +};
>> +
>> +&phy0 {
>> +       rx-internal-delay-ps = <1900>;
>> +       tx-internal-delay-ps = <1350>;
>> +};
> 
> Here you're not specifying the internal delays for phy1 which means it
> defaults to 1950ps for both rx and tx. Is that right or did you mean
> to set them to 0 like the v1.3b phy1?

Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.
> 
> Also your u-boot seems to set what the linux phy driver calls
> motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
> the phys. Did you leave those out on purpose?

Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot, 
but Yutai upstream's Linux driver only yt8521/yt8531 supports this property. 
Yt8512 is a Generic PHY driver and does not support the configuration of 
motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.

And without configuring these two attributes, vf2-1.2a gmac1 also works normally.


Best regards,
Samin
> 
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Guo Samin]

在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
>> configurations.
>>
>> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
>> switch rx and rx to external clock sources.
>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> index 4af3300f3cf3..205a13d8c8b1 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> @@ -11,3 +11,16 @@
>>         model = "StarFive VisionFive 2 v1.2A";
>>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>>  };
>> +
>> +&gmac1 {
>> +       phy-mode = "rmii";
>> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
>> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
>> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
>> +};
>> +
>> +&phy0 {
>> +       rx-internal-delay-ps = <1900>;
>> +       tx-internal-delay-ps = <1350>;
>> +};
> 
> Here you're not specifying the internal delays for phy1 which means it
> defaults to 1950ps for both rx and tx. Is that right or did you mean
> to set them to 0 like the v1.3b phy1?

Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.
> 
> Also your u-boot seems to set what the linux phy driver calls
> motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
> the phys. Did you leave those out on purpose?

Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot, 
but Yutai upstream's Linux driver only yt8521/yt8531 supports this property. 
Yt8512 is a Generic PHY driver and does not support the configuration of 
motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.

And without configuring these two attributes, vf2-1.2a gmac1 also works normally.


Best regards,
Samin
> 
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Guo Samin]

在 2023/3/6 21:06:20, Andrew Lunn 写道:
>> Ugh, you're right. Both the syscon block, the register offset and the
>> bit position in those registers are different from gmac0 to gmac1, and
>> since we need a phandle to the syscon block anyway passing those two
>> other parameters as arguments is probably the nicest solution. For the
>> next version I'd change the 2nd argument from mask to the bit position
>> though. It seems the field is always 3 bits wide and this makes it a
>> little clearer that we're not just putting register values in the
>> device tree.
> 
> I prefer bit position over mask.
> 
> But please fully document this in the device tree. This is something a
> board developer is going to get wrong, because they assume MAC blocks
> are identical, and normally need identical configuration.
> 
> I assume this is also a hardware 'bug', and the next generation of the
> silicon will have this fixed? So this will go away?
> 
> 	Andrew


Hi Andrew, Yes, the hardware design does not take into account the feasibility of the software.
The next version will be fixed. Thank you. 
I will use bit position instead of mask, which is described in detail in the document.

Best regards,
Samin

-- 
Best regards,
Samin

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Guo Samin]

在 2023/3/6 21:06:20, Andrew Lunn 写道:
>> Ugh, you're right. Both the syscon block, the register offset and the
>> bit position in those registers are different from gmac0 to gmac1, and
>> since we need a phandle to the syscon block anyway passing those two
>> other parameters as arguments is probably the nicest solution. For the
>> next version I'd change the 2nd argument from mask to the bit position
>> though. It seems the field is always 3 bits wide and this makes it a
>> little clearer that we're not just putting register values in the
>> device tree.
> 
> I prefer bit position over mask.
> 
> But please fully document this in the device tree. This is something a
> board developer is going to get wrong, because they assume MAC blocks
> are identical, and normally need identical configuration.
> 
> I assume this is also a hardware 'bug', and the next generation of the
> silicon will have this fixed? So this will go away?
> 
> 	Andrew


Hi Andrew, Yes, the hardware design does not take into account the feasibility of the software.
The next version will be fixed. Thank you. 
I will use bit position instead of mask, which is described in detail in the document.

Best regards,
Samin

-- 
Best regards,
Samin

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Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Guo Samin]

在 2023/3/6 20:49:57, Emil Renner Berthing 写道:
> On Mon, 6 Mar 2023 at 04:07, Guo Samin <samin.guo@starfivetech.com> wrote:
>> 在 2023/3/4 0:50:54, Emil Renner Berthing 写道:
>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>>
>>>> dwmac supports multiple modess. When working under rmii and rgmii,
>>>> you need to set different phy interfaces.
>>>>
>>>> According to the dwmac document, when working in rmii, it needs to be
>>>> set to 0x4, and rgmii needs to be set to 0x1.
>>>>
>>>> The phy interface needs to be set in syscon, the format is as follows:
>>>> starfive,syscon: <&syscon, offset, mask>
>>>>
>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>> ---
>>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
>>>>  1 file changed, 46 insertions(+)
>>>>
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> index 566378306f67..40fdd7036127 100644
>>>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> @@ -7,10 +7,15 @@
>>>>   *
>>>>   */
>>>>
>>>> +#include <linux/mfd/syscon.h>
>>>>  #include <linux/of_device.h>
>>>> +#include <linux/regmap.h>
>>>>
>>>>  #include "stmmac_platform.h"
>>>>
>>>> +#define MACPHYC_PHY_INFT_RMII  0x4
>>>> +#define MACPHYC_PHY_INFT_RGMII 0x1
>>>
>>> Please prefix these with something like STARFIVE_DWMAC_
>>>
>> Hi, Emil, These definitions come from the datasheet of dwmac. However, add STARDRIVE_ DWMAC is a good idea. I will fix it,thanks.
>>>>  struct starfive_dwmac {
>>>>         struct device *dev;
>>>>         struct clk *clk_tx;
>>>> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>>>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>>>  }
>>>>
>>>> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
>>>> +{
>>>> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
>>>> +       struct of_phandle_args args;
>>>> +       struct regmap *regmap;
>>>> +       unsigned int reg, mask, mode;
>>>> +       int err;
>>>> +
>>>> +       switch (plat_dat->interface) {
>>>> +       case PHY_INTERFACE_MODE_RMII:
>>>> +               mode = MACPHYC_PHY_INFT_RMII;
>>>> +               break;
>>>> +
>>>> +       case PHY_INTERFACE_MODE_RGMII:
>>>> +       case PHY_INTERFACE_MODE_RGMII_ID:
>>>> +               mode = MACPHYC_PHY_INFT_RGMII;
>>>> +               break;
>>>> +
>>>> +       default:
>>>> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
>>>> +                       plat_dat->interface);
>>>> +       }
>>>> +
>>>> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
>>>> +                                              "starfive,syscon", 2, 0, &args);
>>>> +       if (err) {
>>>> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
>>>> +               return -EINVAL;
>>>> +       }
>>>> +
>>>> +       reg = args.args[0];
>>>> +       mask = args.args[1];
>>>> +       regmap = syscon_node_to_regmap(args.np);
>>>> +       of_node_put(args.np);
>>>
>>> I think the above is basically
>>> unsigned int args[2];
>>> syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
>>> "starfive,syscon", 2, args);
>>>
>>> ..but as Andrew points out another solution is to use platform match
>>> data for this. Eg.
>>>
>>> static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
>>>   .phy_interface_offset = 0xc,
>>>   .phy_interface_mask = 0x1c0000,
>>> };
>>>
>>> static const struct of_device_id starfive_dwmac_match[] = {
>>>   { .compatible = "starfive,jh7110-dwmac", .data =
>>> &starfive_dwmac_jh7110_data },
>>>   { /* sentinel */ }
>>> };
>>>
>>> and in the probe function:
>>>
>> Hi Emil, Yes，this is usually a good solution, and I have considered this plan before.
>> However, gmac0 of jh7110 is different from the reg/mask of gmac1.
>> You can find it in patch-9:
>>
>> &gmac0 {
>>         starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
>> };
>>
>> &gmac1 {
>>         starfive,syscon = <&sys_syscon 0x90 0x1c>;
>> };
>>
>> In this case, using match_data of starfive,jh7110-dwma does not seem to be compatible.
> 
> Ugh, you're right. Both the syscon block, the register offset and the
> bit position in those registers are different from gmac0 to gmac1, and
> since we need a phandle to the syscon block anyway passing those two
> other parameters as arguments is probably the nicest solution. For the
> next version I'd change the 2nd argument from mask to the bit position
> though. It seems the field is always 3 bits wide and this makes it a
> little clearer that we're not just putting register values in the
> device tree. Eg. something like
> 
Yes，the field is always 3 bits wide, the next version will use bit position instead of mask.
Thank you for your advice.
> regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
> "starfive,syscon", 2, args);
> ...
> err = regmap_update_bits(regmap, args[0], 7U << args[1], mode << args[1]);
> ...
> 
I also think the current method is relatively simple and compatible.


Best regards,
Samin
> Alternatively we'd put data for each gmac interface in the platform
> data including the syscon compatible string, and use
> syscon_regmap_lookup_by_compatible("starfive,jh7110-aon-syscon"); for
> gmac0 fx. This way the dependency from the gmac nodes to the syscon
> nodes won't be recorded is the device tree though.
> 
> @Andrew is this what you were suggesting?
> 


>>> struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);
>>>
>>>> +       if (IS_ERR(regmap))
>>>> +               return PTR_ERR(regmap);
>>>> +
>>>> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
>>>> +}
>>>> +
>>>>  static int starfive_dwmac_probe(struct platform_device *pdev)
>>>>  {
>>>>         struct plat_stmmacenet_data *plat_dat;
>>>> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>>>>         plat_dat->bsp_priv = dwmac;
>>>>         plat_dat->dma_cfg->dche = true;
>>>>
>>>> +       starfive_dwmac_set_mode(plat_dat);
>>>
>>> The function returns errors in an int, but you never check it :(
>>>
>> Thank you for pointing out that it will be added in the next version.
>>>>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>>>         if (err) {
>>>>                 stmmac_remove_config_dt(pdev, plat_dat);
>>
>>
>> Best regards,
>> Samin
>>
>>>> --
>>>> 2.17.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>> --
>> Best regards,
>> Samin

-- 
Best regards,
Samin

Re: [PATCH v5 08/12] net: stmmac: starfive_dmac: Add phy interface settings

[Guo Samin]

在 2023/3/6 20:49:57, Emil Renner Berthing 写道:
> On Mon, 6 Mar 2023 at 04:07, Guo Samin <samin.guo@starfivetech.com> wrote:
>> 在 2023/3/4 0:50:54, Emil Renner Berthing 写道:
>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>>
>>>> dwmac supports multiple modess. When working under rmii and rgmii,
>>>> you need to set different phy interfaces.
>>>>
>>>> According to the dwmac document, when working in rmii, it needs to be
>>>> set to 0x4, and rgmii needs to be set to 0x1.
>>>>
>>>> The phy interface needs to be set in syscon, the format is as follows:
>>>> starfive,syscon: <&syscon, offset, mask>
>>>>
>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>> ---
>>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 46 +++++++++++++++++++
>>>>  1 file changed, 46 insertions(+)
>>>>
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> index 566378306f67..40fdd7036127 100644
>>>> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> @@ -7,10 +7,15 @@
>>>>   *
>>>>   */
>>>>
>>>> +#include <linux/mfd/syscon.h>
>>>>  #include <linux/of_device.h>
>>>> +#include <linux/regmap.h>
>>>>
>>>>  #include "stmmac_platform.h"
>>>>
>>>> +#define MACPHYC_PHY_INFT_RMII  0x4
>>>> +#define MACPHYC_PHY_INFT_RGMII 0x1
>>>
>>> Please prefix these with something like STARFIVE_DWMAC_
>>>
>> Hi, Emil, These definitions come from the datasheet of dwmac. However, add STARDRIVE_ DWMAC is a good idea. I will fix it,thanks.
>>>>  struct starfive_dwmac {
>>>>         struct device *dev;
>>>>         struct clk *clk_tx;
>>>> @@ -53,6 +58,46 @@ static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>>>                 dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>>>  }
>>>>
>>>> +static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)
>>>> +{
>>>> +       struct starfive_dwmac *dwmac = plat_dat->bsp_priv;
>>>> +       struct of_phandle_args args;
>>>> +       struct regmap *regmap;
>>>> +       unsigned int reg, mask, mode;
>>>> +       int err;
>>>> +
>>>> +       switch (plat_dat->interface) {
>>>> +       case PHY_INTERFACE_MODE_RMII:
>>>> +               mode = MACPHYC_PHY_INFT_RMII;
>>>> +               break;
>>>> +
>>>> +       case PHY_INTERFACE_MODE_RGMII:
>>>> +       case PHY_INTERFACE_MODE_RGMII_ID:
>>>> +               mode = MACPHYC_PHY_INFT_RGMII;
>>>> +               break;
>>>> +
>>>> +       default:
>>>> +               dev_err(dwmac->dev, "Unsupported interface %d\n",
>>>> +                       plat_dat->interface);
>>>> +       }
>>>> +
>>>> +       err = of_parse_phandle_with_fixed_args(dwmac->dev->of_node,
>>>> +                                              "starfive,syscon", 2, 0, &args);
>>>> +       if (err) {
>>>> +               dev_dbg(dwmac->dev, "syscon reg not found\n");
>>>> +               return -EINVAL;
>>>> +       }
>>>> +
>>>> +       reg = args.args[0];
>>>> +       mask = args.args[1];
>>>> +       regmap = syscon_node_to_regmap(args.np);
>>>> +       of_node_put(args.np);
>>>
>>> I think the above is basically
>>> unsigned int args[2];
>>> syscon_regmap_lookup_by_phandle_args(dwmac->dev_of_node,
>>> "starfive,syscon", 2, args);
>>>
>>> ..but as Andrew points out another solution is to use platform match
>>> data for this. Eg.
>>>
>>> static const struct starfive_dwmac_match_data starfive_dwmac_jh7110_data {
>>>   .phy_interface_offset = 0xc,
>>>   .phy_interface_mask = 0x1c0000,
>>> };
>>>
>>> static const struct of_device_id starfive_dwmac_match[] = {
>>>   { .compatible = "starfive,jh7110-dwmac", .data =
>>> &starfive_dwmac_jh7110_data },
>>>   { /* sentinel */ }
>>> };
>>>
>>> and in the probe function:
>>>
>> Hi Emil, Yes，this is usually a good solution, and I have considered this plan before.
>> However, gmac0 of jh7110 is different from the reg/mask of gmac1.
>> You can find it in patch-9:
>>
>> &gmac0 {
>>         starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
>> };
>>
>> &gmac1 {
>>         starfive,syscon = <&sys_syscon 0x90 0x1c>;
>> };
>>
>> In this case, using match_data of starfive,jh7110-dwma does not seem to be compatible.
> 
> Ugh, you're right. Both the syscon block, the register offset and the
> bit position in those registers are different from gmac0 to gmac1, and
> since we need a phandle to the syscon block anyway passing those two
> other parameters as arguments is probably the nicest solution. For the
> next version I'd change the 2nd argument from mask to the bit position
> though. It seems the field is always 3 bits wide and this makes it a
> little clearer that we're not just putting register values in the
> device tree. Eg. something like
> 
Yes，the field is always 3 bits wide, the next version will use bit position instead of mask.
Thank you for your advice.
> regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
> "starfive,syscon", 2, args);
> ...
> err = regmap_update_bits(regmap, args[0], 7U << args[1], mode << args[1]);
> ...
> 
I also think the current method is relatively simple and compatible.


Best regards,
Samin
> Alternatively we'd put data for each gmac interface in the platform
> data including the syscon compatible string, and use
> syscon_regmap_lookup_by_compatible("starfive,jh7110-aon-syscon"); for
> gmac0 fx. This way the dependency from the gmac nodes to the syscon
> nodes won't be recorded is the device tree though.
> 
> @Andrew is this what you were suggesting?
> 


>>> struct starfive_dwmac_match_data *pdata = device_get_match_data(&pdev->dev);
>>>
>>>> +       if (IS_ERR(regmap))
>>>> +               return PTR_ERR(regmap);
>>>> +
>>>> +       return regmap_update_bits(regmap, reg, mask, mode << __ffs(mask));
>>>> +}
>>>> +
>>>>  static int starfive_dwmac_probe(struct platform_device *pdev)
>>>>  {
>>>>         struct plat_stmmacenet_data *plat_dat;
>>>> @@ -93,6 +138,7 @@ static int starfive_dwmac_probe(struct platform_device *pdev)
>>>>         plat_dat->bsp_priv = dwmac;
>>>>         plat_dat->dma_cfg->dche = true;
>>>>
>>>> +       starfive_dwmac_set_mode(plat_dat);
>>>
>>> The function returns errors in an int, but you never check it :(
>>>
>> Thank you for pointing out that it will be added in the next version.
>>>>         err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>>>         if (err) {
>>>>                 stmmac_remove_config_dt(pdev, plat_dat);
>>
>>
>> Best regards,
>> Samin
>>
>>>> --
>>>> 2.17.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>> --
>> Best regards,
>> Samin

-- 
Best regards,
Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Guo Samin]

在 2023/3/5 6:57:18, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>
>> Add JH7110 ethernet device node to support gmac driver for the JH7110
>> RISC-V SoC.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 91 ++++++++++++++++++++++++
>>  1 file changed, 91 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index 09806418ed1b..2ce28292b721 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -233,6 +233,13 @@
>>                 #clock-cells = <0>;
>>         };
>>
>> +       stmmac_axi_setup: stmmac-axi-config {
>> +               snps,lpi_en;
>> +               snps,wr_osr_lmt = <4>;
>> +               snps,rd_osr_lmt = <4>;
>> +               snps,blen = <256 128 64 32 0 0 0>;
>> +       };
>> +
>>         tdm_ext: tdm-ext-clock {
>>                 compatible = "fixed-clock";
>>                 clock-output-names = "tdm_ext";
>> @@ -518,5 +525,89 @@
>>                         gpio-controller;
>>                         #gpio-cells = <2>;
>>                 };
>> +
>> +               gmac0: ethernet@16030000 {
>> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +                       reg = <0x0 0x16030000 0x0 0x10000>;
>> +                       clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
>> +                                <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
>> +                                <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
>> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +                                     "tx", "gtx";
>> +                       resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
>> +                                <&aoncrg JH7110_AONRST_GMAC0_AHB>;
>> +                       reset-names = "stmmaceth", "ahb";
>> +                       interrupts = <7>, <6>, <5>;
>> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +                       phy-mode = "rgmii-id";
>> +                       snps,multicast-filter-bins = <64>;
>> +                       snps,perfect-filter-entries = <8>;
>> +                       rx-fifo-depth = <2048>;
>> +                       tx-fifo-depth = <2048>;
>> +                       snps,fixed-burst;
>> +                       snps,no-pbl-x8;
>> +                       snps,force_thresh_dma_mode;
>> +                       snps,axi-config = <&stmmac_axi_setup>;
>> +                       snps,tso;
>> +                       snps,en-tx-lpi-clockgating;
>> +                       snps,txpbl = <16>;
>> +                       snps,rxpbl = <16>;
>> +                       status = "disabled";
>> +                       phy-handle = <&phy0>;
>> +
>> +                       mdio {
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +                               compatible = "snps,dwmac-mdio";
>> +
>> +                               phy0: ethernet-phy@0 {
>> +                                       reg = <0>;
>> +                               };
>> +                       };
>> +               };
>> +
>> +               gmac1: ethernet@16040000 {
>> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +                       reg = <0x0 0x16040000 0x0 0x10000>;
>> +                       clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
>> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +                                     "tx", "gtx";
>> +                       resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
>> +                                <&syscrg JH7110_SYSRST_GMAC1_AHB>;
>> +                       reset-names = "stmmaceth", "ahb";
>> +                       interrupts = <78>, <77>, <76>;
>> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +                       phy-mode = "rgmii-id";
>> +                       snps,multicast-filter-bins = <64>;
>> +                       snps,perfect-filter-entries = <8>;
>> +                       rx-fifo-depth = <2048>;
>> +                       tx-fifo-depth = <2048>;
>> +                       snps,fixed-burst;
>> +                       snps,no-pbl-x8;
>> +                       snps,force_thresh_dma_mode;
>> +                       snps,axi-config = <&stmmac_axi_setup>;
>> +                       snps,tso;
>> +                       snps,en-tx-lpi-clockgating;
>> +                       snps,txpbl = <16>;
>> +                       snps,rxpbl = <16>;
>> +                       status = "disabled";
>> +                       phy-handle = <&phy1>;
>> +
>> +                       mdio {
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +                               compatible = "snps,dwmac-mdio";
>> +
>> +                               phy1: ethernet-phy@1 {
>> +                                       reg = <0>;
> 
> I'm getting errors on eth1 unless this is set to <1>. In any case the
> number after @ in the node name should match the reg value.

Hi，Emil，which board are you using?  (v1.2a or v1.3b?). 
I have tested it on v1.2a and 1.3b, all network ports work normally when the phy address is set to 0.
Maybe your eth1 doesn't work for other reasons?

General, the phy address is fixed when the bord is designed.
(For example,the phy address of YT8512 depends on the hardware resistance pull-up or pull-down.
However, some phy addresses can be configured through software, but not yt8512.)

The phy address is a borad-related attribute, and I will follow Andrew's suggestion and put the phy address in borad*.dts


Best regards,
Samin
> 
>> +                               };
>> +                       };
>> +               };
>>         };
>>  };
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

Re: [PATCH v5 05/12] riscv: dts: starfive: jh7110: Add ethernet device nodes

[Guo Samin]

在 2023/3/5 6:57:18, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>
>> Add JH7110 ethernet device node to support gmac driver for the JH7110
>> RISC-V SoC.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 91 ++++++++++++++++++++++++
>>  1 file changed, 91 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index 09806418ed1b..2ce28292b721 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -233,6 +233,13 @@
>>                 #clock-cells = <0>;
>>         };
>>
>> +       stmmac_axi_setup: stmmac-axi-config {
>> +               snps,lpi_en;
>> +               snps,wr_osr_lmt = <4>;
>> +               snps,rd_osr_lmt = <4>;
>> +               snps,blen = <256 128 64 32 0 0 0>;
>> +       };
>> +
>>         tdm_ext: tdm-ext-clock {
>>                 compatible = "fixed-clock";
>>                 clock-output-names = "tdm_ext";
>> @@ -518,5 +525,89 @@
>>                         gpio-controller;
>>                         #gpio-cells = <2>;
>>                 };
>> +
>> +               gmac0: ethernet@16030000 {
>> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +                       reg = <0x0 0x16030000 0x0 0x10000>;
>> +                       clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
>> +                                <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
>> +                                <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
>> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +                                     "tx", "gtx";
>> +                       resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
>> +                                <&aoncrg JH7110_AONRST_GMAC0_AHB>;
>> +                       reset-names = "stmmaceth", "ahb";
>> +                       interrupts = <7>, <6>, <5>;
>> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +                       phy-mode = "rgmii-id";
>> +                       snps,multicast-filter-bins = <64>;
>> +                       snps,perfect-filter-entries = <8>;
>> +                       rx-fifo-depth = <2048>;
>> +                       tx-fifo-depth = <2048>;
>> +                       snps,fixed-burst;
>> +                       snps,no-pbl-x8;
>> +                       snps,force_thresh_dma_mode;
>> +                       snps,axi-config = <&stmmac_axi_setup>;
>> +                       snps,tso;
>> +                       snps,en-tx-lpi-clockgating;
>> +                       snps,txpbl = <16>;
>> +                       snps,rxpbl = <16>;
>> +                       status = "disabled";
>> +                       phy-handle = <&phy0>;
>> +
>> +                       mdio {
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +                               compatible = "snps,dwmac-mdio";
>> +
>> +                               phy0: ethernet-phy@0 {
>> +                                       reg = <0>;
>> +                               };
>> +                       };
>> +               };
>> +
>> +               gmac1: ethernet@16040000 {
>> +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +                       reg = <0x0 0x16040000 0x0 0x10000>;
>> +                       clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
>> +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +                                     "tx", "gtx";
>> +                       resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
>> +                                <&syscrg JH7110_SYSRST_GMAC1_AHB>;
>> +                       reset-names = "stmmaceth", "ahb";
>> +                       interrupts = <78>, <77>, <76>;
>> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +                       phy-mode = "rgmii-id";
>> +                       snps,multicast-filter-bins = <64>;
>> +                       snps,perfect-filter-entries = <8>;
>> +                       rx-fifo-depth = <2048>;
>> +                       tx-fifo-depth = <2048>;
>> +                       snps,fixed-burst;
>> +                       snps,no-pbl-x8;
>> +                       snps,force_thresh_dma_mode;
>> +                       snps,axi-config = <&stmmac_axi_setup>;
>> +                       snps,tso;
>> +                       snps,en-tx-lpi-clockgating;
>> +                       snps,txpbl = <16>;
>> +                       snps,rxpbl = <16>;
>> +                       status = "disabled";
>> +                       phy-handle = <&phy1>;
>> +
>> +                       mdio {
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +                               compatible = "snps,dwmac-mdio";
>> +
>> +                               phy1: ethernet-phy@1 {
>> +                                       reg = <0>;
> 
> I'm getting errors on eth1 unless this is set to <1>. In any case the
> number after @ in the node name should match the reg value.

Hi，Emil，which board are you using?  (v1.2a or v1.3b?). 
I have tested it on v1.2a and 1.3b, all network ports work normally when the phy address is set to 0.
Maybe your eth1 doesn't work for other reasons?

General, the phy address is fixed when the bord is designed.
(For example,the phy address of YT8512 depends on the hardware resistance pull-up or pull-down.
However, some phy addresses can be configured through software, but not yt8512.)

The phy address is a borad-related attribute, and I will follow Andrew's suggestion and put the phy address in borad*.dts


Best regards,
Samin
> 
>> +                               };
>> +                       };
>> +               };
>>         };
>>  };
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

在 2023/3/6 20:21:28, Emil Renner Berthing 写道:
> On Mon, 6 Mar 2023 at 08:16, Guo Samin <samin.guo@starfivetech.com> wrote:
>> 在 2023/3/4 0:18:20, Emil Renner Berthing 写道:
>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>>>
>>>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>> ---
>>>>  MAINTAINERS                                   |   1 +
>>>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>>>  4 files changed, 139 insertions(+)
>>>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>
>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>> index 4e236b7c7fd2..91a4f190c827 100644
>>>> --- a/MAINTAINERS
>>>> +++ b/MAINTAINERS
>>>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>>>  S:     Maintained
>>>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>>>
>>>>  STARFIVE JH71X0 CLOCK DRIVERS
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>> index f77511fe4e87..47fbccef9d04 100644
>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>>>           for the stmmac device driver. This driver is used for
>>>>           arria5 and cyclone5 FPGA SoCs.
>>>>
>>>> +config DWMAC_STARFIVE
>>>> +       tristate "StarFive dwmac support"
>>>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
>>>
>>> There is an extra space between "OF" and "&&" here.
>>>
>> will drop it
>>>
>>>> +       depends on STMMAC_ETH
>>>
>>> It's not visible in this patch context, but this whole config option
>>> is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
>>> on STMMAC_ETH" should not be needed.
>>>
>> will drop it.
>>>> +       default ARCH_STARFIVE
>>>
>>> This driver is not required to boot the JH7110, so we should just
>>> default to building it as a module. Eg.
>>> default m if ARCH_STARFIVE
>>
>> Yes, this driver is not required to boot the JH7110, but the network is a very basic module,
>> it seems that other dwmac-platforms have been compiled into the kernel instead of modules.
> 
> Right, but the defconfig should work on as many platforms as possible,
> so if we build in every "basic" module for every platform the kernel
> will be huge and waste a lot of memory on drivers that will never be
> used.
> 
> Also even if this driver was built in the gmac0 would still not work
> until the driver for the AON CRG is loaded, which also defaults to m
> for the same reasons.
> 
OK, I will compile it into a module in the next version.
>>>
>>>> +       help
>>>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>>>> +
>>>> +         This selects the StarFive platform specific glue layer support for
>>>> +         the stmmac device driver. This driver is used for StarFive JH7110
>>>> +         ethernet controller.
>>>> +
>>>>  config DWMAC_STI
>>>>         tristate "STi GMAC support"
>>>>         default ARCH_STI
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>> index 057e4bab5c08..8738fdbb4b2d 100644
>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>>>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> new file mode 100644
>>>> index 000000000000..566378306f67
>>>> --- /dev/null
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> @@ -0,0 +1,125 @@
>>>> +// SPDX-License-Identifier: GPL-2.0+
>>>> +/*
>>>> + * StarFive DWMAC platform driver
>>>> + *
>>>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
>>>
>>> Sorry, after looking at my old git branches where this started as a
>>> driver for the JH7100 this should really be
>>> * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
>>> * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>>
>> OK, It should be.
>>>> + */
>>>> +
>>>> +#include <linux/of_device.h>
>>>> +
>>>> +#include "stmmac_platform.h"
>>>> +
>>>> +struct starfive_dwmac {
>>>> +       struct device *dev;
>>>> +       struct clk *clk_tx;
>>>> +       struct clk *clk_gtx;
>>>
>>> This pointer is only set, but never read. Please remove it.
>>>>
>>>> +       bool tx_use_rgmii_rxin_clk;
>>>> +};
>>>> +
>>>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>>
>>> This should be starfive_dwmac_fix_mac_speed for consistency.
>>>
>> Sorry，I missed this, will fix next version.
>>>> +{
>>>> +       struct starfive_dwmac *dwmac = priv;
>>>> +       unsigned long rate;
>>>> +       int err;
>>>> +
>>>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>>>> +        * which needs to match the corresponding clock frequency according
>>>> +        * to different speeds. If the rgmii_tx clock is provided by the
>>>> +        * external rgmii_rxin, there is no need to configure the clock
>>>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>>>> +        */
>>>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>>>> +               return;
>>>
>>> If this function is only needed in certain situations, why not just
>>> set the plat_dat->fix_mac_speed callback when it is needed?
>>>
>> Sounds good idea.
>>>> +       switch (speed) {
>>>> +       case SPEED_1000:
>>>> +               rate = 125000000;
>>>> +               break;
>>>> +       case SPEED_100:
>>>> +               rate = 25000000;
>>>> +               break;
>>>> +       case SPEED_10:
>>>> +               rate = 2500000;
>>>> +               break;
>>>> +       default:
>>>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>>>> +               break;
>>>> +       }
>>>> +
>>>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>>>> +       if (err)
>>>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>>> +}
>>>> +
>>>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>>>> +{
>>>> +       struct plat_stmmacenet_data *plat_dat;
>>>> +       struct stmmac_resources stmmac_res;
>>>> +       struct starfive_dwmac *dwmac;
>>>> +       int err;
>>>> +
>>>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>>>> +       if (err)
>>>> +               return err;
>>>> +
>>>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>>>> +       if (IS_ERR(plat_dat)) {
>>>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>>>> +               return PTR_ERR(plat_dat);
>>>> +       }
>>>> +
>>>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>>>> +       if (!dwmac)
>>>> +               return -ENOMEM;
>>>> +
>>>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>>> +       if (IS_ERR(dwmac->clk_tx))
>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>>>> +                                   "error getting tx clock\n");
>>>> +
>>>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>>>> +       if (IS_ERR(dwmac->clk_gtx))
>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>>>> +                                   "error getting gtx clock\n");
>>>> +
>>>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>>>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>>>> +
>>>> +       dwmac->dev = &pdev->dev;
>>>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
>>>
>>> Eg.:
>>> if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
>>>   plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
>>>
>> Good idea, so we can remove flag 'tx_use_rgmii_rxin_clk' in struct starfive_dwmac.
>>>> +       plat_dat->init = NULL;
> 
> Btw. plat_dat is initialized by kzalloc in stmmac_probe_config_dt and
> I can't seem to find anything that sets plat_dat->init, so I think
> this is redundant.
> 
>>>> +       plat_dat->bsp_priv = dwmac;
>>>> +       plat_dat->dma_cfg->dche = true;
>>>> +
>>>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>>> +       if (err) {
>>>> +               stmmac_remove_config_dt(pdev, plat_dat);
>>>> +               return err;
>>>> +       }
>>>> +
>>>> +       return 0;
>>>> +}
>>>> +
>>>> +static const struct of_device_id starfive_dwmac_match[] = {
>>>> +       { .compatible = "starfive,jh7110-dwmac" },
>>>> +       { /* sentinel */ }
>>>> +};
>>>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>>>> +
>>>> +static struct platform_driver starfive_dwmac_driver = {
>>>> +       .probe  = starfive_dwmac_probe,
>>>> +       .remove = stmmac_pltfr_remove,
>>>> +       .driver = {
>>>> +               .name = "starfive-dwmac",
>>>> +               .pm = &stmmac_pltfr_pm_ops,
>>>> +               .of_match_table = starfive_dwmac_match,
>>>> +       },
>>>> +};
>>>> +module_platform_driver(starfive_dwmac_driver);
>>>> +
>>>> +MODULE_LICENSE("GPL");
>>>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>>>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>>>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>>>> --
>>>> 2.17.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>> Best regards,
>> Samin
>>
>> --
>> Best regards,
>> Samin

-- 
Best regards,
Samin

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

在 2023/3/6 20:21:28, Emil Renner Berthing 写道:
> On Mon, 6 Mar 2023 at 08:16, Guo Samin <samin.guo@starfivetech.com> wrote:
>> 在 2023/3/4 0:18:20, Emil Renner Berthing 写道:
>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>>>
>>>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>> ---
>>>>  MAINTAINERS                                   |   1 +
>>>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>>>  4 files changed, 139 insertions(+)
>>>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>
>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>> index 4e236b7c7fd2..91a4f190c827 100644
>>>> --- a/MAINTAINERS
>>>> +++ b/MAINTAINERS
>>>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>>>  S:     Maintained
>>>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>>>
>>>>  STARFIVE JH71X0 CLOCK DRIVERS
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>> index f77511fe4e87..47fbccef9d04 100644
>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>>>           for the stmmac device driver. This driver is used for
>>>>           arria5 and cyclone5 FPGA SoCs.
>>>>
>>>> +config DWMAC_STARFIVE
>>>> +       tristate "StarFive dwmac support"
>>>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
>>>
>>> There is an extra space between "OF" and "&&" here.
>>>
>> will drop it
>>>
>>>> +       depends on STMMAC_ETH
>>>
>>> It's not visible in this patch context, but this whole config option
>>> is surrounded by "if STMMAC_ETH" and "if STMMAC_PLATFORM", so "depends
>>> on STMMAC_ETH" should not be needed.
>>>
>> will drop it.
>>>> +       default ARCH_STARFIVE
>>>
>>> This driver is not required to boot the JH7110, so we should just
>>> default to building it as a module. Eg.
>>> default m if ARCH_STARFIVE
>>
>> Yes, this driver is not required to boot the JH7110, but the network is a very basic module,
>> it seems that other dwmac-platforms have been compiled into the kernel instead of modules.
> 
> Right, but the defconfig should work on as many platforms as possible,
> so if we build in every "basic" module for every platform the kernel
> will be huge and waste a lot of memory on drivers that will never be
> used.
> 
> Also even if this driver was built in the gmac0 would still not work
> until the driver for the AON CRG is loaded, which also defaults to m
> for the same reasons.
> 
OK, I will compile it into a module in the next version.
>>>
>>>> +       help
>>>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>>>> +
>>>> +         This selects the StarFive platform specific glue layer support for
>>>> +         the stmmac device driver. This driver is used for StarFive JH7110
>>>> +         ethernet controller.
>>>> +
>>>>  config DWMAC_STI
>>>>         tristate "STi GMAC support"
>>>>         default ARCH_STI
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>> index 057e4bab5c08..8738fdbb4b2d 100644
>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>>>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> new file mode 100644
>>>> index 000000000000..566378306f67
>>>> --- /dev/null
>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>> @@ -0,0 +1,125 @@
>>>> +// SPDX-License-Identifier: GPL-2.0+
>>>> +/*
>>>> + * StarFive DWMAC platform driver
>>>> + *
>>>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
>>>
>>> Sorry, after looking at my old git branches where this started as a
>>> driver for the JH7100 this should really be
>>> * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
>>> * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>>
>> OK, It should be.
>>>> + */
>>>> +
>>>> +#include <linux/of_device.h>
>>>> +
>>>> +#include "stmmac_platform.h"
>>>> +
>>>> +struct starfive_dwmac {
>>>> +       struct device *dev;
>>>> +       struct clk *clk_tx;
>>>> +       struct clk *clk_gtx;
>>>
>>> This pointer is only set, but never read. Please remove it.
>>>>
>>>> +       bool tx_use_rgmii_rxin_clk;
>>>> +};
>>>> +
>>>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>>
>>> This should be starfive_dwmac_fix_mac_speed for consistency.
>>>
>> Sorry，I missed this, will fix next version.
>>>> +{
>>>> +       struct starfive_dwmac *dwmac = priv;
>>>> +       unsigned long rate;
>>>> +       int err;
>>>> +
>>>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>>>> +        * which needs to match the corresponding clock frequency according
>>>> +        * to different speeds. If the rgmii_tx clock is provided by the
>>>> +        * external rgmii_rxin, there is no need to configure the clock
>>>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>>>> +        */
>>>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>>>> +               return;
>>>
>>> If this function is only needed in certain situations, why not just
>>> set the plat_dat->fix_mac_speed callback when it is needed?
>>>
>> Sounds good idea.
>>>> +       switch (speed) {
>>>> +       case SPEED_1000:
>>>> +               rate = 125000000;
>>>> +               break;
>>>> +       case SPEED_100:
>>>> +               rate = 25000000;
>>>> +               break;
>>>> +       case SPEED_10:
>>>> +               rate = 2500000;
>>>> +               break;
>>>> +       default:
>>>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>>>> +               break;
>>>> +       }
>>>> +
>>>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>>>> +       if (err)
>>>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>>> +}
>>>> +
>>>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>>>> +{
>>>> +       struct plat_stmmacenet_data *plat_dat;
>>>> +       struct stmmac_resources stmmac_res;
>>>> +       struct starfive_dwmac *dwmac;
>>>> +       int err;
>>>> +
>>>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>>>> +       if (err)
>>>> +               return err;
>>>> +
>>>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>>>> +       if (IS_ERR(plat_dat)) {
>>>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>>>> +               return PTR_ERR(plat_dat);
>>>> +       }
>>>> +
>>>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>>>> +       if (!dwmac)
>>>> +               return -ENOMEM;
>>>> +
>>>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>>> +       if (IS_ERR(dwmac->clk_tx))
>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>>>> +                                   "error getting tx clock\n");
>>>> +
>>>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>>>> +       if (IS_ERR(dwmac->clk_gtx))
>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>>>> +                                   "error getting gtx clock\n");
>>>> +
>>>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>>>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>>>> +
>>>> +       dwmac->dev = &pdev->dev;
>>>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
>>>
>>> Eg.:
>>> if (!device_property_read_bool(&pdev->dev, "starfive,tx_use_rgmii_clk"))
>>>   plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
>>>
>> Good idea, so we can remove flag 'tx_use_rgmii_rxin_clk' in struct starfive_dwmac.
>>>> +       plat_dat->init = NULL;
> 
> Btw. plat_dat is initialized by kzalloc in stmmac_probe_config_dt and
> I can't seem to find anything that sets plat_dat->init, so I think
> this is redundant.
> 
>>>> +       plat_dat->bsp_priv = dwmac;
>>>> +       plat_dat->dma_cfg->dche = true;
>>>> +
>>>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>>> +       if (err) {
>>>> +               stmmac_remove_config_dt(pdev, plat_dat);
>>>> +               return err;
>>>> +       }
>>>> +
>>>> +       return 0;
>>>> +}
>>>> +
>>>> +static const struct of_device_id starfive_dwmac_match[] = {
>>>> +       { .compatible = "starfive,jh7110-dwmac" },
>>>> +       { /* sentinel */ }
>>>> +};
>>>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>>>> +
>>>> +static struct platform_driver starfive_dwmac_driver = {
>>>> +       .probe  = starfive_dwmac_probe,
>>>> +       .remove = stmmac_pltfr_remove,
>>>> +       .driver = {
>>>> +               .name = "starfive-dwmac",
>>>> +               .pm = &stmmac_pltfr_pm_ops,
>>>> +               .of_match_table = starfive_dwmac_match,
>>>> +       },
>>>> +};
>>>> +module_platform_driver(starfive_dwmac_driver);
>>>> +
>>>> +MODULE_LICENSE("GPL");
>>>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>>>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>>>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>>>> --
>>>> 2.17.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>> Best regards,
>> Samin
>>
>> --
>> Best regards,
>> Samin

-- 
Best regards,
Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Emil Renner Berthing]

On Tue, 7 Mar 2023 at 02:21, Guo Samin <samin.guo@starfivetech.com> wrote:

> 在 2023/3/6 21:04:28, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >> From: Yanhong Wang <yanhong.wang@starfivetech.com>
> >>
> >> Update gmac device tree node status to okay.
> >>
> >> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
> >>  1 file changed, 10 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >> index c2aa8946a0f1..d1c409f40014 100644
> >> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >> @@ -12,6 +12,8 @@
> >>  / {
> >>         aliases {
> >>                 serial0 = &uart0;
> >> +               ethernet0 = &gmac0;
> >> +               ethernet1 = &gmac1;
> >
> > Please sort these alphabetically.
> Thanks, will fix.
> >
> >>                 i2c0 = &i2c0;
> >>                 i2c2 = &i2c2;
> >>                 i2c5 = &i2c5;
> >> @@ -92,6 +94,14 @@
> >>         status = "okay";
> >>  };
> >>
> >> +&gmac0 {
> >> +       status = "okay";
> >> +};
> >> +
> >> +&gmac1 {
> >> +       status = "okay";
> >> +};
> >
> > Since you'll need to add to the gmac0 and gmac1 nodes in the board
> > specific files too and it's only one line, consider just dropping this
> > here and add the status = "okay" there instead.
> >
> According to Andrew's suggestion, can I put the nodes of mdio and phy here?

Yeah, if the boards then end up sharing more information it's fine to
put it here. It just seemed a little much to add 8 lines here when all
the boards shared was a status = "okay";

> >>  &i2c0 {
> >>         clock-frequency = <100000>;
> >>         i2c-sda-hold-time-ns = <300>;
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> Best regards,
> Samin
> --
> Best regards,
> Samin

Re: [PATCH v5 12/12] riscv: dts: starfive: visionfive 2: Enable gmac device tree node

[Emil Renner Berthing]

On Tue, 7 Mar 2023 at 02:21, Guo Samin <samin.guo@starfivetech.com> wrote:

> 在 2023/3/6 21:04:28, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >> From: Yanhong Wang <yanhong.wang@starfivetech.com>
> >>
> >> Update gmac device tree node status to okay.
> >>
> >> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  .../dts/starfive/jh7110-starfive-visionfive-2.dtsi     | 10 ++++++++++
> >>  1 file changed, 10 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >> index c2aa8946a0f1..d1c409f40014 100644
> >> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> >> @@ -12,6 +12,8 @@
> >>  / {
> >>         aliases {
> >>                 serial0 = &uart0;
> >> +               ethernet0 = &gmac0;
> >> +               ethernet1 = &gmac1;
> >
> > Please sort these alphabetically.
> Thanks, will fix.
> >
> >>                 i2c0 = &i2c0;
> >>                 i2c2 = &i2c2;
> >>                 i2c5 = &i2c5;
> >> @@ -92,6 +94,14 @@
> >>         status = "okay";
> >>  };
> >>
> >> +&gmac0 {
> >> +       status = "okay";
> >> +};
> >> +
> >> +&gmac1 {
> >> +       status = "okay";
> >> +};
> >
> > Since you'll need to add to the gmac0 and gmac1 nodes in the board
> > specific files too and it's only one line, consider just dropping this
> > here and add the status = "okay" there instead.
> >
> According to Andrew's suggestion, can I put the nodes of mdio and phy here?

Yeah, if the boards then end up sharing more information it's fine to
put it here. It just seemed a little much to add 8 lines here when all
the boards shared was a status = "okay";

> >>  &i2c0 {
> >>         clock-frequency = <100000>;
> >>         i2c-sda-hold-time-ns = <300>;
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> Best regards,
> Samin
> --
> Best regards,
> Samin

_______________________________________________
linux-riscv mailing list
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Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Emil Renner Berthing]

On Tue, 7 Mar 2023 at 02:43, Guo Samin <samin.guo@starfivetech.com> wrote:
> 在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
> >> configurations.
> >>
> >> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
> >> switch rx and rx to external clock sources.
> >>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
> >>  1 file changed, 13 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >> index 4af3300f3cf3..205a13d8c8b1 100644
> >> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >> @@ -11,3 +11,16 @@
> >>         model = "StarFive VisionFive 2 v1.2A";
> >>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
> >>  };
> >> +
> >> +&gmac1 {
> >> +       phy-mode = "rmii";
> >> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
> >> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
> >> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
> >> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
> >> +};
> >> +
> >> +&phy0 {
> >> +       rx-internal-delay-ps = <1900>;
> >> +       tx-internal-delay-ps = <1350>;
> >> +};
> >
> > Here you're not specifying the internal delays for phy1 which means it
> > defaults to 1950ps for both rx and tx. Is that right or did you mean
> > to set them to 0 like the v1.3b phy1?
>
> Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.

Ah, I see.

> > Also your u-boot seems to set what the linux phy driver calls
> > motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
> > the phys. Did you leave those out on purpose?
>
> Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot,
> but Yutai upstream's Linux driver only yt8521/yt8531 supports this property.

I'm confused. Is Yutai also Frank Sae? Because he is the one who added
support for the yt8531 upstream.

> Yt8512 is a Generic PHY driver and does not support the configuration of
> motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.

Right phy1 of the 1.2a might use a different phy, but I'm also talking
about phy0 and the v1.3b which does use the yt8531 right?

> And without configuring these two attributes, vf2-1.2a gmac1 also works normally.

Yes, but what I'm worried about is that it only works because u-boot
initialises the PHYs and ethernet may stop working if you're using a
different bootloader or Linux gains support for resetting the PHYs
before use.

>
> Best regards,
> Samin
> >
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> --
> Best regards,
> Samin

Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Emil Renner Berthing]

On Tue, 7 Mar 2023 at 02:43, Guo Samin <samin.guo@starfivetech.com> wrote:
> 在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
> > On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
> >> configurations.
> >>
> >> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
> >> switch rx and rx to external clock sources.
> >>
> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >> ---
> >>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
> >>  1 file changed, 13 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >> index 4af3300f3cf3..205a13d8c8b1 100644
> >> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
> >> @@ -11,3 +11,16 @@
> >>         model = "StarFive VisionFive 2 v1.2A";
> >>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
> >>  };
> >> +
> >> +&gmac1 {
> >> +       phy-mode = "rmii";
> >> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
> >> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
> >> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
> >> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
> >> +};
> >> +
> >> +&phy0 {
> >> +       rx-internal-delay-ps = <1900>;
> >> +       tx-internal-delay-ps = <1350>;
> >> +};
> >
> > Here you're not specifying the internal delays for phy1 which means it
> > defaults to 1950ps for both rx and tx. Is that right or did you mean
> > to set them to 0 like the v1.3b phy1?
>
> Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.

Ah, I see.

> > Also your u-boot seems to set what the linux phy driver calls
> > motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
> > the phys. Did you leave those out on purpose?
>
> Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot,
> but Yutai upstream's Linux driver only yt8521/yt8531 supports this property.

I'm confused. Is Yutai also Frank Sae? Because he is the one who added
support for the yt8531 upstream.

> Yt8512 is a Generic PHY driver and does not support the configuration of
> motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.

Right phy1 of the 1.2a might use a different phy, but I'm also talking
about phy0 and the v1.3b which does use the yt8531 right?

> And without configuring these two attributes, vf2-1.2a gmac1 also works normally.

Yes, but what I'm worried about is that it only works because u-boot
initialises the PHYs and ethernet may stop working if you're using a
different bootloader or Linux gains support for resetting the PHYs
before use.

>
> Best regards,
> Samin
> >
> >> --
> >> 2.17.1
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
> --
> Best regards,
> Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
收件人: Guo Samin <samin.guo@starfivetech.com>
日期: 2023/3/7

> On Tue, 7 Mar 2023 at 02:43, Guo Samin <samin.guo@starfivetech.com> wrote:
>> 在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
>>>> configurations.
>>>>
>>>> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
>>>> switch rx and rx to external clock sources.
>>>>
>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>> ---
>>>>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>>>>  1 file changed, 13 insertions(+)
>>>>
>>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>>>> index 4af3300f3cf3..205a13d8c8b1 100644
>>>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>>>> @@ -11,3 +11,16 @@
>>>>         model = "StarFive VisionFive 2 v1.2A";
>>>>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>>>>  };
>>>> +
>>>> +&gmac1 {
>>>> +       phy-mode = "rmii";
>>>> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
>>>> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
>>>> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
>>>> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
>>>> +};
>>>> +
>>>> +&phy0 {
>>>> +       rx-internal-delay-ps = <1900>;
>>>> +       tx-internal-delay-ps = <1350>;
>>>> +};
>>>
>>> Here you're not specifying the internal delays for phy1 which means it
>>> defaults to 1950ps for both rx and tx. Is that right or did you mean
>>> to set them to 0 like the v1.3b phy1?
>>
>> Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.
> 
> Ah, I see.
> 
>>> Also your u-boot seems to set what the linux phy driver calls
>>> motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
>>> the phys. Did you leave those out on purpose?
>>
>> Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot,
>> but Yutai upstream's Linux driver only yt8521/yt8531 supports this property.
> 
> I'm confused. Is Yutai also Frank Sae? Because he is the one who added
> support for the yt8531 upstream.

My fault , Frank Sae is from Motorcomm, also known as Yutai. 
yt8531 ==> Yutai 8531
> 
>> Yt8512 is a Generic PHY driver and does not support the configuration of
>> motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.
> 
> Right phy1 of the 1.2a might use a different phy, but I'm also talking
> about phy0 and the v1.3b which does use the yt8531 right?
Right:
v1.3b: gmac0:yt8531   gmac1:yt8531
v1.2a: gmac0:yt8531   gmac1:yt8512
> 
>> And without configuring these two attributes, vf2-1.2a gmac1 also works normally.
> 
> Yes, but what I'm worried about is that it only works because u-boot
> initialises the PHYs and ethernet may stop working if you're using a
> different bootloader or Linux gains support for resetting the PHYs
> before use.
> 
I have tested that in uboot, use the sd card to start Linux, do not run network programs (do not use uboot to initialize phy and gmac),
and the network works normally in Linux.

Best regards,
Samin

>>
>> Best regards,
>> Samin
>>>
>>>> --
>>>> 2.17.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>> --
>> Best regards,
>> Samin

-- 
Best regards,
Samin

Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay configuration
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
收件人: Guo Samin <samin.guo@starfivetech.com>
日期: 2023/3/7

> On Tue, 7 Mar 2023 at 02:43, Guo Samin <samin.guo@starfivetech.com> wrote:
>> 在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
>>>> configurations.
>>>>
>>>> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
>>>> switch rx and rx to external clock sources.
>>>>
>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>> ---
>>>>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>>>>  1 file changed, 13 insertions(+)
>>>>
>>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>>>> index 4af3300f3cf3..205a13d8c8b1 100644
>>>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>>>> @@ -11,3 +11,16 @@
>>>>         model = "StarFive VisionFive 2 v1.2A";
>>>>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>>>>  };
>>>> +
>>>> +&gmac1 {
>>>> +       phy-mode = "rmii";
>>>> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
>>>> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
>>>> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
>>>> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
>>>> +};
>>>> +
>>>> +&phy0 {
>>>> +       rx-internal-delay-ps = <1900>;
>>>> +       tx-internal-delay-ps = <1350>;
>>>> +};
>>>
>>> Here you're not specifying the internal delays for phy1 which means it
>>> defaults to 1950ps for both rx and tx. Is that right or did you mean
>>> to set them to 0 like the v1.3b phy1?
>>
>> Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.
> 
> Ah, I see.
> 
>>> Also your u-boot seems to set what the linux phy driver calls
>>> motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
>>> the phys. Did you leave those out on purpose?
>>
>> Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot,
>> but Yutai upstream's Linux driver only yt8521/yt8531 supports this property.
> 
> I'm confused. Is Yutai also Frank Sae? Because he is the one who added
> support for the yt8531 upstream.

My fault , Frank Sae is from Motorcomm, also known as Yutai. 
yt8531 ==> Yutai 8531
> 
>> Yt8512 is a Generic PHY driver and does not support the configuration of
>> motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.
> 
> Right phy1 of the 1.2a might use a different phy, but I'm also talking
> about phy0 and the v1.3b which does use the yt8531 right?
Right:
v1.3b: gmac0:yt8531   gmac1:yt8531
v1.2a: gmac0:yt8531   gmac1:yt8512
> 
>> And without configuring these two attributes, vf2-1.2a gmac1 also works normally.
> 
> Yes, but what I'm worried about is that it only works because u-boot
> initialises the PHYs and ethernet may stop working if you're using a
> different bootloader or Linux gains support for resetting the PHYs
> before use.
> 
I have tested that in uboot, use the sd card to start Linux, do not run network programs (do not use uboot to initialize phy and gmac),
and the network works normally in Linux.

Best regards,
Samin

>>
>> Best regards,
>> Samin
>>>
>>>> --
>>>> 2.17.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-riscv mailing list
>>>> linux-riscv@lists.infradead.org
>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>> --
>> Best regards,
>> Samin

-- 
Best regards,
Samin

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'

[Rob Herring]

On Fri, Mar 03, 2023 at 04:59:19PM +0800, Samin Guo wrote:
> According to:
> stmmac_platform.c: stmmac_probe_config_dt
> stmmac_main.c: stmmac_dvr_probe

That's not really a reason on its own. Maybe the driver is wrong. Do we 
know what hardware needs this?

> dwmac controller may require one (stmmaceth) or two (stmmaceth+ahb)
> reset signals, and the maxItems of resets/reset-names is going to be 2.
> 
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../devicetree/bindings/net/snps,dwmac.yaml        | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index b4135d5297b4..89099a888f0b 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -133,12 +133,18 @@ properties:
>          - ptp_ref
>  
>    resets:
> -    maxItems: 1
> -    description:
> -      MAC Reset signal.
> +    minItems: 1
> +    items:
> +      - description: GMAC stmmaceth reset
> +      - description: AHB reset
>  
>    reset-names:
> -    const: stmmaceth
> +    minItems: 1
> +    maxItems: 2
> +    contains:

This means 'reset-names = "foo", "ahb";' is valid. You want 'items' 
instead. However, that still allows the below string in any order. Do we 
really need that? If not, then you want:

items:
  - const: stmmaceth
  - const: ahb

> +      enum:
> +        - stmmaceth
> +        - ahb
>  
>    power-domains:
>      maxItems: 1
> -- 
> 2.17.1
> 

Re: [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'

[Rob Herring]

On Fri, Mar 03, 2023 at 04:59:19PM +0800, Samin Guo wrote:
> According to:
> stmmac_platform.c: stmmac_probe_config_dt
> stmmac_main.c: stmmac_dvr_probe

That's not really a reason on its own. Maybe the driver is wrong. Do we 
know what hardware needs this?

> dwmac controller may require one (stmmaceth) or two (stmmaceth+ahb)
> reset signals, and the maxItems of resets/reset-names is going to be 2.
> 
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../devicetree/bindings/net/snps,dwmac.yaml        | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index b4135d5297b4..89099a888f0b 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -133,12 +133,18 @@ properties:
>          - ptp_ref
>  
>    resets:
> -    maxItems: 1
> -    description:
> -      MAC Reset signal.
> +    minItems: 1
> +    items:
> +      - description: GMAC stmmaceth reset
> +      - description: AHB reset
>  
>    reset-names:
> -    const: stmmaceth
> +    minItems: 1
> +    maxItems: 2
> +    contains:

This means 'reset-names = "foo", "ahb";' is valid. You want 'items' 
instead. However, that still allows the below string in any order. Do we 
really need that? If not, then you want:

items:
  - const: stmmaceth
  - const: ahb

> +      enum:
> +        - stmmaceth
> +        - ahb
>  
>    power-domains:
>      maxItems: 1
> -- 
> 2.17.1
> 

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http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac

[Rob Herring]

On Fri, Mar 03, 2023 at 04:59:20PM +0800, Samin Guo wrote:
> From: Yanhong Wang <yanhong.wang@starfivetech.com>
> 
> Add documentation to describe StarFive dwmac driver(GMAC).
> 
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../devicetree/bindings/net/snps,dwmac.yaml   |   1 +
>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 117 ++++++++++++++++++
>  MAINTAINERS                                   |   6 +
>  3 files changed, 124 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 89099a888f0b..395f081161ce 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -91,6 +91,7 @@ properties:
>          - snps,dwmac-5.20
>          - snps,dwxgmac
>          - snps,dwxgmac-2.10
> +        - starfive,jh7110-dwmac
>  
>    reg:
>      minItems: 1
> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> new file mode 100644
> index 000000000000..ca49f08d50dd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> @@ -0,0 +1,117 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2022 StarFive Technology Co., Ltd.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 DWMAC glue layer
> +
> +maintainers:
> +  - Emil Renner Berthing <kernel@esmil.dk>
> +  - Samin Guo <samin.guo@starfivetech.com>
> +
> +select:
> +  properties:
> +    compatible:
> +      contains:
> +        enum:
> +          - starfive,jh7110-dwmac
> +  required:
> +    - compatible
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - starfive,jh7110-dwmac
> +      - const: snps,dwmac-5.20
> +
> +  clocks:
> +    items:
> +      - description: GMAC main clock
> +      - description: GMAC AHB clock
> +      - description: PTP clock
> +      - description: TX clock
> +      - description: GTX clock
> +
> +  clock-names:
> +    items:
> +      - const: stmmaceth
> +      - const: pclk
> +      - const: ptp_ref
> +      - const: tx
> +      - const: gtx
> +
> +  resets:
> +    items:
> +      - description: MAC Reset signal.
> +      - description: AHB Reset signal.
> +
> +  reset-names:
> +    items:
> +      - const: stmmaceth
> +      - const: ahb
> +
> +  starfive,tx-use-rgmii-clk:
> +    description:
> +      Tx clock is provided by external rgmii clock.
> +    type: boolean
> +
> +allOf:
> +  - $ref: snps,dwmac.yaml#
> +
> +unevaluatedProperties: true

This must be false.

> +
> +required:
> +  - compatible
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +
> +examples:
> +  - |
> +    ethernet@16030000 {
> +        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +        reg = <0x16030000 0x10000>;
> +        clocks = <&clk 3>, <&clk 2>, <&clk 109>,
> +                 <&clk 6>, <&clk 111>;
> +        clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                      "tx", "gtx";
> +        resets = <&rst 1>, <&rst 2>;
> +        reset-names = "stmmaceth", "ahb";
> +        interrupts = <7>, <6>, <5>;
> +        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +        phy-mode = "rgmii-id";
> +        snps,multicast-filter-bins = <64>;
> +        snps,perfect-filter-entries = <8>;
> +        rx-fifo-depth = <2048>;
> +        tx-fifo-depth = <2048>;
> +        snps,fixed-burst;
> +        snps,no-pbl-x8;
> +        snps,tso;
> +        snps,force_thresh_dma_mode;
> +        snps,axi-config = <&stmmac_axi_setup>;
> +        snps,en-tx-lpi-clockgating;
> +        snps,txpbl = <16>;
> +        snps,rxpbl = <16>;
> +        phy-handle = <&phy0>;
> +
> +        mdio {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            compatible = "snps,dwmac-mdio";
> +
> +            phy0: ethernet-phy@0 {
> +                reg = <0>;
> +            };
> +        };
> +
> +        stmmac_axi_setup: stmmac-axi-config {
> +            snps,lpi_en;
> +            snps,wr_osr_lmt = <4>;
> +            snps,rd_osr_lmt = <4>;
> +            snps,blen = <256 128 64 32 0 0 0>;
> +        };
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5c67c75a940f..4e236b7c7fd2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19912,6 +19912,12 @@ M:	Emil Renner Berthing <kernel@esmil.dk>
>  S:	Maintained
>  F:	arch/riscv/boot/dts/starfive/
>  
> +STARFIVE DWMAC GLUE LAYER
> +M:	Emil Renner Berthing <kernel@esmil.dk>
> +M:	Samin Guo <samin.guo@starfivetech.com>
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> +
>  STARFIVE JH71X0 CLOCK DRIVERS
>  M:	Emil Renner Berthing <kernel@esmil.dk>
>  M:	Hal Feng <hal.feng@starfivetech.com>
> -- 
> 2.17.1
> 

Re: [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac

[Rob Herring]

On Fri, Mar 03, 2023 at 04:59:20PM +0800, Samin Guo wrote:
> From: Yanhong Wang <yanhong.wang@starfivetech.com>
> 
> Add documentation to describe StarFive dwmac driver(GMAC).
> 
> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../devicetree/bindings/net/snps,dwmac.yaml   |   1 +
>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 117 ++++++++++++++++++
>  MAINTAINERS                                   |   6 +
>  3 files changed, 124 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 89099a888f0b..395f081161ce 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -91,6 +91,7 @@ properties:
>          - snps,dwmac-5.20
>          - snps,dwxgmac
>          - snps,dwxgmac-2.10
> +        - starfive,jh7110-dwmac
>  
>    reg:
>      minItems: 1
> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> new file mode 100644
> index 000000000000..ca49f08d50dd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> @@ -0,0 +1,117 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2022 StarFive Technology Co., Ltd.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 DWMAC glue layer
> +
> +maintainers:
> +  - Emil Renner Berthing <kernel@esmil.dk>
> +  - Samin Guo <samin.guo@starfivetech.com>
> +
> +select:
> +  properties:
> +    compatible:
> +      contains:
> +        enum:
> +          - starfive,jh7110-dwmac
> +  required:
> +    - compatible
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - starfive,jh7110-dwmac
> +      - const: snps,dwmac-5.20
> +
> +  clocks:
> +    items:
> +      - description: GMAC main clock
> +      - description: GMAC AHB clock
> +      - description: PTP clock
> +      - description: TX clock
> +      - description: GTX clock
> +
> +  clock-names:
> +    items:
> +      - const: stmmaceth
> +      - const: pclk
> +      - const: ptp_ref
> +      - const: tx
> +      - const: gtx
> +
> +  resets:
> +    items:
> +      - description: MAC Reset signal.
> +      - description: AHB Reset signal.
> +
> +  reset-names:
> +    items:
> +      - const: stmmaceth
> +      - const: ahb
> +
> +  starfive,tx-use-rgmii-clk:
> +    description:
> +      Tx clock is provided by external rgmii clock.
> +    type: boolean
> +
> +allOf:
> +  - $ref: snps,dwmac.yaml#
> +
> +unevaluatedProperties: true

This must be false.

> +
> +required:
> +  - compatible
> +  - clocks
> +  - clock-names
> +  - resets
> +  - reset-names
> +
> +examples:
> +  - |
> +    ethernet@16030000 {
> +        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
> +        reg = <0x16030000 0x10000>;
> +        clocks = <&clk 3>, <&clk 2>, <&clk 109>,
> +                 <&clk 6>, <&clk 111>;
> +        clock-names = "stmmaceth", "pclk", "ptp_ref",
> +                      "tx", "gtx";
> +        resets = <&rst 1>, <&rst 2>;
> +        reset-names = "stmmaceth", "ahb";
> +        interrupts = <7>, <6>, <5>;
> +        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +        phy-mode = "rgmii-id";
> +        snps,multicast-filter-bins = <64>;
> +        snps,perfect-filter-entries = <8>;
> +        rx-fifo-depth = <2048>;
> +        tx-fifo-depth = <2048>;
> +        snps,fixed-burst;
> +        snps,no-pbl-x8;
> +        snps,tso;
> +        snps,force_thresh_dma_mode;
> +        snps,axi-config = <&stmmac_axi_setup>;
> +        snps,en-tx-lpi-clockgating;
> +        snps,txpbl = <16>;
> +        snps,rxpbl = <16>;
> +        phy-handle = <&phy0>;
> +
> +        mdio {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            compatible = "snps,dwmac-mdio";
> +
> +            phy0: ethernet-phy@0 {
> +                reg = <0>;
> +            };
> +        };
> +
> +        stmmac_axi_setup: stmmac-axi-config {
> +            snps,lpi_en;
> +            snps,wr_osr_lmt = <4>;
> +            snps,rd_osr_lmt = <4>;
> +            snps,blen = <256 128 64 32 0 0 0>;
> +        };
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5c67c75a940f..4e236b7c7fd2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19912,6 +19912,12 @@ M:	Emil Renner Berthing <kernel@esmil.dk>
>  S:	Maintained
>  F:	arch/riscv/boot/dts/starfive/
>  
> +STARFIVE DWMAC GLUE LAYER
> +M:	Emil Renner Berthing <kernel@esmil.dk>
> +M:	Samin Guo <samin.guo@starfivetech.com>
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> +
>  STARFIVE JH71X0 CLOCK DRIVERS
>  M:	Emil Renner Berthing <kernel@esmil.dk>
>  M:	Hal Feng <hal.feng@starfivetech.com>
> -- 
> 2.17.1
> 

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Re: [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon

[Rob Herring]

On Fri, Mar 03, 2023 at 04:59:23PM +0800, Samin Guo wrote:
> A phandle to syscon with two arguments that configure phy mode.

This change belongs in patch 4.

> 
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../bindings/net/starfive,jh7110-dwmac.yaml         | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> index ca49f08d50dd..79ae635db0a5 100644
> --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> @@ -58,6 +58,18 @@ properties:
>        Tx clock is provided by external rgmii clock.
>      type: boolean
>  
> +  starfive,syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    items:
> +      - items:
> +          - description: phandle to syscon that configures phy mode
> +          - description: Offset of phy mode selection
> +          - description: Mask of phy mode selection
> +    description:
> +      A phandle to syscon with two arguments that configure phy mode.
> +      The argument one is the offset of phy mode selection, the
> +      argument two is the mask of phy mode selection.
> +
>  allOf:
>    - $ref: snps,dwmac.yaml#
>  
> @@ -96,6 +108,7 @@ examples:
>          snps,en-tx-lpi-clockgating;
>          snps,txpbl = <16>;
>          snps,rxpbl = <16>;
> +        starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
>          phy-handle = <&phy0>;
>  
>          mdio {
> -- 
> 2.17.1
> 

Re: [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon

[Rob Herring]

On Fri, Mar 03, 2023 at 04:59:23PM +0800, Samin Guo wrote:
> A phandle to syscon with two arguments that configure phy mode.

This change belongs in patch 4.

> 
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  .../bindings/net/starfive,jh7110-dwmac.yaml         | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> index ca49f08d50dd..79ae635db0a5 100644
> --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> @@ -58,6 +58,18 @@ properties:
>        Tx clock is provided by external rgmii clock.
>      type: boolean
>  
> +  starfive,syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    items:
> +      - items:
> +          - description: phandle to syscon that configures phy mode
> +          - description: Offset of phy mode selection
> +          - description: Mask of phy mode selection
> +    description:
> +      A phandle to syscon with two arguments that configure phy mode.
> +      The argument one is the offset of phy mode selection, the
> +      argument two is the mask of phy mode selection.
> +
>  allOf:
>    - $ref: snps,dwmac.yaml#
>  
> @@ -96,6 +108,7 @@ examples:
>          snps,en-tx-lpi-clockgating;
>          snps,txpbl = <16>;
>          snps,rxpbl = <16>;
> +        starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
>          phy-handle = <&phy0>;
>  
>          mdio {
> -- 
> 2.17.1
> 

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Re: [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon
From: Rob Herring <robh@kernel.org>

> On Fri, Mar 03, 2023 at 04:59:23PM +0800, Samin Guo wrote:
>> A phandle to syscon with two arguments that configure phy mode.
> 
> This change belongs in patch 4.
> 
Thank you for pointing out that the next version will be merged into patch4


Best regards,
Samin

>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../bindings/net/starfive,jh7110-dwmac.yaml         | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> index ca49f08d50dd..79ae635db0a5 100644
>> --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> @@ -58,6 +58,18 @@ properties:
>>        Tx clock is provided by external rgmii clock.
>>      type: boolean
>>  
>> +  starfive,syscon:
>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>> +    items:
>> +      - items:
>> +          - description: phandle to syscon that configures phy mode
>> +          - description: Offset of phy mode selection
>> +          - description: Mask of phy mode selection
>> +    description:
>> +      A phandle to syscon with two arguments that configure phy mode.
>> +      The argument one is the offset of phy mode selection, the
>> +      argument two is the mask of phy mode selection.
>> +
>>  allOf:
>>    - $ref: snps,dwmac.yaml#
>>  
>> @@ -96,6 +108,7 @@ examples:
>>          snps,en-tx-lpi-clockgating;
>>          snps,txpbl = <16>;
>>          snps,rxpbl = <16>;
>> +        starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
>>          phy-handle = <&phy0>;
>>  
>>          mdio {
>> -- 
>> 2.17.1
>>

Re: [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 07/12] dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon
From: Rob Herring <robh@kernel.org>

> On Fri, Mar 03, 2023 at 04:59:23PM +0800, Samin Guo wrote:
>> A phandle to syscon with two arguments that configure phy mode.
> 
> This change belongs in patch 4.
> 
Thank you for pointing out that the next version will be merged into patch4


Best regards,
Samin

>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../bindings/net/starfive,jh7110-dwmac.yaml         | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> index ca49f08d50dd..79ae635db0a5 100644
>> --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> @@ -58,6 +58,18 @@ properties:
>>        Tx clock is provided by external rgmii clock.
>>      type: boolean
>>  
>> +  starfive,syscon:
>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>> +    items:
>> +      - items:
>> +          - description: phandle to syscon that configures phy mode
>> +          - description: Offset of phy mode selection
>> +          - description: Mask of phy mode selection
>> +    description:
>> +      A phandle to syscon with two arguments that configure phy mode.
>> +      The argument one is the offset of phy mode selection, the
>> +      argument two is the mask of phy mode selection.
>> +
>>  allOf:
>>    - $ref: snps,dwmac.yaml#
>>  
>> @@ -96,6 +108,7 @@ examples:
>>          snps,en-tx-lpi-clockgating;
>>          snps,txpbl = <16>;
>>          snps,rxpbl = <16>;
>> +        starfive,syscon = <&aon_syscon 0xc 0x1c0000>;
>>          phy-handle = <&phy0>;
>>  
>>          mdio {
>> -- 
>> 2.17.1
>>


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Re: [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac

[Guo Samin]

-------- 原始信息 --------
Re: [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac
From: Rob Herring <robh@kernel.org>


> On Fri, Mar 03, 2023 at 04:59:20PM +0800, Samin Guo wrote:
>> From: Yanhong Wang <yanhong.wang@starfivetech.com>
>>
>> Add documentation to describe StarFive dwmac driver(GMAC).
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../devicetree/bindings/net/snps,dwmac.yaml   |   1 +
>>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 117 ++++++++++++++++++
>>  MAINTAINERS                                   |   6 +
>>  3 files changed, 124 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> index 89099a888f0b..395f081161ce 100644
>> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> @@ -91,6 +91,7 @@ properties:
>>          - snps,dwmac-5.20
>>          - snps,dwxgmac
>>          - snps,dwxgmac-2.10
>> +        - starfive,jh7110-dwmac
>>  
>>    reg:
>>      minItems: 1
>> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> new file mode 100644
>> index 000000000000..ca49f08d50dd
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> @@ -0,0 +1,117 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +# Copyright (C) 2022 StarFive Technology Co., Ltd.
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 DWMAC glue layer
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@esmil.dk>
>> +  - Samin Guo <samin.guo@starfivetech.com>
>> +
>> +select:
>> +  properties:
>> +    compatible:
>> +      contains:
>> +        enum:
>> +          - starfive,jh7110-dwmac
>> +  required:
>> +    - compatible
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +          - starfive,jh7110-dwmac
>> +      - const: snps,dwmac-5.20
>> +
>> +  clocks:
>> +    items:
>> +      - description: GMAC main clock
>> +      - description: GMAC AHB clock
>> +      - description: PTP clock
>> +      - description: TX clock
>> +      - description: GTX clock
>> +
>> +  clock-names:
>> +    items:
>> +      - const: stmmaceth
>> +      - const: pclk
>> +      - const: ptp_ref
>> +      - const: tx
>> +      - const: gtx
>> +
>> +  resets:
>> +    items:
>> +      - description: MAC Reset signal.
>> +      - description: AHB Reset signal.
>> +
>> +  reset-names:
>> +    items:
>> +      - const: stmmaceth
>> +      - const: ahb
>> +
>> +  starfive,tx-use-rgmii-clk:
>> +    description:
>> +      Tx clock is provided by external rgmii clock.
>> +    type: boolean
>> +
>> +allOf:
>> +  - $ref: snps,dwmac.yaml#
>> +
>> +unevaluatedProperties: true
> 
> This must be false.
> 
Thanks, will fix net version.
>> +
>> +required:
>> +  - compatible
>> +  - clocks
>> +  - clock-names
>> +  - resets
>> +  - reset-names
>> +
>> +examples:
>> +  - |
>> +    ethernet@16030000 {
>> +        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +        reg = <0x16030000 0x10000>;
>> +        clocks = <&clk 3>, <&clk 2>, <&clk 109>,
>> +                 <&clk 6>, <&clk 111>;
>> +        clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +                      "tx", "gtx";
>> +        resets = <&rst 1>, <&rst 2>;
>> +        reset-names = "stmmaceth", "ahb";
>> +        interrupts = <7>, <6>, <5>;
>> +        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +        phy-mode = "rgmii-id";
>> +        snps,multicast-filter-bins = <64>;
>> +        snps,perfect-filter-entries = <8>;
>> +        rx-fifo-depth = <2048>;
>> +        tx-fifo-depth = <2048>;
>> +        snps,fixed-burst;
>> +        snps,no-pbl-x8;
>> +        snps,tso;
>> +        snps,force_thresh_dma_mode;
>> +        snps,axi-config = <&stmmac_axi_setup>;
>> +        snps,en-tx-lpi-clockgating;
>> +        snps,txpbl = <16>;
>> +        snps,rxpbl = <16>;
>> +        phy-handle = <&phy0>;
>> +
>> +        mdio {
>> +            #address-cells = <1>;
>> +            #size-cells = <0>;
>> +            compatible = "snps,dwmac-mdio";
>> +
>> +            phy0: ethernet-phy@0 {
>> +                reg = <0>;
>> +            };
>> +        };
>> +
>> +        stmmac_axi_setup: stmmac-axi-config {
>> +            snps,lpi_en;
>> +            snps,wr_osr_lmt = <4>;
>> +            snps,rd_osr_lmt = <4>;
>> +            snps,blen = <256 128 64 32 0 0 0>;
>> +        };
>> +    };
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 5c67c75a940f..4e236b7c7fd2 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19912,6 +19912,12 @@ M:	Emil Renner Berthing <kernel@esmil.dk>
>>  S:	Maintained
>>  F:	arch/riscv/boot/dts/starfive/
>>  
>> +STARFIVE DWMAC GLUE LAYER
>> +M:	Emil Renner Berthing <kernel@esmil.dk>
>> +M:	Samin Guo <samin.guo@starfivetech.com>
>> +S:	Maintained
>> +F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> +
>>  STARFIVE JH71X0 CLOCK DRIVERS
>>  M:	Emil Renner Berthing <kernel@esmil.dk>
>>  M:	Hal Feng <hal.feng@starfivetech.com>
>> -- 
>> 2.17.1
>>

-- 
Best regards,
Samin

Re: [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac

[Guo Samin]

-------- 原始信息 --------
Re: [PATCH v5 04/12] dt-bindings: net: Add support StarFive dwmac
From: Rob Herring <robh@kernel.org>


> On Fri, Mar 03, 2023 at 04:59:20PM +0800, Samin Guo wrote:
>> From: Yanhong Wang <yanhong.wang@starfivetech.com>
>>
>> Add documentation to describe StarFive dwmac driver(GMAC).
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../devicetree/bindings/net/snps,dwmac.yaml   |   1 +
>>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 117 ++++++++++++++++++
>>  MAINTAINERS                                   |   6 +
>>  3 files changed, 124 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> index 89099a888f0b..395f081161ce 100644
>> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> @@ -91,6 +91,7 @@ properties:
>>          - snps,dwmac-5.20
>>          - snps,dwxgmac
>>          - snps,dwxgmac-2.10
>> +        - starfive,jh7110-dwmac
>>  
>>    reg:
>>      minItems: 1
>> diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> new file mode 100644
>> index 000000000000..ca49f08d50dd
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> @@ -0,0 +1,117 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +# Copyright (C) 2022 StarFive Technology Co., Ltd.
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 DWMAC glue layer
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@esmil.dk>
>> +  - Samin Guo <samin.guo@starfivetech.com>
>> +
>> +select:
>> +  properties:
>> +    compatible:
>> +      contains:
>> +        enum:
>> +          - starfive,jh7110-dwmac
>> +  required:
>> +    - compatible
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +          - starfive,jh7110-dwmac
>> +      - const: snps,dwmac-5.20
>> +
>> +  clocks:
>> +    items:
>> +      - description: GMAC main clock
>> +      - description: GMAC AHB clock
>> +      - description: PTP clock
>> +      - description: TX clock
>> +      - description: GTX clock
>> +
>> +  clock-names:
>> +    items:
>> +      - const: stmmaceth
>> +      - const: pclk
>> +      - const: ptp_ref
>> +      - const: tx
>> +      - const: gtx
>> +
>> +  resets:
>> +    items:
>> +      - description: MAC Reset signal.
>> +      - description: AHB Reset signal.
>> +
>> +  reset-names:
>> +    items:
>> +      - const: stmmaceth
>> +      - const: ahb
>> +
>> +  starfive,tx-use-rgmii-clk:
>> +    description:
>> +      Tx clock is provided by external rgmii clock.
>> +    type: boolean
>> +
>> +allOf:
>> +  - $ref: snps,dwmac.yaml#
>> +
>> +unevaluatedProperties: true
> 
> This must be false.
> 
Thanks, will fix net version.
>> +
>> +required:
>> +  - compatible
>> +  - clocks
>> +  - clock-names
>> +  - resets
>> +  - reset-names
>> +
>> +examples:
>> +  - |
>> +    ethernet@16030000 {
>> +        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
>> +        reg = <0x16030000 0x10000>;
>> +        clocks = <&clk 3>, <&clk 2>, <&clk 109>,
>> +                 <&clk 6>, <&clk 111>;
>> +        clock-names = "stmmaceth", "pclk", "ptp_ref",
>> +                      "tx", "gtx";
>> +        resets = <&rst 1>, <&rst 2>;
>> +        reset-names = "stmmaceth", "ahb";
>> +        interrupts = <7>, <6>, <5>;
>> +        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
>> +        phy-mode = "rgmii-id";
>> +        snps,multicast-filter-bins = <64>;
>> +        snps,perfect-filter-entries = <8>;
>> +        rx-fifo-depth = <2048>;
>> +        tx-fifo-depth = <2048>;
>> +        snps,fixed-burst;
>> +        snps,no-pbl-x8;
>> +        snps,tso;
>> +        snps,force_thresh_dma_mode;
>> +        snps,axi-config = <&stmmac_axi_setup>;
>> +        snps,en-tx-lpi-clockgating;
>> +        snps,txpbl = <16>;
>> +        snps,rxpbl = <16>;
>> +        phy-handle = <&phy0>;
>> +
>> +        mdio {
>> +            #address-cells = <1>;
>> +            #size-cells = <0>;
>> +            compatible = "snps,dwmac-mdio";
>> +
>> +            phy0: ethernet-phy@0 {
>> +                reg = <0>;
>> +            };
>> +        };
>> +
>> +        stmmac_axi_setup: stmmac-axi-config {
>> +            snps,lpi_en;
>> +            snps,wr_osr_lmt = <4>;
>> +            snps,rd_osr_lmt = <4>;
>> +            snps,blen = <256 128 64 32 0 0 0>;
>> +        };
>> +    };
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 5c67c75a940f..4e236b7c7fd2 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19912,6 +19912,12 @@ M:	Emil Renner Berthing <kernel@esmil.dk>
>>  S:	Maintained
>>  F:	arch/riscv/boot/dts/starfive/
>>  
>> +STARFIVE DWMAC GLUE LAYER
>> +M:	Emil Renner Berthing <kernel@esmil.dk>
>> +M:	Samin Guo <samin.guo@starfivetech.com>
>> +S:	Maintained
>> +F:	Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>> +
>>  STARFIVE JH71X0 CLOCK DRIVERS
>>  M:	Emil Renner Berthing <kernel@esmil.dk>
>>  M:	Hal Feng <hal.feng@starfivetech.com>
>> -- 
>> 2.17.1
>>

-- 
Best regards,
Samin

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Re: [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'

[Guo Samin]

Re: [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'
From: Rob Herring <robh@kernel.org>

> On Fri, Mar 03, 2023 at 04:59:19PM +0800, Samin Guo wrote:
>> According to:
>> stmmac_platform.c: stmmac_probe_config_dt
>> stmmac_main.c: stmmac_dvr_probe
> 
> That's not really a reason on its own. Maybe the driver is wrong. Do we 
> know what hardware needs this?
> 
Hi Rob, Starfive JH7110 SOC must have two resets (stmmaceth+ahb), it uses snps,dwmac-5.20 IP.

Best regards,
Samin
>> dwmac controller may require one (stmmaceth) or two (stmmaceth+ahb)
>> reset signals, and the maxItems of resets/reset-names is going to be 2.
>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../devicetree/bindings/net/snps,dwmac.yaml        | 14 ++++++++++----
>>  1 file changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> index b4135d5297b4..89099a888f0b 100644
>> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> @@ -133,12 +133,18 @@ properties:
>>          - ptp_ref
>>  
>>    resets:
>> -    maxItems: 1
>> -    description:
>> -      MAC Reset signal.
>> +    minItems: 1
>> +    items:
>> +      - description: GMAC stmmaceth reset
>> +      - description: AHB reset
>>  
>>    reset-names:
>> -    const: stmmaceth
>> +    minItems: 1
>> +    maxItems: 2
>> +    contains:
> 
> This means 'reset-names = "foo", "ahb";' is valid. You want 'items' 
> instead. However, that still allows the below string in any order. Do we 
> really need that? If not, then you want:
> 
> items:
>   - const: stmmaceth
>   - const: ahb
> 
Thank you for your guidance. It will be better to modify it in this way, I will fix it in next version.

Best regards,
Samin
>> +      enum:
>> +        - stmmaceth
>> +        - ahb
>>  
>>    power-domains:
>>      maxItems: 1
>> -- 
>> 2.17.1
>>

Re: [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'

[Guo Samin]

Re: [PATCH v5 03/12] dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'
From: Rob Herring <robh@kernel.org>

> On Fri, Mar 03, 2023 at 04:59:19PM +0800, Samin Guo wrote:
>> According to:
>> stmmac_platform.c: stmmac_probe_config_dt
>> stmmac_main.c: stmmac_dvr_probe
> 
> That's not really a reason on its own. Maybe the driver is wrong. Do we 
> know what hardware needs this?
> 
Hi Rob, Starfive JH7110 SOC must have two resets (stmmaceth+ahb), it uses snps,dwmac-5.20 IP.

Best regards,
Samin
>> dwmac controller may require one (stmmaceth) or two (stmmaceth+ahb)
>> reset signals, and the maxItems of resets/reset-names is going to be 2.
>>
>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>> ---
>>  .../devicetree/bindings/net/snps,dwmac.yaml        | 14 ++++++++++----
>>  1 file changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> index b4135d5297b4..89099a888f0b 100644
>> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> @@ -133,12 +133,18 @@ properties:
>>          - ptp_ref
>>  
>>    resets:
>> -    maxItems: 1
>> -    description:
>> -      MAC Reset signal.
>> +    minItems: 1
>> +    items:
>> +      - description: GMAC stmmaceth reset
>> +      - description: AHB reset
>>  
>>    reset-names:
>> -    const: stmmaceth
>> +    minItems: 1
>> +    maxItems: 2
>> +    contains:
> 
> This means 'reset-names = "foo", "ahb";' is valid. You want 'items' 
> instead. However, that still allows the below string in any order. Do we 
> really need that? If not, then you want:
> 
> items:
>   - const: stmmaceth
>   - const: ahb
> 
Thank you for your guidance. It will be better to modify it in this way, I will fix it in next version.

Best regards,
Samin
>> +      enum:
>> +        - stmmaceth
>> +        - ahb
>>  
>>    power-domains:
>>      maxItems: 1
>> -- 
>> 2.17.1
>>


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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>
> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>
> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  MAINTAINERS                                   |   1 +
>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>  4 files changed, 139 insertions(+)
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4e236b7c7fd2..91a4f190c827 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>  M:     Emil Renner Berthing <kernel@esmil.dk>
>  M:     Samin Guo <samin.guo@starfivetech.com>
>  S:     Maintained
> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>
>  STARFIVE JH71X0 CLOCK DRIVERS
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index f77511fe4e87..47fbccef9d04 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>           for the stmmac device driver. This driver is used for
>           arria5 and cyclone5 FPGA SoCs.
>
> +config DWMAC_STARFIVE
> +       tristate "StarFive dwmac support"
> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> +       depends on STMMAC_ETH
> +       default ARCH_STARFIVE
> +       help
> +         Support for ethernet controllers on StarFive RISC-V SoCs
> +
> +         This selects the StarFive platform specific glue layer support for
> +         the stmmac device driver. This driver is used for StarFive JH7110
> +         ethernet controller.
> +
>  config DWMAC_STI
>         tristate "STi GMAC support"
>         default ARCH_STI
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 057e4bab5c08..8738fdbb4b2d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> new file mode 100644
> index 000000000000..566378306f67
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive DWMAC platform driver
> + *
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> + *
> + */
> +
> +#include <linux/of_device.h>
> +
> +#include "stmmac_platform.h"
> +
> +struct starfive_dwmac {
> +       struct device *dev;
> +       struct clk *clk_tx;
> +       struct clk *clk_gtx;
> +       bool tx_use_rgmii_rxin_clk;
> +};
> +
> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> +{
> +       struct starfive_dwmac *dwmac = priv;
> +       unsigned long rate;
> +       int err;
> +
> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> +        * which needs to match the corresponding clock frequency according
> +        * to different speeds. If the rgmii_tx clock is provided by the
> +        * external rgmii_rxin, there is no need to configure the clock
> +        * internally, because rgmii_rxin will be adaptively adjusted.
> +        */
> +       if (dwmac->tx_use_rgmii_rxin_clk)
> +               return;
> +
> +       switch (speed) {
> +       case SPEED_1000:
> +               rate = 125000000;
> +               break;
> +       case SPEED_100:
> +               rate = 25000000;
> +               break;
> +       case SPEED_10:
> +               rate = 2500000;
> +               break;
> +       default:
> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> +               break;
> +       }
> +
> +       err = clk_set_rate(dwmac->clk_tx, rate);

Hi Samin,

I tried exercising this code by forcing the interface to downgrade
from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
seem to work. The reason is that clk_tx is a mux, and when you call
clk_set_rate it will try to find the parent with the closest clock
rate instead of adjusting the current parent as is needed here.
However that is easily fixed by calling clk_set_rate on clk_gtx which
is just a gate that *will* propagate the rate change to the parent.

With this change, this piece of code and downgrading from 1000Mbps to
100Mbps works on the JH7100. However on the JH7110 there is a second
problem. The parent of clk_gtx, confusingly called
clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
clock and divides it by some integer. But according to [1] it can at
most divide by 15 which is not enough to generate the 25MHz clock
needed for 100Mbps. So now I wonder how this is supposed to work on
the JH7110.

[1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb

> +       if (err)
> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> +}
> +
> +static int starfive_dwmac_probe(struct platform_device *pdev)
> +{
> +       struct plat_stmmacenet_data *plat_dat;
> +       struct stmmac_resources stmmac_res;
> +       struct starfive_dwmac *dwmac;
> +       int err;
> +
> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> +       if (err)
> +               return err;
> +
> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> +       if (IS_ERR(plat_dat)) {
> +               dev_err(&pdev->dev, "dt configuration failed\n");
> +               return PTR_ERR(plat_dat);
> +       }
> +
> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> +       if (!dwmac)
> +               return -ENOMEM;
> +
> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> +       if (IS_ERR(dwmac->clk_tx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> +                                   "error getting tx clock\n");
> +
> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> +       if (IS_ERR(dwmac->clk_gtx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> +                                   "error getting gtx clock\n");
> +
> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> +               dwmac->tx_use_rgmii_rxin_clk = true;
> +
> +       dwmac->dev = &pdev->dev;
> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> +       plat_dat->init = NULL;
> +       plat_dat->bsp_priv = dwmac;
> +       plat_dat->dma_cfg->dche = true;
> +
> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> +       if (err) {
> +               stmmac_remove_config_dt(pdev, plat_dat);
> +               return err;
> +       }
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id starfive_dwmac_match[] = {
> +       { .compatible = "starfive,jh7110-dwmac" },
> +       { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> +
> +static struct platform_driver starfive_dwmac_driver = {
> +       .probe  = starfive_dwmac_probe,
> +       .remove = stmmac_pltfr_remove,
> +       .driver = {
> +               .name = "starfive-dwmac",
> +               .pm = &stmmac_pltfr_pm_ops,
> +               .of_match_table = starfive_dwmac_match,
> +       },
> +};
> +module_platform_driver(starfive_dwmac_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> --
> 2.17.1
>
>
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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>
> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>
> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> ---
>  MAINTAINERS                                   |   1 +
>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>  4 files changed, 139 insertions(+)
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4e236b7c7fd2..91a4f190c827 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>  M:     Emil Renner Berthing <kernel@esmil.dk>
>  M:     Samin Guo <samin.guo@starfivetech.com>
>  S:     Maintained
> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>
>  STARFIVE JH71X0 CLOCK DRIVERS
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index f77511fe4e87..47fbccef9d04 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>           for the stmmac device driver. This driver is used for
>           arria5 and cyclone5 FPGA SoCs.
>
> +config DWMAC_STARFIVE
> +       tristate "StarFive dwmac support"
> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> +       depends on STMMAC_ETH
> +       default ARCH_STARFIVE
> +       help
> +         Support for ethernet controllers on StarFive RISC-V SoCs
> +
> +         This selects the StarFive platform specific glue layer support for
> +         the stmmac device driver. This driver is used for StarFive JH7110
> +         ethernet controller.
> +
>  config DWMAC_STI
>         tristate "STi GMAC support"
>         default ARCH_STI
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 057e4bab5c08..8738fdbb4b2d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> new file mode 100644
> index 000000000000..566378306f67
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * StarFive DWMAC platform driver
> + *
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> + *
> + */
> +
> +#include <linux/of_device.h>
> +
> +#include "stmmac_platform.h"
> +
> +struct starfive_dwmac {
> +       struct device *dev;
> +       struct clk *clk_tx;
> +       struct clk *clk_gtx;
> +       bool tx_use_rgmii_rxin_clk;
> +};
> +
> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> +{
> +       struct starfive_dwmac *dwmac = priv;
> +       unsigned long rate;
> +       int err;
> +
> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> +        * which needs to match the corresponding clock frequency according
> +        * to different speeds. If the rgmii_tx clock is provided by the
> +        * external rgmii_rxin, there is no need to configure the clock
> +        * internally, because rgmii_rxin will be adaptively adjusted.
> +        */
> +       if (dwmac->tx_use_rgmii_rxin_clk)
> +               return;
> +
> +       switch (speed) {
> +       case SPEED_1000:
> +               rate = 125000000;
> +               break;
> +       case SPEED_100:
> +               rate = 25000000;
> +               break;
> +       case SPEED_10:
> +               rate = 2500000;
> +               break;
> +       default:
> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> +               break;
> +       }
> +
> +       err = clk_set_rate(dwmac->clk_tx, rate);

Hi Samin,

I tried exercising this code by forcing the interface to downgrade
from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
seem to work. The reason is that clk_tx is a mux, and when you call
clk_set_rate it will try to find the parent with the closest clock
rate instead of adjusting the current parent as is needed here.
However that is easily fixed by calling clk_set_rate on clk_gtx which
is just a gate that *will* propagate the rate change to the parent.

With this change, this piece of code and downgrading from 1000Mbps to
100Mbps works on the JH7100. However on the JH7110 there is a second
problem. The parent of clk_gtx, confusingly called
clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
clock and divides it by some integer. But according to [1] it can at
most divide by 15 which is not enough to generate the 25MHz clock
needed for 100Mbps. So now I wonder how this is supposed to work on
the JH7110.

[1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb

> +       if (err)
> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> +}
> +
> +static int starfive_dwmac_probe(struct platform_device *pdev)
> +{
> +       struct plat_stmmacenet_data *plat_dat;
> +       struct stmmac_resources stmmac_res;
> +       struct starfive_dwmac *dwmac;
> +       int err;
> +
> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> +       if (err)
> +               return err;
> +
> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> +       if (IS_ERR(plat_dat)) {
> +               dev_err(&pdev->dev, "dt configuration failed\n");
> +               return PTR_ERR(plat_dat);
> +       }
> +
> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> +       if (!dwmac)
> +               return -ENOMEM;
> +
> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> +       if (IS_ERR(dwmac->clk_tx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> +                                   "error getting tx clock\n");
> +
> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> +       if (IS_ERR(dwmac->clk_gtx))
> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> +                                   "error getting gtx clock\n");
> +
> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> +               dwmac->tx_use_rgmii_rxin_clk = true;
> +
> +       dwmac->dev = &pdev->dev;
> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> +       plat_dat->init = NULL;
> +       plat_dat->bsp_priv = dwmac;
> +       plat_dat->dma_cfg->dche = true;
> +
> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> +       if (err) {
> +               stmmac_remove_config_dt(pdev, plat_dat);
> +               return err;
> +       }
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id starfive_dwmac_match[] = {
> +       { .compatible = "starfive,jh7110-dwmac" },
> +       { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> +
> +static struct platform_driver starfive_dwmac_driver = {
> +       .probe  = starfive_dwmac_probe,
> +       .remove = stmmac_pltfr_remove,
> +       .driver = {
> +               .name = "starfive-dwmac",
> +               .pm = &stmmac_pltfr_pm_ops,
> +               .of_match_table = starfive_dwmac_match,
> +       },
> +};
> +module_platform_driver(starfive_dwmac_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> --
> 2.17.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

_______________________________________________
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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
<emil.renner.berthing@canonical.com> wrote:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >
> > This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
> >
> > Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> > Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> > ---
> >  MAINTAINERS                                   |   1 +
> >  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
> >  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
> >  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
> >  4 files changed, 139 insertions(+)
> >  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 4e236b7c7fd2..91a4f190c827 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
> >  M:     Emil Renner Berthing <kernel@esmil.dk>
> >  M:     Samin Guo <samin.guo@starfivetech.com>
> >  S:     Maintained
> > +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
> >  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> >
> >  STARFIVE JH71X0 CLOCK DRIVERS
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> > index f77511fe4e87..47fbccef9d04 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> > +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> > @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
> >           for the stmmac device driver. This driver is used for
> >           arria5 and cyclone5 FPGA SoCs.
> >
> > +config DWMAC_STARFIVE
> > +       tristate "StarFive dwmac support"
> > +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> > +       depends on STMMAC_ETH
> > +       default ARCH_STARFIVE
> > +       help
> > +         Support for ethernet controllers on StarFive RISC-V SoCs
> > +
> > +         This selects the StarFive platform specific glue layer support for
> > +         the stmmac device driver. This driver is used for StarFive JH7110
> > +         ethernet controller.
> > +
> >  config DWMAC_STI
> >         tristate "STi GMAC support"
> >         default ARCH_STI
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> > index 057e4bab5c08..8738fdbb4b2d 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> > +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> > @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
> >  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
> >  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
> >  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> > +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
> >  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
> >  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
> >  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> > new file mode 100644
> > index 000000000000..566378306f67
> > --- /dev/null
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> > @@ -0,0 +1,125 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * StarFive DWMAC platform driver
> > + *
> > + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> > + *
> > + */
> > +
> > +#include <linux/of_device.h>
> > +
> > +#include "stmmac_platform.h"
> > +
> > +struct starfive_dwmac {
> > +       struct device *dev;
> > +       struct clk *clk_tx;
> > +       struct clk *clk_gtx;
> > +       bool tx_use_rgmii_rxin_clk;
> > +};
> > +
> > +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> > +{
> > +       struct starfive_dwmac *dwmac = priv;
> > +       unsigned long rate;
> > +       int err;
> > +
> > +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> > +        * which needs to match the corresponding clock frequency according
> > +        * to different speeds. If the rgmii_tx clock is provided by the
> > +        * external rgmii_rxin, there is no need to configure the clock
> > +        * internally, because rgmii_rxin will be adaptively adjusted.
> > +        */
> > +       if (dwmac->tx_use_rgmii_rxin_clk)
> > +               return;
> > +
> > +       switch (speed) {
> > +       case SPEED_1000:
> > +               rate = 125000000;
> > +               break;
> > +       case SPEED_100:
> > +               rate = 25000000;
> > +               break;
> > +       case SPEED_10:
> > +               rate = 2500000;
> > +               break;
> > +       default:
> > +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> > +               break;
> > +       }
> > +
> > +       err = clk_set_rate(dwmac->clk_tx, rate);
>
> Hi Samin,
>
> I tried exercising this code by forcing the interface to downgrade
> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
> seem to work. The reason is that clk_tx is a mux, and when you call
> clk_set_rate it will try to find the parent with the closest clock
> rate instead of adjusting the current parent as is needed here.
> However that is easily fixed by calling clk_set_rate on clk_gtx which
> is just a gate that *will* propagate the rate change to the parent.
>
> With this change, this piece of code and downgrading from 1000Mbps to
> 100Mbps works on the JH7100. However on the JH7110 there is a second
> problem. The parent of clk_gtx, confusingly called
> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
> clock and divides it by some integer. But according to [1] it can at
> most divide by 15 which is not enough to generate the 25MHz clock
> needed for 100Mbps. So now I wonder how this is supposed to work on
> the JH7110.
>
> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb

Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
VisionFive 2 v1.2A, where I think it's a known problem that only
1000Mbps works.
On the 1.3B this function is not used at all, and I guess it also
ought to be skipped for gmac1 of the 1.2A using the rmii interface so
it doesn't risk changing the parent of the tx clock.

> > +       if (err)
> > +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> > +}
> > +
> > +static int starfive_dwmac_probe(struct platform_device *pdev)
> > +{
> > +       struct plat_stmmacenet_data *plat_dat;
> > +       struct stmmac_resources stmmac_res;
> > +       struct starfive_dwmac *dwmac;
> > +       int err;
> > +
> > +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> > +       if (err)
> > +               return err;
> > +
> > +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> > +       if (IS_ERR(plat_dat)) {
> > +               dev_err(&pdev->dev, "dt configuration failed\n");
> > +               return PTR_ERR(plat_dat);
> > +       }
> > +
> > +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> > +       if (!dwmac)
> > +               return -ENOMEM;
> > +
> > +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> > +       if (IS_ERR(dwmac->clk_tx))
> > +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> > +                                   "error getting tx clock\n");
> > +
> > +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> > +       if (IS_ERR(dwmac->clk_gtx))
> > +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> > +                                   "error getting gtx clock\n");
> > +
> > +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> > +               dwmac->tx_use_rgmii_rxin_clk = true;
> > +
> > +       dwmac->dev = &pdev->dev;
> > +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> > +       plat_dat->init = NULL;
> > +       plat_dat->bsp_priv = dwmac;
> > +       plat_dat->dma_cfg->dche = true;
> > +
> > +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> > +       if (err) {
> > +               stmmac_remove_config_dt(pdev, plat_dat);
> > +               return err;
> > +       }
> > +
> > +       return 0;
> > +}
> > +
> > +static const struct of_device_id starfive_dwmac_match[] = {
> > +       { .compatible = "starfive,jh7110-dwmac" },
> > +       { /* sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> > +
> > +static struct platform_driver starfive_dwmac_driver = {
> > +       .probe  = starfive_dwmac_probe,
> > +       .remove = stmmac_pltfr_remove,
> > +       .driver = {
> > +               .name = "starfive-dwmac",
> > +               .pm = &stmmac_pltfr_pm_ops,
> > +               .of_match_table = starfive_dwmac_match,
> > +       },
> > +};
> > +module_platform_driver(starfive_dwmac_driver);
> > +
> > +MODULE_LICENSE("GPL");
> > +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> > +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> > +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> > --
> > 2.17.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
<emil.renner.berthing@canonical.com> wrote:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >
> > This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
> >
> > Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> > Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> > ---
> >  MAINTAINERS                                   |   1 +
> >  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
> >  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
> >  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
> >  4 files changed, 139 insertions(+)
> >  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 4e236b7c7fd2..91a4f190c827 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
> >  M:     Emil Renner Berthing <kernel@esmil.dk>
> >  M:     Samin Guo <samin.guo@starfivetech.com>
> >  S:     Maintained
> > +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
> >  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> >
> >  STARFIVE JH71X0 CLOCK DRIVERS
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> > index f77511fe4e87..47fbccef9d04 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> > +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> > @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
> >           for the stmmac device driver. This driver is used for
> >           arria5 and cyclone5 FPGA SoCs.
> >
> > +config DWMAC_STARFIVE
> > +       tristate "StarFive dwmac support"
> > +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> > +       depends on STMMAC_ETH
> > +       default ARCH_STARFIVE
> > +       help
> > +         Support for ethernet controllers on StarFive RISC-V SoCs
> > +
> > +         This selects the StarFive platform specific glue layer support for
> > +         the stmmac device driver. This driver is used for StarFive JH7110
> > +         ethernet controller.
> > +
> >  config DWMAC_STI
> >         tristate "STi GMAC support"
> >         default ARCH_STI
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> > index 057e4bab5c08..8738fdbb4b2d 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> > +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> > @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
> >  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
> >  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
> >  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> > +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
> >  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
> >  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
> >  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> > new file mode 100644
> > index 000000000000..566378306f67
> > --- /dev/null
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> > @@ -0,0 +1,125 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * StarFive DWMAC platform driver
> > + *
> > + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> > + *
> > + */
> > +
> > +#include <linux/of_device.h>
> > +
> > +#include "stmmac_platform.h"
> > +
> > +struct starfive_dwmac {
> > +       struct device *dev;
> > +       struct clk *clk_tx;
> > +       struct clk *clk_gtx;
> > +       bool tx_use_rgmii_rxin_clk;
> > +};
> > +
> > +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> > +{
> > +       struct starfive_dwmac *dwmac = priv;
> > +       unsigned long rate;
> > +       int err;
> > +
> > +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> > +        * which needs to match the corresponding clock frequency according
> > +        * to different speeds. If the rgmii_tx clock is provided by the
> > +        * external rgmii_rxin, there is no need to configure the clock
> > +        * internally, because rgmii_rxin will be adaptively adjusted.
> > +        */
> > +       if (dwmac->tx_use_rgmii_rxin_clk)
> > +               return;
> > +
> > +       switch (speed) {
> > +       case SPEED_1000:
> > +               rate = 125000000;
> > +               break;
> > +       case SPEED_100:
> > +               rate = 25000000;
> > +               break;
> > +       case SPEED_10:
> > +               rate = 2500000;
> > +               break;
> > +       default:
> > +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> > +               break;
> > +       }
> > +
> > +       err = clk_set_rate(dwmac->clk_tx, rate);
>
> Hi Samin,
>
> I tried exercising this code by forcing the interface to downgrade
> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
> seem to work. The reason is that clk_tx is a mux, and when you call
> clk_set_rate it will try to find the parent with the closest clock
> rate instead of adjusting the current parent as is needed here.
> However that is easily fixed by calling clk_set_rate on clk_gtx which
> is just a gate that *will* propagate the rate change to the parent.
>
> With this change, this piece of code and downgrading from 1000Mbps to
> 100Mbps works on the JH7100. However on the JH7110 there is a second
> problem. The parent of clk_gtx, confusingly called
> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
> clock and divides it by some integer. But according to [1] it can at
> most divide by 15 which is not enough to generate the 25MHz clock
> needed for 100Mbps. So now I wonder how this is supposed to work on
> the JH7110.
>
> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb

Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
VisionFive 2 v1.2A, where I think it's a known problem that only
1000Mbps works.
On the 1.3B this function is not used at all, and I guess it also
ought to be skipped for gmac1 of the 1.2A using the rmii interface so
it doesn't risk changing the parent of the tx clock.

> > +       if (err)
> > +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> > +}
> > +
> > +static int starfive_dwmac_probe(struct platform_device *pdev)
> > +{
> > +       struct plat_stmmacenet_data *plat_dat;
> > +       struct stmmac_resources stmmac_res;
> > +       struct starfive_dwmac *dwmac;
> > +       int err;
> > +
> > +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> > +       if (err)
> > +               return err;
> > +
> > +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> > +       if (IS_ERR(plat_dat)) {
> > +               dev_err(&pdev->dev, "dt configuration failed\n");
> > +               return PTR_ERR(plat_dat);
> > +       }
> > +
> > +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> > +       if (!dwmac)
> > +               return -ENOMEM;
> > +
> > +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> > +       if (IS_ERR(dwmac->clk_tx))
> > +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> > +                                   "error getting tx clock\n");
> > +
> > +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> > +       if (IS_ERR(dwmac->clk_gtx))
> > +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> > +                                   "error getting gtx clock\n");
> > +
> > +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> > +               dwmac->tx_use_rgmii_rxin_clk = true;
> > +
> > +       dwmac->dev = &pdev->dev;
> > +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> > +       plat_dat->init = NULL;
> > +       plat_dat->bsp_priv = dwmac;
> > +       plat_dat->dma_cfg->dche = true;
> > +
> > +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> > +       if (err) {
> > +               stmmac_remove_config_dt(pdev, plat_dat);
> > +               return err;
> > +       }
> > +
> > +       return 0;
> > +}
> > +
> > +static const struct of_device_id starfive_dwmac_match[] = {
> > +       { .compatible = "starfive,jh7110-dwmac" },
> > +       { /* sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> > +
> > +static struct platform_driver starfive_dwmac_driver = {
> > +       .probe  = starfive_dwmac_probe,
> > +       .remove = stmmac_pltfr_remove,
> > +       .driver = {
> > +               .name = "starfive-dwmac",
> > +               .pm = &stmmac_pltfr_pm_ops,
> > +               .of_match_table = starfive_dwmac_match,
> > +       },
> > +};
> > +module_platform_driver(starfive_dwmac_driver);
> > +
> > +MODULE_LICENSE("GPL");
> > +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> > +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> > +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> > --
> > 2.17.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
收件人: Samin Guo <samin.guo@starfivetech.com>
日期: 2023/3/10

> On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
> <emil.renner.berthing@canonical.com> wrote:
>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>
>>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>>
>>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>> ---
>>>  MAINTAINERS                                   |   1 +
>>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>>  4 files changed, 139 insertions(+)
>>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 4e236b7c7fd2..91a4f190c827 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>>  S:     Maintained
>>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>>
>>>  STARFIVE JH71X0 CLOCK DRIVERS
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> index f77511fe4e87..47fbccef9d04 100644
>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>>           for the stmmac device driver. This driver is used for
>>>           arria5 and cyclone5 FPGA SoCs.
>>>
>>> +config DWMAC_STARFIVE
>>> +       tristate "StarFive dwmac support"
>>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
>>> +       depends on STMMAC_ETH
>>> +       default ARCH_STARFIVE
>>> +       help
>>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>>> +
>>> +         This selects the StarFive platform specific glue layer support for
>>> +         the stmmac device driver. This driver is used for StarFive JH7110
>>> +         ethernet controller.
>>> +
>>>  config DWMAC_STI
>>>         tristate "STi GMAC support"
>>>         default ARCH_STI
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>> index 057e4bab5c08..8738fdbb4b2d 100644
>>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>> new file mode 100644
>>> index 000000000000..566378306f67
>>> --- /dev/null
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>> @@ -0,0 +1,125 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * StarFive DWMAC platform driver
>>> + *
>>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
>>> + *
>>> + */
>>> +
>>> +#include <linux/of_device.h>
>>> +
>>> +#include "stmmac_platform.h"
>>> +
>>> +struct starfive_dwmac {
>>> +       struct device *dev;
>>> +       struct clk *clk_tx;
>>> +       struct clk *clk_gtx;
>>> +       bool tx_use_rgmii_rxin_clk;
>>> +};
>>> +
>>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>> +{
>>> +       struct starfive_dwmac *dwmac = priv;
>>> +       unsigned long rate;
>>> +       int err;
>>> +
>>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>>> +        * which needs to match the corresponding clock frequency according
>>> +        * to different speeds. If the rgmii_tx clock is provided by the
>>> +        * external rgmii_rxin, there is no need to configure the clock
>>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>>> +        */
>>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>>> +               return;
>>> +
>>> +       switch (speed) {
>>> +       case SPEED_1000:
>>> +               rate = 125000000;
>>> +               break;
>>> +       case SPEED_100:
>>> +               rate = 25000000;
>>> +               break;
>>> +       case SPEED_10:
>>> +               rate = 2500000;
>>> +               break;
>>> +       default:
>>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>>> +               break;
>>> +       }
>>> +
>>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>>
>> Hi Samin,
>>
>> I tried exercising this code by forcing the interface to downgrade
>> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
>> seem to work. The reason is that clk_tx is a mux, and when you call
>> clk_set_rate it will try to find the parent with the closest clock
>> rate instead of adjusting the current parent as is needed here.
>> However that is easily fixed by calling clk_set_rate on clk_gtx which
>> is just a gate that *will* propagate the rate change to the parent.
>>
>> With this change, this piece of code and downgrading from 1000Mbps to
>> 100Mbps works on the JH7100. However on the JH7110 there is a second
>> problem. The parent of clk_gtx, confusingly called
>> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
>> clock and divides it by some integer. But according to [1] it can at
>> most divide by 15 which is not enough to generate the 25MHz clock
>> needed for 100Mbps. So now I wonder how this is supposed to work on
>> the JH7110.
>>
>> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb
> 
> Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
> VisionFive 2 v1.2A, where I think it's a known problem that only
> 1000Mbps works.
> On the 1.3B this function is not used at all, and I guess it also
> ought to be skipped for gmac1 of the 1.2A using the rmii interface so
> it doesn't risk changing the parent of the tx clock.
> 
Hi Emil,

V1.2A gmac0 only supports 1000M due to known problem, and v1.2A gmac1 supports 100M/10M.
 
V1.2A gmac1 uses a parent clock from gmac1_rmii_rtx, whose parent clock is from external phy clock gmac1_rmii_refin (fixed is 50M). 
The default frequency division value of gmac1_rmii_rtx is 2, so it can work in 100M mode. （clk_tx: 50/2=25M ===> 100M mode）. 
When gmac1 switches to 10M mode, the clock frequency of gmac1_rmii_rtx needs to be modified to 2.5M.
So,if 1.2A gmac1 is skipped the starfive_eth_fix_mac_speed, 10M mode will be unavailable.

	gmac1_rmii_refin（50M) ==> gmac1_rmii_rtx（div 2, by default) ==>  clk_tx (25M)  （100M mode）
	gmac1_rmii_refin（50M）==> gmac1_rmii_rtx（div 20) ==> clk_tx (2.5M)  （10M mode）

Of course, as you mentioned earlier, we need to add gmac1_clk_tx uses CLK_SET_RATE_PARENT flag.


Best regards,
Samin

>>> +       if (err)
>>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>> +}
>>> +
>>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>>> +{
>>> +       struct plat_stmmacenet_data *plat_dat;
>>> +       struct stmmac_resources stmmac_res;
>>> +       struct starfive_dwmac *dwmac;
>>> +       int err;
>>> +
>>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>>> +       if (err)
>>> +               return err;
>>> +
>>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>>> +       if (IS_ERR(plat_dat)) {
>>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>>> +               return PTR_ERR(plat_dat);
>>> +       }
>>> +
>>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>>> +       if (!dwmac)
>>> +               return -ENOMEM;
>>> +
>>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>> +       if (IS_ERR(dwmac->clk_tx))
>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>>> +                                   "error getting tx clock\n");
>>> +
>>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>>> +       if (IS_ERR(dwmac->clk_gtx))
>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>>> +                                   "error getting gtx clock\n");
>>> +
>>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>>> +
>>> +       dwmac->dev = &pdev->dev;
>>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
>>> +       plat_dat->init = NULL;
>>> +       plat_dat->bsp_priv = dwmac;
>>> +       plat_dat->dma_cfg->dche = true;
>>> +
>>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>> +       if (err) {
>>> +               stmmac_remove_config_dt(pdev, plat_dat);
>>> +               return err;
>>> +       }
>>> +
>>> +       return 0;
>>> +}
>>> +
>>> +static const struct of_device_id starfive_dwmac_match[] = {
>>> +       { .compatible = "starfive,jh7110-dwmac" },
>>> +       { /* sentinel */ }
>>> +};
>>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>>> +
>>> +static struct platform_driver starfive_dwmac_driver = {
>>> +       .probe  = starfive_dwmac_probe,
>>> +       .remove = stmmac_pltfr_remove,
>>> +       .driver = {
>>> +               .name = "starfive-dwmac",
>>> +               .pm = &stmmac_pltfr_pm_ops,
>>> +               .of_match_table = starfive_dwmac_match,
>>> +       },
>>> +};
>>> +module_platform_driver(starfive_dwmac_driver);
>>> +
>>> +MODULE_LICENSE("GPL");
>>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>>> --
>>> 2.17.1
>>>
>>>
>>> _______________________________________________
>>> linux-riscv mailing list
>>> linux-riscv@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-riscv

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
收件人: Samin Guo <samin.guo@starfivetech.com>
日期: 2023/3/10

> On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
> <emil.renner.berthing@canonical.com> wrote:
>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>
>>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>>
>>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>> ---
>>>  MAINTAINERS                                   |   1 +
>>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>>  4 files changed, 139 insertions(+)
>>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 4e236b7c7fd2..91a4f190c827 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>>  S:     Maintained
>>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>>
>>>  STARFIVE JH71X0 CLOCK DRIVERS
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> index f77511fe4e87..47fbccef9d04 100644
>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>>           for the stmmac device driver. This driver is used for
>>>           arria5 and cyclone5 FPGA SoCs.
>>>
>>> +config DWMAC_STARFIVE
>>> +       tristate "StarFive dwmac support"
>>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
>>> +       depends on STMMAC_ETH
>>> +       default ARCH_STARFIVE
>>> +       help
>>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>>> +
>>> +         This selects the StarFive platform specific glue layer support for
>>> +         the stmmac device driver. This driver is used for StarFive JH7110
>>> +         ethernet controller.
>>> +
>>>  config DWMAC_STI
>>>         tristate "STi GMAC support"
>>>         default ARCH_STI
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>> index 057e4bab5c08..8738fdbb4b2d 100644
>>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>> new file mode 100644
>>> index 000000000000..566378306f67
>>> --- /dev/null
>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>> @@ -0,0 +1,125 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * StarFive DWMAC platform driver
>>> + *
>>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
>>> + *
>>> + */
>>> +
>>> +#include <linux/of_device.h>
>>> +
>>> +#include "stmmac_platform.h"
>>> +
>>> +struct starfive_dwmac {
>>> +       struct device *dev;
>>> +       struct clk *clk_tx;
>>> +       struct clk *clk_gtx;
>>> +       bool tx_use_rgmii_rxin_clk;
>>> +};
>>> +
>>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>> +{
>>> +       struct starfive_dwmac *dwmac = priv;
>>> +       unsigned long rate;
>>> +       int err;
>>> +
>>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>>> +        * which needs to match the corresponding clock frequency according
>>> +        * to different speeds. If the rgmii_tx clock is provided by the
>>> +        * external rgmii_rxin, there is no need to configure the clock
>>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>>> +        */
>>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>>> +               return;
>>> +
>>> +       switch (speed) {
>>> +       case SPEED_1000:
>>> +               rate = 125000000;
>>> +               break;
>>> +       case SPEED_100:
>>> +               rate = 25000000;
>>> +               break;
>>> +       case SPEED_10:
>>> +               rate = 2500000;
>>> +               break;
>>> +       default:
>>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>>> +               break;
>>> +       }
>>> +
>>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>>
>> Hi Samin,
>>
>> I tried exercising this code by forcing the interface to downgrade
>> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
>> seem to work. The reason is that clk_tx is a mux, and when you call
>> clk_set_rate it will try to find the parent with the closest clock
>> rate instead of adjusting the current parent as is needed here.
>> However that is easily fixed by calling clk_set_rate on clk_gtx which
>> is just a gate that *will* propagate the rate change to the parent.
>>
>> With this change, this piece of code and downgrading from 1000Mbps to
>> 100Mbps works on the JH7100. However on the JH7110 there is a second
>> problem. The parent of clk_gtx, confusingly called
>> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
>> clock and divides it by some integer. But according to [1] it can at
>> most divide by 15 which is not enough to generate the 25MHz clock
>> needed for 100Mbps. So now I wonder how this is supposed to work on
>> the JH7110.
>>
>> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb
> 
> Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
> VisionFive 2 v1.2A, where I think it's a known problem that only
> 1000Mbps works.
> On the 1.3B this function is not used at all, and I guess it also
> ought to be skipped for gmac1 of the 1.2A using the rmii interface so
> it doesn't risk changing the parent of the tx clock.
> 
Hi Emil,

V1.2A gmac0 only supports 1000M due to known problem, and v1.2A gmac1 supports 100M/10M.
 
V1.2A gmac1 uses a parent clock from gmac1_rmii_rtx, whose parent clock is from external phy clock gmac1_rmii_refin (fixed is 50M). 
The default frequency division value of gmac1_rmii_rtx is 2, so it can work in 100M mode. （clk_tx: 50/2=25M ===> 100M mode）. 
When gmac1 switches to 10M mode, the clock frequency of gmac1_rmii_rtx needs to be modified to 2.5M.
So,if 1.2A gmac1 is skipped the starfive_eth_fix_mac_speed, 10M mode will be unavailable.

	gmac1_rmii_refin（50M) ==> gmac1_rmii_rtx（div 2, by default) ==>  clk_tx (25M)  （100M mode）
	gmac1_rmii_refin（50M）==> gmac1_rmii_rtx（div 20) ==> clk_tx (2.5M)  （10M mode）

Of course, as you mentioned earlier, we need to add gmac1_clk_tx uses CLK_SET_RATE_PARENT flag.


Best regards,
Samin

>>> +       if (err)
>>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>> +}
>>> +
>>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>>> +{
>>> +       struct plat_stmmacenet_data *plat_dat;
>>> +       struct stmmac_resources stmmac_res;
>>> +       struct starfive_dwmac *dwmac;
>>> +       int err;
>>> +
>>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>>> +       if (err)
>>> +               return err;
>>> +
>>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>>> +       if (IS_ERR(plat_dat)) {
>>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>>> +               return PTR_ERR(plat_dat);
>>> +       }
>>> +
>>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>>> +       if (!dwmac)
>>> +               return -ENOMEM;
>>> +
>>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>> +       if (IS_ERR(dwmac->clk_tx))
>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>>> +                                   "error getting tx clock\n");
>>> +
>>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>>> +       if (IS_ERR(dwmac->clk_gtx))
>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>>> +                                   "error getting gtx clock\n");
>>> +
>>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>>> +
>>> +       dwmac->dev = &pdev->dev;
>>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
>>> +       plat_dat->init = NULL;
>>> +       plat_dat->bsp_priv = dwmac;
>>> +       plat_dat->dma_cfg->dche = true;
>>> +
>>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>> +       if (err) {
>>> +               stmmac_remove_config_dt(pdev, plat_dat);
>>> +               return err;
>>> +       }
>>> +
>>> +       return 0;
>>> +}
>>> +
>>> +static const struct of_device_id starfive_dwmac_match[] = {
>>> +       { .compatible = "starfive,jh7110-dwmac" },
>>> +       { /* sentinel */ }
>>> +};
>>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>>> +
>>> +static struct platform_driver starfive_dwmac_driver = {
>>> +       .probe  = starfive_dwmac_probe,
>>> +       .remove = stmmac_pltfr_remove,
>>> +       .driver = {
>>> +               .name = "starfive-dwmac",
>>> +               .pm = &stmmac_pltfr_pm_ops,
>>> +               .of_match_table = starfive_dwmac_match,
>>> +       },
>>> +};
>>> +module_platform_driver(starfive_dwmac_driver);
>>> +
>>> +MODULE_LICENSE("GPL");
>>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>>> --
>>> 2.17.1
>>>
>>>
>>> _______________________________________________
>>> linux-riscv mailing list
>>> linux-riscv@lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-riscv



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Re: [PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC

[Tommaso Merciai]

Hello Samin,

On Fri, Mar 03, 2023 at 04:59:16PM +0800, Samin Guo wrote:
> This series adds ethernet support for the StarFive JH7110 RISC-V SoC.
> The series includes MAC driver. The MAC version is dwmac-5.20 (from
> Synopsys DesignWare). For more information and support, you can visit
> RVspace wiki[1].
> 
> You can simply review or test the patches at the link [2].
> 
> This patchset should be applied after the patchset [3], [4], [5].
> [1]: https://wiki.rvspace.org/
> [2]: https://github.com/SaminGuo/linux/tree/vf2-6.2-gmac
> [3]: https://lore.kernel.org/all/20230221024645.127922-1-hal.feng@starfivetech.com/
> [4]: https://lore.kernel.org/all/20230202030037.9075-1-Frank.Sae@motor-comm.com/
> [5]: https://lore.kernel.org/all/20230215113249.47727-5-william.qiu@starfivetech.com/

Thanks for this series.
I'm able to boot Linux over nfs into jh7110-starfive-visionfive-2-v1.3b board

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>

Regards,
Tommaso

> 
> Changes since v4:
> - Supported both visionfive 2 v1.2A and visionfive 2 v1.3B.
> - Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.
> - Suggested by Emil, dropped the _PLAT/_plat from the config/function/struct/file names.
> - Suggested by Emil, added MODULE_DEVICE_TABLE().
> - Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
> - Added phy interface mode configuration function.
> - Rebased on tag v6.2.
> 
> Patch 12:
> - No update
> Patch 11:
> - Configuration of gmac and phy for visionfive 2 v1.2A.
> Patch 10:
> - Configuration of gmac and phy for visionfive 2 v1.3B.
> Patch 9:
> - Added starfive,syscon for gmac nodes in jh7110.dtsi.
> Patch 8:
> - Added starfive_dwmac_set_mode to set PHY interface mode.
> Patch 7:
> - Added starfive,syscon item in StarFive-dwmac dt-bindings.
> Patch 6:
> - Moved SOC_STARFIVE to ARCH_STARFIVE in Kconfig.
> - Dropped the _PLAT/_plat from the config/function/struct names. (by Emil)
> - Added MODULE_DEVICE_TABLE() and udev will load the module automatically. (by Emil)
> - Used { /* sentinel */ } for the last entry of starfive_eth_match. (by Emil)
> - Added 'tx_use_rgmii_rxin_clk' to struct starfive_dwmac, to mark the clk_tx'parent is rgmii.
> - Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
> Patch 5:
> - Suggested by Emil, dropped mdio0/1 labels because there is no reference elsewhere.
> Patch 4:
> - Removed GTXC clk in StarFive-dwmac dt-bindings.
> - Added starfive,tx-use-rgmii-clk item in StarFive-dwmac dt-bindings.
> Patch 3:
> - Added an optional reset single 'ahb' in 'snps,dwmac.yaml', according to
>   stmmac_probe_config_dt/stmmac_dvr_probe.
> Patch 2:
> - No update
> Patch 1:
> - No update
> 
> Changes since v3:
> - Reworded the maxitems number of resets property in 'snps,dwmac.yaml'
> - Removed the unused code in 'dwmac-starfive-plat.c'.
> - Reworded the return statement in 'starfive_eth_plat_fix_mac_speed' function.
> 
> Changes since v2:
> - Renamed the dt-bindings 'starfive,jh71x0-dwmac.yaml' to 'starfive,jh7110-dwmac.yaml'.
> - Reworded the commit messages.
> - Reworded the example context in the dt-binding 'starfive,jh7110-dwmac.yaml'.
> - Removed "starfive,jh7100-dwmac" compatible string and special initialization of jh7100.
> - Removed the parts of YT8531,so dropped patch 5 and 6.
> - Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.
> 
> Changes since v1:
> - Recovered the author of the 1st and 3rd patches back to Emil Renner Berthing.
> - Added a new patch to update maxitems number of resets property in 'snps,dwmac.yaml'.
> - Fixed the check errors reported by "make dt_binding_check".
> - Renamed the dt-binding 'starfive,dwmac-plat.yaml' to 'starfive,jh71x0-dwmac.yaml'.
> - Updated the example context in the dt-binding 'starfive,jh71x0-dwmac.yaml'.
> - Added new dt-binding 'motorcomm,yt8531.yaml' to describe details of phy clock
>   delay configuration parameters.
> - Added more comments for PHY driver setting. For more details, see
>   'motorcomm,yt8531.yaml'.
> - Moved mdio device tree node from 'jh7110-starfive-visionfive-v2.dts' to 'jh7110.dtsi'.
> - Re-worded the commit message of several patches.
> - Renamed all the functions with starfive_eth_plat prefix in 'dwmac-starfive-plat.c'.
> - Added "starfive,jh7100-dwmac" compatible string and special init to support JH7100.
> 
> Previous versions:
> v1 - https://patchwork.kernel.org/project/linux-riscv/cover/20221201090242.2381-1-yanhong.wang@starfivetech.com/
> v2 - https://patchwork.kernel.org/project/linux-riscv/cover/20221216070632.11444-1-yanhong.wang@starfivetech.com/
> v3 - https://patchwork.kernel.org/project/linux-riscv/cover/20230106030001.1952-1-yanhong.wang@starfivetech.com/
> v4 - https://patchwork.kernel.org/project/linux-riscv/cover/20230118061701.30047-1-yanhong.wang@starfivetech.com/
> 
> Emil Renner Berthing (2):
>   dt-bindings: net: snps,dwmac: Add dwmac-5.20 version
>   net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string
> 
> Samin Guo (8):
>   dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'
>   riscv: dts: starfive: jh7110: Add ethernet device nodes
>   net: stmmac: Add glue layer for StarFive JH7110 SoC
>   dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon
>   net: stmmac: starfive_dmac: Add phy interface settings
>   riscv: dts: starfive: jh7110: Add syscon to support phy interface
>     settings
>   riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay
>     configuration
>   riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay
>     configuration
> 
> Yanhong Wang (2):
>   dt-bindings: net: Add support StarFive dwmac
>   riscv: dts: starfive: visionfive 2: Enable gmac device tree node
> 
>  .../devicetree/bindings/net/snps,dwmac.yaml   |  19 +-
>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 130 +++++++++++++
>  MAINTAINERS                                   |   7 +
>  .../jh7110-starfive-visionfive-2-v1.2a.dts    |  13 ++
>  .../jh7110-starfive-visionfive-2-v1.3b.dts    |  27 +++
>  .../jh7110-starfive-visionfive-2.dtsi         |  10 +
>  arch/riscv/boot/dts/starfive/jh7110.dtsi      |  93 ++++++++++
>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 171 ++++++++++++++++++
>  .../ethernet/stmicro/stmmac/stmmac_platform.c |   3 +-
>  11 files changed, 481 insertions(+), 5 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> 
> 
> base-commit: 11934a315b671ddb09bc7ac5f505649e9f2623c7
> prerequisite-patch-id: ad56ef54d3f2a18025abc9e27321c25beda16422
> prerequisite-patch-id: 1be0fb49e0fbe293ca8fa94601e191b13c8c67d9
> prerequisite-patch-id: 8b402a8d97294a9b568595816b0dc96afc5e6f5d
> prerequisite-patch-id: 5c149662674f9e7dd888e2028fd8c9772948273f
> prerequisite-patch-id: 0caf8a313a9f161447e0480a93b42467378b2164
> prerequisite-patch-id: b2422f7a12f1e86e38c563139f3c1dbafc158efd
> prerequisite-patch-id: be612664eca7049e987bfae15bb460caa82eb211
> prerequisite-patch-id: 8300965cc6c55cad69f009da7916cf9e8ce628e7
> -- 
> 2.17.1
> 

Re: [PATCH v5 00/12] Add Ethernet driver for StarFive JH7110 SoC

[Tommaso Merciai]

Hello Samin,

On Fri, Mar 03, 2023 at 04:59:16PM +0800, Samin Guo wrote:
> This series adds ethernet support for the StarFive JH7110 RISC-V SoC.
> The series includes MAC driver. The MAC version is dwmac-5.20 (from
> Synopsys DesignWare). For more information and support, you can visit
> RVspace wiki[1].
> 
> You can simply review or test the patches at the link [2].
> 
> This patchset should be applied after the patchset [3], [4], [5].
> [1]: https://wiki.rvspace.org/
> [2]: https://github.com/SaminGuo/linux/tree/vf2-6.2-gmac
> [3]: https://lore.kernel.org/all/20230221024645.127922-1-hal.feng@starfivetech.com/
> [4]: https://lore.kernel.org/all/20230202030037.9075-1-Frank.Sae@motor-comm.com/
> [5]: https://lore.kernel.org/all/20230215113249.47727-5-william.qiu@starfivetech.com/

Thanks for this series.
I'm able to boot Linux over nfs into jh7110-starfive-visionfive-2-v1.3b board

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>

Regards,
Tommaso

> 
> Changes since v4:
> - Supported both visionfive 2 v1.2A and visionfive 2 v1.3B.
> - Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.
> - Suggested by Emil, dropped the _PLAT/_plat from the config/function/struct/file names.
> - Suggested by Emil, added MODULE_DEVICE_TABLE().
> - Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
> - Added phy interface mode configuration function.
> - Rebased on tag v6.2.
> 
> Patch 12:
> - No update
> Patch 11:
> - Configuration of gmac and phy for visionfive 2 v1.2A.
> Patch 10:
> - Configuration of gmac and phy for visionfive 2 v1.3B.
> Patch 9:
> - Added starfive,syscon for gmac nodes in jh7110.dtsi.
> Patch 8:
> - Added starfive_dwmac_set_mode to set PHY interface mode.
> Patch 7:
> - Added starfive,syscon item in StarFive-dwmac dt-bindings.
> Patch 6:
> - Moved SOC_STARFIVE to ARCH_STARFIVE in Kconfig.
> - Dropped the _PLAT/_plat from the config/function/struct names. (by Emil)
> - Added MODULE_DEVICE_TABLE() and udev will load the module automatically. (by Emil)
> - Used { /* sentinel */ } for the last entry of starfive_eth_match. (by Emil)
> - Added 'tx_use_rgmii_rxin_clk' to struct starfive_dwmac, to mark the clk_tx'parent is rgmii.
> - Suggested by Emil, dropped clk_gtxclk and use clk_tx_inv to set the clock frequency.
> Patch 5:
> - Suggested by Emil, dropped mdio0/1 labels because there is no reference elsewhere.
> Patch 4:
> - Removed GTXC clk in StarFive-dwmac dt-bindings.
> - Added starfive,tx-use-rgmii-clk item in StarFive-dwmac dt-bindings.
> Patch 3:
> - Added an optional reset single 'ahb' in 'snps,dwmac.yaml', according to
>   stmmac_probe_config_dt/stmmac_dvr_probe.
> Patch 2:
> - No update
> Patch 1:
> - No update
> 
> Changes since v3:
> - Reworded the maxitems number of resets property in 'snps,dwmac.yaml'
> - Removed the unused code in 'dwmac-starfive-plat.c'.
> - Reworded the return statement in 'starfive_eth_plat_fix_mac_speed' function.
> 
> Changes since v2:
> - Renamed the dt-bindings 'starfive,jh71x0-dwmac.yaml' to 'starfive,jh7110-dwmac.yaml'.
> - Reworded the commit messages.
> - Reworded the example context in the dt-binding 'starfive,jh7110-dwmac.yaml'.
> - Removed "starfive,jh7100-dwmac" compatible string and special initialization of jh7100.
> - Removed the parts of YT8531,so dropped patch 5 and 6.
> - Reworded the maxitems number of resets property in 'snps,dwmac.yaml'.
> 
> Changes since v1:
> - Recovered the author of the 1st and 3rd patches back to Emil Renner Berthing.
> - Added a new patch to update maxitems number of resets property in 'snps,dwmac.yaml'.
> - Fixed the check errors reported by "make dt_binding_check".
> - Renamed the dt-binding 'starfive,dwmac-plat.yaml' to 'starfive,jh71x0-dwmac.yaml'.
> - Updated the example context in the dt-binding 'starfive,jh71x0-dwmac.yaml'.
> - Added new dt-binding 'motorcomm,yt8531.yaml' to describe details of phy clock
>   delay configuration parameters.
> - Added more comments for PHY driver setting. For more details, see
>   'motorcomm,yt8531.yaml'.
> - Moved mdio device tree node from 'jh7110-starfive-visionfive-v2.dts' to 'jh7110.dtsi'.
> - Re-worded the commit message of several patches.
> - Renamed all the functions with starfive_eth_plat prefix in 'dwmac-starfive-plat.c'.
> - Added "starfive,jh7100-dwmac" compatible string and special init to support JH7100.
> 
> Previous versions:
> v1 - https://patchwork.kernel.org/project/linux-riscv/cover/20221201090242.2381-1-yanhong.wang@starfivetech.com/
> v2 - https://patchwork.kernel.org/project/linux-riscv/cover/20221216070632.11444-1-yanhong.wang@starfivetech.com/
> v3 - https://patchwork.kernel.org/project/linux-riscv/cover/20230106030001.1952-1-yanhong.wang@starfivetech.com/
> v4 - https://patchwork.kernel.org/project/linux-riscv/cover/20230118061701.30047-1-yanhong.wang@starfivetech.com/
> 
> Emil Renner Berthing (2):
>   dt-bindings: net: snps,dwmac: Add dwmac-5.20 version
>   net: stmmac: platform: Add snps,dwmac-5.20 IP compatible string
> 
> Samin Guo (8):
>   dt-bindings: net: snps,dwmac: Add an optional resets single 'ahb'
>   riscv: dts: starfive: jh7110: Add ethernet device nodes
>   net: stmmac: Add glue layer for StarFive JH7110 SoC
>   dt-bindings: net: starfive,jh7110-dwmac: Add starfive,syscon
>   net: stmmac: starfive_dmac: Add phy interface settings
>   riscv: dts: starfive: jh7110: Add syscon to support phy interface
>     settings
>   riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay
>     configuration
>   riscv: dts: starfive: visionfive-2-v1.2a: Add gmac+phy's delay
>     configuration
> 
> Yanhong Wang (2):
>   dt-bindings: net: Add support StarFive dwmac
>   riscv: dts: starfive: visionfive 2: Enable gmac device tree node
> 
>  .../devicetree/bindings/net/snps,dwmac.yaml   |  19 +-
>  .../bindings/net/starfive,jh7110-dwmac.yaml   | 130 +++++++++++++
>  MAINTAINERS                                   |   7 +
>  .../jh7110-starfive-visionfive-2-v1.2a.dts    |  13 ++
>  .../jh7110-starfive-visionfive-2-v1.3b.dts    |  27 +++
>  .../jh7110-starfive-visionfive-2.dtsi         |  10 +
>  arch/riscv/boot/dts/starfive/jh7110.dtsi      |  93 ++++++++++
>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 171 ++++++++++++++++++
>  .../ethernet/stmicro/stmmac/stmmac_platform.c |   3 +-
>  11 files changed, 481 insertions(+), 5 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> 
> 
> base-commit: 11934a315b671ddb09bc7ac5f505649e9f2623c7
> prerequisite-patch-id: ad56ef54d3f2a18025abc9e27321c25beda16422
> prerequisite-patch-id: 1be0fb49e0fbe293ca8fa94601e191b13c8c67d9
> prerequisite-patch-id: 8b402a8d97294a9b568595816b0dc96afc5e6f5d
> prerequisite-patch-id: 5c149662674f9e7dd888e2028fd8c9772948273f
> prerequisite-patch-id: 0caf8a313a9f161447e0480a93b42467378b2164
> prerequisite-patch-id: b2422f7a12f1e86e38c563139f3c1dbafc158efd
> prerequisite-patch-id: be612664eca7049e987bfae15bb460caa82eb211
> prerequisite-patch-id: 8300965cc6c55cad69f009da7916cf9e8ce628e7
> -- 
> 2.17.1
> 

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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 10 Mar 2023 at 02:55, Guo Samin <samin.guo@starfivetech.com> wrote:
> -------- 原始信息 --------
> 主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> 收件人: Samin Guo <samin.guo@starfivetech.com>
> 日期: 2023/3/10
>
> > On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
> > <emil.renner.berthing@canonical.com> wrote:
> >> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >>>
> >>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
> >>>
> >>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> >>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> >>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >>> ---
> >>>  MAINTAINERS                                   |   1 +
> >>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
> >>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
> >>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
> >>>  4 files changed, 139 insertions(+)
> >>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>>
> >>> diff --git a/MAINTAINERS b/MAINTAINERS
> >>> index 4e236b7c7fd2..91a4f190c827 100644
> >>> --- a/MAINTAINERS
> >>> +++ b/MAINTAINERS
> >>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
> >>>  M:     Emil Renner Berthing <kernel@esmil.dk>
> >>>  M:     Samin Guo <samin.guo@starfivetech.com>
> >>>  S:     Maintained
> >>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
> >>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> >>>
> >>>  STARFIVE JH71X0 CLOCK DRIVERS
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >>> index f77511fe4e87..47fbccef9d04 100644
> >>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
> >>>           for the stmmac device driver. This driver is used for
> >>>           arria5 and cyclone5 FPGA SoCs.
> >>>
> >>> +config DWMAC_STARFIVE
> >>> +       tristate "StarFive dwmac support"
> >>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> >>> +       depends on STMMAC_ETH
> >>> +       default ARCH_STARFIVE
> >>> +       help
> >>> +         Support for ethernet controllers on StarFive RISC-V SoCs
> >>> +
> >>> +         This selects the StarFive platform specific glue layer support for
> >>> +         the stmmac device driver. This driver is used for StarFive JH7110
> >>> +         ethernet controller.
> >>> +
> >>>  config DWMAC_STI
> >>>         tristate "STi GMAC support"
> >>>         default ARCH_STI
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >>> index 057e4bab5c08..8738fdbb4b2d 100644
> >>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
> >>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
> >>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
> >>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> >>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
> >>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
> >>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
> >>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>> new file mode 100644
> >>> index 000000000000..566378306f67
> >>> --- /dev/null
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>> @@ -0,0 +1,125 @@
> >>> +// SPDX-License-Identifier: GPL-2.0+
> >>> +/*
> >>> + * StarFive DWMAC platform driver
> >>> + *
> >>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> >>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> >>> + *
> >>> + */
> >>> +
> >>> +#include <linux/of_device.h>
> >>> +
> >>> +#include "stmmac_platform.h"
> >>> +
> >>> +struct starfive_dwmac {
> >>> +       struct device *dev;
> >>> +       struct clk *clk_tx;
> >>> +       struct clk *clk_gtx;
> >>> +       bool tx_use_rgmii_rxin_clk;
> >>> +};
> >>> +
> >>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> >>> +{
> >>> +       struct starfive_dwmac *dwmac = priv;
> >>> +       unsigned long rate;
> >>> +       int err;
> >>> +
> >>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> >>> +        * which needs to match the corresponding clock frequency according
> >>> +        * to different speeds. If the rgmii_tx clock is provided by the
> >>> +        * external rgmii_rxin, there is no need to configure the clock
> >>> +        * internally, because rgmii_rxin will be adaptively adjusted.
> >>> +        */
> >>> +       if (dwmac->tx_use_rgmii_rxin_clk)
> >>> +               return;
> >>> +
> >>> +       switch (speed) {
> >>> +       case SPEED_1000:
> >>> +               rate = 125000000;
> >>> +               break;
> >>> +       case SPEED_100:
> >>> +               rate = 25000000;
> >>> +               break;
> >>> +       case SPEED_10:
> >>> +               rate = 2500000;
> >>> +               break;
> >>> +       default:
> >>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> >>> +               break;
> >>> +       }
> >>> +
> >>> +       err = clk_set_rate(dwmac->clk_tx, rate);
> >>
> >> Hi Samin,
> >>
> >> I tried exercising this code by forcing the interface to downgrade
> >> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
> >> seem to work. The reason is that clk_tx is a mux, and when you call
> >> clk_set_rate it will try to find the parent with the closest clock
> >> rate instead of adjusting the current parent as is needed here.
> >> However that is easily fixed by calling clk_set_rate on clk_gtx which
> >> is just a gate that *will* propagate the rate change to the parent.
> >>
> >> With this change, this piece of code and downgrading from 1000Mbps to
> >> 100Mbps works on the JH7100. However on the JH7110 there is a second
> >> problem. The parent of clk_gtx, confusingly called
> >> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
> >> clock and divides it by some integer. But according to [1] it can at
> >> most divide by 15 which is not enough to generate the 25MHz clock
> >> needed for 100Mbps. So now I wonder how this is supposed to work on
> >> the JH7110.
> >>
> >> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb
> >
> > Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
> > VisionFive 2 v1.2A, where I think it's a known problem that only
> > 1000Mbps works.
> > On the 1.3B this function is not used at all, and I guess it also
> > ought to be skipped for gmac1 of the 1.2A using the rmii interface so
> > it doesn't risk changing the parent of the tx clock.
> >
> Hi Emil,
>
> V1.2A gmac0 only supports 1000M due to known problem, and v1.2A gmac1 supports 100M/10M.
>
> V1.2A gmac1 uses a parent clock from gmac1_rmii_rtx, whose parent clock is from external phy clock gmac1_rmii_refin (fixed is 50M).
> The default frequency division value of gmac1_rmii_rtx is 2, so it can work in 100M mode. （clk_tx: 50/2=25M ===> 100M mode）.
> When gmac1 switches to 10M mode, the clock frequency of gmac1_rmii_rtx needs to be modified to 2.5M.
> So,if 1.2A gmac1 is skipped the starfive_eth_fix_mac_speed, 10M mode will be unavailable.
>
>         gmac1_rmii_refin（50M) ==> gmac1_rmii_rtx（div 2, by default) ==>  clk_tx (25M)  （100M mode）
>         gmac1_rmii_refin（50M）==> gmac1_rmii_rtx（div 20) ==> clk_tx (2.5M)  （10M mode）
>

I see. So on the JH7110 it is only when using gmac{0,1}_rmii_rtx ->
clk_tx with the rmii interface that this function is needed?

As noted above using the current fix_mac_speed with gmac{0,1}_gtxclk
-> clk_tx will produce wrong results, so for the VF2 v1.2A you
probably just want something like this in the device tree
&gmac0 {
  assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>, <&syscrg
JH7110_SYSCLK_GMAC0_GTXCLK>;
  assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>;
  assigned-clock-rates = <0> <125000000>;
};

..and then don't set the fix_mac_speed callback.

> Of course, as you mentioned earlier, we need to add gmac1_clk_tx uses CLK_SET_RATE_PARENT flag.

Yes, I'm not too sure how clk_set_rate on mux'es are supposed to work,
but if you can convince Hal and Stephen (the clock maintainer) that
clk_set_rate should always propagate the rate change to the current
parent, then I'm fine with it.

Alternatively you can add an optional clock to the bindings, and only
if the optional clock is set then set the fix_mac_speed callback to
modify the rate of that clock. This way you won't need the special
"starfive,tx-use-rgmii-clk" flag either.

/Emil
>
> Best regards,
> Samin
>
> >>> +       if (err)
> >>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> >>> +}
> >>> +
> >>> +static int starfive_dwmac_probe(struct platform_device *pdev)
> >>> +{
> >>> +       struct plat_stmmacenet_data *plat_dat;
> >>> +       struct stmmac_resources stmmac_res;
> >>> +       struct starfive_dwmac *dwmac;
> >>> +       int err;
> >>> +
> >>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> >>> +       if (err)
> >>> +               return err;
> >>> +
> >>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> >>> +       if (IS_ERR(plat_dat)) {
> >>> +               dev_err(&pdev->dev, "dt configuration failed\n");
> >>> +               return PTR_ERR(plat_dat);
> >>> +       }
> >>> +
> >>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> >>> +       if (!dwmac)
> >>> +               return -ENOMEM;
> >>> +
> >>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> >>> +       if (IS_ERR(dwmac->clk_tx))
> >>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> >>> +                                   "error getting tx clock\n");
> >>> +
> >>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> >>> +       if (IS_ERR(dwmac->clk_gtx))
> >>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> >>> +                                   "error getting gtx clock\n");
> >>> +
> >>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> >>> +               dwmac->tx_use_rgmii_rxin_clk = true;
> >>> +
> >>> +       dwmac->dev = &pdev->dev;
> >>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> >>> +       plat_dat->init = NULL;
> >>> +       plat_dat->bsp_priv = dwmac;
> >>> +       plat_dat->dma_cfg->dche = true;
> >>> +
> >>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> >>> +       if (err) {
> >>> +               stmmac_remove_config_dt(pdev, plat_dat);
> >>> +               return err;
> >>> +       }
> >>> +
> >>> +       return 0;
> >>> +}
> >>> +
> >>> +static const struct of_device_id starfive_dwmac_match[] = {
> >>> +       { .compatible = "starfive,jh7110-dwmac" },
> >>> +       { /* sentinel */ }
> >>> +};
> >>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> >>> +
> >>> +static struct platform_driver starfive_dwmac_driver = {
> >>> +       .probe  = starfive_dwmac_probe,
> >>> +       .remove = stmmac_pltfr_remove,
> >>> +       .driver = {
> >>> +               .name = "starfive-dwmac",
> >>> +               .pm = &stmmac_pltfr_pm_ops,
> >>> +               .of_match_table = starfive_dwmac_match,
> >>> +       },
> >>> +};
> >>> +module_platform_driver(starfive_dwmac_driver);
> >>> +
> >>> +MODULE_LICENSE("GPL");
> >>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> >>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> >>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> >>> --
> >>> 2.17.1
> >>>
> >>>
> >>> _______________________________________________
> >>> linux-riscv mailing list
> >>> linux-riscv@lists.infradead.org
> >>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>

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Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Emil Renner Berthing]

On Fri, 10 Mar 2023 at 02:55, Guo Samin <samin.guo@starfivetech.com> wrote:
> -------- 原始信息 --------
> 主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> 收件人: Samin Guo <samin.guo@starfivetech.com>
> 日期: 2023/3/10
>
> > On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
> > <emil.renner.berthing@canonical.com> wrote:
> >> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
> >>>
> >>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
> >>>
> >>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
> >>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> >>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
> >>> ---
> >>>  MAINTAINERS                                   |   1 +
> >>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
> >>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
> >>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
> >>>  4 files changed, 139 insertions(+)
> >>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>>
> >>> diff --git a/MAINTAINERS b/MAINTAINERS
> >>> index 4e236b7c7fd2..91a4f190c827 100644
> >>> --- a/MAINTAINERS
> >>> +++ b/MAINTAINERS
> >>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
> >>>  M:     Emil Renner Berthing <kernel@esmil.dk>
> >>>  M:     Samin Guo <samin.guo@starfivetech.com>
> >>>  S:     Maintained
> >>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
> >>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> >>>
> >>>  STARFIVE JH71X0 CLOCK DRIVERS
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >>> index f77511fe4e87..47fbccef9d04 100644
> >>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> >>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
> >>>           for the stmmac device driver. This driver is used for
> >>>           arria5 and cyclone5 FPGA SoCs.
> >>>
> >>> +config DWMAC_STARFIVE
> >>> +       tristate "StarFive dwmac support"
> >>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
> >>> +       depends on STMMAC_ETH
> >>> +       default ARCH_STARFIVE
> >>> +       help
> >>> +         Support for ethernet controllers on StarFive RISC-V SoCs
> >>> +
> >>> +         This selects the StarFive platform specific glue layer support for
> >>> +         the stmmac device driver. This driver is used for StarFive JH7110
> >>> +         ethernet controller.
> >>> +
> >>>  config DWMAC_STI
> >>>         tristate "STi GMAC support"
> >>>         default ARCH_STI
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >>> index 057e4bab5c08..8738fdbb4b2d 100644
> >>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> >>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
> >>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
> >>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
> >>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
> >>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
> >>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
> >>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
> >>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
> >>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>> new file mode 100644
> >>> index 000000000000..566378306f67
> >>> --- /dev/null
> >>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
> >>> @@ -0,0 +1,125 @@
> >>> +// SPDX-License-Identifier: GPL-2.0+
> >>> +/*
> >>> + * StarFive DWMAC platform driver
> >>> + *
> >>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> >>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> >>> + *
> >>> + */
> >>> +
> >>> +#include <linux/of_device.h>
> >>> +
> >>> +#include "stmmac_platform.h"
> >>> +
> >>> +struct starfive_dwmac {
> >>> +       struct device *dev;
> >>> +       struct clk *clk_tx;
> >>> +       struct clk *clk_gtx;
> >>> +       bool tx_use_rgmii_rxin_clk;
> >>> +};
> >>> +
> >>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
> >>> +{
> >>> +       struct starfive_dwmac *dwmac = priv;
> >>> +       unsigned long rate;
> >>> +       int err;
> >>> +
> >>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
> >>> +        * which needs to match the corresponding clock frequency according
> >>> +        * to different speeds. If the rgmii_tx clock is provided by the
> >>> +        * external rgmii_rxin, there is no need to configure the clock
> >>> +        * internally, because rgmii_rxin will be adaptively adjusted.
> >>> +        */
> >>> +       if (dwmac->tx_use_rgmii_rxin_clk)
> >>> +               return;
> >>> +
> >>> +       switch (speed) {
> >>> +       case SPEED_1000:
> >>> +               rate = 125000000;
> >>> +               break;
> >>> +       case SPEED_100:
> >>> +               rate = 25000000;
> >>> +               break;
> >>> +       case SPEED_10:
> >>> +               rate = 2500000;
> >>> +               break;
> >>> +       default:
> >>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
> >>> +               break;
> >>> +       }
> >>> +
> >>> +       err = clk_set_rate(dwmac->clk_tx, rate);
> >>
> >> Hi Samin,
> >>
> >> I tried exercising this code by forcing the interface to downgrade
> >> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
> >> seem to work. The reason is that clk_tx is a mux, and when you call
> >> clk_set_rate it will try to find the parent with the closest clock
> >> rate instead of adjusting the current parent as is needed here.
> >> However that is easily fixed by calling clk_set_rate on clk_gtx which
> >> is just a gate that *will* propagate the rate change to the parent.
> >>
> >> With this change, this piece of code and downgrading from 1000Mbps to
> >> 100Mbps works on the JH7100. However on the JH7110 there is a second
> >> problem. The parent of clk_gtx, confusingly called
> >> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
> >> clock and divides it by some integer. But according to [1] it can at
> >> most divide by 15 which is not enough to generate the 25MHz clock
> >> needed for 100Mbps. So now I wonder how this is supposed to work on
> >> the JH7110.
> >>
> >> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb
> >
> > Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
> > VisionFive 2 v1.2A, where I think it's a known problem that only
> > 1000Mbps works.
> > On the 1.3B this function is not used at all, and I guess it also
> > ought to be skipped for gmac1 of the 1.2A using the rmii interface so
> > it doesn't risk changing the parent of the tx clock.
> >
> Hi Emil,
>
> V1.2A gmac0 only supports 1000M due to known problem, and v1.2A gmac1 supports 100M/10M.
>
> V1.2A gmac1 uses a parent clock from gmac1_rmii_rtx, whose parent clock is from external phy clock gmac1_rmii_refin (fixed is 50M).
> The default frequency division value of gmac1_rmii_rtx is 2, so it can work in 100M mode. （clk_tx: 50/2=25M ===> 100M mode）.
> When gmac1 switches to 10M mode, the clock frequency of gmac1_rmii_rtx needs to be modified to 2.5M.
> So,if 1.2A gmac1 is skipped the starfive_eth_fix_mac_speed, 10M mode will be unavailable.
>
>         gmac1_rmii_refin（50M) ==> gmac1_rmii_rtx（div 2, by default) ==>  clk_tx (25M)  （100M mode）
>         gmac1_rmii_refin（50M）==> gmac1_rmii_rtx（div 20) ==> clk_tx (2.5M)  （10M mode）
>

I see. So on the JH7110 it is only when using gmac{0,1}_rmii_rtx ->
clk_tx with the rmii interface that this function is needed?

As noted above using the current fix_mac_speed with gmac{0,1}_gtxclk
-> clk_tx will produce wrong results, so for the VF2 v1.2A you
probably just want something like this in the device tree
&gmac0 {
  assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>, <&syscrg
JH7110_SYSCLK_GMAC0_GTXCLK>;
  assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>;
  assigned-clock-rates = <0> <125000000>;
};

..and then don't set the fix_mac_speed callback.

> Of course, as you mentioned earlier, we need to add gmac1_clk_tx uses CLK_SET_RATE_PARENT flag.

Yes, I'm not too sure how clk_set_rate on mux'es are supposed to work,
but if you can convince Hal and Stephen (the clock maintainer) that
clk_set_rate should always propagate the rate change to the current
parent, then I'm fine with it.

Alternatively you can add an optional clock to the bindings, and only
if the optional clock is set then set the fix_mac_speed callback to
modify the rate of that clock. This way you won't need the special
"starfive,tx-use-rgmii-clk" flag either.

/Emil
>
> Best regards,
> Samin
>
> >>> +       if (err)
> >>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
> >>> +}
> >>> +
> >>> +static int starfive_dwmac_probe(struct platform_device *pdev)
> >>> +{
> >>> +       struct plat_stmmacenet_data *plat_dat;
> >>> +       struct stmmac_resources stmmac_res;
> >>> +       struct starfive_dwmac *dwmac;
> >>> +       int err;
> >>> +
> >>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
> >>> +       if (err)
> >>> +               return err;
> >>> +
> >>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
> >>> +       if (IS_ERR(plat_dat)) {
> >>> +               dev_err(&pdev->dev, "dt configuration failed\n");
> >>> +               return PTR_ERR(plat_dat);
> >>> +       }
> >>> +
> >>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
> >>> +       if (!dwmac)
> >>> +               return -ENOMEM;
> >>> +
> >>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
> >>> +       if (IS_ERR(dwmac->clk_tx))
> >>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
> >>> +                                   "error getting tx clock\n");
> >>> +
> >>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
> >>> +       if (IS_ERR(dwmac->clk_gtx))
> >>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
> >>> +                                   "error getting gtx clock\n");
> >>> +
> >>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
> >>> +               dwmac->tx_use_rgmii_rxin_clk = true;
> >>> +
> >>> +       dwmac->dev = &pdev->dev;
> >>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
> >>> +       plat_dat->init = NULL;
> >>> +       plat_dat->bsp_priv = dwmac;
> >>> +       plat_dat->dma_cfg->dche = true;
> >>> +
> >>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> >>> +       if (err) {
> >>> +               stmmac_remove_config_dt(pdev, plat_dat);
> >>> +               return err;
> >>> +       }
> >>> +
> >>> +       return 0;
> >>> +}
> >>> +
> >>> +static const struct of_device_id starfive_dwmac_match[] = {
> >>> +       { .compatible = "starfive,jh7110-dwmac" },
> >>> +       { /* sentinel */ }
> >>> +};
> >>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
> >>> +
> >>> +static struct platform_driver starfive_dwmac_driver = {
> >>> +       .probe  = starfive_dwmac_probe,
> >>> +       .remove = stmmac_pltfr_remove,
> >>> +       .driver = {
> >>> +               .name = "starfive-dwmac",
> >>> +               .pm = &stmmac_pltfr_pm_ops,
> >>> +               .of_match_table = starfive_dwmac_match,
> >>> +       },
> >>> +};
> >>> +module_platform_driver(starfive_dwmac_driver);
> >>> +
> >>> +MODULE_LICENSE("GPL");
> >>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
> >>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
> >>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
> >>> --
> >>> 2.17.1
> >>>
> >>>
> >>> _______________________________________________
> >>> linux-riscv mailing list
> >>> linux-riscv@lists.infradead.org
> >>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
收件人: Guo Samin <samin.guo@starfivetech.com>
日期: 2023/3/10

> On Fri, 10 Mar 2023 at 02:55, Guo Samin <samin.guo@starfivetech.com> wrote:
>> -------- 原始信息 --------
>> 主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
>> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
>> 收件人: Samin Guo <samin.guo@starfivetech.com>
>> 日期: 2023/3/10
>>
>>> On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
>>> <emil.renner.berthing@canonical.com> wrote:
>>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>>>
>>>>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>>>>
>>>>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>>>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>>> ---
>>>>>  MAINTAINERS                                   |   1 +
>>>>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>>>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>>>>  4 files changed, 139 insertions(+)
>>>>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>>
>>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>>> index 4e236b7c7fd2..91a4f190c827 100644
>>>>> --- a/MAINTAINERS
>>>>> +++ b/MAINTAINERS
>>>>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>>>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>>>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>>>>  S:     Maintained
>>>>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>>>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>>>>
>>>>>  STARFIVE JH71X0 CLOCK DRIVERS
>>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>>> index f77511fe4e87..47fbccef9d04 100644
>>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>>>>           for the stmmac device driver. This driver is used for
>>>>>           arria5 and cyclone5 FPGA SoCs.
>>>>>
>>>>> +config DWMAC_STARFIVE
>>>>> +       tristate "StarFive dwmac support"
>>>>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
>>>>> +       depends on STMMAC_ETH
>>>>> +       default ARCH_STARFIVE
>>>>> +       help
>>>>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>>>>> +
>>>>> +         This selects the StarFive platform specific glue layer support for
>>>>> +         the stmmac device driver. This driver is used for StarFive JH7110
>>>>> +         ethernet controller.
>>>>> +
>>>>>  config DWMAC_STI
>>>>>         tristate "STi GMAC support"
>>>>>         default ARCH_STI
>>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>>> index 057e4bab5c08..8738fdbb4b2d 100644
>>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>>>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>>>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>>>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>>>>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>>>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>>>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>>>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>> new file mode 100644
>>>>> index 000000000000..566378306f67
>>>>> --- /dev/null
>>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>> @@ -0,0 +1,125 @@
>>>>> +// SPDX-License-Identifier: GPL-2.0+
>>>>> +/*
>>>>> + * StarFive DWMAC platform driver
>>>>> + *
>>>>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>>>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
>>>>> + *
>>>>> + */
>>>>> +
>>>>> +#include <linux/of_device.h>
>>>>> +
>>>>> +#include "stmmac_platform.h"
>>>>> +
>>>>> +struct starfive_dwmac {
>>>>> +       struct device *dev;
>>>>> +       struct clk *clk_tx;
>>>>> +       struct clk *clk_gtx;
>>>>> +       bool tx_use_rgmii_rxin_clk;
>>>>> +};
>>>>> +
>>>>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>>>> +{
>>>>> +       struct starfive_dwmac *dwmac = priv;
>>>>> +       unsigned long rate;
>>>>> +       int err;
>>>>> +
>>>>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>>>>> +        * which needs to match the corresponding clock frequency according
>>>>> +        * to different speeds. If the rgmii_tx clock is provided by the
>>>>> +        * external rgmii_rxin, there is no need to configure the clock
>>>>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>>>>> +        */
>>>>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>>>>> +               return;
>>>>> +
>>>>> +       switch (speed) {
>>>>> +       case SPEED_1000:
>>>>> +               rate = 125000000;
>>>>> +               break;
>>>>> +       case SPEED_100:
>>>>> +               rate = 25000000;
>>>>> +               break;
>>>>> +       case SPEED_10:
>>>>> +               rate = 2500000;
>>>>> +               break;
>>>>> +       default:
>>>>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>>>>> +               break;
>>>>> +       }
>>>>> +
>>>>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>>>>
>>>> Hi Samin,
>>>>
>>>> I tried exercising this code by forcing the interface to downgrade
>>>> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
>>>> seem to work. The reason is that clk_tx is a mux, and when you call
>>>> clk_set_rate it will try to find the parent with the closest clock
>>>> rate instead of adjusting the current parent as is needed here.
>>>> However that is easily fixed by calling clk_set_rate on clk_gtx which
>>>> is just a gate that *will* propagate the rate change to the parent.
>>>>
>>>> With this change, this piece of code and downgrading from 1000Mbps to
>>>> 100Mbps works on the JH7100. However on the JH7110 there is a second
>>>> problem. The parent of clk_gtx, confusingly called
>>>> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
>>>> clock and divides it by some integer. But according to [1] it can at
>>>> most divide by 15 which is not enough to generate the 25MHz clock
>>>> needed for 100Mbps. So now I wonder how this is supposed to work on
>>>> the JH7110.
>>>>
>>>> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb
>>>
>>> Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
>>> VisionFive 2 v1.2A, where I think it's a known problem that only
>>> 1000Mbps works.
>>> On the 1.3B this function is not used at all, and I guess it also
>>> ought to be skipped for gmac1 of the 1.2A using the rmii interface so
>>> it doesn't risk changing the parent of the tx clock.
>>>
>> Hi Emil,
>>
>> V1.2A gmac0 only supports 1000M due to known problem, and v1.2A gmac1 supports 100M/10M.
>>
>> V1.2A gmac1 uses a parent clock from gmac1_rmii_rtx, whose parent clock is from external phy clock gmac1_rmii_refin (fixed is 50M).
>> The default frequency division value of gmac1_rmii_rtx is 2, so it can work in 100M mode. （clk_tx: 50/2=25M ===> 100M mode）.
>> When gmac1 switches to 10M mode, the clock frequency of gmac1_rmii_rtx needs to be modified to 2.5M.
>> So,if 1.2A gmac1 is skipped the starfive_eth_fix_mac_speed, 10M mode will be unavailable.
>>
>>         gmac1_rmii_refin（50M) ==> gmac1_rmii_rtx（div 2, by default) ==>  clk_tx (25M)  （100M mode）
>>         gmac1_rmii_refin（50M）==> gmac1_rmii_rtx（div 20) ==> clk_tx (2.5M)  （10M mode）
>>
> 
> I see. So on the JH7110 it is only when using gmac{0,1}_rmii_rtx ->
> clk_tx with the rmii interface that this function is needed?
> 
> As noted above using the current fix_mac_speed with gmac{0,1}_gtxclk
> -> clk_tx will produce wrong results, so for the VF2 v1.2A you
> probably just want something like this in the device tree
> &gmac0 {
>   assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>, <&syscrg
> JH7110_SYSCLK_GMAC0_GTXCLK>;
>   assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>;
>   assigned-clock-rates = <0> <125000000>;
> };
> 
> ..and then don't set the fix_mac_speed callback.
> 

Hi Emil,

This works on v1.2a with gmac0, but gmac1 does not. gmac1 have to setting the fix_mac_speed as mentioned above。

Moreover，fix_mac_speed is also can be used on JH7100 I guess.
So, keeping fix_mac_speed callback can make the code more compatible?

Best regards,
Samin

>> Of course, as you mentioned earlier, we need to add gmac1_clk_tx uses CLK_SET_RATE_PARENT flag.
> 
> Yes, I'm not too sure how clk_set_rate on mux'es are supposed to work,
> but if you can convince Hal and Stephen (the clock maintainer) that
> clk_set_rate should always propagate the rate change to the current
> parent, then I'm fine with it.
> I tested it with CLK_SET_RATE_PARENT flag in gmacX_clk_tx with HAL's clktree driver,
Setting the frequency of gmacX_clk_tx can take effect on clk_rmii_rtx.

Tested on v1.2A:
# mount -t debugfs none /sys/kernel/debug
# cat /sys/kernel/debug/clk/gmac1_tx/clk_parent 
gmac1_rmii_rtx
# cat /sys/kernel/debug/clk/gmac1_tx/clk_rate
25000000
# cat /sys/kernel/debug/clk/gmac1_rmii_rtx/clk_rate 
25000000
# ethtool -s eth1 speed 10 duplex full
# starfive-dwmac 16040000.ethernet eth1: Link is Down
  starfive-dwmac 16040000.ethernet eth1: Link is Up - 10Mbps/Full - flow control rx/tx
# cat /sys/kernel/debug/clk/gmac1_tx/clk_rate
2500000
# cat /sys/kernel/debug/clk/gmac1_rmii_rtx/clk_rate
2500000


In addition, I have tested that all the following modes can work:
For v1.2A:
gmac0: 1000M
gmac1: 100M/10M

For v1.3B:
gmac0: 1000M/100M/10M
gmac1: 1000M/100M/10M

Best regards,
Samin

> Alternatively you can add an optional clock to the bindings, and only
> if the optional clock is set then set the fix_mac_speed callback to
> modify the rate of that clock. This way you won't need the special
> "starfive,tx-use-rgmii-clk" flag either.
> 
> /Emil
>>
>> Best regards,
>> Samin
>>
>>>>> +       if (err)
>>>>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>>>> +}
>>>>> +
>>>>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>>>>> +{
>>>>> +       struct plat_stmmacenet_data *plat_dat;
>>>>> +       struct stmmac_resources stmmac_res;
>>>>> +       struct starfive_dwmac *dwmac;
>>>>> +       int err;
>>>>> +
>>>>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>>>>> +       if (err)
>>>>> +               return err;
>>>>> +
>>>>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>>>>> +       if (IS_ERR(plat_dat)) {
>>>>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>>>>> +               return PTR_ERR(plat_dat);
>>>>> +       }
>>>>> +
>>>>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>>>>> +       if (!dwmac)
>>>>> +               return -ENOMEM;
>>>>> +
>>>>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>>>> +       if (IS_ERR(dwmac->clk_tx))
>>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>>>>> +                                   "error getting tx clock\n");
>>>>> +
>>>>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>>>>> +       if (IS_ERR(dwmac->clk_gtx))
>>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>>>>> +                                   "error getting gtx clock\n");
>>>>> +
>>>>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>>>>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>>>>> +
>>>>> +       dwmac->dev = &pdev->dev;
>>>>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
>>>>> +       plat_dat->init = NULL;
>>>>> +       plat_dat->bsp_priv = dwmac;
>>>>> +       plat_dat->dma_cfg->dche = true;
>>>>> +
>>>>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>>>> +       if (err) {
>>>>> +               stmmac_remove_config_dt(pdev, plat_dat);
>>>>> +               return err;
>>>>> +       }
>>>>> +
>>>>> +       return 0;
>>>>> +}
>>>>> +
>>>>> +static const struct of_device_id starfive_dwmac_match[] = {
>>>>> +       { .compatible = "starfive,jh7110-dwmac" },
>>>>> +       { /* sentinel */ }
>>>>> +};
>>>>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>>>>> +
>>>>> +static struct platform_driver starfive_dwmac_driver = {
>>>>> +       .probe  = starfive_dwmac_probe,
>>>>> +       .remove = stmmac_pltfr_remove,
>>>>> +       .driver = {
>>>>> +               .name = "starfive-dwmac",
>>>>> +               .pm = &stmmac_pltfr_pm_ops,
>>>>> +               .of_match_table = starfive_dwmac_match,
>>>>> +       },
>>>>> +};
>>>>> +module_platform_driver(starfive_dwmac_driver);
>>>>> +
>>>>> +MODULE_LICENSE("GPL");
>>>>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>>>>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>>>>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>>>>> --
>>>>> 2.17.1
>>>>>
>>>>>
>>>>> _______________________________________________
>>>>> linux-riscv mailing list
>>>>> linux-riscv@lists.infradead.org
>>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>>

-- 
Best regards,
Samin

Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC

[Guo Samin]

-------- 原始信息 --------
主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
收件人: Guo Samin <samin.guo@starfivetech.com>
日期: 2023/3/10

> On Fri, 10 Mar 2023 at 02:55, Guo Samin <samin.guo@starfivetech.com> wrote:
>> -------- 原始信息 --------
>> 主题: Re: [PATCH v5 06/12] net: stmmac: Add glue layer for StarFive JH7110 SoC
>> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
>> 收件人: Samin Guo <samin.guo@starfivetech.com>
>> 日期: 2023/3/10
>>
>>> On Fri, 10 Mar 2023 at 01:02, Emil Renner Berthing
>>> <emil.renner.berthing@canonical.com> wrote:
>>>> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@starfivetech.com> wrote:
>>>>>
>>>>> This adds StarFive dwmac driver support on the StarFive JH7110 SoC.
>>>>>
>>>>> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
>>>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>>>> Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
>>>>> ---
>>>>>  MAINTAINERS                                   |   1 +
>>>>>  drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>>>>  drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>>>>  .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 125 ++++++++++++++++++
>>>>>  4 files changed, 139 insertions(+)
>>>>>  create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>>
>>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>>> index 4e236b7c7fd2..91a4f190c827 100644
>>>>> --- a/MAINTAINERS
>>>>> +++ b/MAINTAINERS
>>>>> @@ -19916,6 +19916,7 @@ STARFIVE DWMAC GLUE LAYER
>>>>>  M:     Emil Renner Berthing <kernel@esmil.dk>
>>>>>  M:     Samin Guo <samin.guo@starfivetech.com>
>>>>>  S:     Maintained
>>>>> +F:     Documentation/devicetree/bindings/net/dwmac-starfive.c
>>>>>  F:     Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
>>>>>
>>>>>  STARFIVE JH71X0 CLOCK DRIVERS
>>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>>> index f77511fe4e87..47fbccef9d04 100644
>>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>>>>> @@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
>>>>>           for the stmmac device driver. This driver is used for
>>>>>           arria5 and cyclone5 FPGA SoCs.
>>>>>
>>>>> +config DWMAC_STARFIVE
>>>>> +       tristate "StarFive dwmac support"
>>>>> +       depends on OF  && (ARCH_STARFIVE || COMPILE_TEST)
>>>>> +       depends on STMMAC_ETH
>>>>> +       default ARCH_STARFIVE
>>>>> +       help
>>>>> +         Support for ethernet controllers on StarFive RISC-V SoCs
>>>>> +
>>>>> +         This selects the StarFive platform specific glue layer support for
>>>>> +         the stmmac device driver. This driver is used for StarFive JH7110
>>>>> +         ethernet controller.
>>>>> +
>>>>>  config DWMAC_STI
>>>>>         tristate "STi GMAC support"
>>>>>         default ARCH_STI
>>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>>> index 057e4bab5c08..8738fdbb4b2d 100644
>>>>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>>>>> @@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
>>>>>  obj-$(CONFIG_DWMAC_QCOM_ETHQOS)        += dwmac-qcom-ethqos.o
>>>>>  obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
>>>>>  obj-$(CONFIG_DWMAC_SOCFPGA)    += dwmac-altr-socfpga.o
>>>>> +obj-$(CONFIG_DWMAC_STARFIVE)   += dwmac-starfive.o
>>>>>  obj-$(CONFIG_DWMAC_STI)                += dwmac-sti.o
>>>>>  obj-$(CONFIG_DWMAC_STM32)      += dwmac-stm32.o
>>>>>  obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
>>>>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>> new file mode 100644
>>>>> index 000000000000..566378306f67
>>>>> --- /dev/null
>>>>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>>>> @@ -0,0 +1,125 @@
>>>>> +// SPDX-License-Identifier: GPL-2.0+
>>>>> +/*
>>>>> + * StarFive DWMAC platform driver
>>>>> + *
>>>>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>>>> + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
>>>>> + *
>>>>> + */
>>>>> +
>>>>> +#include <linux/of_device.h>
>>>>> +
>>>>> +#include "stmmac_platform.h"
>>>>> +
>>>>> +struct starfive_dwmac {
>>>>> +       struct device *dev;
>>>>> +       struct clk *clk_tx;
>>>>> +       struct clk *clk_gtx;
>>>>> +       bool tx_use_rgmii_rxin_clk;
>>>>> +};
>>>>> +
>>>>> +static void starfive_eth_fix_mac_speed(void *priv, unsigned int speed)
>>>>> +{
>>>>> +       struct starfive_dwmac *dwmac = priv;
>>>>> +       unsigned long rate;
>>>>> +       int err;
>>>>> +
>>>>> +       /* Generally, the rgmii_tx clock is provided by the internal clock,
>>>>> +        * which needs to match the corresponding clock frequency according
>>>>> +        * to different speeds. If the rgmii_tx clock is provided by the
>>>>> +        * external rgmii_rxin, there is no need to configure the clock
>>>>> +        * internally, because rgmii_rxin will be adaptively adjusted.
>>>>> +        */
>>>>> +       if (dwmac->tx_use_rgmii_rxin_clk)
>>>>> +               return;
>>>>> +
>>>>> +       switch (speed) {
>>>>> +       case SPEED_1000:
>>>>> +               rate = 125000000;
>>>>> +               break;
>>>>> +       case SPEED_100:
>>>>> +               rate = 25000000;
>>>>> +               break;
>>>>> +       case SPEED_10:
>>>>> +               rate = 2500000;
>>>>> +               break;
>>>>> +       default:
>>>>> +               dev_err(dwmac->dev, "invalid speed %u\n", speed);
>>>>> +               break;
>>>>> +       }
>>>>> +
>>>>> +       err = clk_set_rate(dwmac->clk_tx, rate);
>>>>
>>>> Hi Samin,
>>>>
>>>> I tried exercising this code by forcing the interface to downgrade
>>>> from 1000Mbps to 100Mbps (ethtool -s end0 speed 100), and it doesn't
>>>> seem to work. The reason is that clk_tx is a mux, and when you call
>>>> clk_set_rate it will try to find the parent with the closest clock
>>>> rate instead of adjusting the current parent as is needed here.
>>>> However that is easily fixed by calling clk_set_rate on clk_gtx which
>>>> is just a gate that *will* propagate the rate change to the parent.
>>>>
>>>> With this change, this piece of code and downgrading from 1000Mbps to
>>>> 100Mbps works on the JH7100. However on the JH7110 there is a second
>>>> problem. The parent of clk_gtx, confusingly called
>>>> clk_gmac{0,1}_gtxclk is a divider (and gate) that takes the 1GHz PLL0
>>>> clock and divides it by some integer. But according to [1] it can at
>>>> most divide by 15 which is not enough to generate the 25MHz clock
>>>> needed for 100Mbps. So now I wonder how this is supposed to work on
>>>> the JH7110.
>>>>
>>>> [1]: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_crg.html#sys_crg__section_skz_fxm_wsb
>>>
>>> Ah, I see now that gmac0_gtxclk is only used by gmac0 on the
>>> VisionFive 2 v1.2A, where I think it's a known problem that only
>>> 1000Mbps works.
>>> On the 1.3B this function is not used at all, and I guess it also
>>> ought to be skipped for gmac1 of the 1.2A using the rmii interface so
>>> it doesn't risk changing the parent of the tx clock.
>>>
>> Hi Emil,
>>
>> V1.2A gmac0 only supports 1000M due to known problem, and v1.2A gmac1 supports 100M/10M.
>>
>> V1.2A gmac1 uses a parent clock from gmac1_rmii_rtx, whose parent clock is from external phy clock gmac1_rmii_refin (fixed is 50M).
>> The default frequency division value of gmac1_rmii_rtx is 2, so it can work in 100M mode. （clk_tx: 50/2=25M ===> 100M mode）.
>> When gmac1 switches to 10M mode, the clock frequency of gmac1_rmii_rtx needs to be modified to 2.5M.
>> So,if 1.2A gmac1 is skipped the starfive_eth_fix_mac_speed, 10M mode will be unavailable.
>>
>>         gmac1_rmii_refin（50M) ==> gmac1_rmii_rtx（div 2, by default) ==>  clk_tx (25M)  （100M mode）
>>         gmac1_rmii_refin（50M）==> gmac1_rmii_rtx（div 20) ==> clk_tx (2.5M)  （10M mode）
>>
> 
> I see. So on the JH7110 it is only when using gmac{0,1}_rmii_rtx ->
> clk_tx with the rmii interface that this function is needed?
> 
> As noted above using the current fix_mac_speed with gmac{0,1}_gtxclk
> -> clk_tx will produce wrong results, so for the VF2 v1.2A you
> probably just want something like this in the device tree
> &gmac0 {
>   assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>, <&syscrg
> JH7110_SYSCLK_GMAC0_GTXCLK>;
>   assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>;
>   assigned-clock-rates = <0> <125000000>;
> };
> 
> ..and then don't set the fix_mac_speed callback.
> 

Hi Emil,

This works on v1.2a with gmac0, but gmac1 does not. gmac1 have to setting the fix_mac_speed as mentioned above。

Moreover，fix_mac_speed is also can be used on JH7100 I guess.
So, keeping fix_mac_speed callback can make the code more compatible?

Best regards,
Samin

>> Of course, as you mentioned earlier, we need to add gmac1_clk_tx uses CLK_SET_RATE_PARENT flag.
> 
> Yes, I'm not too sure how clk_set_rate on mux'es are supposed to work,
> but if you can convince Hal and Stephen (the clock maintainer) that
> clk_set_rate should always propagate the rate change to the current
> parent, then I'm fine with it.
> I tested it with CLK_SET_RATE_PARENT flag in gmacX_clk_tx with HAL's clktree driver,
Setting the frequency of gmacX_clk_tx can take effect on clk_rmii_rtx.

Tested on v1.2A:
# mount -t debugfs none /sys/kernel/debug
# cat /sys/kernel/debug/clk/gmac1_tx/clk_parent 
gmac1_rmii_rtx
# cat /sys/kernel/debug/clk/gmac1_tx/clk_rate
25000000
# cat /sys/kernel/debug/clk/gmac1_rmii_rtx/clk_rate 
25000000
# ethtool -s eth1 speed 10 duplex full
# starfive-dwmac 16040000.ethernet eth1: Link is Down
  starfive-dwmac 16040000.ethernet eth1: Link is Up - 10Mbps/Full - flow control rx/tx
# cat /sys/kernel/debug/clk/gmac1_tx/clk_rate
2500000
# cat /sys/kernel/debug/clk/gmac1_rmii_rtx/clk_rate
2500000


In addition, I have tested that all the following modes can work:
For v1.2A:
gmac0: 1000M
gmac1: 100M/10M

For v1.3B:
gmac0: 1000M/100M/10M
gmac1: 1000M/100M/10M

Best regards,
Samin

> Alternatively you can add an optional clock to the bindings, and only
> if the optional clock is set then set the fix_mac_speed callback to
> modify the rate of that clock. This way you won't need the special
> "starfive,tx-use-rgmii-clk" flag either.
> 
> /Emil
>>
>> Best regards,
>> Samin
>>
>>>>> +       if (err)
>>>>> +               dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
>>>>> +}
>>>>> +
>>>>> +static int starfive_dwmac_probe(struct platform_device *pdev)
>>>>> +{
>>>>> +       struct plat_stmmacenet_data *plat_dat;
>>>>> +       struct stmmac_resources stmmac_res;
>>>>> +       struct starfive_dwmac *dwmac;
>>>>> +       int err;
>>>>> +
>>>>> +       err = stmmac_get_platform_resources(pdev, &stmmac_res);
>>>>> +       if (err)
>>>>> +               return err;
>>>>> +
>>>>> +       plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
>>>>> +       if (IS_ERR(plat_dat)) {
>>>>> +               dev_err(&pdev->dev, "dt configuration failed\n");
>>>>> +               return PTR_ERR(plat_dat);
>>>>> +       }
>>>>> +
>>>>> +       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
>>>>> +       if (!dwmac)
>>>>> +               return -ENOMEM;
>>>>> +
>>>>> +       dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
>>>>> +       if (IS_ERR(dwmac->clk_tx))
>>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
>>>>> +                                   "error getting tx clock\n");
>>>>> +
>>>>> +       dwmac->clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
>>>>> +       if (IS_ERR(dwmac->clk_gtx))
>>>>> +               return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_gtx),
>>>>> +                                   "error getting gtx clock\n");
>>>>> +
>>>>> +       if (device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
>>>>> +               dwmac->tx_use_rgmii_rxin_clk = true;
>>>>> +
>>>>> +       dwmac->dev = &pdev->dev;
>>>>> +       plat_dat->fix_mac_speed = starfive_eth_fix_mac_speed;
>>>>> +       plat_dat->init = NULL;
>>>>> +       plat_dat->bsp_priv = dwmac;
>>>>> +       plat_dat->dma_cfg->dche = true;
>>>>> +
>>>>> +       err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>>>>> +       if (err) {
>>>>> +               stmmac_remove_config_dt(pdev, plat_dat);
>>>>> +               return err;
>>>>> +       }
>>>>> +
>>>>> +       return 0;
>>>>> +}
>>>>> +
>>>>> +static const struct of_device_id starfive_dwmac_match[] = {
>>>>> +       { .compatible = "starfive,jh7110-dwmac" },
>>>>> +       { /* sentinel */ }
>>>>> +};
>>>>> +MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
>>>>> +
>>>>> +static struct platform_driver starfive_dwmac_driver = {
>>>>> +       .probe  = starfive_dwmac_probe,
>>>>> +       .remove = stmmac_pltfr_remove,
>>>>> +       .driver = {
>>>>> +               .name = "starfive-dwmac",
>>>>> +               .pm = &stmmac_pltfr_pm_ops,
>>>>> +               .of_match_table = starfive_dwmac_match,
>>>>> +       },
>>>>> +};
>>>>> +module_platform_driver(starfive_dwmac_driver);
>>>>> +
>>>>> +MODULE_LICENSE("GPL");
>>>>> +MODULE_DESCRIPTION("StarFive DWMAC platform driver");
>>>>> +MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
>>>>> +MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");
>>>>> --
>>>>> 2.17.1
>>>>>
>>>>>
>>>>> _______________________________________________
>>>>> linux-riscv mailing list
>>>>> linux-riscv@lists.infradead.org
>>>>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>>

-- 
Best regards,
Samin

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