* [PATCH v1 1/6] baseband/acc: file renaming from acc200 to generic vrb
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
@ 2023-01-17 22:36 ` Nicolas Chautru
2023-01-31 14:23 ` Maxime Coquelin
2023-01-17 22:36 ` [PATCH v1 2/6] baseband/acc: extension of the device structure Nicolas Chautru
` (5 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Nicolas Chautru @ 2023-01-17 22:36 UTC (permalink / raw)
To: dev, maxime.coquelin; +Cc: hernan.vargas, Nicolas Chautru
Renaming files as part of refactor to have generic
intel vRAN Boost PMD (vrb) whose acc200 is only one variant.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
drivers/baseband/acc/meson.build | 2 +-
drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
drivers/baseband/acc/{rte_acc200_pmd.c => rte_vrb_pmd.c} | 2 +-
drivers/baseband/acc/{acc200_cfg.h => vrb_cfg.h} | 6 +++---
drivers/baseband/acc/{acc200_pmd.h => vrb_pmd.h} | 8 ++++----
5 files changed, 10 insertions(+), 10 deletions(-)
rename drivers/baseband/acc/{rte_acc200_pmd.c => rte_vrb_pmd.c} (99%)
rename drivers/baseband/acc/{acc200_cfg.h => vrb_cfg.h} (90%)
rename drivers/baseband/acc/{acc200_pmd.h => vrb_pmd.h} (98%)
diff --git a/drivers/baseband/acc/meson.build b/drivers/baseband/acc/meson.build
index 77c393b533..966cd65c79 100644
--- a/drivers/baseband/acc/meson.build
+++ b/drivers/baseband/acc/meson.build
@@ -3,6 +3,6 @@
deps += ['bbdev', 'bus_pci']
-sources = files('rte_acc100_pmd.c', 'rte_acc200_pmd.c')
+sources = files('rte_acc100_pmd.c', 'rte_vrb_pmd.c')
headers = files('rte_acc_cfg.h')
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index b3164529dd..e5fe27a06b 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -21,7 +21,7 @@
#include <rte_bbdev_pmd.h>
#include "acc100_pmd.h"
#include "acc101_pmd.h"
-#include "acc200_cfg.h"
+#include "vrb_cfg.h"
#ifdef RTE_LIBRTE_BBDEV_DEBUG
RTE_LOG_REGISTER_DEFAULT(acc100_logtype, DEBUG);
diff --git a/drivers/baseband/acc/rte_acc200_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
similarity index 99%
rename from drivers/baseband/acc/rte_acc200_pmd.c
rename to drivers/baseband/acc/rte_vrb_pmd.c
index 204f37349b..8e61847dd2 100644
--- a/drivers/baseband/acc/rte_acc200_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -19,7 +19,7 @@
#include <rte_bbdev.h>
#include <rte_bbdev_pmd.h>
-#include "acc200_pmd.h"
+#include "vrb_pmd.h"
#ifdef RTE_LIBRTE_BBDEV_DEBUG
RTE_LOG_REGISTER_DEFAULT(acc200_logtype, DEBUG);
diff --git a/drivers/baseband/acc/acc200_cfg.h b/drivers/baseband/acc/vrb_cfg.h
similarity index 90%
rename from drivers/baseband/acc/acc200_cfg.h
rename to drivers/baseband/acc/vrb_cfg.h
index d77506b560..2b31244818 100644
--- a/drivers/baseband/acc/acc200_cfg.h
+++ b/drivers/baseband/acc/vrb_cfg.h
@@ -2,8 +2,8 @@
* Copyright(c) 2022 Intel Corporation
*/
-#ifndef _ACC200_CFG_H_
-#define _ACC200_CFG_H_
+#ifndef _VRB_CFG_H_
+#define _VRB_CFG_H_
/**
* @file acc200_cfg.h
@@ -29,4 +29,4 @@
int
acc200_configure(const char *dev_name, struct rte_acc_conf *conf);
-#endif /* _ACC200_CFG_H_ */
+#endif /* _VRB_CFG_H_ */
diff --git a/drivers/baseband/acc/acc200_pmd.h b/drivers/baseband/acc/vrb_pmd.h
similarity index 98%
rename from drivers/baseband/acc/acc200_pmd.h
rename to drivers/baseband/acc/vrb_pmd.h
index f3f2627ae9..c37bd4d57b 100644
--- a/drivers/baseband/acc/acc200_pmd.h
+++ b/drivers/baseband/acc/vrb_pmd.h
@@ -2,13 +2,13 @@
* Copyright(c) 2022 Intel Corporation
*/
-#ifndef _RTE_ACC200_PMD_H_
-#define _RTE_ACC200_PMD_H_
+#ifndef _VRB_PMD_H_
+#define _VRB_PMD_H_
#include "acc_common.h"
#include "acc200_pf_enum.h"
#include "acc200_vf_enum.h"
-#include "acc200_cfg.h"
+#include "vrb_cfg.h"
/* Helper macro for logging */
#define rte_bbdev_log(level, fmt, ...) \
@@ -193,4 +193,4 @@ static const struct acc200_registry_addr vf_reg_addr = {
.pmon_ctrl_c = HWVfPmCCntrlRegVf,
};
-#endif /* _RTE_ACC200_PMD_H_ */
+#endif /* _VRB_PMD_H_ */
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v1 1/6] baseband/acc: file renaming from acc200 to generic vrb
2023-01-17 22:36 ` [PATCH v1 1/6] baseband/acc: file renaming from acc200 to generic vrb Nicolas Chautru
@ 2023-01-31 14:23 ` Maxime Coquelin
0 siblings, 0 replies; 16+ messages in thread
From: Maxime Coquelin @ 2023-01-31 14:23 UTC (permalink / raw)
To: Nicolas Chautru, dev; +Cc: hernan.vargas
On 1/17/23 23:36, Nicolas Chautru wrote:
> Renaming files as part of refactor to have generic
> intel vRAN Boost PMD (vrb) whose acc200 is only one variant.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> drivers/baseband/acc/meson.build | 2 +-
> drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
> drivers/baseband/acc/{rte_acc200_pmd.c => rte_vrb_pmd.c} | 2 +-
> drivers/baseband/acc/{acc200_cfg.h => vrb_cfg.h} | 6 +++---
> drivers/baseband/acc/{acc200_pmd.h => vrb_pmd.h} | 8 ++++----
> 5 files changed, 10 insertions(+), 10 deletions(-)
> rename drivers/baseband/acc/{rte_acc200_pmd.c => rte_vrb_pmd.c} (99%)
> rename drivers/baseband/acc/{acc200_cfg.h => vrb_cfg.h} (90%)
> rename drivers/baseband/acc/{acc200_pmd.h => vrb_pmd.h} (98%)
>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks,
Maxime
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v1 2/6] baseband/acc: extension of the device structure
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
2023-01-17 22:36 ` [PATCH v1 1/6] baseband/acc: file renaming from acc200 to generic vrb Nicolas Chautru
@ 2023-01-17 22:36 ` Nicolas Chautru
2023-01-31 14:44 ` Maxime Coquelin
2023-01-17 22:36 ` [PATCH v1 3/6] baseband/acc: adding prefix to VRB1 registers Nicolas Chautru
` (4 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Nicolas Chautru @ 2023-01-17 22:36 UTC (permalink / raw)
To: dev, maxime.coquelin; +Cc: hernan.vargas, Nicolas Chautru
Make the device structure more generic so that to
have personnalization of the VRB PMD to support
multiple variants.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
drivers/baseband/acc/acc200_pf_enum.h | 8 +-
drivers/baseband/acc/acc_common.h | 6 ++
drivers/baseband/acc/rte_vrb_pmd.c | 134 ++++++++++++--------------
drivers/baseband/acc/vrb_pmd.h | 27 ++++--
4 files changed, 92 insertions(+), 83 deletions(-)
diff --git a/drivers/baseband/acc/acc200_pf_enum.h b/drivers/baseband/acc/acc200_pf_enum.h
index e52d8f5b19..be1f8dcc8e 100644
--- a/drivers/baseband/acc/acc200_pf_enum.h
+++ b/drivers/baseband/acc/acc200_pf_enum.h
@@ -62,10 +62,10 @@ enum {
HWPfDmaFec4GdlDescBaseHiRegVf = 0x00B88084,
HWPfDmaFec4GdlRespPtrLoRegVf = 0x00B88088,
HWPfDmaFec4GdlRespPtrHiRegVf = 0x00B8808C,
- HWPDmaFftDescBaseLoRegVf = 0x00B880A0,
- HWPDmaFftDescBaseHiRegVf = 0x00B880A4,
- HWPDmaFftRespPtrLoRegVf = 0x00B880A8,
- HWPDmaFftRespPtrHiRegVf = 0x00B880AC,
+ HWPfDmaFftDescBaseLoRegVf = 0x00B880A0,
+ HWPfDmaFftDescBaseHiRegVf = 0x00B880A4,
+ HWPfDmaFftRespPtrLoRegVf = 0x00B880A8,
+ HWPfDmaFftRespPtrHiRegVf = 0x00B880AC,
HWPfQosmonAEvalOverflow0 = 0x00B90008,
HWPfPermonACntrlRegVf = 0x00B98000,
HWPfQosmonBEvalOverflow0 = 0x00BA0008,
diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h
index 84a428ee1d..4ca5d704e6 100644
--- a/drivers/baseband/acc/acc_common.h
+++ b/drivers/baseband/acc/acc_common.h
@@ -518,6 +518,8 @@ enum {
typedef void (*acc10x_fcw_ld_fill_fun_t)(struct rte_bbdev_dec_op *op,
struct acc_fcw_ld *fcw,
union acc_harq_layout_data *harq_layout);
+typedef uint32_t (*queue_offset_fun_t)(bool pf_device, uint8_t vf_id,
+ uint8_t qgrp_id, uint16_t aq_id);
/* Private data structure for each ACC100 device */
struct acc_device {
@@ -551,7 +553,11 @@ struct acc_device {
bool pf_device; /**< True if this is a PF ACC100 device */
bool configured; /**< True if this ACC100 device is configured */
uint16_t device_variant; /**< Device variant */
+ const struct acc_registry_addr *reg_addr;
acc10x_fcw_ld_fill_fun_t fcw_ld_fill; /**< 5GUL FCW generation function */
+ queue_offset_fun_t queue_offset; /* Device specific queue offset */
+ uint16_t num_qgroups;
+ uint16_t num_aqs;
};
/* Structure associated with each queue. */
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
index 8e61847dd2..49cc3696a9 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -156,13 +156,13 @@ updateQtop(uint8_t acc, uint8_t qg, struct rte_acc_conf *acc_conf, struct acc_de
if (q_top->first_qgroup_index == -1) {
q_top->first_qgroup_index = qg;
/* Can be optimized to assume all are enabled by default. */
- reg = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, ACC200_NUM_AQS - 1));
+ reg = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, d->num_aqs - 1));
if (reg & ACC_QUEUE_ENABLE) {
- q_top->num_aqs_per_groups = ACC200_NUM_AQS;
+ q_top->num_aqs_per_groups = d->num_aqs;
return;
}
q_top->num_aqs_per_groups = 0;
- for (aq = 0; aq < ACC200_NUM_AQS; aq++) {
+ for (aq = 0; aq < d->num_aqs; aq++) {
reg = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, aq));
if (reg & ACC_QUEUE_ENABLE)
q_top->num_aqs_per_groups++;
@@ -177,7 +177,7 @@ acc200_check_device_enable(struct rte_bbdev *dev)
uint32_t reg_aq, qg;
struct acc_device *d = dev->data->dev_private;
- for (qg = 0; qg < ACC200_NUM_QGRPS; qg++) {
+ for (qg = 0; qg < d->num_qgroups; qg++) {
reg_aq = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, 0));
if (reg_aq & ACC_QUEUE_ENABLE)
return true;
@@ -191,7 +191,6 @@ fetch_acc200_config(struct rte_bbdev *dev)
{
struct acc_device *d = dev->data->dev_private;
struct rte_acc_conf *acc_conf = &d->acc_conf;
- const struct acc200_registry_addr *reg_addr;
uint8_t acc, qg;
uint32_t reg_aq, reg_len0, reg_len1, reg0, reg1;
uint32_t reg_mode, idx;
@@ -209,21 +208,15 @@ fetch_acc200_config(struct rte_bbdev *dev)
return;
}
- /* Choose correct registry addresses for the device type. */
- if (d->pf_device)
- reg_addr = &pf_reg_addr;
- else
- reg_addr = &vf_reg_addr;
-
d->ddr_size = 0;
/* Single VF Bundle by VF. */
acc_conf->num_vf_bundles = 1;
initQTop(acc_conf);
- reg0 = acc_reg_read(d, reg_addr->qman_group_func);
- reg1 = acc_reg_read(d, reg_addr->qman_group_func + 4);
- for (qg = 0; qg < ACC200_NUM_QGRPS; qg++) {
+ reg0 = acc_reg_read(d, d->reg_addr->qman_group_func);
+ reg1 = acc_reg_read(d, d->reg_addr->qman_group_func + 4);
+ for (qg = 0; qg < d->num_qgroups; qg++) {
reg_aq = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, 0));
if (reg_aq & ACC_QUEUE_ENABLE) {
if (qg < ACC_NUM_QGRPS_PER_WORD)
@@ -239,8 +232,8 @@ fetch_acc200_config(struct rte_bbdev *dev)
}
/* Check the depth of the AQs. */
- reg_len0 = acc_reg_read(d, reg_addr->depth_log0_offset);
- reg_len1 = acc_reg_read(d, reg_addr->depth_log1_offset);
+ reg_len0 = acc_reg_read(d, d->reg_addr->depth_log0_offset);
+ reg_len1 = acc_reg_read(d, d->reg_addr->depth_log1_offset);
for (acc = 0; acc < NUM_ACC; acc++) {
qtopFromAcc(&q_top, acc, acc_conf);
if (q_top->first_qgroup_index < ACC_NUM_QGRPS_PER_WORD)
@@ -252,10 +245,10 @@ fetch_acc200_config(struct rte_bbdev *dev)
/* Read PF mode. */
if (d->pf_device) {
- reg_mode = acc_reg_read(d, HWPfHiPfMode);
+ reg_mode = acc_reg_read(d, d->reg_addr->pf_mode);
acc_conf->pf_mode_en = (reg_mode == ACC_PF_VAL) ? 1 : 0;
} else {
- reg_mode = acc_reg_read(d, reg_addr->hi_mode);
+ reg_mode = acc_reg_read(d, d->reg_addr->hi_mode);
acc_conf->pf_mode_en = reg_mode & 1;
}
@@ -284,7 +277,7 @@ fetch_acc200_config(struct rte_bbdev *dev)
static inline void
acc200_vf2pf(struct acc_device *d, unsigned int payload)
{
- acc_reg_write(d, HWVfHiVfToPfDbellVf, payload);
+ acc_reg_write(d, d->reg_addr->vf2pf_doorbell, payload);
}
/* Request device status information. */
@@ -298,10 +291,10 @@ acc200_device_status(struct rte_bbdev *dev)
return RTE_BBDEV_DEV_NOT_SUPPORTED;
acc200_vf2pf(d, ACC_VF2PF_STATUS_REQUEST);
- reg = acc_reg_read(d, HWVfHiPfToVfDbellVf);
+ reg = acc_reg_read(d, d->reg_addr->pf2vf_doorbell);
while ((time_out < ACC200_STATUS_TO) && (reg == RTE_BBDEV_DEV_NOSTATUS)) {
usleep(ACC200_STATUS_WAIT); /*< Wait or VF->PF->VF Comms */
- reg = acc_reg_read(d, HWVfHiPfToVfDbellVf);
+ reg = acc_reg_read(d, d->reg_addr->pf2vf_doorbell);
time_out++;
}
@@ -415,18 +408,12 @@ static int
allocate_info_ring(struct rte_bbdev *dev)
{
struct acc_device *d = dev->data->dev_private;
- const struct acc200_registry_addr *reg_addr;
rte_iova_t info_ring_iova;
uint32_t phys_low, phys_high;
if (d->info_ring != NULL)
return 0; /* Already configured. */
- /* Choose correct registry addresses for the device type. */
- if (d->pf_device)
- reg_addr = &pf_reg_addr;
- else
- reg_addr = &vf_reg_addr;
/* Allocate InfoRing */
d->info_ring = rte_zmalloc_socket("Info Ring", ACC_INFO_RING_NUM_ENTRIES *
sizeof(*d->info_ring), RTE_CACHE_LINE_SIZE, dev->data->socket_id);
@@ -442,10 +429,10 @@ allocate_info_ring(struct rte_bbdev *dev)
/* Setup Info Ring. */
phys_high = (uint32_t)(info_ring_iova >> 32);
phys_low = (uint32_t)(info_ring_iova);
- acc_reg_write(d, reg_addr->info_ring_hi, phys_high);
- acc_reg_write(d, reg_addr->info_ring_lo, phys_low);
- acc_reg_write(d, reg_addr->info_ring_en, ACC200_REG_IRQ_EN_ALL);
- d->info_ring_head = (acc_reg_read(d, reg_addr->info_ring_ptr) &
+ acc_reg_write(d, d->reg_addr->info_ring_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->info_ring_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->info_ring_en, ACC200_REG_IRQ_EN_ALL);
+ d->info_ring_head = (acc_reg_read(d, d->reg_addr->info_ring_ptr) &
0xFFF) / sizeof(union acc_info_ring_data);
return 0;
}
@@ -457,7 +444,6 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
{
uint32_t phys_low, phys_high, value;
struct acc_device *d = dev->data->dev_private;
- const struct acc200_registry_addr *reg_addr;
int ret;
if (d->pf_device && !d->acc_conf.pf_mode_en) {
@@ -500,48 +486,42 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
phys_high = (uint32_t)(d->sw_rings_iova >> 32);
phys_low = (uint32_t)(d->sw_rings_iova & ~(ACC_SIZE_64MBYTE-1));
- /* Choose correct registry addresses for the device type. */
- if (d->pf_device)
- reg_addr = &pf_reg_addr;
- else
- reg_addr = &vf_reg_addr;
-
/* Read the populated cfg from ACC200 registers. */
fetch_acc200_config(dev);
/* Start Pmon */
for (value = 0; value <= 2; value++) {
- acc_reg_write(d, reg_addr->pmon_ctrl_a, value);
- acc_reg_write(d, reg_addr->pmon_ctrl_b, value);
- acc_reg_write(d, reg_addr->pmon_ctrl_c, value);
+ acc_reg_write(d, d->reg_addr->pmon_ctrl_a, value);
+ acc_reg_write(d, d->reg_addr->pmon_ctrl_b, value);
+ acc_reg_write(d, d->reg_addr->pmon_ctrl_c, value);
}
/* Release AXI from PF. */
if (d->pf_device)
acc_reg_write(d, HWPfDmaAxiControl, 1);
- acc_reg_write(d, reg_addr->dma_ring_ul5g_hi, phys_high);
- acc_reg_write(d, reg_addr->dma_ring_ul5g_lo, phys_low);
- acc_reg_write(d, reg_addr->dma_ring_dl5g_hi, phys_high);
- acc_reg_write(d, reg_addr->dma_ring_dl5g_lo, phys_low);
- acc_reg_write(d, reg_addr->dma_ring_ul4g_hi, phys_high);
- acc_reg_write(d, reg_addr->dma_ring_ul4g_lo, phys_low);
- acc_reg_write(d, reg_addr->dma_ring_dl4g_hi, phys_high);
- acc_reg_write(d, reg_addr->dma_ring_dl4g_lo, phys_low);
- acc_reg_write(d, reg_addr->dma_ring_fft_hi, phys_high);
- acc_reg_write(d, reg_addr->dma_ring_fft_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->dma_ring_ul5g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->dma_ring_ul5g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->dma_ring_dl5g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->dma_ring_dl5g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->dma_ring_ul4g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->dma_ring_ul4g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->dma_ring_dl4g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->dma_ring_dl4g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->dma_ring_fft_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->dma_ring_fft_lo, phys_low);
/*
* Configure Ring Size to the max queue ring size
* (used for wrapping purpose).
*/
value = log2_basic(d->sw_ring_size / ACC_RING_SIZE_GRANULARITY);
- acc_reg_write(d, reg_addr->ring_size, value);
+ acc_reg_write(d, d->reg_addr->ring_size, value);
/* Configure tail pointer for use when SDONE enabled. */
if (d->tail_ptrs == NULL)
d->tail_ptrs = rte_zmalloc_socket(
dev->device->driver->name,
- ACC200_NUM_QGRPS * ACC200_NUM_AQS * sizeof(uint32_t),
+ d->num_qgroups * d->num_aqs * sizeof(uint32_t),
RTE_CACHE_LINE_SIZE, socket_id);
if (d->tail_ptrs == NULL) {
rte_bbdev_log(ERR, "Failed to allocate tail ptr for %s:%u",
@@ -554,16 +534,16 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
phys_high = (uint32_t)(d->tail_ptr_iova >> 32);
phys_low = (uint32_t)(d->tail_ptr_iova);
- acc_reg_write(d, reg_addr->tail_ptrs_ul5g_hi, phys_high);
- acc_reg_write(d, reg_addr->tail_ptrs_ul5g_lo, phys_low);
- acc_reg_write(d, reg_addr->tail_ptrs_dl5g_hi, phys_high);
- acc_reg_write(d, reg_addr->tail_ptrs_dl5g_lo, phys_low);
- acc_reg_write(d, reg_addr->tail_ptrs_ul4g_hi, phys_high);
- acc_reg_write(d, reg_addr->tail_ptrs_ul4g_lo, phys_low);
- acc_reg_write(d, reg_addr->tail_ptrs_dl4g_hi, phys_high);
- acc_reg_write(d, reg_addr->tail_ptrs_dl4g_lo, phys_low);
- acc_reg_write(d, reg_addr->tail_ptrs_fft_hi, phys_high);
- acc_reg_write(d, reg_addr->tail_ptrs_fft_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_ul5g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_ul5g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_dl5g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_dl5g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_ul4g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_ul4g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_dl4g_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_dl4g_lo, phys_low);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_fft_hi, phys_high);
+ acc_reg_write(d, d->reg_addr->tail_ptrs_fft_lo, phys_low);
ret = allocate_info_ring(dev);
if (ret < 0) {
@@ -746,7 +726,7 @@ acc200_find_free_queue_idx(struct rte_bbdev *dev,
return -1;
/* Identify matching QGroup Index which are sorted in priority order. */
group_idx = qtop->first_qgroup_index + conf->priority;
- if (group_idx >= ACC200_NUM_QGRPS ||
+ if (group_idx >= d->num_qgroups ||
conf->priority >= qtop->num_qgroups) {
rte_bbdev_log(INFO, "Invalid Priority on %s, priority %u",
dev->data->name, conf->priority);
@@ -756,7 +736,7 @@ acc200_find_free_queue_idx(struct rte_bbdev *dev,
for (aq_idx = 0; aq_idx < qtop->num_aqs_per_groups; aq_idx++) {
if (((d->q_assigned_bit_map[group_idx] >> aq_idx) & 0x1) == 0) {
/* Mark the Queue as assigned. */
- d->q_assigned_bit_map[group_idx] |= (1 << aq_idx);
+ d->q_assigned_bit_map[group_idx] |= (1ULL << aq_idx);
/* Report the AQ Index. */
return (group_idx << ACC200_GRP_ID_SHIFT) + aq_idx;
}
@@ -773,7 +753,7 @@ acc200_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
{
struct acc_device *d = dev->data->dev_private;
struct acc_queue *q;
- int16_t q_idx;
+ int32_t q_idx;
int ret;
if (d == NULL) {
@@ -3315,6 +3295,7 @@ static void
acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
+ struct acc_device *d = dev->data->dev_private;
dev->dev_ops = &acc200_bbdev_ops;
dev->enqueue_enc_ops = acc200_enqueue_enc;
@@ -3328,11 +3309,22 @@ acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
dev->enqueue_fft_ops = acc200_enqueue_fft;
dev->dequeue_fft_ops = acc200_dequeue_fft;
- ((struct acc_device *) dev->data->dev_private)->pf_device =
- !strcmp(drv->driver.name,
- RTE_STR(ACC200PF_DRIVER_NAME));
- ((struct acc_device *) dev->data->dev_private)->mmio_base =
- pci_dev->mem_resource[0].addr;
+ d->pf_device = !strcmp(drv->driver.name, RTE_STR(ACC200PF_DRIVER_NAME));
+ d->mmio_base = pci_dev->mem_resource[0].addr;
+
+ /* Device variant specific handling. */
+ if ((pci_dev->id.device_id == RTE_ACC200_PF_DEVICE_ID) ||
+ (pci_dev->id.device_id == RTE_ACC200_VF_DEVICE_ID)) {
+ d->device_variant = ACC200_VARIANT;
+ d->queue_offset = queue_offset;
+ d->fcw_ld_fill = acc200_fcw_ld_fill;
+ d->num_qgroups = ACC200_NUM_QGRPS;
+ d->num_aqs = ACC200_NUM_AQS;
+ if (d->pf_device)
+ d->reg_addr = &acc200_pf_reg_addr;
+ else
+ d->reg_addr = &acc200_vf_reg_addr;
+ }
rte_bbdev_log_debug("Init device %s [%s] @ vaddr %p paddr %#"PRIx64"",
drv->driver.name, dev->data->name,
diff --git a/drivers/baseband/acc/vrb_pmd.h b/drivers/baseband/acc/vrb_pmd.h
index c37bd4d57b..72f92e8414 100644
--- a/drivers/baseband/acc/vrb_pmd.h
+++ b/drivers/baseband/acc/vrb_pmd.h
@@ -32,6 +32,8 @@
#define RTE_ACC200_PF_DEVICE_ID (0x57C0)
#define RTE_ACC200_VF_DEVICE_ID (0x57C1)
+#define ACC200_VARIANT 2
+
#define ACC200_MAX_PF_MSIX (256+32)
#define ACC200_MAX_VF_MSIX (256+7)
@@ -86,7 +88,7 @@
#define ACC200_STATUS_WAIT 10
#define ACC200_STATUS_TO 100
-struct acc200_registry_addr {
+struct acc_registry_addr {
unsigned int dma_ring_dl5g_hi;
unsigned int dma_ring_dl5g_lo;
unsigned int dma_ring_ul5g_hi;
@@ -116,13 +118,16 @@ struct acc200_registry_addr {
unsigned int depth_log1_offset;
unsigned int qman_group_func;
unsigned int hi_mode;
+ unsigned int pf_mode;
unsigned int pmon_ctrl_a;
unsigned int pmon_ctrl_b;
unsigned int pmon_ctrl_c;
+ unsigned int vf2pf_doorbell;
+ unsigned int pf2vf_doorbell;
};
/* Structure holding registry addresses for PF */
-static const struct acc200_registry_addr pf_reg_addr = {
+static const struct acc_registry_addr acc200_pf_reg_addr = {
.dma_ring_dl5g_hi = HWPfDmaFec5GdlDescBaseHiRegVf,
.dma_ring_dl5g_lo = HWPfDmaFec5GdlDescBaseLoRegVf,
.dma_ring_ul5g_hi = HWPfDmaFec5GulDescBaseHiRegVf,
@@ -131,9 +136,9 @@ static const struct acc200_registry_addr pf_reg_addr = {
.dma_ring_dl4g_lo = HWPfDmaFec4GdlDescBaseLoRegVf,
.dma_ring_ul4g_hi = HWPfDmaFec4GulDescBaseHiRegVf,
.dma_ring_ul4g_lo = HWPfDmaFec4GulDescBaseLoRegVf,
- .dma_ring_fft_hi = HWPDmaFftDescBaseHiRegVf,
- .dma_ring_fft_lo = HWPDmaFftDescBaseLoRegVf,
- .ring_size = HWPfQmgrRingSizeVf,
+ .dma_ring_fft_hi = HWPfDmaFftDescBaseHiRegVf,
+ .dma_ring_fft_lo = HWPfDmaFftDescBaseLoRegVf,
+ .ring_size = HWPfQmgrRingSizeVf,
.info_ring_hi = HWPfHiInfoRingBaseHiRegPf,
.info_ring_lo = HWPfHiInfoRingBaseLoRegPf,
.info_ring_en = HWPfHiInfoRingIntWrEnRegPf,
@@ -146,19 +151,22 @@ static const struct acc200_registry_addr pf_reg_addr = {
.tail_ptrs_dl4g_lo = HWPfDmaFec4GdlRespPtrLoRegVf,
.tail_ptrs_ul4g_hi = HWPfDmaFec4GulRespPtrHiRegVf,
.tail_ptrs_ul4g_lo = HWPfDmaFec4GulRespPtrLoRegVf,
- .tail_ptrs_fft_hi = HWPDmaFftRespPtrHiRegVf,
- .tail_ptrs_fft_lo = HWPDmaFftRespPtrLoRegVf,
+ .tail_ptrs_fft_hi = HWPfDmaFftRespPtrHiRegVf,
+ .tail_ptrs_fft_lo = HWPfDmaFftRespPtrLoRegVf,
.depth_log0_offset = HWPfQmgrGrpDepthLog20Vf,
.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
.qman_group_func = HWPfQmgrGrpFunction0,
.hi_mode = HWPfHiMsixVectorMapperPf,
+ .pf_mode = HWPfHiPfMode,
.pmon_ctrl_a = HWPfPermonACntrlRegVf,
.pmon_ctrl_b = HWPfPermonBCntrlRegVf,
.pmon_ctrl_c = HWPfPermonCCntrlRegVf,
+ .vf2pf_doorbell = 0,
+ .pf2vf_doorbell = 0,
};
/* Structure holding registry addresses for VF */
-static const struct acc200_registry_addr vf_reg_addr = {
+static const struct acc_registry_addr acc200_vf_reg_addr = {
.dma_ring_dl5g_hi = HWVfDmaFec5GdlDescBaseHiRegVf,
.dma_ring_dl5g_lo = HWVfDmaFec5GdlDescBaseLoRegVf,
.dma_ring_ul5g_hi = HWVfDmaFec5GulDescBaseHiRegVf,
@@ -188,9 +196,12 @@ static const struct acc200_registry_addr vf_reg_addr = {
.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
.qman_group_func = HWVfQmgrGrpFunction0Vf,
.hi_mode = HWVfHiMsixVectorMapperVf,
+ .pf_mode = 0,
.pmon_ctrl_a = HWVfPmACntrlRegVf,
.pmon_ctrl_b = HWVfPmBCntrlRegVf,
.pmon_ctrl_c = HWVfPmCCntrlRegVf,
+ .vf2pf_doorbell = HWVfHiVfToPfDbellVf,
+ .pf2vf_doorbell = HWVfHiPfToVfDbellVf,
};
#endif /* _VRB_PMD_H_ */
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v1 2/6] baseband/acc: extension of the device structure
2023-01-17 22:36 ` [PATCH v1 2/6] baseband/acc: extension of the device structure Nicolas Chautru
@ 2023-01-31 14:44 ` Maxime Coquelin
0 siblings, 0 replies; 16+ messages in thread
From: Maxime Coquelin @ 2023-01-31 14:44 UTC (permalink / raw)
To: Nicolas Chautru, dev; +Cc: hernan.vargas
On 1/17/23 23:36, Nicolas Chautru wrote:
> Make the device structure more generic so that to
> have personnalization of the VRB PMD to support
> multiple variants.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> drivers/baseband/acc/acc200_pf_enum.h | 8 +-
> drivers/baseband/acc/acc_common.h | 6 ++
> drivers/baseband/acc/rte_vrb_pmd.c | 134 ++++++++++++--------------
> drivers/baseband/acc/vrb_pmd.h | 27 ++++--
> 4 files changed, 92 insertions(+), 83 deletions(-)
>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks,
Maxime
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v1 3/6] baseband/acc: adding prefix to VRB1 registers
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
2023-01-17 22:36 ` [PATCH v1 1/6] baseband/acc: file renaming from acc200 to generic vrb Nicolas Chautru
2023-01-17 22:36 ` [PATCH v1 2/6] baseband/acc: extension of the device structure Nicolas Chautru
@ 2023-01-17 22:36 ` Nicolas Chautru
2023-01-31 14:45 ` Maxime Coquelin
2023-01-17 22:36 ` [PATCH v1 4/6] baseband/acc: update prefix for VRB PMD functions Nicolas Chautru
` (3 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Nicolas Chautru @ 2023-01-17 22:36 UTC (permalink / raw)
To: dev, maxime.coquelin; +Cc: hernan.vargas, Nicolas Chautru
Adding prefix to register names specific to VRB1 (ACC200)
to avoid future enum collision.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
drivers/baseband/acc/acc200_pf_enum.h | 174 +++++++++++++-------------
drivers/baseband/acc/acc200_vf_enum.h | 128 +++++++++----------
drivers/baseband/acc/rte_vrb_pmd.c | 136 ++++++++++----------
drivers/baseband/acc/vrb_pmd.h | 134 ++++++++++----------
4 files changed, 285 insertions(+), 287 deletions(-)
diff --git a/drivers/baseband/acc/acc200_pf_enum.h b/drivers/baseband/acc/acc200_pf_enum.h
index be1f8dcc8e..fc38465705 100644
--- a/drivers/baseband/acc/acc200_pf_enum.h
+++ b/drivers/baseband/acc/acc200_pf_enum.h
@@ -12,97 +12,97 @@
* Variable names are as is
*/
enum {
- HWPfQmgrEgressQueuesTemplate = 0x0007FC00,
- HWPfQmgrIngressAq = 0x00080000,
- HWPfQmgrDepthLog2Grp = 0x00A00200,
- HWPfQmgrTholdGrp = 0x00A00300,
- HWPfQmgrGrpTmplateReg0Indx = 0x00A00600,
- HWPfQmgrGrpTmplateReg1Indx = 0x00A00700,
- HWPfQmgrGrpTmplateReg2indx = 0x00A00800,
- HWPfQmgrGrpTmplateReg3Indx = 0x00A00900,
- HWPfQmgrGrpTmplateReg4Indx = 0x00A00A00,
- HWPfQmgrVfBaseAddr = 0x00A01000,
- HWPfQmgrArbQDepthGrp = 0x00A02F00,
- HWPfQmgrGrpFunction0 = 0x00A02F40,
- HWPfQmgrGrpFunction1 = 0x00A02F44,
- HWPfQmgrGrpPriority = 0x00A02F48,
- HWPfQmgrAqEnableVf = 0x00A10000,
- HWPfQmgrRingSizeVf = 0x00A20004,
- HWPfQmgrGrpDepthLog20Vf = 0x00A20008,
- HWPfQmgrGrpDepthLog21Vf = 0x00A2000C,
- HWPfFabricM2iBufferReg = 0x00B30000,
- HWPfFabricI2Mdma_weight = 0x00B31044,
- HwPfFecUl5gIbDebugReg = 0x00B40200,
- HWPfFftConfig0 = 0x00B58004,
- HWPfFftRamPageAccess = 0x00B5800C,
- HWPfFftRamOff = 0x00B58800,
- HWPfDmaConfig0Reg = 0x00B80000,
- HWPfDmaConfig1Reg = 0x00B80004,
- HWPfDmaQmgrAddrReg = 0x00B80008,
- HWPfDmaAxcacheReg = 0x00B80010,
- HWPfDmaAxiControl = 0x00B8002C,
- HWPfDmaQmanen = 0x00B80040,
- HWPfDma4gdlIbThld = 0x00B800CC,
- HWPfDmaCfgRrespBresp = 0x00B80814,
- HWPfDmaDescriptorSignatuture = 0x00B80868,
- HWPfDmaErrorDetectionEn = 0x00B80870,
- HWPfDmaFec5GulDescBaseLoRegVf = 0x00B88020,
- HWPfDmaFec5GulDescBaseHiRegVf = 0x00B88024,
- HWPfDmaFec5GulRespPtrLoRegVf = 0x00B88028,
- HWPfDmaFec5GulRespPtrHiRegVf = 0x00B8802C,
- HWPfDmaFec5GdlDescBaseLoRegVf = 0x00B88040,
- HWPfDmaFec5GdlDescBaseHiRegVf = 0x00B88044,
- HWPfDmaFec5GdlRespPtrLoRegVf = 0x00B88048,
- HWPfDmaFec5GdlRespPtrHiRegVf = 0x00B8804C,
- HWPfDmaFec4GulDescBaseLoRegVf = 0x00B88060,
- HWPfDmaFec4GulDescBaseHiRegVf = 0x00B88064,
- HWPfDmaFec4GulRespPtrLoRegVf = 0x00B88068,
- HWPfDmaFec4GulRespPtrHiRegVf = 0x00B8806C,
- HWPfDmaFec4GdlDescBaseLoRegVf = 0x00B88080,
- HWPfDmaFec4GdlDescBaseHiRegVf = 0x00B88084,
- HWPfDmaFec4GdlRespPtrLoRegVf = 0x00B88088,
- HWPfDmaFec4GdlRespPtrHiRegVf = 0x00B8808C,
- HWPfDmaFftDescBaseLoRegVf = 0x00B880A0,
- HWPfDmaFftDescBaseHiRegVf = 0x00B880A4,
- HWPfDmaFftRespPtrLoRegVf = 0x00B880A8,
- HWPfDmaFftRespPtrHiRegVf = 0x00B880AC,
- HWPfQosmonAEvalOverflow0 = 0x00B90008,
- HWPfPermonACntrlRegVf = 0x00B98000,
- HWPfQosmonBEvalOverflow0 = 0x00BA0008,
- HWPfPermonBCntrlRegVf = 0x00BA8000,
- HWPfPermonCCntrlRegVf = 0x00BB8000,
- HWPfHiInfoRingBaseLoRegPf = 0x00C84014,
- HWPfHiInfoRingBaseHiRegPf = 0x00C84018,
- HWPfHiInfoRingPointerRegPf = 0x00C8401C,
- HWPfHiInfoRingIntWrEnRegPf = 0x00C84020,
- HWPfHiBlockTransmitOnErrorEn = 0x00C84038,
- HWPfHiCfgMsiIntWrEnRegPf = 0x00C84040,
- HWPfHiMsixVectorMapperPf = 0x00C84060,
- HWPfHiPfMode = 0x00C84108,
- HWPfHiClkGateHystReg = 0x00C8410C,
- HWPfHiMsiDropEnableReg = 0x00C84114,
- HWPfHiSectionPowerGatingReq = 0x00C84128,
- HWPfHiSectionPowerGatingAck = 0x00C8412C,
+ VRB1_PfQmgrEgressQueuesTemplate = 0x0007FC00,
+ VRB1_PfQmgrIngressAq = 0x00080000,
+ VRB1_PfQmgrDepthLog2Grp = 0x00A00200,
+ VRB1_PfQmgrTholdGrp = 0x00A00300,
+ VRB1_PfQmgrGrpTmplateReg0Indx = 0x00A00600,
+ VRB1_PfQmgrGrpTmplateReg1Indx = 0x00A00700,
+ VRB1_PfQmgrGrpTmplateReg2indx = 0x00A00800,
+ VRB1_PfQmgrGrpTmplateReg3Indx = 0x00A00900,
+ VRB1_PfQmgrGrpTmplateReg4Indx = 0x00A00A00,
+ VRB1_PfQmgrVfBaseAddr = 0x00A01000,
+ VRB1_PfQmgrArbQDepthGrp = 0x00A02F00,
+ VRB1_PfQmgrGrpFunction0 = 0x00A02F40,
+ VRB1_PfQmgrGrpFunction1 = 0x00A02F44,
+ VRB1_PfQmgrGrpPriority = 0x00A02F48,
+ VRB1_PfQmgrAqEnableVf = 0x00A10000,
+ VRB1_PfQmgrRingSizeVf = 0x00A20004,
+ VRB1_PfQmgrGrpDepthLog20Vf = 0x00A20008,
+ VRB1_PfQmgrGrpDepthLog21Vf = 0x00A2000C,
+ VRB1_PfFabricM2iBufferReg = 0x00B30000,
+ VRB1_PfFabricI2Mdma_weight = 0x00B31044,
+ VRB1_PfFecUl5gIbDebugReg = 0x00B40200,
+ VRB1_PfFftConfig0 = 0x00B58004,
+ VRB1_PfFftRamPageAccess = 0x00B5800C,
+ VRB1_PfFftRamOff = 0x00B58800,
+ VRB1_PfDmaConfig0Reg = 0x00B80000,
+ VRB1_PfDmaConfig1Reg = 0x00B80004,
+ VRB1_PfDmaQmgrAddrReg = 0x00B80008,
+ VRB1_PfDmaAxcacheReg = 0x00B80010,
+ VRB1_PfDmaAxiControl = 0x00B8002C,
+ VRB1_PfDmaQmanen = 0x00B80040,
+ VRB1_PfDma4gdlIbThld = 0x00B800CC,
+ VRB1_PfDmaCfgRrespBresp = 0x00B80814,
+ VRB1_PfDmaDescriptorSignatuture = 0x00B80868,
+ VRB1_PfDmaErrorDetectionEn = 0x00B80870,
+ VRB1_PfDmaFec5GulDescBaseLoRegVf = 0x00B88020,
+ VRB1_PfDmaFec5GulDescBaseHiRegVf = 0x00B88024,
+ VRB1_PfDmaFec5GulRespPtrLoRegVf = 0x00B88028,
+ VRB1_PfDmaFec5GulRespPtrHiRegVf = 0x00B8802C,
+ VRB1_PfDmaFec5GdlDescBaseLoRegVf = 0x00B88040,
+ VRB1_PfDmaFec5GdlDescBaseHiRegVf = 0x00B88044,
+ VRB1_PfDmaFec5GdlRespPtrLoRegVf = 0x00B88048,
+ VRB1_PfDmaFec5GdlRespPtrHiRegVf = 0x00B8804C,
+ VRB1_PfDmaFec4GulDescBaseLoRegVf = 0x00B88060,
+ VRB1_PfDmaFec4GulDescBaseHiRegVf = 0x00B88064,
+ VRB1_PfDmaFec4GulRespPtrLoRegVf = 0x00B88068,
+ VRB1_PfDmaFec4GulRespPtrHiRegVf = 0x00B8806C,
+ VRB1_PfDmaFec4GdlDescBaseLoRegVf = 0x00B88080,
+ VRB1_PfDmaFec4GdlDescBaseHiRegVf = 0x00B88084,
+ VRB1_PfDmaFec4GdlRespPtrLoRegVf = 0x00B88088,
+ VRB1_PfDmaFec4GdlRespPtrHiRegVf = 0x00B8808C,
+ VRB1_PfDmaFftDescBaseLoRegVf = 0x00B880A0,
+ VRB1_PfDmaFftDescBaseHiRegVf = 0x00B880A4,
+ VRB1_PfDmaFftRespPtrLoRegVf = 0x00B880A8,
+ VRB1_PfDmaFftRespPtrHiRegVf = 0x00B880AC,
+ VRB1_PfQosmonAEvalOverflow0 = 0x00B90008,
+ VRB1_PfPermonACntrlRegVf = 0x00B98000,
+ VRB1_PfQosmonBEvalOverflow0 = 0x00BA0008,
+ VRB1_PfPermonBCntrlRegVf = 0x00BA8000,
+ VRB1_PfPermonCCntrlRegVf = 0x00BB8000,
+ VRB1_PfHiInfoRingBaseLoRegPf = 0x00C84014,
+ VRB1_PfHiInfoRingBaseHiRegPf = 0x00C84018,
+ VRB1_PfHiInfoRingPointerRegPf = 0x00C8401C,
+ VRB1_PfHiInfoRingIntWrEnRegPf = 0x00C84020,
+ VRB1_PfHiBlockTransmitOnErrorEn = 0x00C84038,
+ VRB1_PfHiCfgMsiIntWrEnRegPf = 0x00C84040,
+ VRB1_PfHiMsixVectorMapperPf = 0x00C84060,
+ VRB1_PfHiPfMode = 0x00C84108,
+ VRB1_PfHiClkGateHystReg = 0x00C8410C,
+ VRB1_PfHiMsiDropEnableReg = 0x00C84114,
+ VRB1_PfHiSectionPowerGatingReq = 0x00C84128,
+ VRB1_PfHiSectionPowerGatingAck = 0x00C8412C,
};
/* TIP PF Interrupt numbers */
enum {
- ACC200_PF_INT_QMGR_AQ_OVERFLOW = 0,
- ACC200_PF_INT_DOORBELL_VF_2_PF = 1,
- ACC200_PF_INT_ILLEGAL_FORMAT = 2,
- ACC200_PF_INT_QMGR_DISABLED_ACCESS = 3,
- ACC200_PF_INT_QMGR_AQ_OVERTHRESHOLD = 4,
- ACC200_PF_INT_DMA_DL_DESC_IRQ = 5,
- ACC200_PF_INT_DMA_UL_DESC_IRQ = 6,
- ACC200_PF_INT_DMA_FFT_DESC_IRQ = 7,
- ACC200_PF_INT_DMA_UL5G_DESC_IRQ = 8,
- ACC200_PF_INT_DMA_DL5G_DESC_IRQ = 9,
- ACC200_PF_INT_DMA_MLD_DESC_IRQ = 10,
- ACC200_PF_INT_ARAM_ECC_1BIT_ERR = 11,
- ACC200_PF_INT_PARITY_ERR = 12,
- ACC200_PF_INT_QMGR_ERR = 13,
- ACC200_PF_INT_INT_REQ_OVERFLOW = 14,
- ACC200_PF_INT_APB_TIMEOUT = 15,
+ ACC_PF_INT_QMGR_AQ_OVERFLOW = 0,
+ ACC_PF_INT_DOORBELL_VF_2_PF = 1,
+ ACC_PF_INT_ILLEGAL_FORMAT = 2,
+ ACC_PF_INT_QMGR_DISABLED_ACCESS = 3,
+ ACC_PF_INT_QMGR_AQ_OVERTHRESHOLD = 4,
+ ACC_PF_INT_DMA_DL_DESC_IRQ = 5,
+ ACC_PF_INT_DMA_UL_DESC_IRQ = 6,
+ ACC_PF_INT_DMA_FFT_DESC_IRQ = 7,
+ ACC_PF_INT_DMA_UL5G_DESC_IRQ = 8,
+ ACC_PF_INT_DMA_DL5G_DESC_IRQ = 9,
+ ACC_PF_INT_DMA_MLD_DESC_IRQ = 10,
+ ACC_PF_INT_ARAM_ECC_1BIT_ERR = 11,
+ ACC_PF_INT_PARITY_ERR = 12,
+ ACC_PF_INT_QMGR_ERR = 13,
+ ACC_PF_INT_INT_REQ_OVERFLOW = 14,
+ ACC_PF_INT_APB_TIMEOUT = 15,
};
#endif /* ACC200_PF_ENUM_H */
diff --git a/drivers/baseband/acc/acc200_vf_enum.h b/drivers/baseband/acc/acc200_vf_enum.h
index 0d354208ab..62a4f369bc 100644
--- a/drivers/baseband/acc/acc200_vf_enum.h
+++ b/drivers/baseband/acc/acc200_vf_enum.h
@@ -10,74 +10,74 @@
* This is automatically generated from RDL, format may change with new RDL
*/
enum {
- HWVfQmgrIngressAq = 0x00000000,
- HWVfHiVfToPfDbellVf = 0x00000800,
- HWVfHiPfToVfDbellVf = 0x00000808,
- HWVfHiInfoRingBaseLoVf = 0x00000810,
- HWVfHiInfoRingBaseHiVf = 0x00000814,
- HWVfHiInfoRingPointerVf = 0x00000818,
- HWVfHiInfoRingIntWrEnVf = 0x00000820,
- HWVfHiInfoRingPf2VfWrEnVf = 0x00000824,
- HWVfHiMsixVectorMapperVf = 0x00000860,
- HWVfDmaFec5GulDescBaseLoRegVf = 0x00000920,
- HWVfDmaFec5GulDescBaseHiRegVf = 0x00000924,
- HWVfDmaFec5GulRespPtrLoRegVf = 0x00000928,
- HWVfDmaFec5GulRespPtrHiRegVf = 0x0000092C,
- HWVfDmaFec5GdlDescBaseLoRegVf = 0x00000940,
- HWVfDmaFec5GdlDescBaseHiRegVf = 0x00000944,
- HWVfDmaFec5GdlRespPtrLoRegVf = 0x00000948,
- HWVfDmaFec5GdlRespPtrHiRegVf = 0x0000094C,
- HWVfDmaFec4GulDescBaseLoRegVf = 0x00000960,
- HWVfDmaFec4GulDescBaseHiRegVf = 0x00000964,
- HWVfDmaFec4GulRespPtrLoRegVf = 0x00000968,
- HWVfDmaFec4GulRespPtrHiRegVf = 0x0000096C,
- HWVfDmaFec4GdlDescBaseLoRegVf = 0x00000980,
- HWVfDmaFec4GdlDescBaseHiRegVf = 0x00000984,
- HWVfDmaFec4GdlRespPtrLoRegVf = 0x00000988,
- HWVfDmaFec4GdlRespPtrHiRegVf = 0x0000098C,
- HWVfDmaFftDescBaseLoRegVf = 0x000009A0,
- HWVfDmaFftDescBaseHiRegVf = 0x000009A4,
- HWVfDmaFftRespPtrLoRegVf = 0x000009A8,
- HWVfDmaFftRespPtrHiRegVf = 0x000009AC,
- HWVfQmgrAqResetVf = 0x00000E00,
- HWVfQmgrRingSizeVf = 0x00000E04,
- HWVfQmgrGrpDepthLog20Vf = 0x00000E08,
- HWVfQmgrGrpDepthLog21Vf = 0x00000E0C,
- HWVfQmgrGrpFunction0Vf = 0x00000E10,
- HWVfQmgrGrpFunction1Vf = 0x00000E14,
- HWVfPmACntrlRegVf = 0x00000F40,
- HWVfPmACountVf = 0x00000F48,
- HWVfPmAKCntLoVf = 0x00000F50,
- HWVfPmAKCntHiVf = 0x00000F54,
- HWVfPmADeltaCntLoVf = 0x00000F60,
- HWVfPmADeltaCntHiVf = 0x00000F64,
- HWVfPmBCntrlRegVf = 0x00000F80,
- HWVfPmBCountVf = 0x00000F88,
- HWVfPmBKCntLoVf = 0x00000F90,
- HWVfPmBKCntHiVf = 0x00000F94,
- HWVfPmBDeltaCntLoVf = 0x00000FA0,
- HWVfPmBDeltaCntHiVf = 0x00000FA4,
- HWVfPmCCntrlRegVf = 0x00000FC0,
- HWVfPmCCountVf = 0x00000FC8,
- HWVfPmCKCntLoVf = 0x00000FD0,
- HWVfPmCKCntHiVf = 0x00000FD4,
- HWVfPmCDeltaCntLoVf = 0x00000FE0,
- HWVfPmCDeltaCntHiVf = 0x00000FE4
+ VRB1_VfQmgrIngressAq = 0x00000000,
+ VRB1_VfHiVfToPfDbellVf = 0x00000800,
+ VRB1_VfHiPfToVfDbellVf = 0x00000808,
+ VRB1_VfHiInfoRingBaseLoVf = 0x00000810,
+ VRB1_VfHiInfoRingBaseHiVf = 0x00000814,
+ VRB1_VfHiInfoRingPointerVf = 0x00000818,
+ VRB1_VfHiInfoRingIntWrEnVf = 0x00000820,
+ VRB1_VfHiInfoRingPf2VfWrEnVf = 0x00000824,
+ VRB1_VfHiMsixVectorMapperVf = 0x00000860,
+ VRB1_VfDmaFec5GulDescBaseLoRegVf = 0x00000920,
+ VRB1_VfDmaFec5GulDescBaseHiRegVf = 0x00000924,
+ VRB1_VfDmaFec5GulRespPtrLoRegVf = 0x00000928,
+ VRB1_VfDmaFec5GulRespPtrHiRegVf = 0x0000092C,
+ VRB1_VfDmaFec5GdlDescBaseLoRegVf = 0x00000940,
+ VRB1_VfDmaFec5GdlDescBaseHiRegVf = 0x00000944,
+ VRB1_VfDmaFec5GdlRespPtrLoRegVf = 0x00000948,
+ VRB1_VfDmaFec5GdlRespPtrHiRegVf = 0x0000094C,
+ VRB1_VfDmaFec4GulDescBaseLoRegVf = 0x00000960,
+ VRB1_VfDmaFec4GulDescBaseHiRegVf = 0x00000964,
+ VRB1_VfDmaFec4GulRespPtrLoRegVf = 0x00000968,
+ VRB1_VfDmaFec4GulRespPtrHiRegVf = 0x0000096C,
+ VRB1_VfDmaFec4GdlDescBaseLoRegVf = 0x00000980,
+ VRB1_VfDmaFec4GdlDescBaseHiRegVf = 0x00000984,
+ VRB1_VfDmaFec4GdlRespPtrLoRegVf = 0x00000988,
+ VRB1_VfDmaFec4GdlRespPtrHiRegVf = 0x0000098C,
+ VRB1_VfDmaFftDescBaseLoRegVf = 0x000009A0,
+ VRB1_VfDmaFftDescBaseHiRegVf = 0x000009A4,
+ VRB1_VfDmaFftRespPtrLoRegVf = 0x000009A8,
+ VRB1_VfDmaFftRespPtrHiRegVf = 0x000009AC,
+ VRB1_VfQmgrAqResetVf = 0x00000E00,
+ VRB1_VfQmgrRingSizeVf = 0x00000E04,
+ VRB1_VfQmgrGrpDepthLog20Vf = 0x00000E08,
+ VRB1_VfQmgrGrpDepthLog21Vf = 0x00000E0C,
+ VRB1_VfQmgrGrpFunction0Vf = 0x00000E10,
+ VRB1_VfQmgrGrpFunction1Vf = 0x00000E14,
+ VRB1_VfPmACntrlRegVf = 0x00000F40,
+ VRB1_VfPmACountVf = 0x00000F48,
+ VRB1_VfPmAKCntLoVf = 0x00000F50,
+ VRB1_VfPmAKCntHiVf = 0x00000F54,
+ VRB1_VfPmADeltaCntLoVf = 0x00000F60,
+ VRB1_VfPmADeltaCntHiVf = 0x00000F64,
+ VRB1_VfPmBCntrlRegVf = 0x00000F80,
+ VRB1_VfPmBCountVf = 0x00000F88,
+ VRB1_VfPmBKCntLoVf = 0x00000F90,
+ VRB1_VfPmBKCntHiVf = 0x00000F94,
+ VRB1_VfPmBDeltaCntLoVf = 0x00000FA0,
+ VRB1_VfPmBDeltaCntHiVf = 0x00000FA4,
+ VRB1_VfPmCCntrlRegVf = 0x00000FC0,
+ VRB1_VfPmCCountVf = 0x00000FC8,
+ VRB1_VfPmCKCntLoVf = 0x00000FD0,
+ VRB1_VfPmCKCntHiVf = 0x00000FD4,
+ VRB1_VfPmCDeltaCntLoVf = 0x00000FE0,
+ VRB1_VfPmCDeltaCntHiVf = 0x00000FE4
};
/* TIP VF Interrupt numbers */
enum {
- ACC200_VF_INT_QMGR_AQ_OVERFLOW = 0,
- ACC200_VF_INT_DOORBELL_PF_2_VF = 1,
- ACC200_VF_INT_ILLEGAL_FORMAT = 2,
- ACC200_VF_INT_QMGR_DISABLED_ACCESS = 3,
- ACC200_VF_INT_QMGR_AQ_OVERTHRESHOLD = 4,
- ACC200_VF_INT_DMA_DL_DESC_IRQ = 5,
- ACC200_VF_INT_DMA_UL_DESC_IRQ = 6,
- ACC200_VF_INT_DMA_FFT_DESC_IRQ = 7,
- ACC200_VF_INT_DMA_UL5G_DESC_IRQ = 8,
- ACC200_VF_INT_DMA_DL5G_DESC_IRQ = 9,
- ACC200_VF_INT_DMA_MLD_DESC_IRQ = 10,
+ ACC_VF_INT_QMGR_AQ_OVERFLOW = 0,
+ ACC_VF_INT_DOORBELL_PF_2_VF = 1,
+ ACC_VF_INT_ILLEGAL_FORMAT = 2,
+ ACC_VF_INT_QMGR_DISABLED_ACCESS = 3,
+ ACC_VF_INT_QMGR_AQ_OVERTHRESHOLD = 4,
+ ACC_VF_INT_DMA_DL_DESC_IRQ = 5,
+ ACC_VF_INT_DMA_UL_DESC_IRQ = 6,
+ ACC_VF_INT_DMA_FFT_DESC_IRQ = 7,
+ ACC_VF_INT_DMA_UL5G_DESC_IRQ = 8,
+ ACC_VF_INT_DMA_DL5G_DESC_IRQ = 9,
+ ACC_VF_INT_DMA_MLD_DESC_IRQ = 10,
};
#endif /* ACC200_VF_ENUM_H */
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
index 49cc3696a9..01e018f233 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -33,10 +33,10 @@ queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id)
{
if (pf_device)
return ((vf_id << 12) + (qgrp_id << 7) + (aq_id << 3) +
- HWPfQmgrIngressAq);
+ VRB1_PfQmgrIngressAq);
else
return ((qgrp_id << 7) + (aq_id << 3) +
- HWVfQmgrIngressAq);
+ VRB1_VfQmgrIngressAq);
}
enum {UL_4G = 0, UL_5G, DL_4G, DL_5G, FFT, NUM_ACC};
@@ -313,8 +313,8 @@ acc200_check_ir(struct acc_device *acc200_dev)
ring_data = acc200_dev->info_ring + (acc200_dev->info_ring_head & ACC_INFO_RING_MASK);
while (ring_data->valid) {
- if ((ring_data->int_nb < ACC200_PF_INT_DMA_DL_DESC_IRQ) || (
- ring_data->int_nb > ACC200_PF_INT_DMA_DL5G_DESC_IRQ)) {
+ if ((ring_data->int_nb < ACC_PF_INT_DMA_DL_DESC_IRQ) || (
+ ring_data->int_nb > ACC_PF_INT_DMA_DL5G_DESC_IRQ)) {
rte_bbdev_log(WARNING, "InfoRing: ITR:%d Info:0x%x",
ring_data->int_nb, ring_data->detailed_info);
/* Initialize Info Ring entry and move forward. */
@@ -343,11 +343,11 @@ acc200_dev_interrupt_handler(void *cb_arg)
ring_data->val, ring_data->int_nb);
switch (ring_data->int_nb) {
- case ACC200_PF_INT_DMA_DL_DESC_IRQ:
- case ACC200_PF_INT_DMA_UL_DESC_IRQ:
- case ACC200_PF_INT_DMA_FFT_DESC_IRQ:
- case ACC200_PF_INT_DMA_UL5G_DESC_IRQ:
- case ACC200_PF_INT_DMA_DL5G_DESC_IRQ:
+ case ACC_PF_INT_DMA_DL_DESC_IRQ:
+ case ACC_PF_INT_DMA_UL_DESC_IRQ:
+ case ACC_PF_INT_DMA_FFT_DESC_IRQ:
+ case ACC_PF_INT_DMA_UL5G_DESC_IRQ:
+ case ACC_PF_INT_DMA_DL5G_DESC_IRQ:
deq_intr_det.queue_id = get_queue_id_from_ring_info(
dev->data, *ring_data);
if (deq_intr_det.queue_id == UINT16_MAX) {
@@ -370,11 +370,11 @@ acc200_dev_interrupt_handler(void *cb_arg)
"ACC200 VF Interrupt received, Info Ring data: 0x%x\n",
ring_data->val);
switch (ring_data->int_nb) {
- case ACC200_VF_INT_DMA_DL_DESC_IRQ:
- case ACC200_VF_INT_DMA_UL_DESC_IRQ:
- case ACC200_VF_INT_DMA_FFT_DESC_IRQ:
- case ACC200_VF_INT_DMA_UL5G_DESC_IRQ:
- case ACC200_VF_INT_DMA_DL5G_DESC_IRQ:
+ case ACC_VF_INT_DMA_DL_DESC_IRQ:
+ case ACC_VF_INT_DMA_UL_DESC_IRQ:
+ case ACC_VF_INT_DMA_FFT_DESC_IRQ:
+ case ACC_VF_INT_DMA_UL5G_DESC_IRQ:
+ case ACC_VF_INT_DMA_DL5G_DESC_IRQ:
/* VFs are not aware of their vf_id - it's set to 0. */
ring_data->vf_id = 0;
deq_intr_det.queue_id = get_queue_id_from_ring_info(
@@ -498,7 +498,7 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
/* Release AXI from PF. */
if (d->pf_device)
- acc_reg_write(d, HWPfDmaAxiControl, 1);
+ acc_reg_write(d, VRB1_PfDmaAxiControl, 1);
acc_reg_write(d, d->reg_addr->dma_ring_ul5g_hi, phys_high);
acc_reg_write(d, d->reg_addr->dma_ring_ul5g_lo, phys_low);
@@ -3423,7 +3423,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf));
/* Check we are already out of PG. */
- status = acc_reg_read(d, HWPfHiSectionPowerGatingAck);
+ status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
if (status > 0) {
if (status != ACC200_PG_MASK_0) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
@@ -3431,69 +3431,69 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
return -ENODEV;
}
/* Clock gate sections that will be un-PG. */
- acc_reg_write(d, HWPfHiClkGateHystReg, ACC200_CLK_DIS);
+ acc_reg_write(d, VRB1_PfHiClkGateHystReg, ACC200_CLK_DIS);
/* Un-PG required sections. */
- acc_reg_write(d, HWPfHiSectionPowerGatingReq,
+ acc_reg_write(d, VRB1_PfHiSectionPowerGatingReq,
ACC200_PG_MASK_1);
- status = acc_reg_read(d, HWPfHiSectionPowerGatingAck);
+ status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
if (status != ACC200_PG_MASK_1) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
status, ACC200_PG_MASK_1);
return -ENODEV;
}
- acc_reg_write(d, HWPfHiSectionPowerGatingReq,
+ acc_reg_write(d, VRB1_PfHiSectionPowerGatingReq,
ACC200_PG_MASK_2);
- status = acc_reg_read(d, HWPfHiSectionPowerGatingAck);
+ status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
if (status != ACC200_PG_MASK_2) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
status, ACC200_PG_MASK_2);
return -ENODEV;
}
- acc_reg_write(d, HWPfHiSectionPowerGatingReq,
+ acc_reg_write(d, VRB1_PfHiSectionPowerGatingReq,
ACC200_PG_MASK_3);
- status = acc_reg_read(d, HWPfHiSectionPowerGatingAck);
+ status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
if (status != ACC200_PG_MASK_3) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
status, ACC200_PG_MASK_3);
return -ENODEV;
}
/* Enable clocks for all sections. */
- acc_reg_write(d, HWPfHiClkGateHystReg, ACC200_CLK_EN);
+ acc_reg_write(d, VRB1_PfHiClkGateHystReg, ACC200_CLK_EN);
}
/* Explicitly releasing AXI as this may be stopped after PF FLR/BME. */
- address = HWPfDmaAxiControl;
+ address = VRB1_PfDmaAxiControl;
value = 1;
acc_reg_write(d, address, value);
/* Set the fabric mode. */
- address = HWPfFabricM2iBufferReg;
+ address = VRB1_PfFabricM2iBufferReg;
value = ACC200_FABRIC_MODE;
acc_reg_write(d, address, value);
/* Set default descriptor signature. */
- address = HWPfDmaDescriptorSignatuture;
+ address = VRB1_PfDmaDescriptorSignatuture;
value = 0;
acc_reg_write(d, address, value);
/* Enable the Error Detection in DMA. */
value = ACC200_CFG_DMA_ERROR;
- address = HWPfDmaErrorDetectionEn;
+ address = VRB1_PfDmaErrorDetectionEn;
acc_reg_write(d, address, value);
/* AXI Cache configuration. */
value = ACC200_CFG_AXI_CACHE;
- address = HWPfDmaAxcacheReg;
+ address = VRB1_PfDmaAxcacheReg;
acc_reg_write(d, address, value);
/* AXI Response configuration. */
- acc_reg_write(d, HWPfDmaCfgRrespBresp, 0x0);
+ acc_reg_write(d, VRB1_PfDmaCfgRrespBresp, 0x0);
/* Default DMA Configuration (Qmgr Enabled). */
- address = HWPfDmaConfig0Reg;
+ address = VRB1_PfDmaConfig0Reg;
value = 0;
acc_reg_write(d, address, value);
- address = HWPfDmaQmanen;
+ address = VRB1_PfDmaQmanen;
value = 0;
acc_reg_write(d, address, value);
@@ -3501,18 +3501,18 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
rlim = 0;
alen = 1;
timestamp = 0;
- address = HWPfDmaConfig1Reg;
+ address = VRB1_PfDmaConfig1Reg;
value = (1 << 31) + (rlim << 8) + (timestamp << 6) + alen;
acc_reg_write(d, address, value);
/* Default FFT configuration. */
- address = HWPfFftConfig0;
+ address = VRB1_PfFftConfig0;
value = ACC200_FFT_CFG_0;
acc_reg_write(d, address, value);
/* Configure DMA Qmanager addresses. */
- address = HWPfDmaQmgrAddrReg;
- value = HWPfQmgrEgressQueuesTemplate;
+ address = VRB1_PfDmaQmgrAddrReg;
+ value = VRB1_PfQmgrEgressQueuesTemplate;
acc_reg_write(d, address, value);
/* ===== Qmgr Configuration ===== */
@@ -3523,12 +3523,10 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
conf->q_dl_5g.num_qgroups +
conf->q_fft.num_qgroups;
for (qg_idx = 0; qg_idx < ACC200_NUM_QGRPS; qg_idx++) {
- address = HWPfQmgrDepthLog2Grp +
- ACC_BYTES_IN_WORD * qg_idx;
+ address = VRB1_PfQmgrDepthLog2Grp + ACC_BYTES_IN_WORD * qg_idx;
value = aqDepth(qg_idx, conf);
acc_reg_write(d, address, value);
- address = HWPfQmgrTholdGrp +
- ACC_BYTES_IN_WORD * qg_idx;
+ address = VRB1_PfQmgrTholdGrp + ACC_BYTES_IN_WORD * qg_idx;
value = (1 << 16) + (1 << (aqDepth(qg_idx, conf) - 1));
acc_reg_write(d, address, value);
}
@@ -3536,21 +3534,21 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
/* Template Priority in incremental order. */
for (template_idx = 0; template_idx < ACC_NUM_TMPL;
template_idx++) {
- address = HWPfQmgrGrpTmplateReg0Indx + ACC_BYTES_IN_WORD * template_idx;
+ address = VRB1_PfQmgrGrpTmplateReg0Indx + ACC_BYTES_IN_WORD * template_idx;
value = ACC_TMPL_PRI_0;
acc_reg_write(d, address, value);
- address = HWPfQmgrGrpTmplateReg1Indx + ACC_BYTES_IN_WORD * template_idx;
+ address = VRB1_PfQmgrGrpTmplateReg1Indx + ACC_BYTES_IN_WORD * template_idx;
value = ACC_TMPL_PRI_1;
acc_reg_write(d, address, value);
- address = HWPfQmgrGrpTmplateReg2indx + ACC_BYTES_IN_WORD * template_idx;
+ address = VRB1_PfQmgrGrpTmplateReg2indx + ACC_BYTES_IN_WORD * template_idx;
value = ACC_TMPL_PRI_2;
acc_reg_write(d, address, value);
- address = HWPfQmgrGrpTmplateReg3Indx + ACC_BYTES_IN_WORD * template_idx;
+ address = VRB1_PfQmgrGrpTmplateReg3Indx + ACC_BYTES_IN_WORD * template_idx;
value = ACC_TMPL_PRI_3;
acc_reg_write(d, address, value);
}
- address = HWPfQmgrGrpPriority;
+ address = VRB1_PfQmgrGrpPriority;
value = ACC200_CFG_QMGR_HI_P;
acc_reg_write(d, address, value);
@@ -3558,7 +3556,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
for (template_idx = 0; template_idx < ACC_NUM_TMPL;
template_idx++) {
value = 0;
- address = HWPfQmgrGrpTmplateReg4Indx
+ address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
acc_reg_write(d, address, value);
}
@@ -3571,7 +3569,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
for (template_idx = ACC200_SIG_UL_4G;
template_idx <= ACC200_SIG_UL_4G_LAST;
template_idx++) {
- address = HWPfQmgrGrpTmplateReg4Indx
+ address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
acc_reg_write(d, address, value);
}
@@ -3586,9 +3584,9 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
template_idx <= ACC200_SIG_UL_5G_LAST;
template_idx++) {
/* Check engine power-on status */
- address = HwPfFecUl5gIbDebugReg + ACC_ENGINE_OFFSET * template_idx;
+ address = VRB1_PfFecUl5gIbDebugReg + ACC_ENGINE_OFFSET * template_idx;
status = (acc_reg_read(d, address) >> 4) & 0x7;
- address = HWPfQmgrGrpTmplateReg4Indx
+ address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
if (status == 1) {
acc_reg_write(d, address, value);
@@ -3606,7 +3604,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
for (template_idx = ACC200_SIG_DL_4G;
template_idx <= ACC200_SIG_DL_4G_LAST;
template_idx++) {
- address = HWPfQmgrGrpTmplateReg4Indx
+ address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
acc_reg_write(d, address, value);
}
@@ -3619,7 +3617,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
for (template_idx = ACC200_SIG_DL_5G;
template_idx <= ACC200_SIG_DL_5G_LAST;
template_idx++) {
- address = HWPfQmgrGrpTmplateReg4Indx
+ address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
acc_reg_write(d, address, value);
}
@@ -3632,7 +3630,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
for (template_idx = ACC200_SIG_FFT;
template_idx <= ACC200_SIG_FFT_LAST;
template_idx++) {
- address = HWPfQmgrGrpTmplateReg4Indx
+ address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
acc_reg_write(d, address, value);
}
@@ -3644,17 +3642,17 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
acc = accFromQgid(qg_idx, conf);
value |= qman_func_id[acc] << (qg_idx * 4);
}
- acc_reg_write(d, HWPfQmgrGrpFunction0, value);
+ acc_reg_write(d, VRB1_PfQmgrGrpFunction0, value);
value = 0;
for (qg_idx = 0; qg_idx < ACC_NUM_QGRPS_PER_WORD; qg_idx++) {
acc = accFromQgid(qg_idx + ACC_NUM_QGRPS_PER_WORD, conf);
value |= qman_func_id[acc] << (qg_idx * 4);
}
- acc_reg_write(d, HWPfQmgrGrpFunction1, value);
+ acc_reg_write(d, VRB1_PfQmgrGrpFunction1, value);
/* Configuration of the Arbitration QGroup depth to 1. */
for (qg_idx = 0; qg_idx < ACC200_NUM_QGRPS; qg_idx++) {
- address = HWPfQmgrArbQDepthGrp +
+ address = VRB1_PfQmgrArbQDepthGrp +
ACC_BYTES_IN_WORD * qg_idx;
value = 0;
acc_reg_write(d, address, value);
@@ -3664,7 +3662,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
uint32_t aram_address = 0;
for (qg_idx = 0; qg_idx < totalQgs; qg_idx++) {
for (vf_idx = 0; vf_idx < conf->num_vf_bundles; vf_idx++) {
- address = HWPfQmgrVfBaseAddr + vf_idx
+ address = VRB1_PfQmgrVfBaseAddr + vf_idx
* ACC_BYTES_IN_WORD + qg_idx
* ACC_BYTES_IN_WORD * 64;
value = aram_address;
@@ -3682,36 +3680,36 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
}
/* Performance tuning. */
- acc_reg_write(d, HWPfFabricI2Mdma_weight, 0x0FFF);
- acc_reg_write(d, HWPfDma4gdlIbThld, 0x1f10);
+ acc_reg_write(d, VRB1_PfFabricI2Mdma_weight, 0x0FFF);
+ acc_reg_write(d, VRB1_PfDma4gdlIbThld, 0x1f10);
/* ==== HI Configuration ==== */
/* No Info Ring/MSI by default. */
- address = HWPfHiInfoRingIntWrEnRegPf;
+ address = VRB1_PfHiInfoRingIntWrEnRegPf;
value = 0;
acc_reg_write(d, address, value);
- address = HWPfHiCfgMsiIntWrEnRegPf;
+ address = VRB1_PfHiCfgMsiIntWrEnRegPf;
value = 0xFFFFFFFF;
acc_reg_write(d, address, value);
/* Prevent Block on Transmit Error. */
- address = HWPfHiBlockTransmitOnErrorEn;
+ address = VRB1_PfHiBlockTransmitOnErrorEn;
value = 0;
acc_reg_write(d, address, value);
/* Prevents to drop MSI. */
- address = HWPfHiMsiDropEnableReg;
+ address = VRB1_PfHiMsiDropEnableReg;
value = 0;
acc_reg_write(d, address, value);
/* Set the PF Mode register. */
- address = HWPfHiPfMode;
+ address = VRB1_PfHiPfMode;
value = (conf->pf_mode_en) ? ACC_PF_VAL : 0;
acc_reg_write(d, address, value);
/* QoS overflow init. */
value = 1;
- address = HWPfQosmonAEvalOverflow0;
+ address = VRB1_PfQosmonAEvalOverflow0;
acc_reg_write(d, address, value);
- address = HWPfQosmonBEvalOverflow0;
+ address = VRB1_PfQosmonBEvalOverflow0;
acc_reg_write(d, address, value);
/* Configure the FFT RAM LUT. */
@@ -3781,10 +3779,10 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
0x0191F, 0x0178E, 0x015FC, 0x0146A, 0x012D8, 0x01147, 0x00FB5, 0x00E23,
0x00C91, 0x00AFF, 0x0096D, 0x007DB, 0x00648, 0x004B6, 0x00324, 0x00192};
- acc_reg_write(d, HWPfFftRamPageAccess, ACC200_FFT_RAM_EN + 64);
+ acc_reg_write(d, VRB1_PfFftRamPageAccess, ACC200_FFT_RAM_EN + 64);
for (i = 0; i < ACC200_FFT_RAM_SIZE; i++)
- acc_reg_write(d, HWPfFftRamOff + i * 4, fft_lut[i]);
- acc_reg_write(d, HWPfFftRamPageAccess, ACC200_FFT_RAM_DIS);
+ acc_reg_write(d, VRB1_PfFftRamOff + i * 4, fft_lut[i]);
+ acc_reg_write(d, VRB1_PfFftRamPageAccess, ACC200_FFT_RAM_DIS);
/* Enabling AQueues through the Queue hierarchy. */
for (vf_idx = 0; vf_idx < ACC200_NUM_VFS; vf_idx++) {
@@ -3792,7 +3790,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
value = 0;
if (vf_idx < conf->num_vf_bundles && qg_idx < totalQgs)
value = (1 << aqNum(qg_idx, conf)) - 1;
- address = HWPfQmgrAqEnableVf + vf_idx * ACC_BYTES_IN_WORD;
+ address = VRB1_PfQmgrAqEnableVf + vf_idx * ACC_BYTES_IN_WORD;
value += (qg_idx << 16);
acc_reg_write(d, address, value);
}
diff --git a/drivers/baseband/acc/vrb_pmd.h b/drivers/baseband/acc/vrb_pmd.h
index 72f92e8414..d4bb16da26 100644
--- a/drivers/baseband/acc/vrb_pmd.h
+++ b/drivers/baseband/acc/vrb_pmd.h
@@ -128,80 +128,80 @@ struct acc_registry_addr {
/* Structure holding registry addresses for PF */
static const struct acc_registry_addr acc200_pf_reg_addr = {
- .dma_ring_dl5g_hi = HWPfDmaFec5GdlDescBaseHiRegVf,
- .dma_ring_dl5g_lo = HWPfDmaFec5GdlDescBaseLoRegVf,
- .dma_ring_ul5g_hi = HWPfDmaFec5GulDescBaseHiRegVf,
- .dma_ring_ul5g_lo = HWPfDmaFec5GulDescBaseLoRegVf,
- .dma_ring_dl4g_hi = HWPfDmaFec4GdlDescBaseHiRegVf,
- .dma_ring_dl4g_lo = HWPfDmaFec4GdlDescBaseLoRegVf,
- .dma_ring_ul4g_hi = HWPfDmaFec4GulDescBaseHiRegVf,
- .dma_ring_ul4g_lo = HWPfDmaFec4GulDescBaseLoRegVf,
- .dma_ring_fft_hi = HWPfDmaFftDescBaseHiRegVf,
- .dma_ring_fft_lo = HWPfDmaFftDescBaseLoRegVf,
- .ring_size = HWPfQmgrRingSizeVf,
- .info_ring_hi = HWPfHiInfoRingBaseHiRegPf,
- .info_ring_lo = HWPfHiInfoRingBaseLoRegPf,
- .info_ring_en = HWPfHiInfoRingIntWrEnRegPf,
- .info_ring_ptr = HWPfHiInfoRingPointerRegPf,
- .tail_ptrs_dl5g_hi = HWPfDmaFec5GdlRespPtrHiRegVf,
- .tail_ptrs_dl5g_lo = HWPfDmaFec5GdlRespPtrLoRegVf,
- .tail_ptrs_ul5g_hi = HWPfDmaFec5GulRespPtrHiRegVf,
- .tail_ptrs_ul5g_lo = HWPfDmaFec5GulRespPtrLoRegVf,
- .tail_ptrs_dl4g_hi = HWPfDmaFec4GdlRespPtrHiRegVf,
- .tail_ptrs_dl4g_lo = HWPfDmaFec4GdlRespPtrLoRegVf,
- .tail_ptrs_ul4g_hi = HWPfDmaFec4GulRespPtrHiRegVf,
- .tail_ptrs_ul4g_lo = HWPfDmaFec4GulRespPtrLoRegVf,
- .tail_ptrs_fft_hi = HWPfDmaFftRespPtrHiRegVf,
- .tail_ptrs_fft_lo = HWPfDmaFftRespPtrLoRegVf,
- .depth_log0_offset = HWPfQmgrGrpDepthLog20Vf,
- .depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
- .qman_group_func = HWPfQmgrGrpFunction0,
- .hi_mode = HWPfHiMsixVectorMapperPf,
- .pf_mode = HWPfHiPfMode,
- .pmon_ctrl_a = HWPfPermonACntrlRegVf,
- .pmon_ctrl_b = HWPfPermonBCntrlRegVf,
- .pmon_ctrl_c = HWPfPermonCCntrlRegVf,
+ .dma_ring_dl5g_hi = VRB1_PfDmaFec5GdlDescBaseHiRegVf,
+ .dma_ring_dl5g_lo = VRB1_PfDmaFec5GdlDescBaseLoRegVf,
+ .dma_ring_ul5g_hi = VRB1_PfDmaFec5GulDescBaseHiRegVf,
+ .dma_ring_ul5g_lo = VRB1_PfDmaFec5GulDescBaseLoRegVf,
+ .dma_ring_dl4g_hi = VRB1_PfDmaFec4GdlDescBaseHiRegVf,
+ .dma_ring_dl4g_lo = VRB1_PfDmaFec4GdlDescBaseLoRegVf,
+ .dma_ring_ul4g_hi = VRB1_PfDmaFec4GulDescBaseHiRegVf,
+ .dma_ring_ul4g_lo = VRB1_PfDmaFec4GulDescBaseLoRegVf,
+ .dma_ring_fft_hi = VRB1_PfDmaFftDescBaseHiRegVf,
+ .dma_ring_fft_lo = VRB1_PfDmaFftDescBaseLoRegVf,
+ .ring_size = VRB1_PfQmgrRingSizeVf,
+ .info_ring_hi = VRB1_PfHiInfoRingBaseHiRegPf,
+ .info_ring_lo = VRB1_PfHiInfoRingBaseLoRegPf,
+ .info_ring_en = VRB1_PfHiInfoRingIntWrEnRegPf,
+ .info_ring_ptr = VRB1_PfHiInfoRingPointerRegPf,
+ .tail_ptrs_dl5g_hi = VRB1_PfDmaFec5GdlRespPtrHiRegVf,
+ .tail_ptrs_dl5g_lo = VRB1_PfDmaFec5GdlRespPtrLoRegVf,
+ .tail_ptrs_ul5g_hi = VRB1_PfDmaFec5GulRespPtrHiRegVf,
+ .tail_ptrs_ul5g_lo = VRB1_PfDmaFec5GulRespPtrLoRegVf,
+ .tail_ptrs_dl4g_hi = VRB1_PfDmaFec4GdlRespPtrHiRegVf,
+ .tail_ptrs_dl4g_lo = VRB1_PfDmaFec4GdlRespPtrLoRegVf,
+ .tail_ptrs_ul4g_hi = VRB1_PfDmaFec4GulRespPtrHiRegVf,
+ .tail_ptrs_ul4g_lo = VRB1_PfDmaFec4GulRespPtrLoRegVf,
+ .tail_ptrs_fft_hi = VRB1_PfDmaFftRespPtrHiRegVf,
+ .tail_ptrs_fft_lo = VRB1_PfDmaFftRespPtrLoRegVf,
+ .depth_log0_offset = VRB1_PfQmgrGrpDepthLog20Vf,
+ .depth_log1_offset = VRB1_PfQmgrGrpDepthLog21Vf,
+ .qman_group_func = VRB1_PfQmgrGrpFunction0,
+ .hi_mode = VRB1_PfHiMsixVectorMapperPf,
+ .pf_mode = VRB1_PfHiPfMode,
+ .pmon_ctrl_a = VRB1_PfPermonACntrlRegVf,
+ .pmon_ctrl_b = VRB1_PfPermonBCntrlRegVf,
+ .pmon_ctrl_c = VRB1_PfPermonCCntrlRegVf,
.vf2pf_doorbell = 0,
.pf2vf_doorbell = 0,
};
/* Structure holding registry addresses for VF */
static const struct acc_registry_addr acc200_vf_reg_addr = {
- .dma_ring_dl5g_hi = HWVfDmaFec5GdlDescBaseHiRegVf,
- .dma_ring_dl5g_lo = HWVfDmaFec5GdlDescBaseLoRegVf,
- .dma_ring_ul5g_hi = HWVfDmaFec5GulDescBaseHiRegVf,
- .dma_ring_ul5g_lo = HWVfDmaFec5GulDescBaseLoRegVf,
- .dma_ring_dl4g_hi = HWVfDmaFec4GdlDescBaseHiRegVf,
- .dma_ring_dl4g_lo = HWVfDmaFec4GdlDescBaseLoRegVf,
- .dma_ring_ul4g_hi = HWVfDmaFec4GulDescBaseHiRegVf,
- .dma_ring_ul4g_lo = HWVfDmaFec4GulDescBaseLoRegVf,
- .dma_ring_fft_hi = HWVfDmaFftDescBaseHiRegVf,
- .dma_ring_fft_lo = HWVfDmaFftDescBaseLoRegVf,
- .ring_size = HWVfQmgrRingSizeVf,
- .info_ring_hi = HWVfHiInfoRingBaseHiVf,
- .info_ring_lo = HWVfHiInfoRingBaseLoVf,
- .info_ring_en = HWVfHiInfoRingIntWrEnVf,
- .info_ring_ptr = HWVfHiInfoRingPointerVf,
- .tail_ptrs_dl5g_hi = HWVfDmaFec5GdlRespPtrHiRegVf,
- .tail_ptrs_dl5g_lo = HWVfDmaFec5GdlRespPtrLoRegVf,
- .tail_ptrs_ul5g_hi = HWVfDmaFec5GulRespPtrHiRegVf,
- .tail_ptrs_ul5g_lo = HWVfDmaFec5GulRespPtrLoRegVf,
- .tail_ptrs_dl4g_hi = HWVfDmaFec4GdlRespPtrHiRegVf,
- .tail_ptrs_dl4g_lo = HWVfDmaFec4GdlRespPtrLoRegVf,
- .tail_ptrs_ul4g_hi = HWVfDmaFec4GulRespPtrHiRegVf,
- .tail_ptrs_ul4g_lo = HWVfDmaFec4GulRespPtrLoRegVf,
- .tail_ptrs_fft_hi = HWVfDmaFftRespPtrHiRegVf,
- .tail_ptrs_fft_lo = HWVfDmaFftRespPtrLoRegVf,
- .depth_log0_offset = HWVfQmgrGrpDepthLog20Vf,
- .depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
- .qman_group_func = HWVfQmgrGrpFunction0Vf,
- .hi_mode = HWVfHiMsixVectorMapperVf,
+ .dma_ring_dl5g_hi = VRB1_VfDmaFec5GdlDescBaseHiRegVf,
+ .dma_ring_dl5g_lo = VRB1_VfDmaFec5GdlDescBaseLoRegVf,
+ .dma_ring_ul5g_hi = VRB1_VfDmaFec5GulDescBaseHiRegVf,
+ .dma_ring_ul5g_lo = VRB1_VfDmaFec5GulDescBaseLoRegVf,
+ .dma_ring_dl4g_hi = VRB1_VfDmaFec4GdlDescBaseHiRegVf,
+ .dma_ring_dl4g_lo = VRB1_VfDmaFec4GdlDescBaseLoRegVf,
+ .dma_ring_ul4g_hi = VRB1_VfDmaFec4GulDescBaseHiRegVf,
+ .dma_ring_ul4g_lo = VRB1_VfDmaFec4GulDescBaseLoRegVf,
+ .dma_ring_fft_hi = VRB1_VfDmaFftDescBaseHiRegVf,
+ .dma_ring_fft_lo = VRB1_VfDmaFftDescBaseLoRegVf,
+ .ring_size = VRB1_VfQmgrRingSizeVf,
+ .info_ring_hi = VRB1_VfHiInfoRingBaseHiVf,
+ .info_ring_lo = VRB1_VfHiInfoRingBaseLoVf,
+ .info_ring_en = VRB1_VfHiInfoRingIntWrEnVf,
+ .info_ring_ptr = VRB1_VfHiInfoRingPointerVf,
+ .tail_ptrs_dl5g_hi = VRB1_VfDmaFec5GdlRespPtrHiRegVf,
+ .tail_ptrs_dl5g_lo = VRB1_VfDmaFec5GdlRespPtrLoRegVf,
+ .tail_ptrs_ul5g_hi = VRB1_VfDmaFec5GulRespPtrHiRegVf,
+ .tail_ptrs_ul5g_lo = VRB1_VfDmaFec5GulRespPtrLoRegVf,
+ .tail_ptrs_dl4g_hi = VRB1_VfDmaFec4GdlRespPtrHiRegVf,
+ .tail_ptrs_dl4g_lo = VRB1_VfDmaFec4GdlRespPtrLoRegVf,
+ .tail_ptrs_ul4g_hi = VRB1_VfDmaFec4GulRespPtrHiRegVf,
+ .tail_ptrs_ul4g_lo = VRB1_VfDmaFec4GulRespPtrLoRegVf,
+ .tail_ptrs_fft_hi = VRB1_VfDmaFftRespPtrHiRegVf,
+ .tail_ptrs_fft_lo = VRB1_VfDmaFftRespPtrLoRegVf,
+ .depth_log0_offset = VRB1_VfQmgrGrpDepthLog20Vf,
+ .depth_log1_offset = VRB1_VfQmgrGrpDepthLog21Vf,
+ .qman_group_func = VRB1_VfQmgrGrpFunction0Vf,
+ .hi_mode = VRB1_VfHiMsixVectorMapperVf,
.pf_mode = 0,
- .pmon_ctrl_a = HWVfPmACntrlRegVf,
- .pmon_ctrl_b = HWVfPmBCntrlRegVf,
- .pmon_ctrl_c = HWVfPmCCntrlRegVf,
- .vf2pf_doorbell = HWVfHiVfToPfDbellVf,
- .pf2vf_doorbell = HWVfHiPfToVfDbellVf,
+ .pmon_ctrl_a = VRB1_VfPmACntrlRegVf,
+ .pmon_ctrl_b = VRB1_VfPmBCntrlRegVf,
+ .pmon_ctrl_c = VRB1_VfPmCCntrlRegVf,
+ .vf2pf_doorbell = VRB1_VfHiVfToPfDbellVf,
+ .pf2vf_doorbell = VRB1_VfHiPfToVfDbellVf,
};
#endif /* _VRB_PMD_H_ */
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v1 3/6] baseband/acc: adding prefix to VRB1 registers
2023-01-17 22:36 ` [PATCH v1 3/6] baseband/acc: adding prefix to VRB1 registers Nicolas Chautru
@ 2023-01-31 14:45 ` Maxime Coquelin
0 siblings, 0 replies; 16+ messages in thread
From: Maxime Coquelin @ 2023-01-31 14:45 UTC (permalink / raw)
To: Nicolas Chautru, dev; +Cc: hernan.vargas
On 1/17/23 23:36, Nicolas Chautru wrote:
> Adding prefix to register names specific to VRB1 (ACC200)
> to avoid future enum collision.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> drivers/baseband/acc/acc200_pf_enum.h | 174 +++++++++++++-------------
> drivers/baseband/acc/acc200_vf_enum.h | 128 +++++++++----------
> drivers/baseband/acc/rte_vrb_pmd.c | 136 ++++++++++----------
> drivers/baseband/acc/vrb_pmd.h | 134 ++++++++++----------
> 4 files changed, 285 insertions(+), 287 deletions(-)
>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks,
Maxime
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v1 4/6] baseband/acc: update prefix for VRB PMD functions
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
` (2 preceding siblings ...)
2023-01-17 22:36 ` [PATCH v1 3/6] baseband/acc: adding prefix to VRB1 registers Nicolas Chautru
@ 2023-01-17 22:36 ` Nicolas Chautru
2023-01-31 14:51 ` Maxime Coquelin
2023-01-17 22:36 ` [PATCH v1 5/6] baseband/acc: rename of remaining acc200 prefix to vrb1 Nicolas Chautru
` (2 subsequent siblings)
6 siblings, 1 reply; 16+ messages in thread
From: Nicolas Chautru @ 2023-01-17 22:36 UTC (permalink / raw)
To: dev, maxime.coquelin; +Cc: hernan.vargas, Nicolas Chautru
Include vrb_ prefix for all generic functions for VRB PMD.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
drivers/baseband/acc/rte_vrb_pmd.c | 248 ++++++++++++++---------------
drivers/baseband/acc/vrb_pmd.h | 2 +-
2 files changed, 124 insertions(+), 126 deletions(-)
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
index 01e018f233..c590ce5988 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -22,21 +22,19 @@
#include "vrb_pmd.h"
#ifdef RTE_LIBRTE_BBDEV_DEBUG
-RTE_LOG_REGISTER_DEFAULT(acc200_logtype, DEBUG);
+RTE_LOG_REGISTER_DEFAULT(vrb_logtype, DEBUG);
#else
-RTE_LOG_REGISTER_DEFAULT(acc200_logtype, NOTICE);
+RTE_LOG_REGISTER_DEFAULT(vrb_logtype, NOTICE);
#endif
/* Calculate the offset of the enqueue register. */
static inline uint32_t
-queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id)
+acc200_queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id)
{
if (pf_device)
- return ((vf_id << 12) + (qgrp_id << 7) + (aq_id << 3) +
- VRB1_PfQmgrIngressAq);
+ return ((vf_id << 12) + (qgrp_id << 7) + (aq_id << 3) + VRB1_PfQmgrIngressAq);
else
- return ((qgrp_id << 7) + (aq_id << 3) +
- VRB1_VfQmgrIngressAq);
+ return ((qgrp_id << 7) + (aq_id << 3) + VRB1_VfQmgrIngressAq);
}
enum {UL_4G = 0, UL_5G, DL_4G, DL_5G, FFT, NUM_ACC};
@@ -156,14 +154,14 @@ updateQtop(uint8_t acc, uint8_t qg, struct rte_acc_conf *acc_conf, struct acc_de
if (q_top->first_qgroup_index == -1) {
q_top->first_qgroup_index = qg;
/* Can be optimized to assume all are enabled by default. */
- reg = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, d->num_aqs - 1));
+ reg = acc_reg_read(d, d->queue_offset(d->pf_device, 0, qg, d->num_aqs - 1));
if (reg & ACC_QUEUE_ENABLE) {
q_top->num_aqs_per_groups = d->num_aqs;
return;
}
q_top->num_aqs_per_groups = 0;
for (aq = 0; aq < d->num_aqs; aq++) {
- reg = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, aq));
+ reg = acc_reg_read(d, d->queue_offset(d->pf_device, 0, qg, aq));
if (reg & ACC_QUEUE_ENABLE)
q_top->num_aqs_per_groups++;
}
@@ -172,13 +170,13 @@ updateQtop(uint8_t acc, uint8_t qg, struct rte_acc_conf *acc_conf, struct acc_de
/* Check device Qmgr is enabled for protection */
static inline bool
-acc200_check_device_enable(struct rte_bbdev *dev)
+vrb_check_device_enable(struct rte_bbdev *dev)
{
uint32_t reg_aq, qg;
struct acc_device *d = dev->data->dev_private;
for (qg = 0; qg < d->num_qgroups; qg++) {
- reg_aq = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, 0));
+ reg_aq = acc_reg_read(d, d->queue_offset(d->pf_device, 0, qg, 0));
if (reg_aq & ACC_QUEUE_ENABLE)
return true;
}
@@ -187,7 +185,7 @@ acc200_check_device_enable(struct rte_bbdev *dev)
/* Fetch configuration enabled for the PF/VF using MMIO Read (slow). */
static inline void
-fetch_acc200_config(struct rte_bbdev *dev)
+fetch_acc_config(struct rte_bbdev *dev)
{
struct acc_device *d = dev->data->dev_private;
struct rte_acc_conf *acc_conf = &d->acc_conf;
@@ -202,7 +200,7 @@ fetch_acc200_config(struct rte_bbdev *dev)
if (d->configured)
return;
- if (!acc200_check_device_enable(dev)) {
+ if (!vrb_check_device_enable(dev)) {
rte_bbdev_log(NOTICE, "%s has no queue enabled and can't be used.",
dev->data->name);
return;
@@ -217,7 +215,7 @@ fetch_acc200_config(struct rte_bbdev *dev)
reg0 = acc_reg_read(d, d->reg_addr->qman_group_func);
reg1 = acc_reg_read(d, d->reg_addr->qman_group_func + 4);
for (qg = 0; qg < d->num_qgroups; qg++) {
- reg_aq = acc_reg_read(d, queue_offset(d->pf_device, 0, qg, 0));
+ reg_aq = acc_reg_read(d, d->queue_offset(d->pf_device, 0, qg, 0));
if (reg_aq & ACC_QUEUE_ENABLE) {
if (qg < ACC_NUM_QGRPS_PER_WORD)
idx = (reg0 >> (qg * 4)) & 0x7;
@@ -275,14 +273,14 @@ fetch_acc200_config(struct rte_bbdev *dev)
}
static inline void
-acc200_vf2pf(struct acc_device *d, unsigned int payload)
+vrb_vf2pf(struct acc_device *d, unsigned int payload)
{
acc_reg_write(d, d->reg_addr->vf2pf_doorbell, payload);
}
/* Request device status information. */
static inline uint32_t
-acc200_device_status(struct rte_bbdev *dev)
+vrb_device_status(struct rte_bbdev *dev)
{
struct acc_device *d = dev->data->dev_private;
uint32_t reg, time_out = 0;
@@ -290,7 +288,7 @@ acc200_device_status(struct rte_bbdev *dev)
if (d->pf_device)
return RTE_BBDEV_DEV_NOT_SUPPORTED;
- acc200_vf2pf(d, ACC_VF2PF_STATUS_REQUEST);
+ vrb_vf2pf(d, ACC_VF2PF_STATUS_REQUEST);
reg = acc_reg_read(d, d->reg_addr->pf2vf_doorbell);
while ((time_out < ACC200_STATUS_TO) && (reg == RTE_BBDEV_DEV_NOSTATUS)) {
usleep(ACC200_STATUS_WAIT); /*< Wait or VF->PF->VF Comms */
@@ -303,7 +301,7 @@ acc200_device_status(struct rte_bbdev *dev)
/* Checks PF Info Ring to find the interrupt cause and handles it accordingly. */
static inline void
-acc200_check_ir(struct acc_device *acc200_dev)
+vrb_check_ir(struct acc_device *acc200_dev)
{
volatile union acc_info_ring_data *ring_data;
uint16_t info_ring_head = acc200_dev->info_ring_head;
@@ -327,7 +325,7 @@ acc200_check_ir(struct acc_device *acc200_dev)
/* Interrupt handler triggered by ACC200 dev for handling specific interrupt. */
static void
-acc200_dev_interrupt_handler(void *cb_arg)
+vrb_dev_interrupt_handler(void *cb_arg)
{
struct rte_bbdev *dev = cb_arg;
struct acc_device *acc200_dev = dev->data->dev_private;
@@ -440,7 +438,7 @@ allocate_info_ring(struct rte_bbdev *dev)
/* Allocate 64MB memory used for all software rings. */
static int
-acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
+vrb_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
{
uint32_t phys_low, phys_high, value;
struct acc_device *d = dev->data->dev_private;
@@ -459,7 +457,7 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
return -ENODEV;
}
- if (!acc200_check_device_enable(dev)) {
+ if (!vrb_check_device_enable(dev)) {
rte_bbdev_log(NOTICE, "%s has no queue enabled and can't be used.",
dev->data->name);
return -ENODEV;
@@ -487,7 +485,7 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
phys_low = (uint32_t)(d->sw_rings_iova & ~(ACC_SIZE_64MBYTE-1));
/* Read the populated cfg from ACC200 registers. */
- fetch_acc200_config(dev);
+ fetch_acc_config(dev);
/* Start Pmon */
for (value = 0; value <= 2; value++) {
@@ -567,7 +565,7 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
/* Mark as configured properly */
d->configured = true;
- acc200_vf2pf(d, ACC_VF2PF_USING_VF);
+ vrb_vf2pf(d, ACC_VF2PF_USING_VF);
rte_bbdev_log_debug(
"ACC200 (%s) configured sw_rings = %p, sw_rings_iova = %#"
@@ -585,7 +583,7 @@ acc200_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
}
static int
-acc200_intr_enable(struct rte_bbdev *dev)
+vrb_intr_enable(struct rte_bbdev *dev)
{
int ret;
struct acc_device *d = dev->data->dev_private;
@@ -611,7 +609,7 @@ acc200_intr_enable(struct rte_bbdev *dev)
return ret;
}
ret = rte_intr_callback_register(dev->intr_handle,
- acc200_dev_interrupt_handler, dev);
+ vrb_dev_interrupt_handler, dev);
if (ret < 0) {
rte_bbdev_log(ERR,
"Couldn't register interrupt callback for device: %s",
@@ -667,7 +665,7 @@ acc200_intr_enable(struct rte_bbdev *dev)
return ret;
}
ret = rte_intr_callback_register(dev->intr_handle,
- acc200_dev_interrupt_handler, dev);
+ vrb_dev_interrupt_handler, dev);
if (ret < 0) {
rte_bbdev_log(ERR,
"Couldn't register interrupt callback for device: %s",
@@ -686,10 +684,10 @@ acc200_intr_enable(struct rte_bbdev *dev)
/* Free memory used for software rings. */
static int
-acc200_dev_close(struct rte_bbdev *dev)
+vrb_dev_close(struct rte_bbdev *dev)
{
struct acc_device *d = dev->data->dev_private;
- acc200_check_ir(d);
+ vrb_check_ir(d);
if (d->sw_rings_base != NULL) {
rte_free(d->tail_ptrs);
rte_free(d->info_ring);
@@ -711,7 +709,7 @@ acc200_dev_close(struct rte_bbdev *dev)
* Note : Only supporting VF0 Bundle for PF mode.
*/
static int
-acc200_find_free_queue_idx(struct rte_bbdev *dev,
+vrb_find_free_queue_idx(struct rte_bbdev *dev,
const struct rte_bbdev_queue_conf *conf)
{
struct acc_device *d = dev->data->dev_private;
@@ -748,7 +746,7 @@ acc200_find_free_queue_idx(struct rte_bbdev *dev,
/* Setup ACC200 queue. */
static int
-acc200_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
+vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
const struct rte_bbdev_queue_conf *conf)
{
struct acc_device *d = dev->data->dev_private;
@@ -852,7 +850,7 @@ acc200_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
q->op_type = conf->op_type;
- q_idx = acc200_find_free_queue_idx(dev, conf);
+ q_idx = vrb_find_free_queue_idx(dev, conf);
if (q_idx == -1) {
ret = -EINVAL;
goto free_companion_ring_addr;
@@ -874,7 +872,7 @@ acc200_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
q->aq_depth = (1 << d->acc_conf.q_fft.aq_depth_log2);
q->mmio_reg_enqueue = RTE_PTR_ADD(d->mmio_base,
- queue_offset(d->pf_device,
+ d->queue_offset(d->pf_device,
q->vf_id, q->qgrp_id, q->aq_id));
rte_bbdev_log_debug(
@@ -903,7 +901,7 @@ acc200_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
}
static inline void
-acc200_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,
+vrb_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,
uint16_t index)
{
if (op == NULL)
@@ -934,7 +932,7 @@ acc200_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,
/* Stop ACC200 queue and clear counters. */
static int
-acc200_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
+vrb_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
{
struct acc_queue *q;
struct rte_bbdev_dec_op *op;
@@ -945,7 +943,7 @@ acc200_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
q->sw_ring_depth, q->op_type);
for (i = 0; i < q->sw_ring_depth; ++i) {
op = (q->ring_addr + i)->req.op_addr;
- acc200_print_op(op, q->op_type, i);
+ vrb_print_op(op, q->op_type, i);
}
/* ignore all operations in flight and clear counters */
q->sw_ring_tail = q->sw_ring_head;
@@ -962,7 +960,7 @@ acc200_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
/* Release ACC200 queue. */
static int
-acc200_queue_release(struct rte_bbdev *dev, uint16_t q_id)
+vrb_queue_release(struct rte_bbdev *dev, uint16_t q_id)
{
struct acc_device *d = dev->data->dev_private;
struct acc_queue *q = dev->data->queues[q_id].queue_private;
@@ -982,7 +980,7 @@ acc200_queue_release(struct rte_bbdev *dev, uint16_t q_id)
/* Get ACC200 device info. */
static void
-acc200_dev_info_get(struct rte_bbdev *dev,
+vrb_dev_info_get(struct rte_bbdev *dev,
struct rte_bbdev_driver_info *dev_info)
{
struct acc_device *d = dev->data->dev_private;
@@ -1094,9 +1092,9 @@ acc200_dev_info_get(struct rte_bbdev *dev,
dev_info->driver_name = dev->device->driver->name;
/* Read and save the populated config from ACC200 registers. */
- fetch_acc200_config(dev);
+ fetch_acc_config(dev);
/* Check the status of device. */
- dev_info->device_status = acc200_device_status(dev);
+ dev_info->device_status = vrb_device_status(dev);
/* Exposed number of queues. */
dev_info->num_queues[RTE_BBDEV_OP_NONE] = 0;
@@ -1130,11 +1128,11 @@ acc200_dev_info_get(struct rte_bbdev *dev,
dev_info->capabilities = bbdev_capabilities;
dev_info->harq_buffer_size = 0;
- acc200_check_ir(d);
+ vrb_check_ir(d);
}
static int
-acc200_queue_intr_enable(struct rte_bbdev *dev, uint16_t queue_id)
+vrb_queue_intr_enable(struct rte_bbdev *dev, uint16_t queue_id)
{
struct acc_queue *q = dev->data->queues[queue_id].queue_private;
@@ -1147,7 +1145,7 @@ acc200_queue_intr_enable(struct rte_bbdev *dev, uint16_t queue_id)
}
static int
-acc200_queue_intr_disable(struct rte_bbdev *dev, uint16_t queue_id)
+vrb_queue_intr_disable(struct rte_bbdev *dev, uint16_t queue_id)
{
struct acc_queue *q = dev->data->queues[queue_id].queue_private;
@@ -1159,16 +1157,16 @@ acc200_queue_intr_disable(struct rte_bbdev *dev, uint16_t queue_id)
return 0;
}
-static const struct rte_bbdev_ops acc200_bbdev_ops = {
- .setup_queues = acc200_setup_queues,
- .intr_enable = acc200_intr_enable,
- .close = acc200_dev_close,
- .info_get = acc200_dev_info_get,
- .queue_setup = acc200_queue_setup,
- .queue_release = acc200_queue_release,
- .queue_stop = acc200_queue_stop,
- .queue_intr_enable = acc200_queue_intr_enable,
- .queue_intr_disable = acc200_queue_intr_disable
+static const struct rte_bbdev_ops vrb_bbdev_ops = {
+ .setup_queues = vrb_setup_queues,
+ .intr_enable = vrb_intr_enable,
+ .close = vrb_dev_close,
+ .info_get = vrb_dev_info_get,
+ .queue_setup = vrb_queue_setup,
+ .queue_release = vrb_queue_release,
+ .queue_stop = vrb_queue_stop,
+ .queue_intr_enable = vrb_queue_intr_enable,
+ .queue_intr_disable = vrb_queue_intr_disable
};
/* ACC200 PCI PF address map. */
@@ -1189,7 +1187,7 @@ static struct rte_pci_id pci_id_acc200_vf_map[] = {
/* Fill in a frame control word for turbo decoding. */
static inline void
-acc200_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
+vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
{
fcw->fcw_ver = 1;
fcw->num_maps = ACC_FCW_TD_AUTOMAP;
@@ -1606,7 +1604,7 @@ acc200_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
}
static inline void
-acc200_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
+vrb_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
struct acc_dma_req_desc *desc,
struct rte_mbuf *input, struct rte_mbuf *h_output,
uint32_t *in_offset, uint32_t *h_out_offset,
@@ -1750,7 +1748,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,
* all codes blocks have same configuration multiplexed on the same descriptor.
*/
static inline void
-enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
+vrb_enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint16_t total_enqueued_descs, int16_t num_cbs, uint32_t e,
uint16_t in_len_B, uint32_t out_len_B, uint32_t *in_offset,
uint32_t *out_offset)
@@ -1870,7 +1868,7 @@ enqueue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
* returns the number of descs used.
*/
static inline int
-enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
+vrb_enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint16_t enq_descs, uint8_t cbs_in_tb)
{
uint8_t num_a, num_b;
@@ -1899,7 +1897,7 @@ enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint32_t out_len_B = (e + 7) >> 3;
uint8_t enq = RTE_MIN(num_a, ACC_MUX_5GDL_DESC);
num_a -= enq;
- enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
+ vrb_enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
out_len_B, &in_offset, &out_offset);
enq_descs++;
}
@@ -1908,7 +1906,7 @@ enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint32_t out_len_B = (e + 7) >> 3;
uint8_t enq = RTE_MIN(num_b, ACC_MUX_5GDL_DESC);
num_b -= enq;
- enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
+ vrb_enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
out_len_B, &in_offset, &out_offset);
enq_descs++;
}
@@ -1939,7 +1937,7 @@ enqueue_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
*s_output_head, *s_output;
desc = acc_desc(q, total_enqueued_cbs);
- acc200_fcw_td_fill(op, &desc->req.fcw_td);
+ vrb_fcw_td_fill(op, &desc->req.fcw_td);
input = op->turbo_dec.input.data;
h_output_head = h_output = op->turbo_dec.hard_output.data;
@@ -1981,7 +1979,7 @@ enqueue_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
/** Enqueue one decode operations for ACC200 device in CB mode */
static inline int
-enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
+vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs, bool same_op)
{
int ret, hq_len;
@@ -2017,7 +2015,7 @@ enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
rte_memcpy(new_ptr + ACC_DESC_FCW_OFFSET,
prev_ptr + ACC_DESC_FCW_OFFSET,
ACC_FCW_LD_BLEN);
- acc200_dma_desc_ld_update(op, &desc->req, input, h_output,
+ vrb_dma_desc_ld_update(op, &desc->req, input, h_output,
&in_offset, &h_out_offset,
&h_out_length, harq_layout);
} else {
@@ -2070,7 +2068,7 @@ enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
/* Enqueue one decode operations for ACC200 device in TB mode. */
static inline int
-enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
+vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs, uint8_t cbs_in_tb)
{
union acc_dma_desc *desc = NULL;
@@ -2179,7 +2177,7 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
desc_idx = acc_desc_idx(q, total_enqueued_cbs);
desc = q->ring_addr + desc_idx;
fcw_offset = (desc_idx << 8) + ACC_DESC_FCW_OFFSET;
- acc200_fcw_td_fill(op, &desc->req.fcw_td);
+ vrb_fcw_td_fill(op, &desc->req.fcw_td);
input = op->turbo_dec.input.data;
h_output_head = h_output = op->turbo_dec.hard_output.data;
@@ -2251,7 +2249,7 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
/* Enqueue encode operations for ACC200 device in CB mode. */
static uint16_t
-acc200_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2287,7 +2285,7 @@ acc200_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
/** Enqueue encode operations for ACC200 device in CB mode. */
static inline uint16_t
-acc200_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2328,7 +2326,7 @@ acc200_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
/* Enqueue encode operations for ACC200 device in TB mode. */
static uint16_t
-acc200_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2367,7 +2365,7 @@ acc200_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
/* Enqueue LDPC encode operations for ACC200 device in TB mode. */
static uint16_t
-acc200_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2384,7 +2382,7 @@ acc200_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
break;
}
- descs_used = enqueue_ldpc_enc_one_op_tb(q, ops[i], enqueued_descs, cbs_in_tb);
+ descs_used = vrb_enqueue_ldpc_enc_one_op_tb(q, ops[i], enqueued_descs, cbs_in_tb);
if (descs_used < 0) {
acc_enqueue_invalid(q_data);
break;
@@ -2406,36 +2404,36 @@ acc200_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
/* Enqueue encode operations for ACC200 device. */
static uint16_t
-acc200_enqueue_enc(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
int32_t aq_avail = acc_aq_avail(q_data, num);
if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
- return acc200_enqueue_enc_tb(q_data, ops, num);
+ return vrb_enqueue_enc_tb(q_data, ops, num);
else
- return acc200_enqueue_enc_cb(q_data, ops, num);
+ return vrb_enqueue_enc_cb(q_data, ops, num);
}
/* Enqueue encode operations for ACC200 device. */
static uint16_t
-acc200_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
int32_t aq_avail = acc_aq_avail(q_data, num);
if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
- return acc200_enqueue_ldpc_enc_tb(q_data, ops, num);
+ return vrb_enqueue_ldpc_enc_tb(q_data, ops, num);
else
- return acc200_enqueue_ldpc_enc_cb(q_data, ops, num);
+ return vrb_enqueue_ldpc_enc_cb(q_data, ops, num);
}
/* Enqueue decode operations for ACC200 device in CB mode. */
static uint16_t
-acc200_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2468,7 +2466,7 @@ acc200_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
/* Enqueue decode operations for ACC200 device in TB mode. */
static uint16_t
-acc200_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2485,7 +2483,7 @@ acc200_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
break;
avail -= cbs_in_tb;
- ret = enqueue_ldpc_dec_one_op_tb(q, ops[i],
+ ret = vrb_enqueue_ldpc_dec_one_op_tb(q, ops[i],
enqueued_cbs, cbs_in_tb);
if (ret <= 0)
break;
@@ -2502,7 +2500,7 @@ acc200_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
/* Enqueue decode operations for ACC200 device in CB mode. */
static uint16_t
-acc200_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2526,7 +2524,7 @@ acc200_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
ops[i]->ldpc_dec.n_cb, ops[i]->ldpc_dec.q_m,
ops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e,
same_op);
- ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
+ ret = vrb_enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
if (ret < 0) {
acc_enqueue_invalid(q_data);
break;
@@ -2547,7 +2545,7 @@ acc200_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
/* Enqueue decode operations for ACC200 device in TB mode */
static uint16_t
-acc200_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2584,36 +2582,36 @@ acc200_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
/* Enqueue decode operations for ACC200 device. */
static uint16_t
-acc200_enqueue_dec(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
int32_t aq_avail = acc_aq_avail(q_data, num);
if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
- return acc200_enqueue_dec_tb(q_data, ops, num);
+ return vrb_enqueue_dec_tb(q_data, ops, num);
else
- return acc200_enqueue_dec_cb(q_data, ops, num);
+ return vrb_enqueue_dec_cb(q_data, ops, num);
}
/* Enqueue decode operations for ACC200 device. */
static uint16_t
-acc200_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
int32_t aq_avail = acc_aq_avail(q_data, num);
if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
- return acc200_enqueue_ldpc_dec_tb(q_data, ops, num);
+ return vrb_enqueue_ldpc_dec_tb(q_data, ops, num);
else
- return acc200_enqueue_ldpc_dec_cb(q_data, ops, num);
+ return vrb_enqueue_ldpc_dec_cb(q_data, ops, num);
}
/* Dequeue one encode operations from ACC200 device in CB mode. */
static inline int
-dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
+vrb_dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
uint16_t *dequeued_ops, uint32_t *aq_dequeued, uint16_t *dequeued_descs)
{
union acc_dma_desc *desc, atom_desc;
@@ -2666,7 +2664,7 @@ dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
* That operation may cover multiple descriptors.
*/
static inline int
-dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
+vrb_dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
uint16_t *dequeued_ops, uint32_t *aq_dequeued,
uint16_t *dequeued_descs)
{
@@ -2729,7 +2727,7 @@ dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
/* Dequeue one decode operation from ACC200 device in CB mode. */
static inline int
-dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
uint16_t dequeued_cbs, uint32_t *aq_dequeued)
{
@@ -2758,7 +2756,7 @@ dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
if (op->status != 0) {
/* These errors are not expected. */
q_data->queue_stats.dequeue_err_count++;
- acc200_check_ir(q->d);
+ vrb_check_ir(q->d);
}
/* CRC invalid if error exists. */
@@ -2781,7 +2779,7 @@ dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
/* Dequeue one decode operations from ACC200 device in CB mode. */
static inline int
-dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
uint16_t dequeued_cbs, uint32_t *aq_dequeued)
{
@@ -2824,7 +2822,7 @@ dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
op->ldpc_dec.iter_count = (uint8_t) rsp.iter_cnt;
if (op->status & (1 << RTE_BBDEV_DRV_ERROR))
- acc200_check_ir(q->d);
+ vrb_check_ir(q->d);
/* Check if this is the last desc in batch (Atomic Queue). */
if (desc->req.last_desc_in_batch) {
@@ -2844,7 +2842,7 @@ dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
/* Dequeue one decode operations from ACC200 device in TB mode. */
static inline int
-dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
+vrb_dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
uint16_t dequeued_cbs, uint32_t *aq_dequeued)
{
union acc_dma_desc *desc, *last_desc, atom_desc;
@@ -2924,7 +2922,7 @@ dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
/* Dequeue encode operations from ACC200 device. */
static uint16_t
-acc200_dequeue_enc(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2941,11 +2939,11 @@ acc200_dequeue_enc(struct rte_bbdev_queue_data *q_data,
for (i = 0; i < num; i++) {
if (cbm == RTE_BBDEV_TRANSPORT_BLOCK)
- ret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
+ ret = vrb_dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
&dequeued_ops, &aq_dequeued,
&dequeued_descs);
else
- ret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
+ ret = vrb_dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
&dequeued_ops, &aq_dequeued,
&dequeued_descs);
if (ret < 0)
@@ -2965,7 +2963,7 @@ acc200_dequeue_enc(struct rte_bbdev_queue_data *q_data,
/* Dequeue LDPC encode operations from ACC200 device. */
static uint16_t
-acc200_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -2981,11 +2979,11 @@ acc200_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
for (i = 0; i < avail; i++) {
if (cbm == RTE_BBDEV_TRANSPORT_BLOCK)
- ret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
+ ret = vrb_dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
&dequeued_ops, &aq_dequeued,
&dequeued_descs);
else
- ret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
+ ret = vrb_dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
&dequeued_ops, &aq_dequeued,
&dequeued_descs);
if (ret < 0)
@@ -3005,7 +3003,7 @@ acc200_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
/* Dequeue decode operations from ACC200 device. */
static uint16_t
-acc200_dequeue_dec(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -3022,10 +3020,10 @@ acc200_dequeue_dec(struct rte_bbdev_queue_data *q_data,
for (i = 0; i < dequeue_num; ++i) {
op = acc_op_tail(q, dequeued_cbs);
if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
- ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
+ ret = vrb_dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
&aq_dequeued);
else
- ret = dequeue_dec_one_op_cb(q_data, q, &ops[i],
+ ret = vrb_dequeue_dec_one_op_cb(q_data, q, &ops[i],
dequeued_cbs, &aq_dequeued);
if (ret <= 0)
@@ -3044,7 +3042,7 @@ acc200_dequeue_dec(struct rte_bbdev_queue_data *q_data,
/* Dequeue decode operations from ACC200 device. */
static uint16_t
-acc200_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -3061,10 +3059,10 @@ acc200_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
for (i = 0; i < dequeue_num; ++i) {
op = acc_op_tail(q, dequeued_cbs);
if (op->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
- ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
+ ret = vrb_dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
&aq_dequeued);
else
- ret = dequeue_ldpc_dec_one_op_cb(
+ ret = vrb_dequeue_ldpc_dec_one_op_cb(
q_data, q, &ops[i], dequeued_cbs,
&aq_dequeued);
@@ -3151,7 +3149,7 @@ acc200_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,
/** Enqueue one FFT operation for ACC200 device. */
static inline int
-enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
+vrb_enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
uint16_t total_enqueued_cbs)
{
union acc_dma_desc *desc;
@@ -3178,7 +3176,7 @@ enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
/* Enqueue decode operations for ACC200 device. */
static uint16_t
-acc200_enqueue_fft(struct rte_bbdev_queue_data *q_data,
+vrb_enqueue_fft(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_fft_op **ops, uint16_t num)
{
struct acc_queue *q;
@@ -3197,7 +3195,7 @@ acc200_enqueue_fft(struct rte_bbdev_queue_data *q_data,
if (unlikely(avail < 1))
break;
avail -= 1;
- ret = enqueue_fft_one_op(q, ops[i], i);
+ ret = vrb_enqueue_fft_one_op(q, ops[i], i);
if (ret < 0)
break;
}
@@ -3248,7 +3246,7 @@ dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,
q_data->queue_stats.dequeue_err_count++;
if (op->status & (1 << RTE_BBDEV_DRV_ERROR))
- acc200_check_ir(q->d);
+ vrb_check_ir(q->d);
/* Check if this is the last desc in batch (Atomic Queue). */
if (desc->req.last_desc_in_batch) {
@@ -3265,7 +3263,7 @@ dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,
/* Dequeue FFT operations from ACC200 device. */
static uint16_t
-acc200_dequeue_fft(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_fft(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_fft_op **ops, uint16_t num)
{
struct acc_queue *q = q_data->queue_private;
@@ -3297,17 +3295,17 @@ acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
struct acc_device *d = dev->data->dev_private;
- dev->dev_ops = &acc200_bbdev_ops;
- dev->enqueue_enc_ops = acc200_enqueue_enc;
- dev->enqueue_dec_ops = acc200_enqueue_dec;
- dev->dequeue_enc_ops = acc200_dequeue_enc;
- dev->dequeue_dec_ops = acc200_dequeue_dec;
- dev->enqueue_ldpc_enc_ops = acc200_enqueue_ldpc_enc;
- dev->enqueue_ldpc_dec_ops = acc200_enqueue_ldpc_dec;
- dev->dequeue_ldpc_enc_ops = acc200_dequeue_ldpc_enc;
- dev->dequeue_ldpc_dec_ops = acc200_dequeue_ldpc_dec;
- dev->enqueue_fft_ops = acc200_enqueue_fft;
- dev->dequeue_fft_ops = acc200_dequeue_fft;
+ dev->dev_ops = &vrb_bbdev_ops;
+ dev->enqueue_enc_ops = vrb_enqueue_enc;
+ dev->enqueue_dec_ops = vrb_enqueue_dec;
+ dev->dequeue_enc_ops = vrb_dequeue_enc;
+ dev->dequeue_dec_ops = vrb_dequeue_dec;
+ dev->enqueue_ldpc_enc_ops = vrb_enqueue_ldpc_enc;
+ dev->enqueue_ldpc_dec_ops = vrb_enqueue_ldpc_dec;
+ dev->dequeue_ldpc_enc_ops = vrb_dequeue_ldpc_enc;
+ dev->dequeue_ldpc_dec_ops = vrb_dequeue_ldpc_dec;
+ dev->enqueue_fft_ops = vrb_enqueue_fft;
+ dev->dequeue_fft_ops = vrb_dequeue_fft;
d->pf_device = !strcmp(drv->driver.name, RTE_STR(ACC200PF_DRIVER_NAME));
d->mmio_base = pci_dev->mem_resource[0].addr;
@@ -3316,7 +3314,7 @@ acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
if ((pci_dev->id.device_id == RTE_ACC200_PF_DEVICE_ID) ||
(pci_dev->id.device_id == RTE_ACC200_VF_DEVICE_ID)) {
d->device_variant = ACC200_VARIANT;
- d->queue_offset = queue_offset;
+ d->queue_offset = acc200_queue_offset;
d->fcw_ld_fill = acc200_fcw_ld_fill;
d->num_qgroups = ACC200_NUM_QGRPS;
d->num_aqs = ACC200_NUM_AQS;
@@ -3332,7 +3330,7 @@ acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
pci_dev->mem_resource[0].phys_addr);
}
-static int acc200_pci_probe(struct rte_pci_driver *pci_drv,
+static int vrb_pci_probe(struct rte_pci_driver *pci_drv,
struct rte_pci_device *pci_dev)
{
struct rte_bbdev *bbdev = NULL;
@@ -3377,14 +3375,14 @@ static int acc200_pci_probe(struct rte_pci_driver *pci_drv,
}
static struct rte_pci_driver acc200_pci_pf_driver = {
- .probe = acc200_pci_probe,
+ .probe = vrb_pci_probe,
.remove = acc_pci_remove,
.id_table = pci_id_acc200_pf_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING
};
static struct rte_pci_driver acc200_pci_vf_driver = {
- .probe = acc200_pci_probe,
+ .probe = vrb_pci_probe,
.remove = acc_pci_remove,
.id_table = pci_id_acc200_vf_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING
diff --git a/drivers/baseband/acc/vrb_pmd.h b/drivers/baseband/acc/vrb_pmd.h
index d4bb16da26..b074c8d4f9 100644
--- a/drivers/baseband/acc/vrb_pmd.h
+++ b/drivers/baseband/acc/vrb_pmd.h
@@ -12,7 +12,7 @@
/* Helper macro for logging */
#define rte_bbdev_log(level, fmt, ...) \
- rte_log(RTE_LOG_ ## level, acc200_logtype, fmt "\n", \
+ rte_log(RTE_LOG_ ## level, vrb_logtype, fmt "\n", \
##__VA_ARGS__)
#ifdef RTE_LIBRTE_BBDEV_DEBUG
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v1 5/6] baseband/acc: rename of remaining acc200 prefix to vrb1
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
` (3 preceding siblings ...)
2023-01-17 22:36 ` [PATCH v1 4/6] baseband/acc: update prefix for VRB PMD functions Nicolas Chautru
@ 2023-01-17 22:36 ` Nicolas Chautru
2023-01-31 15:11 ` Maxime Coquelin
2023-01-17 22:36 ` [PATCH v1 6/6] doc: updated naming convention for acc200 PMD Nicolas Chautru
2023-02-03 11:03 ` [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Maxime Coquelin
6 siblings, 1 reply; 16+ messages in thread
From: Nicolas Chautru @ 2023-01-17 22:36 UTC (permalink / raw)
To: dev, maxime.coquelin; +Cc: hernan.vargas, Nicolas Chautru
Rename remaining variable, comments and enums names
when generic usage is applicable. VRB1 is specific to
current HW support and VRB is more generic.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
drivers/baseband/acc/acc_common.h | 12 +-
drivers/baseband/acc/rte_acc100_pmd.c | 4 +-
drivers/baseband/acc/rte_vrb_pmd.c | 352 +++++++++---------
.../acc/{acc200_pf_enum.h => vrb1_pf_enum.h} | 8 +-
.../acc/{acc200_vf_enum.h => vrb1_vf_enum.h} | 8 +-
drivers/baseband/acc/vrb_cfg.h | 10 +-
drivers/baseband/acc/vrb_pmd.h | 139 +++----
7 files changed, 265 insertions(+), 268 deletions(-)
rename drivers/baseband/acc/{acc200_pf_enum.h => vrb1_pf_enum.h} (97%)
rename drivers/baseband/acc/{acc200_vf_enum.h => vrb1_vf_enum.h} (96%)
diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h
index 4ca5d704e6..5bb00746c3 100644
--- a/drivers/baseband/acc/acc_common.h
+++ b/drivers/baseband/acc/acc_common.h
@@ -285,13 +285,13 @@ struct __rte_packed acc_fcw_ld {
hcin_decomp_mode:3,
llr_pack_mode:1,
hcout_comp_mode:3,
- saturate_input:1, /* Not supported in ACC200 */
+ saturate_input:1, /* Not supported in VRB1 */
dec_convllr:4,
hcout_convllr:4;
uint32_t itmax:7,
itstop:1,
so_it:7,
- minsum_offset:1, /* Not supported in ACC200 */
+ minsum_offset:1, /* Not supported in VRB1 */
hcout_offset:16;
uint32_t hcout_size0:16,
hcout_size1:16;
@@ -301,7 +301,7 @@ struct __rte_packed acc_fcw_ld {
uint32_t negstop_it:7,
negstop_en:1,
tb_crc_select:2, /* Not supported in ACC100 */
- dec_llrclip:2, /* Not supported in ACC200 */
+ dec_llrclip:2, /* Not supported in VRB1 */
tb_trailer_size:20; /* Not supported in ACC100 */
};
@@ -322,7 +322,7 @@ struct __rte_packed acc_fcw_fft {
dft_shift:8,
cs_multiplier:16;
uint32_t bypass:2,
- fp16_in:1, /* Not supported in ACC200 */
+ fp16_in:1, /* Not supported in VRB1 */
fp16_out:1,
exp_adj:4,
power_shift:4,
@@ -398,7 +398,7 @@ struct __rte_packed acc_dma_req_desc {
sdone_enable:1,
irq_enable:1,
timeStampEn:1,
- dltb:1, /* Not supported in ACC200 */
+ dltb:1, /* Not supported in VRB1 */
res0:4,
numCBs:8,
m2dlen:4,
@@ -1118,7 +1118,7 @@ cmp_ldpc_dec_op(struct rte_bbdev_dec_op **ops) {
* @param op_flags
* Store information about device capabilities
* @param next_triplet
- * Index for ACC200 DMA Descriptor triplet
+ * Index for VRB1 DMA Descriptor triplet
* @param scattergather
* Flag to support scatter-gather for the mbuf
*
diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c
index e5fe27a06b..8b02f66ac2 100644
--- a/drivers/baseband/acc/rte_acc100_pmd.c
+++ b/drivers/baseband/acc/rte_acc100_pmd.c
@@ -262,7 +262,7 @@ acc100_check_ir(struct acc_device *acc100_dev)
ring_data->int_nb >
ACC100_PF_INT_DMA_DL5G_DESC_IRQ)) {
rte_bbdev_log(WARNING, "InfoRing: ITR:%d Info:0x%x",
- ring_data->int_nb, ring_data->detailed_info);
+ ring_data->int_nb, ring_data->detailed_info);
/* Initialize Info Ring entry and move forward */
ring_data->val = 0;
}
@@ -5206,5 +5206,5 @@ rte_acc_configure(const char *dev_name, struct rte_acc_conf *conf)
else if (pci_dev->id.device_id == ACC101_PF_DEVICE_ID)
return acc101_configure(dev_name, conf);
else
- return acc200_configure(dev_name, conf);
+ return vrb1_configure(dev_name, conf);
}
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
index c590ce5988..34e42d1f6e 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -29,7 +29,7 @@ RTE_LOG_REGISTER_DEFAULT(vrb_logtype, NOTICE);
/* Calculate the offset of the enqueue register. */
static inline uint32_t
-acc200_queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id)
+vrb1_queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id)
{
if (pf_device)
return ((vf_id << 12) + (qgrp_id << 7) + (aq_id << 3) + VRB1_PfQmgrIngressAq);
@@ -43,10 +43,10 @@ enum {UL_4G = 0, UL_5G, DL_4G, DL_5G, FFT, NUM_ACC};
static inline int
accFromQgid(int qg_idx, const struct rte_acc_conf *acc_conf)
{
- int accQg[ACC200_NUM_QGRPS];
+ int accQg[VRB_MAX_QGRPS];
int NumQGroupsPerFn[NUM_ACC];
int acc, qgIdx, qgIndex = 0;
- for (qgIdx = 0; qgIdx < ACC200_NUM_QGRPS; qgIdx++)
+ for (qgIdx = 0; qgIdx < VRB_MAX_QGRPS; qgIdx++)
accQg[qgIdx] = 0;
NumQGroupsPerFn[UL_4G] = acc_conf->q_ul_4g.num_qgroups;
NumQGroupsPerFn[UL_5G] = acc_conf->q_ul_5g.num_qgroups;
@@ -193,8 +193,8 @@ fetch_acc_config(struct rte_bbdev *dev)
uint32_t reg_aq, reg_len0, reg_len1, reg0, reg1;
uint32_t reg_mode, idx;
struct rte_acc_queue_topology *q_top = NULL;
- int qman_func_id[ACC200_NUM_ACCS] = {ACC_ACCMAP_0, ACC_ACCMAP_1,
- ACC_ACCMAP_2, ACC_ACCMAP_3, ACC_ACCMAP_4};
+ int qman_func_id[VRB_NUM_ACCS] = {ACC_ACCMAP_0, ACC_ACCMAP_1,
+ ACC_ACCMAP_2, ACC_ACCMAP_3, ACC_ACCMAP_4, ACC_ACCMAP_5};
/* No need to retrieve the configuration is already done. */
if (d->configured)
@@ -220,9 +220,8 @@ fetch_acc_config(struct rte_bbdev *dev)
if (qg < ACC_NUM_QGRPS_PER_WORD)
idx = (reg0 >> (qg * 4)) & 0x7;
else
- idx = (reg1 >> ((qg -
- ACC_NUM_QGRPS_PER_WORD) * 4)) & 0x7;
- if (idx < ACC200_NUM_ACCS) {
+ idx = (reg1 >> ((qg - ACC_NUM_QGRPS_PER_WORD) * 4)) & 0x7;
+ if (idx < VRB1_NUM_ACCS) {
acc = qman_func_id[idx];
updateQtop(acc, qg, acc_conf, d);
}
@@ -290,8 +289,8 @@ vrb_device_status(struct rte_bbdev *dev)
vrb_vf2pf(d, ACC_VF2PF_STATUS_REQUEST);
reg = acc_reg_read(d, d->reg_addr->pf2vf_doorbell);
- while ((time_out < ACC200_STATUS_TO) && (reg == RTE_BBDEV_DEV_NOSTATUS)) {
- usleep(ACC200_STATUS_WAIT); /*< Wait or VF->PF->VF Comms */
+ while ((time_out < ACC_STATUS_TO) && (reg == RTE_BBDEV_DEV_NOSTATUS)) {
+ usleep(ACC_STATUS_WAIT); /*< Wait or VF->PF->VF Comms */
reg = acc_reg_read(d, d->reg_addr->pf2vf_doorbell);
time_out++;
}
@@ -301,43 +300,43 @@ vrb_device_status(struct rte_bbdev *dev)
/* Checks PF Info Ring to find the interrupt cause and handles it accordingly. */
static inline void
-vrb_check_ir(struct acc_device *acc200_dev)
+vrb_check_ir(struct acc_device *acc_dev)
{
volatile union acc_info_ring_data *ring_data;
- uint16_t info_ring_head = acc200_dev->info_ring_head;
- if (unlikely(acc200_dev->info_ring == NULL))
+ uint16_t info_ring_head = acc_dev->info_ring_head;
+ if (unlikely(acc_dev->info_ring == NULL))
return;
- ring_data = acc200_dev->info_ring + (acc200_dev->info_ring_head & ACC_INFO_RING_MASK);
+ ring_data = acc_dev->info_ring + (acc_dev->info_ring_head & ACC_INFO_RING_MASK);
while (ring_data->valid) {
if ((ring_data->int_nb < ACC_PF_INT_DMA_DL_DESC_IRQ) || (
ring_data->int_nb > ACC_PF_INT_DMA_DL5G_DESC_IRQ)) {
rte_bbdev_log(WARNING, "InfoRing: ITR:%d Info:0x%x",
- ring_data->int_nb, ring_data->detailed_info);
+ ring_data->int_nb, ring_data->detailed_info);
/* Initialize Info Ring entry and move forward. */
ring_data->val = 0;
}
info_ring_head++;
- ring_data = acc200_dev->info_ring + (info_ring_head & ACC_INFO_RING_MASK);
+ ring_data = acc_dev->info_ring + (info_ring_head & ACC_INFO_RING_MASK);
}
}
-/* Interrupt handler triggered by ACC200 dev for handling specific interrupt. */
+/* Interrupt handler triggered by dev for handling specific interrupt. */
static void
vrb_dev_interrupt_handler(void *cb_arg)
{
struct rte_bbdev *dev = cb_arg;
- struct acc_device *acc200_dev = dev->data->dev_private;
+ struct acc_device *acc_dev = dev->data->dev_private;
volatile union acc_info_ring_data *ring_data;
struct acc_deq_intr_details deq_intr_det;
- ring_data = acc200_dev->info_ring + (acc200_dev->info_ring_head & ACC_INFO_RING_MASK);
+ ring_data = acc_dev->info_ring + (acc_dev->info_ring_head & ACC_INFO_RING_MASK);
while (ring_data->valid) {
- if (acc200_dev->pf_device) {
+ if (acc_dev->pf_device) {
rte_bbdev_log_debug(
- "ACC200 PF Interrupt received, Info Ring data: 0x%x -> %d",
+ "VRB1 PF Interrupt received, Info Ring data: 0x%x -> %d",
ring_data->val, ring_data->int_nb);
switch (ring_data->int_nb) {
@@ -365,7 +364,7 @@ vrb_dev_interrupt_handler(void *cb_arg)
}
} else {
rte_bbdev_log_debug(
- "ACC200 VF Interrupt received, Info Ring data: 0x%x\n",
+ "VRB1 VF Interrupt received, Info Ring data: 0x%x\n",
ring_data->val);
switch (ring_data->int_nb) {
case ACC_VF_INT_DMA_DL_DESC_IRQ:
@@ -395,9 +394,9 @@ vrb_dev_interrupt_handler(void *cb_arg)
/* Initialize Info Ring entry and move forward. */
ring_data->val = 0;
- ++acc200_dev->info_ring_head;
- ring_data = acc200_dev->info_ring +
- (acc200_dev->info_ring_head & ACC_INFO_RING_MASK);
+ ++acc_dev->info_ring_head;
+ ring_data = acc_dev->info_ring +
+ (acc_dev->info_ring_head & ACC_INFO_RING_MASK);
}
}
@@ -429,7 +428,7 @@ allocate_info_ring(struct rte_bbdev *dev)
phys_low = (uint32_t)(info_ring_iova);
acc_reg_write(d, d->reg_addr->info_ring_hi, phys_high);
acc_reg_write(d, d->reg_addr->info_ring_lo, phys_low);
- acc_reg_write(d, d->reg_addr->info_ring_en, ACC200_REG_IRQ_EN_ALL);
+ acc_reg_write(d, d->reg_addr->info_ring_en, VRB1_REG_IRQ_EN_ALL);
d->info_ring_head = (acc_reg_read(d, d->reg_addr->info_ring_ptr) &
0xFFF) / sizeof(union acc_info_ring_data);
return 0;
@@ -477,14 +476,14 @@ vrb_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
return -ENOMEM;
}
- /* Configure ACC200 with the base address for DMA descriptor rings.
+ /* Configure device with the base address for DMA descriptor rings.
* Same descriptor rings used for UL and DL DMA Engines.
* Note : Assuming only VF0 bundle is used for PF mode.
*/
phys_high = (uint32_t)(d->sw_rings_iova >> 32);
phys_low = (uint32_t)(d->sw_rings_iova & ~(ACC_SIZE_64MBYTE-1));
- /* Read the populated cfg from ACC200 registers. */
+ /* Read the populated cfg from device registers. */
fetch_acc_config(dev);
/* Start Pmon */
@@ -568,7 +567,7 @@ vrb_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
vrb_vf2pf(d, ACC_VF2PF_USING_VF);
rte_bbdev_log_debug(
- "ACC200 (%s) configured sw_rings = %p, sw_rings_iova = %#"
+ "Device (%s) configured sw_rings = %p, sw_rings_iova = %#"
PRIx64, dev->data->name, d->sw_rings, d->sw_rings_iova);
return 0;
@@ -621,7 +620,7 @@ vrb_intr_enable(struct rte_bbdev *dev)
return 0;
} else if (rte_intr_type_get(dev->intr_handle) == RTE_INTR_HANDLE_VFIO_MSIX) {
int i, max_queues;
- struct acc_device *acc200_dev = dev->data->dev_private;
+ struct acc_device *acc_dev = dev->data->dev_private;
ret = allocate_info_ring(dev);
if (ret < 0) {
@@ -631,10 +630,10 @@ vrb_intr_enable(struct rte_bbdev *dev)
return ret;
}
- if (acc200_dev->pf_device)
- max_queues = ACC200_MAX_PF_MSIX;
+ if (acc_dev->pf_device)
+ max_queues = VRB1_MAX_PF_MSIX;
else
- max_queues = ACC200_MAX_VF_MSIX;
+ max_queues = VRB1_MAX_VF_MSIX;
if (rte_intr_efd_enable(dev->intr_handle, max_queues)) {
rte_bbdev_log(ERR, "Failed to create fds for %u queues",
@@ -677,7 +676,7 @@ vrb_intr_enable(struct rte_bbdev *dev)
return 0;
}
- rte_bbdev_log(ERR, "ACC200 (%s) supports only VFIO MSI/MSI-X interrupts\n",
+ rte_bbdev_log(ERR, "Device (%s) supports only VFIO MSI/MSI-X interrupts\n",
dev->data->name);
return -ENOTSUP;
}
@@ -704,7 +703,7 @@ vrb_dev_close(struct rte_bbdev *dev)
}
/**
- * Report a ACC200 queue index which is free.
+ * Report a queue index which is free.
* Return 0 to 16k for a valid queue_idx or -1 when no queue is available.
* Note : Only supporting VF0 Bundle for PF mode.
*/
@@ -736,7 +735,7 @@ vrb_find_free_queue_idx(struct rte_bbdev *dev,
/* Mark the Queue as assigned. */
d->q_assigned_bit_map[group_idx] |= (1ULL << aq_idx);
/* Report the AQ Index. */
- return (group_idx << ACC200_GRP_ID_SHIFT) + aq_idx;
+ return (group_idx << VRB1_GRP_ID_SHIFT) + aq_idx;
}
}
rte_bbdev_log(INFO, "Failed to find free queue on %s, priority %u",
@@ -744,7 +743,7 @@ vrb_find_free_queue_idx(struct rte_bbdev *dev,
return -1;
}
-/* Setup ACC200 queue. */
+/* Setup device queue. */
static int
vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
const struct rte_bbdev_queue_conf *conf)
@@ -774,9 +773,9 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
union acc_dma_desc *desc = NULL;
unsigned int desc_idx, b_idx;
int fcw_len = (conf->op_type == RTE_BBDEV_OP_LDPC_ENC ?
- ACC_FCW_LE_BLEN : (conf->op_type == RTE_BBDEV_OP_TURBO_DEC ?
- ACC_FCW_TD_BLEN : (conf->op_type == RTE_BBDEV_OP_LDPC_DEC ?
- ACC_FCW_LD_BLEN : ACC_FCW_FFT_BLEN)));
+ ACC_FCW_LE_BLEN : (conf->op_type == RTE_BBDEV_OP_TURBO_DEC ?
+ ACC_FCW_TD_BLEN : (conf->op_type == RTE_BBDEV_OP_LDPC_DEC ?
+ ACC_FCW_LD_BLEN : ACC_FCW_FFT_BLEN)));
for (desc_idx = 0; desc_idx < d->sw_ring_max_depth; desc_idx++) {
desc = q->ring_addr + desc_idx;
@@ -790,8 +789,7 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
desc->req.data_ptrs[0].blkid = ACC_DMA_BLKID_FCW;
desc->req.data_ptrs[0].last = 0;
desc->req.data_ptrs[0].dma_ext = 0;
- for (b_idx = 1; b_idx < ACC_DMA_MAX_NUM_POINTERS - 1;
- b_idx++) {
+ for (b_idx = 1; b_idx < ACC_DMA_MAX_NUM_POINTERS - 1; b_idx++) {
desc->req.data_ptrs[b_idx].blkid = ACC_DMA_BLKID_IN;
desc->req.data_ptrs[b_idx].last = 1;
desc->req.data_ptrs[b_idx].dma_ext = 0;
@@ -856,8 +854,8 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
goto free_companion_ring_addr;
}
- q->qgrp_id = (q_idx >> ACC200_GRP_ID_SHIFT) & 0xF;
- q->vf_id = (q_idx >> ACC200_VF_ID_SHIFT) & 0x3F;
+ q->qgrp_id = (q_idx >> VRB1_GRP_ID_SHIFT) & 0xF;
+ q->vf_id = (q_idx >> VRB1_VF_ID_SHIFT) & 0x3F;
q->aq_id = q_idx & 0xF;
q->aq_depth = 0;
if (conf->op_type == RTE_BBDEV_OP_TURBO_DEC)
@@ -872,8 +870,7 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
q->aq_depth = (1 << d->acc_conf.q_fft.aq_depth_log2);
q->mmio_reg_enqueue = RTE_PTR_ADD(d->mmio_base,
- d->queue_offset(d->pf_device,
- q->vf_id, q->qgrp_id, q->aq_id));
+ d->queue_offset(d->pf_device, q->vf_id, q->qgrp_id, q->aq_id));
rte_bbdev_log_debug(
"Setup dev%u q%u: qgrp_id=%u, vf_id=%u, aq_id=%u, aq_depth=%u, mmio_reg_enqueue=%p base %p\n",
@@ -930,7 +927,7 @@ vrb_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,
}
}
-/* Stop ACC200 queue and clear counters. */
+/* Stop queue and clear counters. */
static int
vrb_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
{
@@ -958,7 +955,7 @@ vrb_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
return 0;
}
-/* Release ACC200 queue. */
+/* Release queue. */
static int
vrb_queue_release(struct rte_bbdev *dev, uint16_t q_id)
{
@@ -978,14 +975,13 @@ vrb_queue_release(struct rte_bbdev *dev, uint16_t q_id)
return 0;
}
-/* Get ACC200 device info. */
+/* Get device info. */
static void
-vrb_dev_info_get(struct rte_bbdev *dev,
- struct rte_bbdev_driver_info *dev_info)
+vrb_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info)
{
struct acc_device *d = dev->data->dev_private;
int i;
- static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
+ static const struct rte_bbdev_op_cap vrb1_bbdev_capabilities[] = {
{
.type = RTE_BBDEV_OP_TURBO_DEC,
.cap.turbo_dec = {
@@ -1091,7 +1087,7 @@ vrb_dev_info_get(struct rte_bbdev *dev,
dev_info->driver_name = dev->device->driver->name;
- /* Read and save the populated config from ACC200 registers. */
+ /* Read and save the populated config from registers. */
fetch_acc_config(dev);
/* Check the status of device. */
dev_info->device_status = vrb_device_status(dev);
@@ -1125,7 +1121,7 @@ vrb_dev_info_get(struct rte_bbdev *dev,
dev_info->default_queue_conf = default_queue_conf;
dev_info->cpu_flag_reqs = NULL;
dev_info->min_alignment = 1;
- dev_info->capabilities = bbdev_capabilities;
+ dev_info->capabilities = vrb1_bbdev_capabilities;
dev_info->harq_buffer_size = 0;
vrb_check_ir(d);
@@ -1169,18 +1165,18 @@ static const struct rte_bbdev_ops vrb_bbdev_ops = {
.queue_intr_disable = vrb_queue_intr_disable
};
-/* ACC200 PCI PF address map. */
-static struct rte_pci_id pci_id_acc200_pf_map[] = {
+/* PCI PF address map. */
+static struct rte_pci_id pci_id_vrb_pf_map[] = {
{
- RTE_PCI_DEVICE(RTE_ACC200_VENDOR_ID, RTE_ACC200_PF_DEVICE_ID)
+ RTE_PCI_DEVICE(RTE_VRB1_VENDOR_ID, RTE_VRB1_PF_DEVICE_ID)
},
{.device_id = 0},
};
-/* ACC200 PCI VF address map. */
-static struct rte_pci_id pci_id_acc200_vf_map[] = {
+/* PCI VF address map. */
+static struct rte_pci_id pci_id_vrb_vf_map[] = {
{
- RTE_PCI_DEVICE(RTE_ACC200_VENDOR_ID, RTE_ACC200_VF_DEVICE_ID)
+ RTE_PCI_DEVICE(RTE_VRB1_VENDOR_ID, RTE_VRB1_VF_DEVICE_ID)
},
{.device_id = 0},
};
@@ -1250,7 +1246,7 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)
/* Fill in a frame control word for LDPC decoding. */
static inline void
-acc200_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
+vrb1_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
union acc_harq_layout_data *harq_layout)
{
uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
@@ -1345,7 +1341,7 @@ acc200_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
*/
if (fcw->hcout_en > 0) {
parity_offset = (op->ldpc_dec.basegraph == 1 ? 20 : 8)
- * op->ldpc_dec.z_c - op->ldpc_dec.n_filler;
+ * op->ldpc_dec.z_c - op->ldpc_dec.n_filler;
k0_p = (fcw->k0 > parity_offset) ? fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
ncb_p = fcw->ncb - op->ldpc_dec.n_filler;
l = k0_p + fcw->rm_e;
@@ -1371,7 +1367,7 @@ acc200_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
}
static inline int
-acc200_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
+vrb_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
struct acc_dma_req_desc *desc, struct rte_mbuf **input,
struct rte_mbuf *h_output, struct rte_mbuf *s_output,
uint32_t *in_offset, uint32_t *h_out_offset,
@@ -1487,7 +1483,7 @@ acc200_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
}
static inline int
-acc200_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
+vrb1_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
struct acc_dma_req_desc *desc,
struct rte_mbuf **input, struct rte_mbuf *h_output,
uint32_t *in_offset, uint32_t *h_out_offset,
@@ -1646,7 +1642,7 @@ vrb_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
desc->op_addr = op;
}
-/* Enqueue one encode operations for ACC200 device in CB mode */
+/* Enqueue one encode operations for device in CB mode */
static inline int
enqueue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint16_t total_enqueued_cbs)
@@ -1685,7 +1681,7 @@ enqueue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
return 1;
}
-/* Enqueue one encode operations for ACC200 device in CB mode
+/* Enqueue one encode operations for device in CB mode
* multiplexed on the same descriptor.
*/
static inline int
@@ -1744,11 +1740,11 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,
return num;
}
-/* Enqueue one encode operations for ACC200 device for a partial TB
+/* Enqueue one encode operations for device for a partial TB
* all codes blocks have same configuration multiplexed on the same descriptor.
*/
static inline void
-vrb_enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
+vrb1_enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint16_t total_enqueued_descs, int16_t num_cbs, uint32_t e,
uint16_t in_len_B, uint32_t out_len_B, uint32_t *in_offset,
uint32_t *out_offset)
@@ -1794,7 +1790,7 @@ vrb_enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
}
-/* Enqueue one encode operations for ACC200 device in TB mode. */
+/* Enqueue one encode operations for device in TB mode. */
static inline int
enqueue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint16_t total_enqueued_cbs, uint8_t cbs_in_tb)
@@ -1864,11 +1860,11 @@ enqueue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
return current_enqueued_cbs;
}
-/* Enqueue one encode operations for ACC200 device in TB mode.
+/* Enqueue one encode operations for device in TB mode.
* returns the number of descs used.
*/
static inline int
-vrb_enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
+vrb1_enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint16_t enq_descs, uint8_t cbs_in_tb)
{
uint8_t num_a, num_b;
@@ -1897,7 +1893,7 @@ vrb_enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint32_t out_len_B = (e + 7) >> 3;
uint8_t enq = RTE_MIN(num_a, ACC_MUX_5GDL_DESC);
num_a -= enq;
- vrb_enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
+ vrb1_enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
out_len_B, &in_offset, &out_offset);
enq_descs++;
}
@@ -1906,7 +1902,7 @@ vrb_enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
uint32_t out_len_B = (e + 7) >> 3;
uint8_t enq = RTE_MIN(num_b, ACC_MUX_5GDL_DESC);
num_b -= enq;
- vrb_enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
+ vrb1_enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
out_len_B, &in_offset, &out_offset);
enq_descs++;
}
@@ -1924,7 +1920,7 @@ vrb_enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,
return return_descs;
}
-/** Enqueue one decode operations for ACC200 device in CB mode. */
+/** Enqueue one decode operations for device in CB mode. */
static inline int
enqueue_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs)
@@ -1952,7 +1948,7 @@ enqueue_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
/* Set up DMA descriptor */
desc = acc_desc(q, total_enqueued_cbs);
- ret = acc200_dma_desc_td_fill(op, &desc->req, &input, h_output,
+ ret = vrb_dma_desc_td_fill(op, &desc->req, &input, h_output,
s_output, &in_offset, &h_out_offset, &s_out_offset,
&h_out_length, &s_out_length, &mbuf_total_left,
&seg_total_left, 0);
@@ -1977,7 +1973,7 @@ enqueue_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
return 1;
}
-/** Enqueue one decode operations for ACC200 device in CB mode */
+/** Enqueue one decode operations for device in CB mode */
static inline int
vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs, bool same_op)
@@ -2022,7 +2018,7 @@ vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
struct acc_fcw_ld *fcw;
uint32_t seg_total_left;
fcw = &desc->req.fcw_ld;
- acc200_fcw_ld_fill(op, fcw, harq_layout);
+ q->d->fcw_ld_fill(op, fcw, harq_layout);
/* Special handling when using mbuf or not. */
if (check_bit(op->ldpc_dec.op_flags,
@@ -2031,7 +2027,7 @@ vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
else
seg_total_left = fcw->rm_e;
- ret = acc200_dma_desc_ld_fill(op, &desc->req, &input, h_output,
+ ret = vrb1_dma_desc_ld_fill(op, &desc->req, &input, h_output,
&in_offset, &h_out_offset,
&h_out_length, &mbuf_total_left,
&seg_total_left, fcw);
@@ -2066,7 +2062,7 @@ vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
}
-/* Enqueue one decode operations for ACC200 device in TB mode. */
+/* Enqueue one decode operations for device in TB mode. */
static inline int
vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs, uint8_t cbs_in_tb)
@@ -2087,7 +2083,7 @@ vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
desc_first = desc;
fcw_offset = (desc_idx << 8) + ACC_DESC_FCW_OFFSET;
harq_layout = q->d->harq_layout;
- acc200_fcw_ld_fill(op, &desc->req.fcw_ld, harq_layout);
+ q->d->fcw_ld_fill(op, &desc->req.fcw_ld, harq_layout);
input = op->ldpc_dec.input.data;
h_output_head = h_output = op->ldpc_dec.hard_output.data;
@@ -2117,7 +2113,7 @@ vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, ACC_FCW_LD_BLEN);
desc->req.fcw_ld.tb_trailer_size = (c - r - 1) * trail_len;
- ret = acc200_dma_desc_ld_fill(op, &desc->req, &input,
+ ret = vrb1_dma_desc_ld_fill(op, &desc->req, &input,
h_output, &in_offset, &h_out_offset,
&h_out_length,
&mbuf_total_left, &seg_total_left,
@@ -2159,7 +2155,7 @@ vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
return current_enqueued_cbs;
}
-/* Enqueue one decode operations for ACC200 device in TB mode */
+/* Enqueue one decode operations for device in TB mode */
static inline int
enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
uint16_t total_enqueued_cbs, uint8_t cbs_in_tb)
@@ -2198,7 +2194,7 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
desc = acc_desc(q, total_enqueued_cbs);
desc->req.data_ptrs[0].address = q->ring_addr_iova + fcw_offset;
desc->req.data_ptrs[0].blen = ACC_FCW_TD_BLEN;
- ret = acc200_dma_desc_td_fill(op, &desc->req, &input,
+ ret = vrb_dma_desc_td_fill(op, &desc->req, &input,
h_output, s_output, &in_offset, &h_out_offset,
&s_out_offset, &h_out_length, &s_out_length,
&mbuf_total_left, &seg_total_left, r);
@@ -2247,7 +2243,7 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,
return current_enqueued_cbs;
}
-/* Enqueue encode operations for ACC200 device in CB mode. */
+/* Enqueue encode operations for device in CB mode. */
static uint16_t
vrb_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2283,7 +2279,7 @@ vrb_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/** Enqueue encode operations for ACC200 device in CB mode. */
+/** Enqueue encode operations for device in CB mode. */
static inline uint16_t
vrb_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2324,7 +2320,7 @@ vrb_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Enqueue encode operations for ACC200 device in TB mode. */
+/* Enqueue encode operations for device in TB mode. */
static uint16_t
vrb_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2363,7 +2359,7 @@ vrb_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Enqueue LDPC encode operations for ACC200 device in TB mode. */
+/* Enqueue LDPC encode operations for device in TB mode. */
static uint16_t
vrb_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2382,7 +2378,7 @@ vrb_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
break;
}
- descs_used = vrb_enqueue_ldpc_enc_one_op_tb(q, ops[i], enqueued_descs, cbs_in_tb);
+ descs_used = vrb1_enqueue_ldpc_enc_one_op_tb(q, ops[i], enqueued_descs, cbs_in_tb);
if (descs_used < 0) {
acc_enqueue_invalid(q_data);
break;
@@ -2402,7 +2398,7 @@ vrb_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Enqueue encode operations for ACC200 device. */
+/* Enqueue encode operations for device. */
static uint16_t
vrb_enqueue_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2416,7 +2412,7 @@ vrb_enqueue_enc(struct rte_bbdev_queue_data *q_data,
return vrb_enqueue_enc_cb(q_data, ops, num);
}
-/* Enqueue encode operations for ACC200 device. */
+/* Enqueue encode operations for device. */
static uint16_t
vrb_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2431,7 +2427,7 @@ vrb_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
}
-/* Enqueue decode operations for ACC200 device in CB mode. */
+/* Enqueue decode operations for device in CB mode. */
static uint16_t
vrb_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -2464,7 +2460,7 @@ vrb_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Enqueue decode operations for ACC200 device in TB mode. */
+/* Enqueue decode operations for device in TB mode. */
static uint16_t
vrb_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -2498,7 +2494,7 @@ vrb_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Enqueue decode operations for ACC200 device in CB mode. */
+/* Enqueue decode operations for device in CB mode. */
static uint16_t
vrb_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -2543,7 +2539,7 @@ vrb_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
}
-/* Enqueue decode operations for ACC200 device in TB mode */
+/* Enqueue decode operations for device in TB mode. */
static uint16_t
vrb_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -2580,7 +2576,7 @@ vrb_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Enqueue decode operations for ACC200 device. */
+/* Enqueue decode operations for device. */
static uint16_t
vrb_enqueue_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -2594,7 +2590,7 @@ vrb_enqueue_dec(struct rte_bbdev_queue_data *q_data,
return vrb_enqueue_dec_cb(q_data, ops, num);
}
-/* Enqueue decode operations for ACC200 device. */
+/* Enqueue decode operations for device. */
static uint16_t
vrb_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -2609,7 +2605,7 @@ vrb_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
}
-/* Dequeue one encode operations from ACC200 device in CB mode. */
+/* Dequeue one encode operations from device in CB mode. */
static inline int
vrb_dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
uint16_t *dequeued_ops, uint32_t *aq_dequeued, uint16_t *dequeued_descs)
@@ -2660,7 +2656,7 @@ vrb_dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
return desc->req.numCBs;
}
-/* Dequeue one LDPC encode operations from ACC200 device in TB mode.
+/* Dequeue one LDPC encode operations from device in TB mode.
* That operation may cover multiple descriptors.
*/
static inline int
@@ -2725,7 +2721,7 @@ vrb_dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,
return current_dequeued_descs;
}
-/* Dequeue one decode operation from ACC200 device in CB mode. */
+/* Dequeue one decode operation from device in CB mode. */
static inline int
vrb_dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
@@ -2777,7 +2773,7 @@ vrb_dequeue_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
return 1;
}
-/* Dequeue one decode operations from ACC200 device in CB mode. */
+/* Dequeue one decode operations from device in CB mode. */
static inline int
vrb_dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
@@ -2840,7 +2836,7 @@ vrb_dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
return 1;
}
-/* Dequeue one decode operations from ACC200 device in TB mode. */
+/* Dequeue one decode operations from device in TB mode. */
static inline int
vrb_dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
uint16_t dequeued_cbs, uint32_t *aq_dequeued)
@@ -2920,7 +2916,7 @@ vrb_dequeue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op **ref_op,
return cb_idx;
}
-/* Dequeue encode operations from ACC200 device. */
+/* Dequeue encode operations from device. */
static uint16_t
vrb_dequeue_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -2961,7 +2957,7 @@ vrb_dequeue_enc(struct rte_bbdev_queue_data *q_data,
return dequeued_ops;
}
-/* Dequeue LDPC encode operations from ACC200 device. */
+/* Dequeue LDPC encode operations from device. */
static uint16_t
vrb_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
@@ -3001,7 +2997,7 @@ vrb_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
return dequeued_ops;
}
-/* Dequeue decode operations from ACC200 device. */
+/* Dequeue decode operations from device. */
static uint16_t
vrb_dequeue_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -3040,7 +3036,7 @@ vrb_dequeue_dec(struct rte_bbdev_queue_data *q_data,
return i;
}
-/* Dequeue decode operations from ACC200 device. */
+/* Dequeue decode operations from device. */
static uint16_t
vrb_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
@@ -3082,7 +3078,7 @@ vrb_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
/* Fill in a frame control word for FFT processing. */
static inline void
-acc200_fcw_fft_fill(struct rte_bbdev_fft_op *op, struct acc_fcw_fft *fcw)
+vrb1_fcw_fft_fill(struct rte_bbdev_fft_op *op, struct acc_fcw_fft *fcw)
{
fcw->in_frame_size = op->fft.input_sequence_size;
fcw->leading_pad_size = op->fft.input_leading_padding;
@@ -3114,7 +3110,7 @@ acc200_fcw_fft_fill(struct rte_bbdev_fft_op *op, struct acc_fcw_fft *fcw)
}
static inline int
-acc200_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,
+vrb1_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,
struct acc_dma_req_desc *desc,
struct rte_mbuf *input, struct rte_mbuf *output,
uint32_t *in_offset, uint32_t *out_offset)
@@ -3147,7 +3143,7 @@ acc200_dma_desc_fft_fill(struct rte_bbdev_fft_op *op,
}
-/** Enqueue one FFT operation for ACC200 device. */
+/** Enqueue one FFT operation for device. */
static inline int
vrb_enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
uint16_t total_enqueued_cbs)
@@ -3164,8 +3160,8 @@ vrb_enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
out_offset = op->fft.base_output.offset;
fcw = &desc->req.fcw_fft;
- acc200_fcw_fft_fill(op, fcw);
- acc200_dma_desc_fft_fill(op, &desc->req, input, output, &in_offset, &out_offset);
+ vrb1_fcw_fft_fill(op, fcw);
+ vrb1_dma_desc_fft_fill(op, &desc->req, input, output, &in_offset, &out_offset);
#ifdef RTE_LIBRTE_BBDEV_DEBUG
rte_memdump(stderr, "FCW", &desc->req.fcw_fft,
sizeof(desc->req.fcw_fft));
@@ -3174,7 +3170,7 @@ vrb_enqueue_fft_one_op(struct acc_queue *q, struct rte_bbdev_fft_op *op,
return 1;
}
-/* Enqueue decode operations for ACC200 device. */
+/* Enqueue decode operations for device. */
static uint16_t
vrb_enqueue_fft(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_fft_op **ops, uint16_t num)
@@ -3212,9 +3208,9 @@ vrb_enqueue_fft(struct rte_bbdev_queue_data *q_data,
}
-/* Dequeue one FFT operations from ACC200 device. */
+/* Dequeue one FFT operations from device. */
static inline int
-dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,
+vrb_dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,
struct acc_queue *q, struct rte_bbdev_fft_op **ref_op,
uint16_t dequeued_cbs, uint32_t *aq_dequeued)
{
@@ -3261,7 +3257,7 @@ dequeue_fft_one_op(struct rte_bbdev_queue_data *q_data,
}
-/* Dequeue FFT operations from ACC200 device. */
+/* Dequeue FFT operations from device. */
static uint16_t
vrb_dequeue_fft(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_fft_op **ops, uint16_t num)
@@ -3275,7 +3271,7 @@ vrb_dequeue_fft(struct rte_bbdev_queue_data *q_data,
dequeue_num = RTE_MIN(avail, num);
for (i = 0; i < dequeue_num; ++i) {
- ret = dequeue_fft_one_op(q_data, q, &ops[i], dequeued_cbs, &aq_dequeued);
+ ret = vrb_dequeue_fft_one_op(q_data, q, &ops[i], dequeued_cbs, &aq_dequeued);
if (ret <= 0)
break;
dequeued_cbs += ret;
@@ -3290,7 +3286,7 @@ vrb_dequeue_fft(struct rte_bbdev_queue_data *q_data,
/* Initialization Function */
static void
-acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
+vrb_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
struct acc_device *d = dev->data->dev_private;
@@ -3307,21 +3303,21 @@ acc200_bbdev_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
dev->enqueue_fft_ops = vrb_enqueue_fft;
dev->dequeue_fft_ops = vrb_dequeue_fft;
- d->pf_device = !strcmp(drv->driver.name, RTE_STR(ACC200PF_DRIVER_NAME));
+ d->pf_device = !strcmp(drv->driver.name, RTE_STR(VRB_PF_DRIVER_NAME));
d->mmio_base = pci_dev->mem_resource[0].addr;
/* Device variant specific handling. */
- if ((pci_dev->id.device_id == RTE_ACC200_PF_DEVICE_ID) ||
- (pci_dev->id.device_id == RTE_ACC200_VF_DEVICE_ID)) {
- d->device_variant = ACC200_VARIANT;
- d->queue_offset = acc200_queue_offset;
- d->fcw_ld_fill = acc200_fcw_ld_fill;
- d->num_qgroups = ACC200_NUM_QGRPS;
- d->num_aqs = ACC200_NUM_AQS;
+ if ((pci_dev->id.device_id == RTE_VRB1_PF_DEVICE_ID) ||
+ (pci_dev->id.device_id == RTE_VRB1_VF_DEVICE_ID)) {
+ d->device_variant = VRB1_VARIANT;
+ d->queue_offset = vrb1_queue_offset;
+ d->fcw_ld_fill = vrb1_fcw_ld_fill;
+ d->num_qgroups = VRB1_NUM_QGRPS;
+ d->num_aqs = VRB1_NUM_AQS;
if (d->pf_device)
- d->reg_addr = &acc200_pf_reg_addr;
+ d->reg_addr = &vrb1_pf_reg_addr;
else
- d->reg_addr = &acc200_vf_reg_addr;
+ d->reg_addr = &vrb1_vf_reg_addr;
}
rte_bbdev_log_debug("Init device %s [%s] @ vaddr %p paddr %#"PRIx64"",
@@ -3366,38 +3362,38 @@ static int vrb_pci_probe(struct rte_pci_driver *pci_drv,
bbdev->intr_handle = pci_dev->intr_handle;
bbdev->data->socket_id = pci_dev->device.numa_node;
- /* Invoke ACC200 device initialization function. */
- acc200_bbdev_init(bbdev, pci_drv);
+ /* Invoke device initialization function. */
+ vrb_bbdev_init(bbdev, pci_drv);
rte_bbdev_log_debug("Initialised bbdev %s (id = %u)",
dev_name, bbdev->data->dev_id);
return 0;
}
-static struct rte_pci_driver acc200_pci_pf_driver = {
+static struct rte_pci_driver vrb_pci_pf_driver = {
.probe = vrb_pci_probe,
.remove = acc_pci_remove,
- .id_table = pci_id_acc200_pf_map,
+ .id_table = pci_id_vrb_pf_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING
};
-static struct rte_pci_driver acc200_pci_vf_driver = {
+static struct rte_pci_driver vrb_pci_vf_driver = {
.probe = vrb_pci_probe,
.remove = acc_pci_remove,
- .id_table = pci_id_acc200_vf_map,
+ .id_table = pci_id_vrb_vf_map,
.drv_flags = RTE_PCI_DRV_NEED_MAPPING
};
-RTE_PMD_REGISTER_PCI(ACC200PF_DRIVER_NAME, acc200_pci_pf_driver);
-RTE_PMD_REGISTER_PCI_TABLE(ACC200PF_DRIVER_NAME, pci_id_acc200_pf_map);
-RTE_PMD_REGISTER_PCI(ACC200VF_DRIVER_NAME, acc200_pci_vf_driver);
-RTE_PMD_REGISTER_PCI_TABLE(ACC200VF_DRIVER_NAME, pci_id_acc200_vf_map);
+RTE_PMD_REGISTER_PCI(VRB_PF_DRIVER_NAME, vrb_pci_pf_driver);
+RTE_PMD_REGISTER_PCI_TABLE(VRB_PF_DRIVER_NAME, pci_id_vrb_pf_map);
+RTE_PMD_REGISTER_PCI(VRB_VF_DRIVER_NAME, vrb_pci_vf_driver);
+RTE_PMD_REGISTER_PCI_TABLE(VRB_VF_DRIVER_NAME, pci_id_vrb_vf_map);
-/* Initial configuration of a ACC200 device prior to running configure(). */
+/* Initial configuration of a VRB1 device prior to running configure(). */
int
-acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
+vrb1_configure(const char *dev_name, struct rte_acc_conf *conf)
{
- rte_bbdev_log(INFO, "acc200_configure");
+ rte_bbdev_log(INFO, "vrb1_configure");
uint32_t value, address, status;
int qg_idx, template_idx, vf_idx, acc, i, rlim, alen, timestamp, totalQgs, numEngines;
int numQgs, numQqsAcc;
@@ -3423,40 +3419,40 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
/* Check we are already out of PG. */
status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
if (status > 0) {
- if (status != ACC200_PG_MASK_0) {
+ if (status != VRB1_PG_MASK_0) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
- status, ACC200_PG_MASK_0);
+ status, VRB1_PG_MASK_0);
return -ENODEV;
}
/* Clock gate sections that will be un-PG. */
- acc_reg_write(d, VRB1_PfHiClkGateHystReg, ACC200_CLK_DIS);
+ acc_reg_write(d, VRB1_PfHiClkGateHystReg, VRB1_CLK_DIS);
/* Un-PG required sections. */
acc_reg_write(d, VRB1_PfHiSectionPowerGatingReq,
- ACC200_PG_MASK_1);
+ VRB1_PG_MASK_1);
status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
- if (status != ACC200_PG_MASK_1) {
+ if (status != VRB1_PG_MASK_1) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
- status, ACC200_PG_MASK_1);
+ status, VRB1_PG_MASK_1);
return -ENODEV;
}
acc_reg_write(d, VRB1_PfHiSectionPowerGatingReq,
- ACC200_PG_MASK_2);
+ VRB1_PG_MASK_2);
status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
- if (status != ACC200_PG_MASK_2) {
+ if (status != VRB1_PG_MASK_2) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
- status, ACC200_PG_MASK_2);
+ status, VRB1_PG_MASK_2);
return -ENODEV;
}
acc_reg_write(d, VRB1_PfHiSectionPowerGatingReq,
- ACC200_PG_MASK_3);
+ VRB1_PG_MASK_3);
status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck);
- if (status != ACC200_PG_MASK_3) {
+ if (status != VRB1_PG_MASK_3) {
rte_bbdev_log(ERR, "Unexpected status %x %x",
- status, ACC200_PG_MASK_3);
+ status, VRB1_PG_MASK_3);
return -ENODEV;
}
/* Enable clocks for all sections. */
- acc_reg_write(d, VRB1_PfHiClkGateHystReg, ACC200_CLK_EN);
+ acc_reg_write(d, VRB1_PfHiClkGateHystReg, VRB1_CLK_EN);
}
/* Explicitly releasing AXI as this may be stopped after PF FLR/BME. */
@@ -3466,7 +3462,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
/* Set the fabric mode. */
address = VRB1_PfFabricM2iBufferReg;
- value = ACC200_FABRIC_MODE;
+ value = VRB1_FABRIC_MODE;
acc_reg_write(d, address, value);
/* Set default descriptor signature. */
@@ -3475,12 +3471,12 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
acc_reg_write(d, address, value);
/* Enable the Error Detection in DMA. */
- value = ACC200_CFG_DMA_ERROR;
+ value = VRB1_CFG_DMA_ERROR;
address = VRB1_PfDmaErrorDetectionEn;
acc_reg_write(d, address, value);
/* AXI Cache configuration. */
- value = ACC200_CFG_AXI_CACHE;
+ value = VRB1_CFG_AXI_CACHE;
address = VRB1_PfDmaAxcacheReg;
acc_reg_write(d, address, value);
@@ -3505,7 +3501,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
/* Default FFT configuration. */
address = VRB1_PfFftConfig0;
- value = ACC200_FFT_CFG_0;
+ value = VRB1_FFT_CFG_0;
acc_reg_write(d, address, value);
/* Configure DMA Qmanager addresses. */
@@ -3520,7 +3516,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
conf->q_dl_4g.num_qgroups +
conf->q_dl_5g.num_qgroups +
conf->q_fft.num_qgroups;
- for (qg_idx = 0; qg_idx < ACC200_NUM_QGRPS; qg_idx++) {
+ for (qg_idx = 0; qg_idx < VRB1_NUM_QGRPS; qg_idx++) {
address = VRB1_PfQmgrDepthLog2Grp + ACC_BYTES_IN_WORD * qg_idx;
value = aqDepth(qg_idx, conf);
acc_reg_write(d, address, value);
@@ -3547,7 +3543,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
}
address = VRB1_PfQmgrGrpPriority;
- value = ACC200_CFG_QMGR_HI_P;
+ value = VRB1_CFG_QMGR_HI_P;
acc_reg_write(d, address, value);
/* Template Configuration. */
@@ -3564,8 +3560,8 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
value = 0;
for (qg_idx = numQqsAcc; qg_idx < (numQgs + numQqsAcc); qg_idx++)
value |= (1 << qg_idx);
- for (template_idx = ACC200_SIG_UL_4G;
- template_idx <= ACC200_SIG_UL_4G_LAST;
+ for (template_idx = VRB1_SIG_UL_4G;
+ template_idx <= VRB1_SIG_UL_4G_LAST;
template_idx++) {
address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
@@ -3573,13 +3569,13 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
}
/* 5GUL */
numQqsAcc += numQgs;
- numQgs = conf->q_ul_5g.num_qgroups;
+ numQgs = conf->q_ul_5g.num_qgroups;
value = 0;
numEngines = 0;
for (qg_idx = numQqsAcc; qg_idx < (numQgs + numQqsAcc); qg_idx++)
value |= (1 << qg_idx);
- for (template_idx = ACC200_SIG_UL_5G;
- template_idx <= ACC200_SIG_UL_5G_LAST;
+ for (template_idx = VRB1_SIG_UL_5G;
+ template_idx <= VRB1_SIG_UL_5G_LAST;
template_idx++) {
/* Check engine power-on status */
address = VRB1_PfFecUl5gIbDebugReg + ACC_ENGINE_OFFSET * template_idx;
@@ -3599,8 +3595,8 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
value = 0;
for (qg_idx = numQqsAcc; qg_idx < (numQgs + numQqsAcc); qg_idx++)
value |= (1 << qg_idx);
- for (template_idx = ACC200_SIG_DL_4G;
- template_idx <= ACC200_SIG_DL_4G_LAST;
+ for (template_idx = VRB1_SIG_DL_4G;
+ template_idx <= VRB1_SIG_DL_4G_LAST;
template_idx++) {
address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
@@ -3612,8 +3608,8 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
value = 0;
for (qg_idx = numQqsAcc; qg_idx < (numQgs + numQqsAcc); qg_idx++)
value |= (1 << qg_idx);
- for (template_idx = ACC200_SIG_DL_5G;
- template_idx <= ACC200_SIG_DL_5G_LAST;
+ for (template_idx = VRB1_SIG_DL_5G;
+ template_idx <= VRB1_SIG_DL_5G_LAST;
template_idx++) {
address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
@@ -3625,8 +3621,8 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
value = 0;
for (qg_idx = numQqsAcc; qg_idx < (numQgs + numQqsAcc); qg_idx++)
value |= (1 << qg_idx);
- for (template_idx = ACC200_SIG_FFT;
- template_idx <= ACC200_SIG_FFT_LAST;
+ for (template_idx = VRB1_SIG_FFT;
+ template_idx <= VRB1_SIG_FFT_LAST;
template_idx++) {
address = VRB1_PfQmgrGrpTmplateReg4Indx
+ ACC_BYTES_IN_WORD * template_idx;
@@ -3649,7 +3645,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
acc_reg_write(d, VRB1_PfQmgrGrpFunction1, value);
/* Configuration of the Arbitration QGroup depth to 1. */
- for (qg_idx = 0; qg_idx < ACC200_NUM_QGRPS; qg_idx++) {
+ for (qg_idx = 0; qg_idx < VRB1_NUM_QGRPS; qg_idx++) {
address = VRB1_PfQmgrArbQDepthGrp +
ACC_BYTES_IN_WORD * qg_idx;
value = 0;
@@ -3671,9 +3667,9 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
}
}
- if (aram_address > ACC200_WORDS_IN_ARAM_SIZE) {
+ if (aram_address > VRB1_WORDS_IN_ARAM_SIZE) {
rte_bbdev_log(ERR, "ARAM Configuration not fitting %d %d\n",
- aram_address, ACC200_WORDS_IN_ARAM_SIZE);
+ aram_address, VRB1_WORDS_IN_ARAM_SIZE);
return -EINVAL;
}
@@ -3711,7 +3707,7 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
acc_reg_write(d, address, value);
/* Configure the FFT RAM LUT. */
- uint32_t fft_lut[ACC200_FFT_RAM_SIZE] = {
+ uint32_t fft_lut[VRB1_FFT_RAM_SIZE] = {
0x1FFFF, 0x1FFFF, 0x1FFFE, 0x1FFFA, 0x1FFF6, 0x1FFF1, 0x1FFEA, 0x1FFE2,
0x1FFD9, 0x1FFCE, 0x1FFC2, 0x1FFB5, 0x1FFA7, 0x1FF98, 0x1FF87, 0x1FF75,
0x1FF62, 0x1FF4E, 0x1FF38, 0x1FF21, 0x1FF09, 0x1FEF0, 0x1FED6, 0x1FEBA,
@@ -3777,14 +3773,14 @@ acc200_configure(const char *dev_name, struct rte_acc_conf *conf)
0x0191F, 0x0178E, 0x015FC, 0x0146A, 0x012D8, 0x01147, 0x00FB5, 0x00E23,
0x00C91, 0x00AFF, 0x0096D, 0x007DB, 0x00648, 0x004B6, 0x00324, 0x00192};
- acc_reg_write(d, VRB1_PfFftRamPageAccess, ACC200_FFT_RAM_EN + 64);
- for (i = 0; i < ACC200_FFT_RAM_SIZE; i++)
+ acc_reg_write(d, VRB1_PfFftRamPageAccess, VRB1_FFT_RAM_EN + 64);
+ for (i = 0; i < VRB1_FFT_RAM_SIZE; i++)
acc_reg_write(d, VRB1_PfFftRamOff + i * 4, fft_lut[i]);
- acc_reg_write(d, VRB1_PfFftRamPageAccess, ACC200_FFT_RAM_DIS);
+ acc_reg_write(d, VRB1_PfFftRamPageAccess, VRB1_FFT_RAM_DIS);
/* Enabling AQueues through the Queue hierarchy. */
- for (vf_idx = 0; vf_idx < ACC200_NUM_VFS; vf_idx++) {
- for (qg_idx = 0; qg_idx < ACC200_NUM_QGRPS; qg_idx++) {
+ for (vf_idx = 0; vf_idx < VRB1_NUM_VFS; vf_idx++) {
+ for (qg_idx = 0; qg_idx < VRB1_NUM_QGRPS; qg_idx++) {
value = 0;
if (vf_idx < conf->num_vf_bundles && qg_idx < totalQgs)
value = (1 << aqNum(qg_idx, conf)) - 1;
diff --git a/drivers/baseband/acc/acc200_pf_enum.h b/drivers/baseband/acc/vrb1_pf_enum.h
similarity index 97%
rename from drivers/baseband/acc/acc200_pf_enum.h
rename to drivers/baseband/acc/vrb1_pf_enum.h
index fc38465705..82a36685e9 100644
--- a/drivers/baseband/acc/acc200_pf_enum.h
+++ b/drivers/baseband/acc/vrb1_pf_enum.h
@@ -2,11 +2,11 @@
* Copyright(c) 2021 Intel Corporation
*/
-#ifndef ACC200_PF_ENUM_H
-#define ACC200_PF_ENUM_H
+#ifndef VRB1_PF_ENUM_H
+#define VRB1_PF_ENUM_H
/*
- * ACC200 Register mapping on PF BAR0
+ * VRB1 Register mapping on PF BAR0
* This is automatically generated from RDL, format may change with new RDL
* Release.
* Variable names are as is
@@ -105,4 +105,4 @@ enum {
ACC_PF_INT_APB_TIMEOUT = 15,
};
-#endif /* ACC200_PF_ENUM_H */
+#endif /* VRB1_PF_ENUM_H */
diff --git a/drivers/baseband/acc/acc200_vf_enum.h b/drivers/baseband/acc/vrb1_vf_enum.h
similarity index 96%
rename from drivers/baseband/acc/acc200_vf_enum.h
rename to drivers/baseband/acc/vrb1_vf_enum.h
index 62a4f369bc..b17b2e34dd 100644
--- a/drivers/baseband/acc/acc200_vf_enum.h
+++ b/drivers/baseband/acc/vrb1_vf_enum.h
@@ -2,11 +2,11 @@
* Copyright(c) 2021 Intel Corporation
*/
-#ifndef ACC200_VF_ENUM_H
-#define ACC200_VF_ENUM_H
+#ifndef VRB1_VF_ENUM_H
+#define VRB1_VF_ENUM_H
/*
- * ACC200 Register mapping on VF BAR0
+ * VRB1 Register mapping on VF BAR0
* This is automatically generated from RDL, format may change with new RDL
*/
enum {
@@ -80,4 +80,4 @@ enum {
ACC_VF_INT_DMA_MLD_DESC_IRQ = 10,
};
-#endif /* ACC200_VF_ENUM_H */
+#endif /* VRB1_VF_ENUM_H */
diff --git a/drivers/baseband/acc/vrb_cfg.h b/drivers/baseband/acc/vrb_cfg.h
index 2b31244818..e3c8902b46 100644
--- a/drivers/baseband/acc/vrb_cfg.h
+++ b/drivers/baseband/acc/vrb_cfg.h
@@ -6,27 +6,27 @@
#define _VRB_CFG_H_
/**
- * @file acc200_cfg.h
+ * @file vrb_cfg.h
*
- * Functions for configuring ACC200 HW.
+ * Functions for configuring VRB1 HW.
* Configuration related to encoding/decoding is done through the
* librte_bbdev library.
*/
/**
- * Configure a ACC200 device.
+ * Configure a VRB1 device.
*
* @param dev_name
* The name of the device. This is the short form of PCI BDF, e.g. 00:01.0.
* It can also be retrieved for a bbdev device from the dev_name field in the
* rte_bbdev_info structure returned by rte_bbdev_info_get().
* @param conf
- * Configuration to apply to ACC200 HW.
+ * Configuration to apply to VRB1 HW.
*
* @return
* Zero on success, negative value on failure.
*/
int
-acc200_configure(const char *dev_name, struct rte_acc_conf *conf);
+vrb1_configure(const char *dev_name, struct rte_acc_conf *conf);
#endif /* _VRB_CFG_H_ */
diff --git a/drivers/baseband/acc/vrb_pmd.h b/drivers/baseband/acc/vrb_pmd.h
index b074c8d4f9..f3c9239881 100644
--- a/drivers/baseband/acc/vrb_pmd.h
+++ b/drivers/baseband/acc/vrb_pmd.h
@@ -6,8 +6,8 @@
#define _VRB_PMD_H_
#include "acc_common.h"
-#include "acc200_pf_enum.h"
-#include "acc200_vf_enum.h"
+#include "vrb1_pf_enum.h"
+#include "vrb1_vf_enum.h"
#include "vrb_cfg.h"
/* Helper macro for logging */
@@ -17,76 +17,77 @@
#ifdef RTE_LIBRTE_BBDEV_DEBUG
#define rte_bbdev_log_debug(fmt, ...) \
- rte_bbdev_log(DEBUG, "acc200_pmd: " fmt, \
+ rte_bbdev_log(DEBUG, "vrb_pmd: " fmt, \
##__VA_ARGS__)
#else
#define rte_bbdev_log_debug(fmt, ...)
#endif
-/* ACC200 PF and VF driver names */
-#define ACC200PF_DRIVER_NAME intel_acc200_pf
-#define ACC200VF_DRIVER_NAME intel_acc200_vf
-
-/* ACC200 PCI vendor & device IDs */
-#define RTE_ACC200_VENDOR_ID (0x8086)
-#define RTE_ACC200_PF_DEVICE_ID (0x57C0)
-#define RTE_ACC200_VF_DEVICE_ID (0x57C1)
-
-#define ACC200_VARIANT 2
-
-#define ACC200_MAX_PF_MSIX (256+32)
-#define ACC200_MAX_VF_MSIX (256+7)
-
-/* Values used in writing to the registers */
-#define ACC200_REG_IRQ_EN_ALL 0x1FF83FF /* Enable all interrupts */
-
-/* Number of Virtual Functions ACC200 supports */
-#define ACC200_NUM_VFS 16
-#define ACC200_NUM_QGRPS 16
-#define ACC200_NUM_AQS 16
-
-#define ACC200_GRP_ID_SHIFT 10 /* Queue Index Hierarchy */
-#define ACC200_VF_ID_SHIFT 4 /* Queue Index Hierarchy */
-#define ACC200_WORDS_IN_ARAM_SIZE (256 * 1024 / 4)
-
-/* Mapping of signals for the available engines */
-#define ACC200_SIG_UL_5G 0
-#define ACC200_SIG_UL_5G_LAST 4
-#define ACC200_SIG_DL_5G 10
-#define ACC200_SIG_DL_5G_LAST 11
-#define ACC200_SIG_UL_4G 12
-#define ACC200_SIG_UL_4G_LAST 16
-#define ACC200_SIG_DL_4G 21
-#define ACC200_SIG_DL_4G_LAST 23
-#define ACC200_SIG_FFT 24
-#define ACC200_SIG_FFT_LAST 24
-
-#define ACC200_NUM_ACCS 5
-
-/* ACC200 Configuration */
-#define ACC200_FABRIC_MODE 0x8000103
-#define ACC200_CFG_DMA_ERROR 0x3DF
-#define ACC200_CFG_AXI_CACHE 0x11
-#define ACC200_CFG_QMGR_HI_P 0x0F0F
-#define ACC200_RESET_HARD 0x1FF
-#define ACC200_ENGINES_MAX 9
-#define ACC200_GPEX_AXIMAP_NUM 17
-#define ACC200_CLOCK_GATING_EN 0x30000
-#define ACC200_FFT_CFG_0 0x2001
-#define ACC200_FFT_RAM_EN 0x80008000
-#define ACC200_FFT_RAM_DIS 0x0
-#define ACC200_FFT_RAM_SIZE 512
-#define ACC200_CLK_EN 0x00010A01
-#define ACC200_CLK_DIS 0x01F10A01
-#define ACC200_PG_MASK_0 0x1F
-#define ACC200_PG_MASK_1 0xF
-#define ACC200_PG_MASK_2 0x1
-#define ACC200_PG_MASK_3 0x0
-#define ACC200_PG_MASK_FFT 1
-#define ACC200_PG_MASK_4GUL 4
-#define ACC200_PG_MASK_5GUL 8
-#define ACC200_STATUS_WAIT 10
-#define ACC200_STATUS_TO 100
+/* VRB1 PF and VF driver names */
+#define VRB_PF_DRIVER_NAME intel_vran_boost_pf
+#define VRB_VF_DRIVER_NAME intel_vran_boost_vf
+
+/* VRB1 PCI vendor & device IDs */
+#define RTE_VRB1_VENDOR_ID (0x8086)
+#define RTE_VRB1_PF_DEVICE_ID (0x57C0)
+#define RTE_VRB1_VF_DEVICE_ID (0x57C1)
+
+#define VRB1_VARIANT 2
+
+#define VRB_NUM_ACCS 6
+#define VRB_MAX_QGRPS 32
+
+#define ACC_STATUS_WAIT 10
+#define ACC_STATUS_TO 100
+
+/* VRB1 specific flags */
+
+#define VRB1_NUM_VFS 16
+#define VRB1_NUM_QGRPS 16
+#define VRB1_NUM_AQS 16
+#define VRB1_GRP_ID_SHIFT 10 /* Queue Index Hierarchy */
+#define VRB1_VF_ID_SHIFT 4 /* Queue Index Hierarchy */
+#define VRB1_WORDS_IN_ARAM_SIZE (256 * 1024 / 4)
+
+/* VRB1 Mapping of signals for the available engines */
+#define VRB1_SIG_UL_5G 0
+#define VRB1_SIG_UL_5G_LAST 4
+#define VRB1_SIG_DL_5G 10
+#define VRB1_SIG_DL_5G_LAST 11
+#define VRB1_SIG_UL_4G 12
+#define VRB1_SIG_UL_4G_LAST 16
+#define VRB1_SIG_DL_4G 21
+#define VRB1_SIG_DL_4G_LAST 23
+#define VRB1_SIG_FFT 24
+#define VRB1_SIG_FFT_LAST 24
+
+#define VRB1_NUM_ACCS 5
+
+/* VRB1 Configuration */
+#define VRB1_FABRIC_MODE 0x8000103
+#define VRB1_CFG_DMA_ERROR 0x3DF
+#define VRB1_CFG_AXI_CACHE 0x11
+#define VRB1_CFG_QMGR_HI_P 0x0F0F
+#define VRB1_RESET_HARD 0x1FF
+#define VRB1_ENGINES_MAX 9
+#define VRB1_GPEX_AXIMAP_NUM 17
+#define VRB1_CLOCK_GATING_EN 0x30000
+#define VRB1_FFT_CFG_0 0x2001
+#define VRB1_FFT_RAM_EN 0x80008000
+#define VRB1_FFT_RAM_DIS 0x0
+#define VRB1_FFT_RAM_SIZE 512
+#define VRB1_CLK_EN 0x00010A01
+#define VRB1_CLK_DIS 0x01F10A01
+#define VRB1_PG_MASK_0 0x1F
+#define VRB1_PG_MASK_1 0xF
+#define VRB1_PG_MASK_2 0x1
+#define VRB1_PG_MASK_3 0x0
+#define VRB1_PG_MASK_FFT 1
+#define VRB1_PG_MASK_4GUL 4
+#define VRB1_PG_MASK_5GUL 8
+#define VRB1_REG_IRQ_EN_ALL 0x1FF83FF /* Enable all interrupts */
+#define VRB1_MAX_PF_MSIX (256+32)
+#define VRB1_MAX_VF_MSIX (256+7)
struct acc_registry_addr {
unsigned int dma_ring_dl5g_hi;
@@ -127,7 +128,7 @@ struct acc_registry_addr {
};
/* Structure holding registry addresses for PF */
-static const struct acc_registry_addr acc200_pf_reg_addr = {
+static const struct acc_registry_addr vrb1_pf_reg_addr = {
.dma_ring_dl5g_hi = VRB1_PfDmaFec5GdlDescBaseHiRegVf,
.dma_ring_dl5g_lo = VRB1_PfDmaFec5GdlDescBaseLoRegVf,
.dma_ring_ul5g_hi = VRB1_PfDmaFec5GulDescBaseHiRegVf,
@@ -166,7 +167,7 @@ static const struct acc_registry_addr acc200_pf_reg_addr = {
};
/* Structure holding registry addresses for VF */
-static const struct acc_registry_addr acc200_vf_reg_addr = {
+static const struct acc_registry_addr vrb1_vf_reg_addr = {
.dma_ring_dl5g_hi = VRB1_VfDmaFec5GdlDescBaseHiRegVf,
.dma_ring_dl5g_lo = VRB1_VfDmaFec5GdlDescBaseLoRegVf,
.dma_ring_ul5g_hi = VRB1_VfDmaFec5GulDescBaseHiRegVf,
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v1 5/6] baseband/acc: rename of remaining acc200 prefix to vrb1
2023-01-17 22:36 ` [PATCH v1 5/6] baseband/acc: rename of remaining acc200 prefix to vrb1 Nicolas Chautru
@ 2023-01-31 15:11 ` Maxime Coquelin
0 siblings, 0 replies; 16+ messages in thread
From: Maxime Coquelin @ 2023-01-31 15:11 UTC (permalink / raw)
To: Nicolas Chautru, dev; +Cc: hernan.vargas
On 1/17/23 23:36, Nicolas Chautru wrote:
> Rename remaining variable, comments and enums names
> when generic usage is applicable. VRB1 is specific to
> current HW support and VRB is more generic.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> drivers/baseband/acc/acc_common.h | 12 +-
> drivers/baseband/acc/rte_acc100_pmd.c | 4 +-
> drivers/baseband/acc/rte_vrb_pmd.c | 352 +++++++++---------
> .../acc/{acc200_pf_enum.h => vrb1_pf_enum.h} | 8 +-
> .../acc/{acc200_vf_enum.h => vrb1_vf_enum.h} | 8 +-
> drivers/baseband/acc/vrb_cfg.h | 10 +-
> drivers/baseband/acc/vrb_pmd.h | 139 +++----
> 7 files changed, 265 insertions(+), 268 deletions(-)
> rename drivers/baseband/acc/{acc200_pf_enum.h => vrb1_pf_enum.h} (97%)
> rename drivers/baseband/acc/{acc200_vf_enum.h => vrb1_vf_enum.h} (96%)
>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks,
Maxime
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v1 6/6] doc: updated naming convention for acc200 PMD
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
` (4 preceding siblings ...)
2023-01-17 22:36 ` [PATCH v1 5/6] baseband/acc: rename of remaining acc200 prefix to vrb1 Nicolas Chautru
@ 2023-01-17 22:36 ` Nicolas Chautru
2023-01-31 15:11 ` Maxime Coquelin
2023-02-03 11:03 ` [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Maxime Coquelin
6 siblings, 1 reply; 16+ messages in thread
From: Nicolas Chautru @ 2023-01-17 22:36 UTC (permalink / raw)
To: dev, maxime.coquelin; +Cc: hernan.vargas, Nicolas Chautru
The documentation for the Intel vRAN Boost PMD
is being updated in term of filename and content
to match with new branding and product name.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
.../bbdevs/features/{acc200.ini => vrb1.ini} | 2 +-
doc/guides/bbdevs/{acc200.rst => vrb1.rst} | 33 ++++++++++---------
2 files changed, 18 insertions(+), 17 deletions(-)
rename doc/guides/bbdevs/features/{acc200.ini => vrb1.ini} (83%)
rename doc/guides/bbdevs/{acc200.rst => vrb1.rst} (90%)
diff --git a/doc/guides/bbdevs/features/acc200.ini b/doc/guides/bbdevs/features/vrb1.ini
similarity index 83%
rename from doc/guides/bbdevs/features/acc200.ini
rename to doc/guides/bbdevs/features/vrb1.ini
index 7319aea726..0372b656ec 100644
--- a/doc/guides/bbdevs/features/acc200.ini
+++ b/doc/guides/bbdevs/features/vrb1.ini
@@ -1,5 +1,5 @@
;
-; Supported features of the 'acc200' bbdev driver.
+; Supported features of the 'intel vran boost' bbdev driver.
;
; Refer to default.ini for the full list of available PMD features.
;
diff --git a/doc/guides/bbdevs/acc200.rst b/doc/guides/bbdevs/vrb1.rst
similarity index 90%
rename from doc/guides/bbdevs/acc200.rst
rename to doc/guides/bbdevs/vrb1.rst
index 012b3870a8..881ca5443c 100644
--- a/doc/guides/bbdevs/acc200.rst
+++ b/doc/guides/bbdevs/vrb1.rst
@@ -3,39 +3,39 @@
.. include:: <isonum.txt>
-Intel\ |reg| ACC200 vRAN Dedicated Accelerator Poll Mode Driver
-===============================================================
+Intel\ |reg| vRAN Boost Poll Mode Driver (PMD)
+==============================================
-The Intel\ |reg| vRAN Dedicated Accelerator ACC200 peripheral enables
+The Intel\ |reg| vRAN Boost integrated accelerator enables
cost-effective 4G and 5G next-generation virtualized Radio Access Network (vRAN)
-solutions integrated on Sapphire Rapids Edge Enhanced Processor (SPR-EE)
-Intel\ |reg| 7 based Xeon\ |reg| multi-core server processor.
-
+solutions.
+The Intel vRAN Boost v1.0 (VRB1 in the code) is specifically integrated on the
+4th Gen Intel\ |reg| Xeon\ |reg| Scalable processor with Intel\ |reg| vRAN Boost,
+also known as Sapphire Rapids Edge Enhanced (SPR-EE).
Features
--------
-The ACC200 includes a 5G Low Density Parity Check (LDPC) encoder/decoder,
+Intel vRAN Boost v1.0 includes a 5G Low Density Parity Check (LDPC) encoder/decoder,
rate match/dematch, Hybrid Automatic Repeat Request (HARQ) with access to DDR
memory for buffer management, a 4G Turbo encoder/decoder,
a Fast Fourier Transform (FFT) block providing DFT/iDFT processing offload
for the 5G Sounding Reference Signal (SRS), a Queue Manager (QMGR),
and a DMA subsystem.
-There is no dedicated on-card memory for HARQ,
-this is using coherent memory on the CPU side.
+There is no dedicated on-card memory for HARQ, the coherent memory on the CPU side is being used.
-These correspond to the following features exposed by the PMD:
+These hardware blocks provide the following features exposed by the PMD:
- LDPC Encode in the Downlink (5GNR)
- LDPC Decode in the Uplink (5GNR)
- Turbo Encode in the Downlink (4G)
- Turbo Decode in the Uplink (4G)
- FFT processing
-- SR-IOV with 16 VFs per PF
+- Single Root I/O Virtualization (SR-IOV) with 16 Virtual Functions (VFs) per Physical Function (PF)
- Maximum of 256 queues per VF
-- MSI
+- Message Signaled Interrupts (MSIs)
-ACC200 PMD supports the following bbdev capabilities:
+The Intel vRAN Boost v1.0 PMD supports the following bbdev capabilities:
* For the LDPC encode operation:
- ``RTE_BBDEV_LDPC_CRC_24B_ATTACH``: set to attach CRC24B to CB(s).
@@ -104,7 +104,7 @@ Initialization
--------------
When the device first powers up, its PCI Physical Functions (PF)
-can be listed through these commands for ACC200:
+can be listed through these commands for VRB1:
.. code-block:: console
@@ -123,7 +123,7 @@ Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use
``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver.
The igb_uio driver may be bound to the PF PCI device using one of two methods
-for ACC200:
+for VRB1:
#. PCI functions (physical or virtual, depending on the use case) can be bound
to the UIO driver by repeating this command for every function.
@@ -252,7 +252,8 @@ from the VF and not only limited to the PF as captured above.
See for more details: https://github.com/intel/pf-bb-config
-Specifically for the bbdev ACC200 PMD, the command below can be used:
+Specifically for the bbdev VRB1 PMD, the command below can be used (note that ACC200 was used
+prevously to refer to VRB1):
.. code-block:: console
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v1 6/6] doc: updated naming convention for acc200 PMD
2023-01-17 22:36 ` [PATCH v1 6/6] doc: updated naming convention for acc200 PMD Nicolas Chautru
@ 2023-01-31 15:11 ` Maxime Coquelin
2023-02-07 8:00 ` David Marchand
0 siblings, 1 reply; 16+ messages in thread
From: Maxime Coquelin @ 2023-01-31 15:11 UTC (permalink / raw)
To: Nicolas Chautru, dev; +Cc: hernan.vargas
On 1/17/23 23:36, Nicolas Chautru wrote:
> The documentation for the Intel vRAN Boost PMD
> is being updated in term of filename and content
> to match with new branding and product name.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
> .../bbdevs/features/{acc200.ini => vrb1.ini} | 2 +-
> doc/guides/bbdevs/{acc200.rst => vrb1.rst} | 33 ++++++++++---------
> 2 files changed, 18 insertions(+), 17 deletions(-)
> rename doc/guides/bbdevs/features/{acc200.ini => vrb1.ini} (83%)
> rename doc/guides/bbdevs/{acc200.rst => vrb1.rst} (90%)
>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks,
Maxime
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH v1 6/6] doc: updated naming convention for acc200 PMD
2023-01-31 15:11 ` Maxime Coquelin
@ 2023-02-07 8:00 ` David Marchand
2023-02-07 8:08 ` David Marchand
0 siblings, 1 reply; 16+ messages in thread
From: David Marchand @ 2023-02-07 8:00 UTC (permalink / raw)
To: Nicolas Chautru, Maxime Coquelin; +Cc: dev, hernan.vargas
Hello,
On Tue, Jan 31, 2023 at 4:12 PM Maxime Coquelin
<maxime.coquelin@redhat.com> wrote:
> On 1/17/23 23:36, Nicolas Chautru wrote:
> > The documentation for the Intel vRAN Boost PMD
> > is being updated in term of filename and content
> > to match with new branding and product name.
> >
> > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> > ---
> > .../bbdevs/features/{acc200.ini => vrb1.ini} | 2 +-
> > doc/guides/bbdevs/{acc200.rst => vrb1.rst} | 33 ++++++++++---------
> > 2 files changed, 18 insertions(+), 17 deletions(-)
> > rename doc/guides/bbdevs/features/{acc200.ini => vrb1.ini} (83%)
> > rename doc/guides/bbdevs/{acc200.rst => vrb1.rst} (90%)
> >
>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Guys, the CI failure was obvious, but it seems nobody looked at it...
http://mails.dpdk.org/archives/test-report/2023-January/341526.html
[122/716] Generating html_guides with a custom command.
FAILED: doc/guides/html
/usr/bin/python3 ../buildtools/call-sphinx-build.py
/usr/bin/sphinx-build 23.03.0-rc0
/home/runner/work/dpdk/dpdk/doc/guides
/home/runner/work/dpdk/dpdk/build/doc/guides -W
Warning, treated as error:
/home/runner/work/dpdk/dpdk/doc/guides/bbdevs/index.rst:7:toctree
contains reference to nonexisting document 'bbdevs/acc200'
[123/716] Compiling C object 'examples/c590b3c@@dpdk-l2fwd-jobstats at
exe/l2fwd-jobstats_main.c.o'.
[124/716] Compiling C object 'examples/c590b3c@@dpdk-l2fwd-crypto at
exe/l2fwd-crypto_main.c.o'.
ninja: build stopped: subcommand failed.
I'll send a fix quickly.
--
David Marchand
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH v1 6/6] doc: updated naming convention for acc200 PMD
2023-02-07 8:00 ` David Marchand
@ 2023-02-07 8:08 ` David Marchand
0 siblings, 0 replies; 16+ messages in thread
From: David Marchand @ 2023-02-07 8:08 UTC (permalink / raw)
To: Nicolas Chautru, Maxime Coquelin; +Cc: dev, hernan.vargas
On Tue, Feb 7, 2023 at 9:00 AM David Marchand <david.marchand@redhat.com> wrote:
>
> Hello,
>
> On Tue, Jan 31, 2023 at 4:12 PM Maxime Coquelin
> <maxime.coquelin@redhat.com> wrote:
> > On 1/17/23 23:36, Nicolas Chautru wrote:
> > > The documentation for the Intel vRAN Boost PMD
> > > is being updated in term of filename and content
> > > to match with new branding and product name.
> > >
> > > Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> > > ---
> > > .../bbdevs/features/{acc200.ini => vrb1.ini} | 2 +-
> > > doc/guides/bbdevs/{acc200.rst => vrb1.rst} | 33 ++++++++++---------
> > > 2 files changed, 18 insertions(+), 17 deletions(-)
> > > rename doc/guides/bbdevs/features/{acc200.ini => vrb1.ini} (83%)
> > > rename doc/guides/bbdevs/{acc200.rst => vrb1.rst} (90%)
> > >
> >
> > Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
>
> Guys, the CI failure was obvious, but it seems nobody looked at it...
>
> http://mails.dpdk.org/archives/test-report/2023-January/341526.html
>
> [122/716] Generating html_guides with a custom command.
> FAILED: doc/guides/html
> /usr/bin/python3 ../buildtools/call-sphinx-build.py
> /usr/bin/sphinx-build 23.03.0-rc0
> /home/runner/work/dpdk/dpdk/doc/guides
> /home/runner/work/dpdk/dpdk/build/doc/guides -W
>
> Warning, treated as error:
> /home/runner/work/dpdk/dpdk/doc/guides/bbdevs/index.rst:7:toctree
> contains reference to nonexisting document 'bbdevs/acc200'
> [123/716] Compiling C object 'examples/c590b3c@@dpdk-l2fwd-jobstats at
> exe/l2fwd-jobstats_main.c.o'.
> [124/716] Compiling C object 'examples/c590b3c@@dpdk-l2fwd-crypto at
> exe/l2fwd-crypto_main.c.o'.
> ninja: build stopped: subcommand failed.
Looking closer, Maxime had fixed this first issue, but it was hiding
another one.
/usr/bin/python3 ../buildtools/call-sphinx-build.py
/usr/bin/sphinx-build 23.03.0-rc0
/home/runner/work/dpdk/dpdk/doc/guides
/home/runner/work/dpdk/dpdk/build/doc/guides -W
Warning, treated as error:
/home/runner/work/dpdk/dpdk/doc/guides/rel_notes/release_22_11.rst:222:unknown
document: ../bbdevs/acc200
[130/718] Compiling C object
'examples/c590b3c@@dpdk-l3fwd-power@exe/l3fwd-power_main.c.o'.
[131/718] Compiling C object
'examples/c590b3c@@dpdk-link_status_interrupt@exe/link_status_interrupt_main.c.o'.
--
David Marchand
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename
2023-01-17 22:36 [PATCH v1 0/6] baseband/acc: ACC200 PMD refactor and rename Nicolas Chautru
` (5 preceding siblings ...)
2023-01-17 22:36 ` [PATCH v1 6/6] doc: updated naming convention for acc200 PMD Nicolas Chautru
@ 2023-02-03 11:03 ` Maxime Coquelin
6 siblings, 0 replies; 16+ messages in thread
From: Maxime Coquelin @ 2023-02-03 11:03 UTC (permalink / raw)
To: Nicolas Chautru, dev; +Cc: hernan.vargas
On 1/17/23 23:36, Nicolas Chautru wrote:
> In this serie we are renaming the ACC200PMD to a more generic
> VRB PMD (Intel vRAN Boost). The 2nd commit is also making sure this
> is future prood to be able to support both the first implementation
> of VRB (The one in SPR-EE) as well as future implementations of
> integrated product.
> Most of changes are really rename to a large extend aanmaking the
> distinction of what is specific to current implementation (VRB1)
> vs more generic functions (VRB) which would be common to VRB1,
> VRB2, etc...
>
> Nicolas Chautru (6):
> baseband/acc: file renaming from acc200 to generic vrb
> baseband/acc: extension of the device structure
> baseband/acc: adding prefix to VRB1 registers
> baseband/acc: update prefix for VRB PMD functions
> baseband/acc: rename of remaining acc200 prefix to vrb1
> doc: updated naming convention for acc200 PMD
>
> .../bbdevs/features/{acc200.ini => vrb1.ini} | 2 +-
> doc/guides/bbdevs/{acc200.rst => vrb1.rst} | 33 +-
> drivers/baseband/acc/acc200_pf_enum.h | 108 ---
> drivers/baseband/acc/acc200_pmd.h | 196 -----
> drivers/baseband/acc/acc200_vf_enum.h | 83 --
> drivers/baseband/acc/acc_common.h | 18 +-
> drivers/baseband/acc/meson.build | 2 +-
> drivers/baseband/acc/rte_acc100_pmd.c | 6 +-
> .../acc/{rte_acc200_pmd.c => rte_vrb_pmd.c} | 820 +++++++++---------
> drivers/baseband/acc/vrb1_pf_enum.h | 108 +++
> drivers/baseband/acc/vrb1_vf_enum.h | 83 ++
> .../baseband/acc/{acc200_cfg.h => vrb_cfg.h} | 16 +-
> drivers/baseband/acc/vrb_pmd.h | 208 +++++
> 13 files changed, 843 insertions(+), 840 deletions(-)
> rename doc/guides/bbdevs/features/{acc200.ini => vrb1.ini} (83%)
> rename doc/guides/bbdevs/{acc200.rst => vrb1.rst} (90%)
> delete mode 100644 drivers/baseband/acc/acc200_pf_enum.h
> delete mode 100644 drivers/baseband/acc/acc200_pmd.h
> delete mode 100644 drivers/baseband/acc/acc200_vf_enum.h
> rename drivers/baseband/acc/{rte_acc200_pmd.c => rte_vrb_pmd.c} (82%)
> create mode 100644 drivers/baseband/acc/vrb1_pf_enum.h
> create mode 100644 drivers/baseband/acc/vrb1_vf_enum.h
> rename drivers/baseband/acc/{acc200_cfg.h => vrb_cfg.h} (65%)
> create mode 100644 drivers/baseband/acc/vrb_pmd.h
>
Applied to dpdk-next-baseband/for-main, with typo reported by checkpatch
in the doc fixed.
Thanks,
Maxime
^ permalink raw reply [flat|nested] 16+ messages in thread