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From: "Wu, Jingjing" <jingjing.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: "Zhang,
	Helin" <helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"dev-VfR2kkLFssw@public.gmane.org"
	<dev-VfR2kkLFssw@public.gmane.org>
Cc: "Kenguva,
	Monica" <monica.kenguva-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"Murray,
	Steven J"
	<steven.j.murray-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"Nelson,
	Shannon" <shannon.nelson-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Subject: Re: [PATCH v2 04/33] i40e/base: rename 'err' to 'perrno'
Date: Fri, 8 May 2015 03:20:27 +0000	[thread overview]
Message-ID: <9BB6961774997848B5B42BEC655768F8C182FB@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <1430406219-23901-5-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>

Acked-by: Jingjing Wu <jingjing.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>

> -----Original Message-----
> From: Zhang, Helin
> Sent: Thursday, April 30, 2015 11:03 PM
> To: dev-VfR2kkLFssw@public.gmane.org
> Cc: Cao, Min; Xu, Qian Q; Wu, Jingjing; Liu, Jijiang; Kenguva, Monica; Patel,
> Rashmin N; Murray, Steven J; Nelson, Shannon; Zhang, Helin
> Subject: [PATCH v2 04/33] i40e/base: rename 'err' to 'perrno'
> 
> To be consistent with the original base driver, the variable name of 'err'
> should be renamed to 'perrno'.
> 
> Signed-off-by: Helin Zhang <helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
> ---
>  lib/librte_pmd_i40e/i40e/i40e_nvm.c | 118 ++++++++++++++++++------------
> ------
>  1 file changed, 59 insertions(+), 59 deletions(-)
> 
> diff --git a/lib/librte_pmd_i40e/i40e/i40e_nvm.c
> b/lib/librte_pmd_i40e/i40e/i40e_nvm.c
> index 73b8997..2b70508 100644
> --- a/lib/librte_pmd_i40e/i40e/i40e_nvm.c
> +++ b/lib/librte_pmd_i40e/i40e/i40e_nvm.c
> @@ -481,25 +481,25 @@ i40e_validate_nvm_checksum_exit:
> 
>  STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw
> *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    u8 *bytes, int *err);
> +						    u8 *bytes, int *perrno);
>  STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw
> *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    u8 *bytes, int *err);
> +						    u8 *bytes, int *perrno);
>  STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw
> *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    u8 *bytes, int *err);
> +						    u8 *bytes, int *perrno);
>  STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct
> i40e_hw *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    int *err);
> +						    int *perrno);
>  STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw
> *hw,
>  						   struct i40e_nvm_access
> *cmd,
> -						   int *err);
> +						   int *perrno);
>  STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw
> *hw,
>  						   struct i40e_nvm_access
> *cmd,
> -						   u8 *bytes, int *err);
> +						   u8 *bytes, int *perrno);
>  STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw
> *hw,
>  						  struct i40e_nvm_access
> *cmd,
> -						  u8 *bytes, int *err);
> +						  u8 *bytes, int *perrno);
>  STATIC inline u8 i40e_nvmupd_get_module(u32 val)  {
>  	return (u8)(val & I40E_NVM_MOD_PNT_MASK); @@ -514,38
> +514,38 @@ STATIC inline u8 i40e_nvmupd_get_transaction(u32 val)
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command
>   * @bytes: pointer to the data buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * Dispatches command depending on what update state is current
>   **/
>  enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
>  					  struct i40e_nvm_access *cmd,
> -					  u8 *bytes, int *err)
> +					  u8 *bytes, int *perrno)
>  {
>  	enum i40e_status_code status;
> 
>  	DEBUGFUNC("i40e_nvmupd_command");
> 
>  	/* assume success */
> -	*err = 0;
> +	*perrno = 0;
> 
>  	switch (hw->nvmupd_state) {
>  	case I40E_NVMUPD_STATE_INIT:
> -		status = i40e_nvmupd_state_init(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);
>  		break;
> 
>  	case I40E_NVMUPD_STATE_READING:
> -		status = i40e_nvmupd_state_reading(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_state_reading(hw, cmd, bytes,
> perrno);
>  		break;
> 
>  	case I40E_NVMUPD_STATE_WRITING:
> -		status = i40e_nvmupd_state_writing(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno);
>  		break;
> 
>  	default:
>  		/* invalid state, should never happen */
>  		status = I40E_NOT_SUPPORTED;
> -		*err = -ESRCH;
> +		*perrno = -ESRCH;
>  		break;
>  	}
>  	return status;
> @@ -556,29 +556,29 @@ enum i40e_status_code
> i40e_nvmupd_command(struct i40e_hw *hw,
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
>   * @bytes: pointer to the data buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * Process legitimate commands of the Init state and conditionally set next
>   * state. Reject all other commands.
>   **/
>  STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw
> *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    u8 *bytes, int *err)
> +						    u8 *bytes, int *perrno)
>  {
>  	enum i40e_status_code status = I40E_SUCCESS;
>  	enum i40e_nvmupd_cmd upd_cmd;
> 
>  	DEBUGFUNC("i40e_nvmupd_state_init");
> 
> -	upd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);
> +	upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
> 
>  	switch (upd_cmd) {
>  	case I40E_NVMUPD_READ_SA:
>  		status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
>  		if (status) {
> -			*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +			*perrno = i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status);
>  		} else {
> -			status = i40e_nvmupd_nvm_read(hw, cmd, bytes,
> err);
> +			status = i40e_nvmupd_nvm_read(hw, cmd, bytes,
> perrno);
>  			i40e_release_nvm(hw);
>  		}
>  		break;
> @@ -586,9 +586,9 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
>  	case I40E_NVMUPD_READ_SNT:
>  		status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
>  		if (status) {
> -			*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +			*perrno = i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status);
>  		} else {
> -			status = i40e_nvmupd_nvm_read(hw, cmd, bytes,
> err);
> +			status = i40e_nvmupd_nvm_read(hw, cmd, bytes,
> perrno);
>  			hw->nvmupd_state =
> I40E_NVMUPD_STATE_READING;
>  		}
>  		break;
> @@ -596,9 +596,9 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
>  	case I40E_NVMUPD_WRITE_ERA:
>  		status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
>  		if (status) {
> -			*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +			*perrno = i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status);
>  		} else {
> -			status = i40e_nvmupd_nvm_erase(hw, cmd, err);
> +			status = i40e_nvmupd_nvm_erase(hw, cmd, perrno);
>  			if (status)
>  				i40e_release_nvm(hw);
>  			else
> @@ -609,9 +609,9 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
>  	case I40E_NVMUPD_WRITE_SA:
>  		status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
>  		if (status) {
> -			*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +			*perrno = i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status);
>  		} else {
> -			status = i40e_nvmupd_nvm_write(hw, cmd, bytes,
> err);
> +			status = i40e_nvmupd_nvm_write(hw, cmd, bytes,
> perrno);
>  			if (status)
>  				i40e_release_nvm(hw);
>  			else
> @@ -622,9 +622,9 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
>  	case I40E_NVMUPD_WRITE_SNT:
>  		status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
>  		if (status) {
> -			*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +			*perrno = i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status);
>  		} else {
> -			status = i40e_nvmupd_nvm_write(hw, cmd, bytes,
> err);
> +			status = i40e_nvmupd_nvm_write(hw, cmd, bytes,
> perrno);
>  			hw->nvmupd_state =
> I40E_NVMUPD_STATE_WRITING;
>  		}
>  		break;
> @@ -632,11 +632,11 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
>  	case I40E_NVMUPD_CSUM_SA:
>  		status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
>  		if (status) {
> -			*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +			*perrno = i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status);
>  		} else {
>  			status = i40e_update_nvm_checksum(hw);
>  			if (status) {
> -				*err = hw->aq.asq_last_status ?
> +				*perrno = hw->aq.asq_last_status ?
>  				   i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status) :
>  				   -EIO;
>  				i40e_release_nvm(hw);
> @@ -648,7 +648,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
> 
>  	default:
>  		status = I40E_ERR_NVM;
> -		*err = -ESRCH;
> +		*perrno = -ESRCH;
>  		break;
>  	}
>  	return status;
> @@ -659,37 +659,37 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_init(struct i40e_hw *hw,
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
>   * @bytes: pointer to the data buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * NVM ownership is already held.  Process legitimate commands and set
> any
>   * change in state; reject all other commands.
>   **/
>  STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw
> *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    u8 *bytes, int *err)
> +						    u8 *bytes, int *perrno)
>  {
>  	enum i40e_status_code status;
>  	enum i40e_nvmupd_cmd upd_cmd;
> 
>  	DEBUGFUNC("i40e_nvmupd_state_reading");
> 
> -	upd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);
> +	upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
> 
>  	switch (upd_cmd) {
>  	case I40E_NVMUPD_READ_SA:
>  	case I40E_NVMUPD_READ_CON:
> -		status = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
>  		break;
> 
>  	case I40E_NVMUPD_READ_LCB:
> -		status = i40e_nvmupd_nvm_read(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);
>  		i40e_release_nvm(hw);
>  		hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
>  		break;
> 
>  	default:
>  		status = I40E_NOT_SUPPORTED;
> -		*err = -ESRCH;
> +		*perrno = -ESRCH;
>  		break;
>  	}
>  	return status;
> @@ -700,29 +700,29 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_reading(struct i40e_hw *hw,
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
>   * @bytes: pointer to the data buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * NVM ownership is already held.  Process legitimate commands and set
> any
>   * change in state; reject all other commands
>   **/
>  STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw
> *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    u8 *bytes, int *err)
> +						    u8 *bytes, int *perrno)
>  {
>  	enum i40e_status_code status;
>  	enum i40e_nvmupd_cmd upd_cmd;
> 
>  	DEBUGFUNC("i40e_nvmupd_state_writing");
> 
> -	upd_cmd = i40e_nvmupd_validate_command(hw, cmd, err);
> +	upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
> 
>  	switch (upd_cmd) {
>  	case I40E_NVMUPD_WRITE_CON:
> -		status = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
>  		break;
> 
>  	case I40E_NVMUPD_WRITE_LCB:
> -		status = i40e_nvmupd_nvm_write(hw, cmd, bytes, err);
> +		status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
>  		if (!status) {
>  			hw->aq.nvm_release_on_done = true;
>  			hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
> @@ -732,7 +732,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_writing(struct i40e_hw *hw,
>  	case I40E_NVMUPD_CSUM_CON:
>  		status = i40e_update_nvm_checksum(hw);
>  		if (status)
> -			*err = hw->aq.asq_last_status ?
> +			*perrno = hw->aq.asq_last_status ?
>  				   i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status) :
>  				   -EIO;
>  		break;
> @@ -740,7 +740,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_writing(struct i40e_hw *hw,
>  	case I40E_NVMUPD_CSUM_LCB:
>  		status = i40e_update_nvm_checksum(hw);
>  		if (status) {
> -			*err = hw->aq.asq_last_status ?
> +			*perrno = hw->aq.asq_last_status ?
>  				   i40e_aq_rc_to_posix(hw-
> >aq.asq_last_status) :
>  				   -EIO;
>  		} else {
> @@ -751,7 +751,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_writing(struct i40e_hw *hw,
> 
>  	default:
>  		status = I40E_NOT_SUPPORTED;
> -		*err = -ESRCH;
> +		*perrno = -ESRCH;
>  		break;
>  	}
>  	return status;
> @@ -761,13 +761,13 @@ STATIC enum i40e_status_code
> i40e_nvmupd_state_writing(struct i40e_hw *hw,
>   * i40e_nvmupd_validate_command - Validate given command
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * Return one of the valid command types or I40E_NVMUPD_INVALID
>   **/
>  STATIC enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct
> i40e_hw *hw,
>  						    struct i40e_nvm_access
> *cmd,
> -						    int *err)
> +						    int *perrno)
>  {
>  	enum i40e_nvmupd_cmd upd_cmd;
>  	u8 transaction, module;
> @@ -785,7 +785,7 @@ STATIC enum i40e_nvmupd_cmd
> i40e_nvmupd_validate_command(struct i40e_hw *hw,
>  	    (cmd->data_size > I40E_NVMUPD_MAX_DATA)) {
>  		DEBUGOUT1("i40e_nvmupd_validate_command
> data_size %d\n",
>  			cmd->data_size);
> -		*err = -EFAULT;
> +		*perrno = -EFAULT;
>  		return I40E_NVMUPD_INVALID;
>  	}
> 
> @@ -838,10 +838,10 @@ STATIC enum i40e_nvmupd_cmd
> i40e_nvmupd_validate_command(struct i40e_hw *hw,
>  	}
> 
>  	if (upd_cmd == I40E_NVMUPD_INVALID) {
> -		*err = -EFAULT;
> +		*perrno = -EFAULT;
>  		DEBUGOUT2(
> -			"i40e_nvmupd_validate_command returns %d
> err: %d\n",
> -			upd_cmd, *err);
> +			"i40e_nvmupd_validate_command returns %d
> perrno: %d\n",
> +			upd_cmd, *perrno);
>  	}
>  	return upd_cmd;
>  }
> @@ -851,13 +851,13 @@ STATIC enum i40e_nvmupd_cmd
> i40e_nvmupd_validate_command(struct i40e_hw *hw,
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
>   * @bytes: pointer to the data buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * cmd structure contains identifiers and data buffer
>   **/
>  STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw
> *hw,
>  						  struct i40e_nvm_access
> *cmd,
> -						  u8 *bytes, int *err)
> +						  u8 *bytes, int *perrno)
>  {
>  	enum i40e_status_code status;
>  	u8 module, transaction;
> @@ -873,7 +873,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_nvm_read(struct i40e_hw *hw,
>  				  bytes, last, NULL);
>  	DEBUGOUT1("i40e_nvmupd_nvm_read status %d\n", status);
>  	if (status != I40E_SUCCESS)
> -		*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +		*perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> 
>  	return status;
>  }
> @@ -882,13 +882,13 @@ STATIC enum i40e_status_code
> i40e_nvmupd_nvm_read(struct i40e_hw *hw,
>   * i40e_nvmupd_nvm_erase - Erase an NVM module
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * module, offset, data_size and data are in cmd structure
>   **/
>  STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw
> *hw,
>  						   struct i40e_nvm_access
> *cmd,
> -						   int *err)
> +						   int *perrno)
>  {
>  	enum i40e_status_code status = I40E_SUCCESS;
>  	u8 module, transaction;
> @@ -903,7 +903,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
>  				   last, NULL);
>  	DEBUGOUT1("i40e_nvmupd_nvm_erase status %d\n", status);
>  	if (status != I40E_SUCCESS)
> -		*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +		*perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> 
>  	return status;
>  }
> @@ -913,13 +913,13 @@ STATIC enum i40e_status_code
> i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
>   * @hw: pointer to hardware structure
>   * @cmd: pointer to nvm update command buffer
>   * @bytes: pointer to the data buffer
> - * @err: pointer to return error code
> + * @perrno: pointer to return error code
>   *
>   * module, offset, data_size and data are in cmd structure
>   **/
>  STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw
> *hw,
>  						   struct i40e_nvm_access
> *cmd,
> -						   u8 *bytes, int *err)
> +						   u8 *bytes, int *perrno)
>  {
>  	enum i40e_status_code status = I40E_SUCCESS;
>  	u8 module, transaction;
> @@ -934,7 +934,7 @@ STATIC enum i40e_status_code
> i40e_nvmupd_nvm_write(struct i40e_hw *hw,
>  				    (u16)cmd->data_size, bytes, last, NULL);
>  	DEBUGOUT1("i40e_nvmupd_nvm_write status %d\n", status);
>  	if (status != I40E_SUCCESS)
> -		*err = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> +		*perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status);
> 
>  	return status;
>  }
> --
> 1.8.1.4

  parent reply	other threads:[~2015-05-08  3:20 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-20  8:22 [PATCH 00/18] i40e base driver update Helin Zhang
     [not found] ` <1429518150-28098-1-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-04-20  8:22   ` [PATCH 01/18] i40e: copyright update Helin Zhang
2015-04-20  8:22   ` [PATCH 02/18] i40e: disable setting phy configuration Helin Zhang
2015-04-20  8:22   ` [PATCH 03/18] i40e: adjustment of register definitions and relevant Helin Zhang
     [not found]     ` <1429518150-28098-4-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-04-27 17:16       ` Thomas Monjalon
2015-04-28  2:29         ` Zhang, Helin
2015-04-20  8:22   ` [PATCH 04/18] i40e: support of CEE DCBX on recent firmware versions Helin Zhang
2015-04-20  8:22   ` [PATCH 05/18] i40e: rework of 'i40e_hmc_get_object_va' Helin Zhang
2015-04-20  8:22   ` [PATCH 06/18] i40e: support of Fortpark device IDs and mac types Helin Zhang
2015-04-20  8:22   ` [PATCH 07/18] i40e: rename 'err' to 'perrno' Helin Zhang
2015-04-20  8:22   ` [PATCH 08/18] i40e: support NVM read on Fortpark, with minor enhancements Helin Zhang
2015-04-20  8:22   ` [PATCH 09/18] i40e: adminq enhancements Helin Zhang
2015-04-20  8:22   ` [PATCH 10/18] i40e: support of firmware build number Helin Zhang
2015-04-20  8:22   ` [PATCH 11/18] i40e: support of building both PF and VF driver together Helin Zhang
     [not found]     ` <1429518150-28098-12-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-04-27 17:25       ` Thomas Monjalon
2015-04-28  2:33         ` Zhang, Helin
2015-04-20  8:22   ` [PATCH 12/18] i40e: enhancements of AQ commands and common interfaces Helin Zhang
     [not found]     ` <1429518150-28098-13-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-04-27 17:26       ` Thomas Monjalon
2015-04-28  2:34         ` Zhang, Helin
2015-04-20  8:22   ` [PATCH 13/18] i40e: replacement of 'i40e_debug_read_register()' Helin Zhang
     [not found]     ` <1429518150-28098-14-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-04-27 17:28       ` Thomas Monjalon
2015-04-28  2:34         ` Zhang, Helin
2015-04-20  8:22   ` [PATCH 14/18] i40e: add new interfaces of AQ commands and relevant Helin Zhang
2015-04-20  8:22   ` [PATCH 15/18] i40e: support of Fortpark FPGA Helin Zhang
2015-04-20  8:22   ` [PATCH 16/18] i40e: add more virtual channel operations Helin Zhang
2015-04-20  8:22   ` [PATCH 17/18] i40e: support of structure and command length check Helin Zhang
2015-04-20  8:22   ` [PATCH 18/18] i40e: Minor enhancements in i40e_type.h Helin Zhang
2015-04-22  7:26   ` [PATCH 00/18] i40e base driver update Cao, Min
2015-04-30 15:03   ` [PATCH v2 00/33] " Helin Zhang
     [not found]     ` <1430406219-23901-1-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-04-30 15:03       ` [PATCH v2 01/33] i40e: copyright update Helin Zhang
     [not found]         ` <1430406219-23901-2-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:22           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 02/33] i40e: disable setting of phy configuration Helin Zhang
     [not found]         ` <1430406219-23901-3-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:22           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 03/33] i40e: adjustment of register definitions and relevant Helin Zhang
     [not found]         ` <1430406219-23901-4-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:21           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 04/33] i40e/base: rename 'err' to 'perrno' Helin Zhang
     [not found]         ` <1430406219-23901-5-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:20           ` Wu, Jingjing [this message]
2015-04-30 15:03       ` [PATCH v2 05/33] i40e/base: support of building both PF and VF driver together Helin Zhang
     [not found]         ` <1430406219-23901-6-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:25           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 06/33] i40e/base: support of CEE DCBX on recent firmware versions Helin Zhang
2015-04-30 15:03       ` [PATCH v2 07/33] i40e: replacement of 'i40e_debug_read_register()' Helin Zhang
     [not found]         ` <1430406219-23901-8-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:23           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 08/33] i40e/base: rework of 'i40e_hmc_get_object_va' Helin Zhang
2015-04-30 15:03       ` [PATCH v2 09/33] i40e/base: update of shadow RAM read/write functions Helin Zhang
2015-04-30 15:03       ` [PATCH v2 10/33] i40e/base: catch NVM write semaphore timeout and retry Helin Zhang
2015-04-30 15:03       ` [PATCH v2 11/33] i40e/base: check for AQ timeout in aq_rc decode Helin Zhang
2015-04-30 15:03       ` [PATCH v2 12/33] i40e/base: fix up NVM update sm error handling Helin Zhang
2015-04-30 15:03       ` [PATCH v2 13/33] i40e/base: enhancement of polling NVM semaphore Helin Zhang
2015-04-30 15:03       ` [PATCH v2 14/33] i40e/base: enhancements of NVM checksum calculation Helin Zhang
2015-04-30 15:03       ` [PATCH v2 15/33] i40e/base: replacement of DEBUGOUT() with i40e_debug() Helin Zhang
     [not found]         ` <1430406219-23901-16-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:24           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 16/33] i40e/base: add fw build info to AQ data Helin Zhang
2015-04-30 15:03       ` [PATCH v2 17/33] i40e/base: define and use i40e_is_vf() Helin Zhang
2015-04-30 15:03       ` [PATCH v2 18/33] i40e/base: grab NVM devstarter version not image version Helin Zhang
2015-04-30 15:03       ` [PATCH v2 19/33] i40e/base: enhancements on adminq init and sending asq command Helin Zhang
2015-04-30 15:03       ` [PATCH v2 20/33] i40e/base: i40e_aq_get_link_info() should be used directly Helin Zhang
2015-04-30 15:03       ` [PATCH v2 21/33] i40e/base: add new interfaces for future use Helin Zhang
2015-04-30 15:03       ` [PATCH v2 22/33] i40e/base: update of get/set LED functions Helin Zhang
2015-04-30 15:03       ` [PATCH v2 23/33] i40e/base: clean up sparse complaint in i40e_debug_aq Helin Zhang
2015-04-30 15:03       ` [PATCH v2 24/33] i40e/base: get pf_id from HW rather than PCI function Helin Zhang
     [not found]         ` <1430406219-23901-25-git-send-email-helin.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2015-05-08  3:20           ` Wu, Jingjing
2015-04-30 15:03       ` [PATCH v2 25/33] i40e/base: find partition_id in npar mode, and disable FCOE by default Helin Zhang
2015-04-30 15:03       ` [PATCH v2 26/33] i40e/base: Reassign incorrect PHY type as a workaround for a FW issue Helin Zhang
2015-04-30 15:03       ` [PATCH v2 27/33] i40e/base: add AOC phy types to case statement in get_media_type Helin Zhang
2015-04-30 15:03       ` [PATCH v2 28/33] i40e/base: support for iSCSI capability Helin Zhang
2015-04-30 15:03       ` [PATCH v2 29/33] i40e/base: set FLAG_RD when sending driver version to FW Helin Zhang
2015-04-30 15:03       ` [PATCH v2 30/33] i40e/base: future proof some sizeof calls Helin Zhang
2015-04-30 15:03       ` [PATCH v2 31/33] i40e/base: add more virtual channel operations for future use Helin Zhang
2015-04-30 15:03       ` [PATCH v2 32/33] i40e/base: rework of structures and macros " Helin Zhang
2015-04-30 15:03       ` [PATCH v2 33/33] i40e/base: modifications " Helin Zhang
2015-05-07  1:17       ` [PATCH v2 00/33] i40e base driver update Cao, Min
2015-05-08  5:54       ` Liu, Jijiang

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