[PATCH 1/2] drm/i915: ignore posting read when using vgpu

[PATCH 1/2] drm/i915: ignore posting read when using vgpu

[Weinan Li]

No need to do posting read when vgpu actived.

Signed-off-by: Weinan Li <weinan.z.li@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 52d01be..8c9d81b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3830,8 +3830,11 @@ void vlv_set_phy_signal_level(struct intel_encoder *encoder,
 	} while (upper != old_upper && loop++ < 2);			\
 	(u64)upper << 32 | lower; })
 
-#define POSTING_READ(reg)	(void)I915_READ_NOTRACE(reg)
-#define POSTING_READ16(reg)	(void)I915_READ16_NOTRACE(reg)
+#define POSTING_READ(reg) ( \
+	intel_vgpu_active(dev_priv) ? (void)0 : (void)I915_READ_NOTRACE(reg))
+
+#define POSTING_READ16(reg) ( \
+	intel_vgpu_active(dev_priv) ? (void)0 : (void)I915_READ16_NOTRACE(reg))
 
 #define __raw_read(x, s) \
 static inline uint##x##_t __raw_i915_read##x(struct drm_i915_private *dev_priv, \
@@ -3888,7 +3891,8 @@ void vlv_set_phy_signal_level(struct intel_encoder *encoder,
 #define I915_READ_FW(reg__) __raw_i915_read32(dev_priv, (reg__))
 #define I915_WRITE_FW(reg__, val__) __raw_i915_write32(dev_priv, (reg__), (val__))
 #define I915_WRITE64_FW(reg__, val__) __raw_i915_write64(dev_priv, (reg__), (val__))
-#define POSTING_READ_FW(reg__) (void)I915_READ_FW(reg__)
+#define POSTING_READ_FW(reg__) ( \
+	intel_vgpu_active(dev_priv) ? (void)0 : (void)I915_READ_FW(reg__))
 
 /* "Broadcast RGB" property */
 #define INTEL_BROADCAST_RGB_AUTO 0
-- 
1.9.1

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[PATCH 2/2] drm/i915: ignore forcewake get/put when using vgpu

[Weinan Li]

Host maintian the hardware's forcewake state, guest don't need and also
can't control it. Although vgpu_read/write bypass forcewake_get/put in MMIO
read/write, but still have separate path called by
"intel_uncore_forcewake_get/put" and
"intel_uncore_forcewake_get/put__locked". Unnecessary MMIO access in guest
waste much CPU cost. Since we full virtualize the MMIO, just ignore the
forcewake get/put in low level.

Signed-off-by: Weinan Li <weinan.z.li@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 78 ++++++++++---------------------------
 1 file changed, 20 insertions(+), 58 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index abe0888..08e1b5f 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -133,6 +133,20 @@
 }
 
 static void
+vgpu_fw_domains_get(struct drm_i915_private *dev_priv,
+		    enum forcewake_domains fw_domains)
+{
+	/* Guest driver doesn't need to takes care forcewake. */;
+}
+
+static void
+vgpu_fw_domains_put(struct drm_i915_private *dev_priv,
+		    enum forcewake_domains fw_domains)
+{
+	/* Guest driver doesn't need to takes care forcewake. */;
+}
+
+static void
 fw_domains_posting_read(struct drm_i915_private *dev_priv)
 {
 	struct intel_uncore_forcewake_domain *d;
@@ -1045,34 +1059,6 @@ static inline void __force_wake_auto(struct drm_i915_private *dev_priv,
 #undef GEN6_READ_FOOTER
 #undef GEN6_READ_HEADER
 
-#define VGPU_READ_HEADER(x) \
-	unsigned long irqflags; \
-	u##x val = 0; \
-	assert_rpm_device_not_suspended(dev_priv); \
-	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
-
-#define VGPU_READ_FOOTER \
-	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-	trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
-	return val
-
-#define __vgpu_read(x) \
-static u##x \
-vgpu_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { \
-	VGPU_READ_HEADER(x); \
-	val = __raw_i915_read##x(dev_priv, reg); \
-	VGPU_READ_FOOTER; \
-}
-
-__vgpu_read(8)
-__vgpu_read(16)
-__vgpu_read(32)
-__vgpu_read(64)
-
-#undef __vgpu_read
-#undef VGPU_READ_FOOTER
-#undef VGPU_READ_HEADER
-
 #define GEN2_WRITE_HEADER \
 	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
 	assert_rpm_wakelock_held(dev_priv); \
@@ -1195,31 +1181,6 @@ static inline void __force_wake_auto(struct drm_i915_private *dev_priv,
 #undef GEN6_WRITE_FOOTER
 #undef GEN6_WRITE_HEADER
 
-#define VGPU_WRITE_HEADER \
-	unsigned long irqflags; \
-	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-	assert_rpm_device_not_suspended(dev_priv); \
-	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
-
-#define VGPU_WRITE_FOOTER \
-	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags)
-
-#define __vgpu_write(x) \
-static void vgpu_write##x(struct drm_i915_private *dev_priv, \
-			  i915_reg_t reg, u##x val, bool trace) { \
-	VGPU_WRITE_HEADER; \
-	__raw_i915_write##x(dev_priv, reg, val); \
-	VGPU_WRITE_FOOTER; \
-}
-
-__vgpu_write(8)
-__vgpu_write(16)
-__vgpu_write(32)
-
-#undef __vgpu_write
-#undef VGPU_WRITE_FOOTER
-#undef VGPU_WRITE_HEADER
-
 #define ASSIGN_WRITE_MMIO_VFUNCS(x) \
 do { \
 	dev_priv->uncore.funcs.mmio_writeb = x##_write8; \
@@ -1375,6 +1336,12 @@ static void intel_uncore_fw_domains_init(struct drm_i915_private *dev_priv)
 			       FORCEWAKE, FORCEWAKE_ACK);
 	}
 
+	if (intel_vgpu_active(dev_priv)) {
+		dev_priv->uncore.funcs.force_wake_get =
+			vgpu_fw_domains_get;
+		dev_priv->uncore.funcs.force_wake_put =
+			vgpu_fw_domains_put;
+	}
 	/* All future platforms are expected to require complex power gating */
 	WARN_ON(dev_priv->uncore.fw_domains == 0);
 }
@@ -1449,11 +1416,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv)
 	if (INTEL_GEN(dev_priv) >= 8)
 		intel_shadow_table_check();
 
-	if (intel_vgpu_active(dev_priv)) {
-		ASSIGN_WRITE_MMIO_VFUNCS(vgpu);
-		ASSIGN_READ_MMIO_VFUNCS(vgpu);
-	}
-
 	i915_check_and_clear_faults(dev_priv);
 }
 #undef ASSIGN_WRITE_MMIO_VFUNCS
-- 
1.9.1

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Re: [PATCH 1/2] drm/i915: ignore posting read when using vgpu

[Chris Wilson]

On Wed, Jan 25, 2017 at 02:04:55PM +0800, Weinan Li wrote:
> No need to do posting read when vgpu actived.

No. This is bloat for no gain. Almost all of those posting
reads are superfluous anyway.
-Chris

-- 
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Re: [PATCH 2/2] drm/i915: ignore forcewake get/put when using vgpu

[Chris Wilson]

On Wed, Jan 25, 2017 at 02:04:56PM +0800, Weinan Li wrote:
> Host maintian the hardware's forcewake state, guest don't need and also
> can't control it. Although vgpu_read/write bypass forcewake_get/put in MMIO
> read/write, but still have separate path called by
> "intel_uncore_forcewake_get/put" and
> "intel_uncore_forcewake_get/put__locked". Unnecessary MMIO access in guest
> waste much CPU cost. Since we full virtualize the MMIO, just ignore the
> forcewake get/put in low level.

This patch is doing multiple things as you are altering a couple of
independent paths at the same time (fw control and mmio funcs).

>  static void
> +vgpu_fw_domains_get(struct drm_i915_private *dev_priv,
> +		    enum forcewake_domains fw_domains)
> +{
> +	/* Guest driver doesn't need to takes care forcewake. */;
> +}
> +
> +static void
> +vgpu_fw_domains_put(struct drm_i915_private *dev_priv,
> +		    enum forcewake_domains fw_domains)
> +{
> +	/* Guest driver doesn't need to takes care forcewake. */;
> +}

Or just 1 vgpu_fw_domains_nop()
-Chris

-- 
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✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: ignore posting read when using vgpu

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: ignore posting read when using vgpu
URL   : https://patchwork.freedesktop.org/series/18532/
State : warning

== Summary ==

Series 18532v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/18532/revisions/1/mbox/

Test gem_sync:
        Subgroup basic-store-all:
                fail       -> PASS       (fi-ivb-3770)
Test kms_force_connector_basic:
        Subgroup force-edid:
                pass       -> DMESG-WARN (fi-snb-2520m)

fi-bdw-5557u     total:247  pass:233  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:247  pass:208  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:247  pass:225  dwarn:0   dfail:0   fail:0   skip:22 
fi-bxt-t5700     total:79   pass:66   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:247  pass:220  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:247  pass:216  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:247  pass:228  dwarn:0   dfail:0   fail:0   skip:19 
fi-ivb-3520m     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:247  pass:226  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:247  pass:227  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:247  pass:222  dwarn:4   dfail:0   fail:0   skip:21 
fi-skl-6770hq    total:247  pass:234  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:247  pass:215  dwarn:1   dfail:0   fail:0   skip:31 
fi-snb-2600      total:247  pass:215  dwarn:0   dfail:0   fail:0   skip:32 

1a01e7157e02428675bbd28754d88da938b961e6 drm-tip: 2017y-01m-25d-05h-21m-01s UTC integration manifest
5aced67 drm/i915: ignore forcewake get/put when using vgpu
cb7e3d9 drm/i915: ignore posting read when using vgpu

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3600/
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Re: [PATCH 2/2] drm/i915: ignore forcewake get/put when using vgpu

[Li, Weinan Z]

> -----Original Message-----
> From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
> Sent: Wednesday, January 25, 2017 3:17 PM
> To: Li, Weinan Z <weinan.z.li@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; intel-gvt-dev@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: ignore forcewake get/put
> when using vgpu
> 
> On Wed, Jan 25, 2017 at 02:04:56PM +0800, Weinan Li wrote:
> > Host maintian the hardware's forcewake state, guest don't need and
> > also can't control it. Although vgpu_read/write bypass
> > forcewake_get/put in MMIO read/write, but still have separate path
> > called by "intel_uncore_forcewake_get/put" and
> > "intel_uncore_forcewake_get/put__locked". Unnecessary MMIO access in
> > guest waste much CPU cost. Since we full virtualize the MMIO, just
> > ignore the forcewake get/put in low level.
> 
> This patch is doing multiple things as you are altering a couple of independent
> paths at the same time (fw control and mmio funcs).
> 
ok, let me separate 2 patches, 1 fw control, 2 remove vgpu_read/write funcs.
> >  static void
> > +vgpu_fw_domains_get(struct drm_i915_private *dev_priv,
> > +		    enum forcewake_domains fw_domains) {
> > +	/* Guest driver doesn't need to takes care forcewake. */; }
> > +
> > +static void
> > +vgpu_fw_domains_put(struct drm_i915_private *dev_priv,
> > +		    enum forcewake_domains fw_domains) {
> > +	/* Guest driver doesn't need to takes care forcewake. */; }
> 
> Or just 1 vgpu_fw_domains_nop()
vgpu_fw_domains_nop more simple and readable. 
> -Chris
> 
> --
> Chris Wilson, Intel Open Source Technology Centre
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Re: [PATCH 1/2] drm/i915: ignore posting read when using vgpu

[Li, Weinan Z]

I am not sure if native driver still need POSTING_READ action. But for guest we can remove it directly.
Search the code, there are still upon 270 hints use POSTING_READ. 
For guest OS, one frequent POSTING_READ_FW action is in irq handler, it will impact the performance if there is heavy interrupts(like media reference usage.)

Thanks.
Best Regards.
Weinan, LI


> -----Original Message-----
> From: Chris Wilson [mailto:chris@chris-wilson.co.uk]
> Sent: Wednesday, January 25, 2017 3:13 PM
> To: Li, Weinan Z <weinan.z.li@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; intel-gvt-dev@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: ignore posting read when
> using vgpu
> 
> On Wed, Jan 25, 2017 at 02:04:55PM +0800, Weinan Li wrote:
> > No need to do posting read when vgpu actived.
> 
> No. This is bloat for no gain. Almost all of those posting reads are superfluous
> anyway.
> -Chris
> 
> --
> Chris Wilson, Intel Open Source Technology Centre
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