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* [PATCH] drm/i915: Enforce that CS packets are qword aligned
@ 2017-07-21 16:11 Chris Wilson
  2017-07-21 16:23 ` Chris Wilson
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Chris Wilson @ 2017-07-21 16:11 UTC (permalink / raw)
  To: intel-gfx

We require the caller to ensure that the packets they wish to emit into
the CS ring are qword aligned (i.e. have an even number of dwords).
Double check this.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index aa59290cb8bf..0b06f66507a0 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1397,6 +1397,9 @@ u32 *intel_ring_begin(struct drm_i915_gem_request *req,
 	unsigned int total_bytes;
 	u32 *cs;
 
+	/* Packets must be qword aligned. */
+	GEM_BUG_ON(num_dwords & 1);
+
 	total_bytes = bytes + req->reserved_space;
 	GEM_BUG_ON(total_bytes > ring->effective_size);
 
-- 
2.13.3

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH] drm/i915: Enforce that CS packets are qword aligned
  2017-07-21 16:11 [PATCH] drm/i915: Enforce that CS packets are qword aligned Chris Wilson
@ 2017-07-21 16:23 ` Chris Wilson
  2017-07-21 16:56 ` ✓ Fi.CI.BAT: success for " Patchwork
  2017-07-24  8:06 ` [PATCH] " Tvrtko Ursulin
  2 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2017-07-21 16:23 UTC (permalink / raw)
  To: intel-gfx

Quoting Chris Wilson (2017-07-21 17:11:01)
> We require the caller to ensure that the packets they wish to emit into
> the CS ring are qword aligned (i.e. have an even number of dwords).
> Double check this.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index aa59290cb8bf..0b06f66507a0 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1397,6 +1397,9 @@ u32 *intel_ring_begin(struct drm_i915_gem_request *req,
>         unsigned int total_bytes;
>         u32 *cs;
>  
> +       /* Packets must be qword aligned. */
> +       GEM_BUG_ON(num_dwords & 1);

GEM_BUG_ON(!IS_ALIGNED(num_dwords, 2)) ?
GEM_BUG_ON(!IS_ALIGNED(num_words, DWORDS_PER_QWORD)) ?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: Enforce that CS packets are qword aligned
  2017-07-21 16:11 [PATCH] drm/i915: Enforce that CS packets are qword aligned Chris Wilson
  2017-07-21 16:23 ` Chris Wilson
@ 2017-07-21 16:56 ` Patchwork
  2017-07-24  8:06 ` [PATCH] " Tvrtko Ursulin
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-07-21 16:56 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Enforce that CS packets are qword aligned
URL   : https://patchwork.freedesktop.org/series/27723/
State : success

== Summary ==

Series 27723v1 drm/i915: Enforce that CS packets are qword aligned
https://patchwork.freedesktop.org/api/1.0/series/27723/revisions/1/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                fail       -> PASS       (fi-snb-2600) fdo#100007
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                pass       -> FAIL       (fi-snb-2600) fdo#100215
Test kms_pipe_crc_basic:
        Subgroup hang-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-pnv-d510) fdo#101597

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:451s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:431s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:355s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:539s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:511s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:488s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:491s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:599s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:441s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:423s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:415s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:510s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:476s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:466s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:577s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:580s
fi-pnv-d510      total:279  pass:221  dwarn:3   dfail:0   fail:0   skip:55  time:559s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:473s
fi-skl-6700hq    total:279  pass:262  dwarn:0   dfail:0   fail:0   skip:17  time:589s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:470s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:478s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:436s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:476s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:547s
fi-snb-2600      total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  time:398s

2a4f73050a961e1a176d35561e39386da9ea9c67 drm-tip: 2017y-07m-21d-15h-30m-47s UTC integration manifest
60d1057 drm/i915: Enforce that CS packets are qword aligned

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5261/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] drm/i915: Enforce that CS packets are qword aligned
  2017-07-21 16:11 [PATCH] drm/i915: Enforce that CS packets are qword aligned Chris Wilson
  2017-07-21 16:23 ` Chris Wilson
  2017-07-21 16:56 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-07-24  8:06 ` Tvrtko Ursulin
  2017-07-25 12:57   ` Chris Wilson
  2 siblings, 1 reply; 5+ messages in thread
From: Tvrtko Ursulin @ 2017-07-24  8:06 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx



On 21/07/2017 17:11, Chris Wilson wrote:
> We require the caller to ensure that the packets they wish to emit into
> the CS ring are qword aligned (i.e. have an even number of dwords).
> Double check this.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index aa59290cb8bf..0b06f66507a0 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1397,6 +1397,9 @@ u32 *intel_ring_begin(struct drm_i915_gem_request *req,
>   	unsigned int total_bytes;
>   	u32 *cs;
>   
> +	/* Packets must be qword aligned. */
> +	GEM_BUG_ON(num_dwords & 1);
> +
>   	total_bytes = bytes + req->reserved_space;
>   	GEM_BUG_ON(total_bytes > ring->effective_size);
>   
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] drm/i915: Enforce that CS packets are qword aligned
  2017-07-24  8:06 ` [PATCH] " Tvrtko Ursulin
@ 2017-07-25 12:57   ` Chris Wilson
  0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2017-07-25 12:57 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2017-07-24 09:06:28)
> 
> 
> On 21/07/2017 17:11, Chris Wilson wrote:
> > We require the caller to ensure that the packets they wish to emit into
> > the CS ring are qword aligned (i.e. have an even number of dwords).
> > Double check this.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
> >   1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index aa59290cb8bf..0b06f66507a0 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -1397,6 +1397,9 @@ u32 *intel_ring_begin(struct drm_i915_gem_request *req,
> >       unsigned int total_bytes;
> >       u32 *cs;
> >   
> > +     /* Packets must be qword aligned. */
> > +     GEM_BUG_ON(num_dwords & 1);
> > +
> >       total_bytes = bytes + req->reserved_space;
> >       GEM_BUG_ON(total_bytes > ring->effective_size);
> >   
> > 
> 
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

And pushed! Still looking for takers to review a regression fix or
two... :-p
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-07-25 12:57 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-07-21 16:11 [PATCH] drm/i915: Enforce that CS packets are qword aligned Chris Wilson
2017-07-21 16:23 ` Chris Wilson
2017-07-21 16:56 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-07-24  8:06 ` [PATCH] " Tvrtko Ursulin
2017-07-25 12:57   ` Chris Wilson

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