* [PATCH v2] arm64: dts: qcom: sm8450: add interconnect nodes
@ 2022-02-03 0:29 Vinod Koul
2022-02-11 17:10 ` patchwork-bot+linux-arm-msm
2022-02-15 9:55 ` Dmitry Baryshkov
0 siblings, 2 replies; 3+ messages in thread
From: Vinod Koul @ 2022-02-03 0:29 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Andy Gross, Rob Herring,
Georgi Djakov, devicetree, linux-kernel
And the various interconnect nodes found in SM8450 SoC and use it for
UFS controller.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
Changes in v2:
- Fix the mc_virt node
- Add clk_virt node
- Rebase to rc1
arch/arm64/boot/dts/qcom/sm8450.dtsi | 85 ++++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 10c25ad2d0c7..ccc67918c46a 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/interconnect/qcom,sm8450.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
/ {
@@ -250,6 +251,18 @@ scm: scm {
};
};
+ clk_virt: interconnect@0 {
+ compatible = "qcom,sm8450-clk-virt";
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ mc_virt: interconnect@1 {
+ compatible = "qcom,sm8450-mc-virt";
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
memory@a0000000 {
device_type = "memory";
/* We expect the bootloader to fill in the size */
@@ -620,6 +633,54 @@ i2c14: i2c@a98000 {
};
};
+ config_noc: interconnect@1500000 {
+ compatible = "qcom,sm8450-config-noc";
+ reg = <0 0x01500000 0 0x1c000>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ system_noc: interconnect@1680000 {
+ compatible = "qcom,sm8450-system-noc";
+ reg = <0 0x01680000 0 0x1e200>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ pcie_noc: interconnect@16c0000 {
+ compatible = "qcom,sm8450-pcie-anoc";
+ reg = <0 0x016c0000 0 0xe280>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ aggre1_noc: interconnect@16e0000 {
+ compatible = "qcom,sm8450-aggre1-noc";
+ reg = <0 0x016e0000 0 0x1c080>;
+ #interconnect-cells = <2>;
+ clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ aggre2_noc: interconnect@1700000 {
+ compatible = "qcom,sm8450-aggre2-noc";
+ reg = <0 0x01700000 0 0x31080>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
+ <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
+ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&rpmhcc RPMH_IPA_CLK>;
+ };
+
+ mmss_noc: interconnect@1740000 {
+ compatible = "qcom,sm8450-mmss-noc";
+ reg = <0 0x01740000 0 0x1f080>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -988,6 +1049,13 @@ cpufreq_hw: cpufreq@17d91000 {
#freq-domain-cells = <1>;
};
+ gem_noc: interconnect@19100000 {
+ compatible = "qcom,sm8450-gem-noc";
+ reg = <0 0x19100000 0 0xbb800>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
ufs_mem_hc: ufshc@1d84000 {
compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
"jedec,ufs-2.0";
@@ -1004,6 +1072,9 @@ ufs_mem_hc: ufshc@1d84000 {
iommus = <&apps_smmu 0xe0 0x0>;
+ interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
+ interconnect-names = "ufs-ddr", "cpu-ufs";
clock-names =
"core_clk",
"bus_aggr_clk",
@@ -1102,6 +1173,20 @@ usb_1_dwc3: usb@a600000 {
phy-names = "usb2-phy", "usb3-phy";
};
};
+
+ nsp_noc: interconnect@320c0000 {
+ compatible = "qcom,sm8450-nsp-noc";
+ reg = <0 0x320c0000 0 0x10000>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ lpass_ag_noc: interconnect@3c40000 {
+ compatible = "qcom,sm8450-lpass-ag-noc";
+ reg = <0 0x3c40000 0 0x17200>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
};
timer {
--
2.31.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sm8450: add interconnect nodes
2022-02-03 0:29 [PATCH v2] arm64: dts: qcom: sm8450: add interconnect nodes Vinod Koul
@ 2022-02-11 17:10 ` patchwork-bot+linux-arm-msm
2022-02-15 9:55 ` Dmitry Baryshkov
1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+linux-arm-msm @ 2022-02-11 17:10 UTC (permalink / raw)
To: Vinod Koul; +Cc: linux-arm-msm
Hello:
This patch was applied to qcom/linux.git (for-next)
by Bjorn Andersson <bjorn.andersson@linaro.org>:
On Thu, 3 Feb 2022 05:59:36 +0530 you wrote:
> And the various interconnect nodes found in SM8450 SoC and use it for
> UFS controller.
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>
> Changes in v2:
> - Fix the mc_virt node
> - Add clk_virt node
> - Rebase to rc1
>
> [...]
Here is the summary with links:
- [v2] arm64: dts: qcom: sm8450: add interconnect nodes
https://git.kernel.org/qcom/c/aa2d0bf04a3c
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2] arm64: dts: qcom: sm8450: add interconnect nodes
2022-02-03 0:29 [PATCH v2] arm64: dts: qcom: sm8450: add interconnect nodes Vinod Koul
2022-02-11 17:10 ` patchwork-bot+linux-arm-msm
@ 2022-02-15 9:55 ` Dmitry Baryshkov
1 sibling, 0 replies; 3+ messages in thread
From: Dmitry Baryshkov @ 2022-02-15 9:55 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Andy Gross, Rob Herring, Georgi Djakov,
devicetree, linux-kernel
On 03/02/2022 03:29, Vinod Koul wrote:
> And the various interconnect nodes found in SM8450 SoC and use it for
> UFS controller.
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
>
> Changes in v2:
> - Fix the mc_virt node
> - Add clk_virt node
> - Rebase to rc1
>
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 85 ++++++++++++++++++++++++++++
> 1 file changed, 85 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 10c25ad2d0c7..ccc67918c46a 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -8,6 +8,7 @@
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/power/qcom-rpmpd.h>
> +#include <dt-bindings/interconnect/qcom,sm8450.h>
> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> / {
> @@ -250,6 +251,18 @@ scm: scm {
> };
> };
>
> + clk_virt: interconnect@0 {
> + compatible = "qcom,sm8450-clk-virt";
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + mc_virt: interconnect@1 {
> + compatible = "qcom,sm8450-mc-virt";
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> memory@a0000000 {
> device_type = "memory";
> /* We expect the bootloader to fill in the size */
> @@ -620,6 +633,54 @@ i2c14: i2c@a98000 {
> };
> };
>
> + config_noc: interconnect@1500000 {
> + compatible = "qcom,sm8450-config-noc";
> + reg = <0 0x01500000 0 0x1c000>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + system_noc: interconnect@1680000 {
> + compatible = "qcom,sm8450-system-noc";
> + reg = <0 0x01680000 0 0x1e200>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + pcie_noc: interconnect@16c0000 {
> + compatible = "qcom,sm8450-pcie-anoc";
> + reg = <0 0x016c0000 0 0xe280>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + aggre1_noc: interconnect@16e0000 {
> + compatible = "qcom,sm8450-aggre1-noc";
> + reg = <0 0x016e0000 0 0x1c080>;
> + #interconnect-cells = <2>;
> + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + aggre2_noc: interconnect@1700000 {
> + compatible = "qcom,sm8450-aggre2-noc";
> + reg = <0 0x01700000 0 0x31080>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
> + <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
> + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> + <&rpmhcc RPMH_IPA_CLK>;
> + };
> +
> + mmss_noc: interconnect@1740000 {
> + compatible = "qcom,sm8450-mmss-noc";
> + reg = <0 0x01740000 0 0x1f080>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> tcsr_mutex: hwlock@1f40000 {
> compatible = "qcom,tcsr-mutex";
> reg = <0x0 0x01f40000 0x0 0x40000>;
> @@ -988,6 +1049,13 @@ cpufreq_hw: cpufreq@17d91000 {
> #freq-domain-cells = <1>;
> };
>
> + gem_noc: interconnect@19100000 {
> + compatible = "qcom,sm8450-gem-noc";
> + reg = <0 0x19100000 0 0xbb800>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> ufs_mem_hc: ufshc@1d84000 {
> compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
> "jedec,ufs-2.0";
> @@ -1004,6 +1072,9 @@ ufs_mem_hc: ufshc@1d84000 {
>
> iommus = <&apps_smmu 0xe0 0x0>;
>
> + interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
As you have #interconnect-cells = <2> for all the NoCs, this should be:
interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
> + interconnect-names = "ufs-ddr", "cpu-ufs";
> clock-names =
> "core_clk",
> "bus_aggr_clk",
> @@ -1102,6 +1173,20 @@ usb_1_dwc3: usb@a600000 {
> phy-names = "usb2-phy", "usb3-phy";
> };
> };
> +
> + nsp_noc: interconnect@320c0000 {
> + compatible = "qcom,sm8450-nsp-noc";
> + reg = <0 0x320c0000 0 0x10000>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + lpass_ag_noc: interconnect@3c40000 {
> + compatible = "qcom,sm8450-lpass-ag-noc";
> + reg = <0 0x3c40000 0 0x17200>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> };
>
> timer {
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-02-15 9:55 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-03 0:29 [PATCH v2] arm64: dts: qcom: sm8450: add interconnect nodes Vinod Koul
2022-02-11 17:10 ` patchwork-bot+linux-arm-msm
2022-02-15 9:55 ` Dmitry Baryshkov
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.