* [U-Boot] [PATCH 1/5] arm: zynq: Return value from fdtdec_setup_memory_banksize directly
@ 2017-11-06 11:45 Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 2/5] arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig Michal Simek
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Michal Simek @ 2017-11-06 11:45 UTC (permalink / raw)
To: u-boot
There is no reason not to return return value from above function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
board/xilinx/zynq/board.c | 4 +---
board/xilinx/zynqmp/zynqmp.c | 4 +---
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 90ef542458a9..871e9dcba07f 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -132,9 +132,7 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
int dram_init_banksize(void)
{
- fdtdec_setup_memory_banksize();
-
- return 0;
+ return fdtdec_setup_memory_banksize();
}
int dram_init(void)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index d17868b0c2b7..a036ed6a35d3 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -226,9 +226,7 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
int dram_init_banksize(void)
{
- fdtdec_setup_memory_banksize();
-
- return 0;
+ return fdtdec_setup_memory_banksize();
}
int dram_init(void)
--
1.9.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 2/5] arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig
2017-11-06 11:45 [U-Boot] [PATCH 1/5] arm: zynq: Return value from fdtdec_setup_memory_banksize directly Michal Simek
@ 2017-11-06 11:45 ` Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 3/5] arm: zynq: Move ZYNQ_SERIAL to Kconfig Michal Simek
` (2 subsequent siblings)
3 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2017-11-06 11:45 UTC (permalink / raw)
To: u-boot
Enabling fpga via Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
configs/syzygy_hub_defconfig | 1 +
configs/topic_miami_defconfig | 1 +
configs/topic_miamilite_defconfig | 1 +
configs/topic_miamiplus_defconfig | 1 +
configs/zynq_cc108_defconfig | 1 +
configs/zynq_microzed_defconfig | 1 +
configs/zynq_picozed_defconfig | 1 +
configs/zynq_z_turn_defconfig | 1 +
configs/zynq_zc702_defconfig | 1 +
configs/zynq_zc706_defconfig | 1 +
configs/zynq_zc770_xm010_defconfig | 1 +
configs/zynq_zc770_xm011_defconfig | 1 +
configs/zynq_zc770_xm012_defconfig | 1 +
configs/zynq_zc770_xm013_defconfig | 1 +
configs/zynq_zed_defconfig | 1 +
configs/zynq_zybo_defconfig | 1 +
include/configs/zynq-common.h | 3 ---
17 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 544a31fabe6b..d25b48b6c9a9 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_ZYNQ_GEM=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index fc06dc93c5fe..60623ff1158d 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 6a5348ed504f..1d6318906501 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -29,6 +29,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index d8f6fcf782b9..2c080bc3d601 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index 7927017ae1aa..f03cd4ac3382 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index ad0ecc65b0c6..a6a37f87d8f2 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -37,6 +37,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index d4344d96dcf0..0d7b9d68972b 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_ZYNQ_GEM=y
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index af959275febd..2ab0d86ca3b0 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -33,6 +33,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 54fcbfae7ae6..edd8f22bd820 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -42,6 +42,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index e1b8c226c8e5..1e0733023cc0 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -41,6 +41,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index a00919faf80e..95e4a24eb16a 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index 193c118c5743..095ee2fe8676 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_ZYNQ=y
diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig
index c62bdb1ef453..946cfc785db7 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ZYNQ_GEM=y
diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index 39f6199c47f9..6d34b2169a87 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_XILINX=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 8fafe081408a..42012021c09f 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -38,6 +38,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index 9157d0cb8079..d0ef2238388f 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -41,6 +41,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
+CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 8de2ac351ca8..e68067319d6d 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -287,8 +287,6 @@
GENERATED_GBL_DATA_SIZE)
/* Enable the PL to be downloaded */
-#define CONFIG_FPGA
-#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_ZYNQPL
/* FIT support */
@@ -319,7 +317,6 @@
/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
-#undef CONFIG_FPGA
#endif
/* Address in RAM where the parameters must be copied by SPL. */
--
1.9.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 3/5] arm: zynq: Move ZYNQ_SERIAL to Kconfig
2017-11-06 11:45 [U-Boot] [PATCH 1/5] arm: zynq: Return value from fdtdec_setup_memory_banksize directly Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 2/5] arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig Michal Simek
@ 2017-11-06 11:45 ` Michal Simek
2017-11-20 15:38 ` Simon Glass
2017-11-06 11:45 ` [U-Boot] [PATCH 4/5] arm: zynq: Sort dts names Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq Michal Simek
3 siblings, 1 reply; 10+ messages in thread
From: Michal Simek @ 2017-11-06 11:45 UTC (permalink / raw)
To: u-boot
Move cadence/zynq serial driver via Kconfig
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
configs/syzygy_hub_defconfig | 1 +
configs/topic_miami_defconfig | 1 +
configs/topic_miamilite_defconfig | 1 +
configs/topic_miamiplus_defconfig | 1 +
configs/xilinx_zynqmp_ep_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 +
configs/xilinx_zynqmp_zcu102_revA_defconfig | 1 +
configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 +
configs/zynq_cc108_defconfig | 1 +
configs/zynq_microzed_defconfig | 1 +
configs/zynq_picozed_defconfig | 1 +
configs/zynq_z_turn_defconfig | 1 +
configs/zynq_zc702_defconfig | 1 +
configs/zynq_zc706_defconfig | 1 +
configs/zynq_zc770_xm010_defconfig | 1 +
configs/zynq_zc770_xm011_defconfig | 1 +
configs/zynq_zc770_xm012_defconfig | 1 +
configs/zynq_zc770_xm013_defconfig | 1 +
configs/zynq_zed_defconfig | 1 +
configs/zynq_zybo_defconfig | 1 +
drivers/serial/Kconfig | 7 +++++++
include/configs/xilinx_zynqmp.h | 1 -
include/configs/zynq-common.h | 1 -
scripts/config_whitelist.txt | 1 -
27 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index d25b48b6c9a9..1cc86b862c4a 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -44,6 +44,7 @@ CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0000000
CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 60623ff1158d..38f2e4e5ccfd 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -39,6 +39,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0000000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 1d6318906501..a1e98b7bc3f6 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -40,6 +40,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0000000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index 2c080bc3d601..b51107725a0c 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -39,6 +39,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0000000
CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig
index 95665ecd2a5a..ff865f1bdcd0 100644
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@@ -72,6 +72,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=25000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 15f4cb7c6b91..beb24346baa9 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -62,6 +62,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index 37b0185e4c00..8c8201dfbb5c 100644
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -60,6 +60,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
index 07be75188279..34365c8cfe82 100644
--- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
@@ -45,3 +45,4 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
index 4d0d3945327e..c854ba76709c 100644
--- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
@@ -38,4 +38,5 @@ CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DM_ETH=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig
index d8c79e03b321..d8742a1bfec8 100644
--- a/configs/xilinx_zynqmp_zcu102_revA_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig
@@ -65,6 +65,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index 9dd8cc94a0d6..e5d71bd5494e 100644
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -65,6 +65,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
index f03cd4ac3382..e8d4b9431abc 100644
--- a/configs/zynq_cc108_defconfig
+++ b/configs/zynq_cc108_defconfig
@@ -44,6 +44,7 @@ CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index a6a37f87d8f2..a713314343d8 100644
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -46,6 +46,7 @@ CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index 0d7b9d68972b..bbccfa5dcecf 100644
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -36,6 +36,7 @@ CONFIG_FPGA_XILINX=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ULPI_VIEWPORT=y
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig
index 2ab0d86ca3b0..396c63f35c8b 100644
--- a/configs/zynq_z_turn_defconfig
+++ b/configs/zynq_z_turn_defconfig
@@ -45,6 +45,7 @@ CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index edd8f22bd820..ee6462f21aac 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -55,6 +55,7 @@ CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 1e0733023cc0..bc6fe3a30695 100644
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -51,6 +51,7 @@ CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index 95e4a24eb16a..bf334677c57f 100644
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -49,5 +49,6 @@ CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_SPI=y
CONFIG_ZYNQ_QSPI=y
diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index 095ee2fe8676..357b92b5fd0e 100644
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -33,3 +33,4 @@ CONFIG_FPGA_XILINX=y
CONFIG_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig
index 946cfc785db7..cce24b97a8dd 100644
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -32,3 +32,4 @@ CONFIG_FPGA_XILINX=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index 6d34b2169a87..869975c0df62 100644
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -36,4 +36,5 @@ CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 42012021c09f..d1d59e8e2f46 100644
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_ZYNQ_GEM=y
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index d0ef2238388f..412646086fc6 100644
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -51,6 +51,7 @@ CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 7c54a49bb32e..122b8e786a7a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -537,6 +537,13 @@ config STM32X7_SERIAL
enable its onboard serial ports, say Y to this option.
If unsure, say N.
+config ZYNQ_SERIAL
+ bool "Cadence (Xilinx Zynq) UART support"
+ depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+ help
+ This driver supports the Cadence UART. It is found e.g. in Xilinx
+ Zynq/ZynqMP.
+
config MPC8XX_CONS
bool "Console driver for MPC8XX"
depends on 8xx
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 8526ba0e88a0..14604eb4e801 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -42,7 +42,6 @@
/* Serial setup */
#define CONFIG_ARM_DCC
#define CONFIG_CPU_ARMV8
-#define CONFIG_ZYNQ_SERIAL
#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index e68067319d6d..e6aab081e440 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -33,7 +33,6 @@
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
#define CONFIG_ARM_DCC
-#define CONFIG_ZYNQ_SERIAL
/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8a0c95b7eec9..4ce87484c34a 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -5109,5 +5109,4 @@ CONFIG_ZYNQ_SDHCI0
CONFIG_ZYNQ_SDHCI1
CONFIG_ZYNQ_SDHCI_MAX_FREQ
CONFIG_ZYNQ_SDHCI_MIN_FREQ
-CONFIG_ZYNQ_SERIAL
CONFIG_eTSEC_MDIO_BUS
--
1.9.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 4/5] arm: zynq: Sort dts names
2017-11-06 11:45 [U-Boot] [PATCH 1/5] arm: zynq: Return value from fdtdec_setup_memory_banksize directly Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 2/5] arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 3/5] arm: zynq: Move ZYNQ_SERIAL to Kconfig Michal Simek
@ 2017-11-06 11:45 ` Michal Simek
2017-11-20 15:38 ` Simon Glass
2017-11-06 11:45 ` [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq Michal Simek
3 siblings, 1 reply; 10+ messages in thread
From: Michal Simek @ 2017-11-06 11:45 UTC (permalink / raw)
To: u-boot
Sort names.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/dts/Makefile | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 724a4b6a824c..d88fbb4ec4cd 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -123,22 +123,23 @@ dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \
dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
uniphier-sld8-ref.dtb
-dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
+dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
- zynq-zc706.dtb \
- zynq-zed.dtb \
- zynq-zybo.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
+ zynq-syzygy-hub.dtb \
zynq-topic-miami.dtb \
zynq-topic-miamilite.dtb \
zynq-topic-miamiplus.dtb \
- zynq-zturn-myir.dtb \
+ zynq-zc702.dtb \
+ zynq-zc706.dtb \
zynq-zc770-xm010.dtb \
zynq-zc770-xm011.dtb \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb \
- zynq-syzygy-hub.dtb
+ zynq-zed.dtb \
+ zynq-zturn-myir.dtb \
+ zynq-zybo.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-ep108.dtb \
zynqmp-zcu102-revA.dtb \
--
1.9.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq
2017-11-06 11:45 [U-Boot] [PATCH 1/5] arm: zynq: Return value from fdtdec_setup_memory_banksize directly Michal Simek
` (2 preceding siblings ...)
2017-11-06 11:45 ` [U-Boot] [PATCH 4/5] arm: zynq: Sort dts names Michal Simek
@ 2017-11-06 11:45 ` Michal Simek
2017-11-20 15:38 ` Simon Glass
3 siblings, 1 reply; 10+ messages in thread
From: Michal Simek @ 2017-11-06 11:45 UTC (permalink / raw)
To: u-boot
Add configuration files/dtses for mini u-boot configurations which runs
out of OCM.
ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
0xfffc0000
+#define CONFIG_SYS_SDRAM_SIZE 0x40000
was hardcoded.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-cse-qspi-single.dts | 13 ++++
arch/arm/dts/zynq-cse-qspi.dtsi | 126 +++++++++++++++++++++++++++++++++
board/xilinx/zynq/zynq-cse-qspi-single | 1 +
configs/zynq_cse_qspi_defconfig | 62 ++++++++++++++++
include/configs/zynq_cse.h | 53 ++++++++++++++
6 files changed, 256 insertions(+)
create mode 100644 arch/arm/dts/zynq-cse-qspi-single.dts
create mode 100644 arch/arm/dts/zynq-cse-qspi.dtsi
create mode 120000 board/xilinx/zynq/zynq-cse-qspi-single
create mode 100644 configs/zynq_cse_qspi_defconfig
create mode 100644 include/configs/zynq_cse.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d88fbb4ec4cd..ab5115f255ec 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -125,6 +125,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
+ zynq-cse-qspi-single.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
zynq-syzygy-hub.dtb \
diff --git a/arch/arm/dts/zynq-cse-qspi-single.dts b/arch/arm/dts/zynq-cse-qspi-single.dts
new file mode 100644
index 000000000000..bc08303d7a1a
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi-single.dts
@@ -0,0 +1,13 @@
+/*
+ * Xilinx CSE QSPI single DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "zynq-cse-qspi.dtsi"
+
+&qspi {
+ spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi
new file mode 100644
index 000000000000..1c3736f1cd6a
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-qspi.dtsi
@@ -0,0 +1,126 @@
+/*
+ * Xilinx CSE QSPI board DTS
+ *
+ * Copyright (C) 2015 - 2017 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Zynq CSE QSPI Board";
+ compatible = "xlnx,zynq-cse-qspi", "xlnx,zynq-7000";
+
+ aliases {
+ spi0 = &qspi;
+ serial0 = &dcc;
+ };
+
+ memory at fffc0000 {
+ device_type = "memory";
+ reg = <0xFFFC0000 0x40000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ u-boot,dm-pre-reloc;
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+ ranges;
+
+ intc: interrupt-controller at f8f01000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0xF8F01000 0x1000>,
+ <0xF8F00100 0x100>;
+ };
+
+ qspi: spi at e000d000 {
+ clock-names = "ref_clk", "pclk";
+ clocks = <&clkc 10>, <&clkc 43>;
+ compatible = "xlnx,zynq-qspi-1.0";
+ status = "okay";
+ interrupt-parent = <&intc>;
+ interrupts = <0 19 4>;
+ reg = <0xe000d000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-cs = <1>;
+ flash at 0 {
+ compatible = "n25q128a11";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition at qspi-fsbl-uboot {
+ label = "qspi-fsbl-uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition at qspi-linux {
+ label = "qspi-linux";
+ reg = <0x100000 0x500000>;
+ };
+ partition at qspi-device-tree {
+ label = "qspi-device-tree";
+ reg = <0x600000 0x20000>;
+ };
+ partition at qspi-rootfs {
+ label = "qspi-rootfs";
+ reg = <0x620000 0x5E0000>;
+ };
+ partition at qspi-bitstream {
+ label = "qspi-bitstream";
+ reg = <0xC00000 0x400000>;
+ };
+ };
+ };
+
+ slcr: slcr at f8000000 {
+ u-boot,dm-pre-reloc;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+ reg = <0xF8000000 0x1000>;
+ ranges;
+ clkc: clkc at 100 {
+ #clock-cells = <1>;
+ compatible = "xlnx,ps7-clkc";
+ fclk-enable = <0xf>;
+ u-boot,dm-pre-reloc;
+ clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
+ "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
+ "dci", "lqspi", "smc", "pcap", "gem0", "gem1",
+ "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
+ "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
+ "dma", "usb0_aper", "usb1_aper", "gem0_aper",
+ "gem1_aper", "sdio0_aper", "sdio1_aper",
+ "spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
+ "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
+ "gpio_aper", "lqspi_aper", "smc_aper", "swdt",
+ "dbg_trc", "dbg_apb";
+ reg = <0x100 0x100>;
+ };
+ };
+ };
+
+};
+
+&dcc {
+ status = "okay";
+};
diff --git a/board/xilinx/zynq/zynq-cse-qspi-single b/board/xilinx/zynq/zynq-cse-qspi-single
new file mode 120000
index 000000000000..764d141171f3
--- /dev/null
+++ b/board/xilinx/zynq/zynq-cse-qspi-single
@@ -0,0 +1 @@
+zynq-zc706
\ No newline at end of file
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
new file mode 100644
index 000000000000..86c5d4452e7a
--- /dev/null
+++ b/configs/zynq_cse_qspi_defconfig
@@ -0,0 +1,62 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0xFFFC0000
+# CONFIG_ZYNQ_DDRC_INIT is not set
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
+CONFIG_DEBUG_UART=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_BOOTDELAY=-1
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_SPL is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DM is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_PARTITIONS is not set
+CONFIG_OF_EMBED=y
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_SPL_BLK is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_MMC is not set
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DEBUG_UART_ARM_DCC=y
+CONFIG_DEBUG_UART_BASE=0x0
+CONFIG_DEBUG_UART_CLOCK=0
+CONFIG_ZYNQ_QSPI=y
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h
new file mode 100644
index 000000000000..dd65b5234380
--- /dev/null
+++ b/include/configs/zynq_cse.h
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2013 - 2017 Xilinx.
+ *
+ * Configuration settings for the Xilinx Zynq CSE board.
+ * See zynq-common.h for Zynq common configs
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQ_CSE_H
+#define __CONFIG_ZYNQ_CSE_H
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_ICACHE_OFF
+
+#include <configs/zynq-common.h>
+
+/* Undef unneeded configs */
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#undef CONFIG_BOARD_LATE_INIT
+#undef CONFIG_BOOTCOMMAND
+#undef CONFIG_ENV_SIZE
+#undef CONFIG_CMDLINE_EDITING
+#undef CONFIG_AUTO_COMPLETE
+#undef CONFIG_ZLIB
+#undef CONFIG_GZIP
+
+#undef CONFIG_SYS_LONGHELP
+
+#undef CONFIG_SYS_CBSIZE
+#undef CONFIG_BOOTM_VXWORKS
+#undef CONFIG_BOOTM_LINUX
+
+#define CONFIG_SYS_CBSIZE 1024
+
+#define CONFIG_ENV_SIZE 400
+#undef CONFIG_SYS_INIT_RAM_ADDR
+#undef CONFIG_SYS_INIT_RAM_SIZE
+#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#undef CONFIG_SPL_BSS_START_ADDR
+#undef CONFIG_SPL_BSS_MAX_SIZE
+#define CONFIG_SPL_BSS_START_ADDR 0x20000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x8000
+
+#undef CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_MALLOC_LEN 0x1000
+
+#define CONFIG_SYS_SDRAM_BASE 0xfffc0000
+#define CONFIG_SYS_SDRAM_SIZE 0x40000
+
+#endif /* __CONFIG_ZYNQ_CSE_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 3/5] arm: zynq: Move ZYNQ_SERIAL to Kconfig
2017-11-06 11:45 ` [U-Boot] [PATCH 3/5] arm: zynq: Move ZYNQ_SERIAL to Kconfig Michal Simek
@ 2017-11-20 15:38 ` Simon Glass
0 siblings, 0 replies; 10+ messages in thread
From: Simon Glass @ 2017-11-20 15:38 UTC (permalink / raw)
To: u-boot
On 6 November 2017 at 04:45, Michal Simek <michal.simek@xilinx.com> wrote:
> Move cadence/zynq serial driver via Kconfig
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> configs/syzygy_hub_defconfig | 1 +
> configs/topic_miami_defconfig | 1 +
> configs/topic_miamilite_defconfig | 1 +
> configs/topic_miamiplus_defconfig | 1 +
> configs/xilinx_zynqmp_ep_defconfig | 1 +
> configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
> configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
> configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 +
> configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 +
> configs/xilinx_zynqmp_zcu102_revA_defconfig | 1 +
> configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 +
> configs/zynq_cc108_defconfig | 1 +
> configs/zynq_microzed_defconfig | 1 +
> configs/zynq_picozed_defconfig | 1 +
> configs/zynq_z_turn_defconfig | 1 +
> configs/zynq_zc702_defconfig | 1 +
> configs/zynq_zc706_defconfig | 1 +
> configs/zynq_zc770_xm010_defconfig | 1 +
> configs/zynq_zc770_xm011_defconfig | 1 +
> configs/zynq_zc770_xm012_defconfig | 1 +
> configs/zynq_zc770_xm013_defconfig | 1 +
> configs/zynq_zed_defconfig | 1 +
> configs/zynq_zybo_defconfig | 1 +
> drivers/serial/Kconfig | 7 +++++++
> include/configs/xilinx_zynqmp.h | 1 -
> include/configs/zynq-common.h | 1 -
> scripts/config_whitelist.txt | 1 -
> 27 files changed, 30 insertions(+), 3 deletions(-)
>
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 4/5] arm: zynq: Sort dts names
2017-11-06 11:45 ` [U-Boot] [PATCH 4/5] arm: zynq: Sort dts names Michal Simek
@ 2017-11-20 15:38 ` Simon Glass
0 siblings, 0 replies; 10+ messages in thread
From: Simon Glass @ 2017-11-20 15:38 UTC (permalink / raw)
To: u-boot
On 6 November 2017 at 04:45, Michal Simek <michal.simek@xilinx.com> wrote:
> Sort names.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> arch/arm/dts/Makefile | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq
2017-11-06 11:45 ` [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq Michal Simek
@ 2017-11-20 15:38 ` Simon Glass
2017-11-21 7:23 ` Michal Simek
0 siblings, 1 reply; 10+ messages in thread
From: Simon Glass @ 2017-11-20 15:38 UTC (permalink / raw)
To: u-boot
On 6 November 2017 at 04:45, Michal Simek <michal.simek@xilinx.com> wrote:
> Add configuration files/dtses for mini u-boot configurations which runs
> out of OCM.
>
> ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
> 0xfffc0000
> +#define CONFIG_SYS_SDRAM_SIZE 0x40000
> was hardcoded.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/zynq-cse-qspi-single.dts | 13 ++++
> arch/arm/dts/zynq-cse-qspi.dtsi | 126 +++++++++++++++++++++++++++++++++
> board/xilinx/zynq/zynq-cse-qspi-single | 1 +
> configs/zynq_cse_qspi_defconfig | 62 ++++++++++++++++
> include/configs/zynq_cse.h | 53 ++++++++++++++
> 6 files changed, 256 insertions(+)
> create mode 100644 arch/arm/dts/zynq-cse-qspi-single.dts
> create mode 100644 arch/arm/dts/zynq-cse-qspi.dtsi
> create mode 120000 board/xilinx/zynq/zynq-cse-qspi-single
> create mode 100644 configs/zynq_cse_qspi_defconfig
> create mode 100644 include/configs/zynq_cse.h
Reviewed-by: Simon Glass <sjg@chromium.org>
It's sad to see that we still have so many CONFIG options not
converted to Kconfig.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq
2017-11-20 15:38 ` Simon Glass
@ 2017-11-21 7:23 ` Michal Simek
2017-11-24 22:36 ` Simon Glass
0 siblings, 1 reply; 10+ messages in thread
From: Michal Simek @ 2017-11-21 7:23 UTC (permalink / raw)
To: u-boot
On 20.11.2017 16:38, Simon Glass wrote:
> On 6 November 2017 at 04:45, Michal Simek <michal.simek@xilinx.com> wrote:
>> Add configuration files/dtses for mini u-boot configurations which runs
>> out of OCM.
>>
>> ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
>> 0xfffc0000
>> +#define CONFIG_SYS_SDRAM_SIZE 0x40000
>> was hardcoded.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/zynq-cse-qspi-single.dts | 13 ++++
>> arch/arm/dts/zynq-cse-qspi.dtsi | 126 +++++++++++++++++++++++++++++++++
>> board/xilinx/zynq/zynq-cse-qspi-single | 1 +
>> configs/zynq_cse_qspi_defconfig | 62 ++++++++++++++++
>> include/configs/zynq_cse.h | 53 ++++++++++++++
>> 6 files changed, 256 insertions(+)
>> create mode 100644 arch/arm/dts/zynq-cse-qspi-single.dts
>> create mode 100644 arch/arm/dts/zynq-cse-qspi.dtsi
>> create mode 120000 board/xilinx/zynq/zynq-cse-qspi-single
>> create mode 100644 configs/zynq_cse_qspi_defconfig
>> create mode 100644 include/configs/zynq_cse.h
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> It's sad to see that we still have so many CONFIG options not
> converted to Kconfig.
Unfortunately. That was the reason I wanted to push this to mainline.
It is very minimal configuration which requires just a minimum stuff.
Did someone convert CONFIG_SYS_MALLOC_LEN?
I have another 2 configurations for NOR and NAND only mini
configurations which depend on this to be converted.
Thanks,
Michal
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq
2017-11-21 7:23 ` Michal Simek
@ 2017-11-24 22:36 ` Simon Glass
0 siblings, 0 replies; 10+ messages in thread
From: Simon Glass @ 2017-11-24 22:36 UTC (permalink / raw)
To: u-boot
Hi Michal,
On 21 November 2017 at 00:23, Michal Simek <michal.simek@xilinx.com> wrote:
> On 20.11.2017 16:38, Simon Glass wrote:
>> On 6 November 2017 at 04:45, Michal Simek <michal.simek@xilinx.com> wrote:
>>> Add configuration files/dtses for mini u-boot configurations which runs
>>> out of OCM.
>>>
>>> ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
>>> 0xfffc0000
>>> +#define CONFIG_SYS_SDRAM_SIZE 0x40000
>>> was hardcoded.
>>>
>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>> ---
>>>
>>> arch/arm/dts/Makefile | 1 +
>>> arch/arm/dts/zynq-cse-qspi-single.dts | 13 ++++
>>> arch/arm/dts/zynq-cse-qspi.dtsi | 126 +++++++++++++++++++++++++++++++++
>>> board/xilinx/zynq/zynq-cse-qspi-single | 1 +
>>> configs/zynq_cse_qspi_defconfig | 62 ++++++++++++++++
>>> include/configs/zynq_cse.h | 53 ++++++++++++++
>>> 6 files changed, 256 insertions(+)
>>> create mode 100644 arch/arm/dts/zynq-cse-qspi-single.dts
>>> create mode 100644 arch/arm/dts/zynq-cse-qspi.dtsi
>>> create mode 120000 board/xilinx/zynq/zynq-cse-qspi-single
>>> create mode 100644 configs/zynq_cse_qspi_defconfig
>>> create mode 100644 include/configs/zynq_cse.h
>>
>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>
>> It's sad to see that we still have so many CONFIG options not
>> converted to Kconfig.
>
> Unfortunately. That was the reason I wanted to push this to mainline.
> It is very minimal configuration which requires just a minimum stuff.
>
> Did someone convert CONFIG_SYS_MALLOC_LEN?
> I have another 2 configurations for NOR and NAND only mini
> configurations which depend on this to be converted.
Not that I saw. There are still at least a few dozen commonly used
generic configs that need conversion.
Regards,
Simon
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2017-11-24 22:36 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-11-06 11:45 [U-Boot] [PATCH 1/5] arm: zynq: Return value from fdtdec_setup_memory_banksize directly Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 2/5] arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig Michal Simek
2017-11-06 11:45 ` [U-Boot] [PATCH 3/5] arm: zynq: Move ZYNQ_SERIAL to Kconfig Michal Simek
2017-11-20 15:38 ` Simon Glass
2017-11-06 11:45 ` [U-Boot] [PATCH 4/5] arm: zynq: Sort dts names Michal Simek
2017-11-20 15:38 ` Simon Glass
2017-11-06 11:45 ` [U-Boot] [PATCH 5/5] arm: zynq: Add mini u-boot configuration for zynq Michal Simek
2017-11-20 15:38 ` Simon Glass
2017-11-21 7:23 ` Michal Simek
2017-11-24 22:36 ` Simon Glass
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