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From: Jan Beulich <jbeulich@suse.com>
To: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
Cc: xen-devel@lists.xenproject.org,
	Ross Lagerwall <ross.lagerwall@citrix.com>,
	YueHaibing <yuehaibing@huawei.com>,
	Simon Gaiser <simon@invisiblethingslab.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Juergen Gross <jgross@suse.com>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1] xen-pciback: optionally allow interrupt enable flag writes
Date: Tue, 3 Dec 2019 11:40:03 +0100	[thread overview]
Message-ID: <9ccf765b-f828-52db-6778-18e605a80a02@suse.com> (raw)
In-Reply-To: <20191203054222.7966-1-marmarek@invisiblethingslab.com>

On 03.12.2019 06:41, Marek Marczykowski-Górecki  wrote:
> @@ -117,6 +118,35 @@ static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
>  		pci_clear_mwi(dev);
>  	}
>  
> +	if (dev_data && dev_data->allow_interrupt_control) {
> +		if (!(cmd->val & PCI_COMMAND_INTX_DISABLE) &&
> +		    (value & PCI_COMMAND_INTX_DISABLE)) {
> +			pci_intx(dev, 0);
> +		} else if ((cmd->val & PCI_COMMAND_INTX_DISABLE) &&
> +		    !(value & PCI_COMMAND_INTX_DISABLE)) {
> +			/* Do not allow enabling INTx together with MSI or MSI-X. */
> +			/* Do not trust dev->msi(x)_enabled here, as enabling could be done
> +			 * bypassing the pci_*msi* functions, by the qemu.
> +			 */
> +			err = pci_read_config_word(dev,
> +						   dev->msi_cap + PCI_MSI_FLAGS,
> +						   &cap_value);
> +			if (!err && (cap_value & PCI_MSI_FLAGS_ENABLE))
> +				err = -EBUSY;
> +			if (!err)
> +				err = pci_read_config_word(dev,
> +							   dev->msix_cap + PCI_MSIX_FLAGS,
> +							   &cap_value);

What about a device without MSI and/or MSI-X? Wouldn't you read
from (close to) config space offset 0 in this case, interpreting
some unrelated bit(s) as the MSI / MSI-X enable one(s)?

Just as an initial implementation related remark. I'm still to
think about the idea as a whole, albeit I find the argument
pretty convincing at the first glance of devices being able to
raise MSI anyway even when disabled as per the config space
setting. (Of course, as with any config space settings, devices
providing backdoor access would open similar avenues.)

Jan

WARNING: multiple messages have this Message-ID (diff)
From: Jan Beulich <jbeulich@suse.com>
To: "Marek Marczykowski-Górecki" <marmarek@invisiblethingslab.com>
Cc: Juergen Gross <jgross@suse.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	YueHaibing <yuehaibing@huawei.com>,
	open list <linux-kernel@vger.kernel.org>,
	Simon Gaiser <simon@invisiblethingslab.com>,
	Ross Lagerwall <ross.lagerwall@citrix.com>,
	xen-devel@lists.xenproject.org,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: Re: [Xen-devel] [PATCH v1] xen-pciback: optionally allow interrupt enable flag writes
Date: Tue, 3 Dec 2019 11:40:03 +0100	[thread overview]
Message-ID: <9ccf765b-f828-52db-6778-18e605a80a02@suse.com> (raw)
In-Reply-To: <20191203054222.7966-1-marmarek@invisiblethingslab.com>

On 03.12.2019 06:41, Marek Marczykowski-Górecki  wrote:
> @@ -117,6 +118,35 @@ static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
>  		pci_clear_mwi(dev);
>  	}
>  
> +	if (dev_data && dev_data->allow_interrupt_control) {
> +		if (!(cmd->val & PCI_COMMAND_INTX_DISABLE) &&
> +		    (value & PCI_COMMAND_INTX_DISABLE)) {
> +			pci_intx(dev, 0);
> +		} else if ((cmd->val & PCI_COMMAND_INTX_DISABLE) &&
> +		    !(value & PCI_COMMAND_INTX_DISABLE)) {
> +			/* Do not allow enabling INTx together with MSI or MSI-X. */
> +			/* Do not trust dev->msi(x)_enabled here, as enabling could be done
> +			 * bypassing the pci_*msi* functions, by the qemu.
> +			 */
> +			err = pci_read_config_word(dev,
> +						   dev->msi_cap + PCI_MSI_FLAGS,
> +						   &cap_value);
> +			if (!err && (cap_value & PCI_MSI_FLAGS_ENABLE))
> +				err = -EBUSY;
> +			if (!err)
> +				err = pci_read_config_word(dev,
> +							   dev->msix_cap + PCI_MSIX_FLAGS,
> +							   &cap_value);

What about a device without MSI and/or MSI-X? Wouldn't you read
from (close to) config space offset 0 in this case, interpreting
some unrelated bit(s) as the MSI / MSI-X enable one(s)?

Just as an initial implementation related remark. I'm still to
think about the idea as a whole, albeit I find the argument
pretty convincing at the first glance of devices being able to
raise MSI anyway even when disabled as per the config space
setting. (Of course, as with any config space settings, devices
providing backdoor access would open similar avenues.)

Jan

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  reply	other threads:[~2019-12-03 10:39 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-03  5:41 [PATCH v1] xen-pciback: optionally allow interrupt enable flag writes Marek Marczykowski-Górecki
2019-12-03  5:41 ` [Xen-devel] " Marek Marczykowski-Górecki
2019-12-03 10:40 ` Jan Beulich [this message]
2019-12-03 10:40   ` Jan Beulich
2019-12-03 15:17 ` Roger Pau Monné
2019-12-03 15:17   ` Roger Pau Monné
2019-12-19  3:51   ` Marek Marczykowski-Górecki
2019-12-19  3:51     ` Marek Marczykowski-Górecki
2019-12-11 15:49 ` Jan Beulich
2019-12-11 15:49   ` [Xen-devel] " Jan Beulich

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