* [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation
@ 2023-03-25 13:06 Nicholas Piggin
2023-03-25 13:06 ` [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S Nicholas Piggin
2023-03-27 17:46 ` [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Christophe Leroy
0 siblings, 2 replies; 7+ messages in thread
From: Nicholas Piggin @ 2023-03-25 13:06 UTC (permalink / raw)
Cc: linuxppc-dev, Nicholas Piggin
The _switch stack frame setup are substantially the same, so are the
comments. The difference in how the stack and current are switched,
and other hardware and software housekeeping is done is moved into
macros.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
These patches are mostly just shuffling code around. Better? Worse?
Thanks,
Nick
arch/powerpc/kernel/Makefile | 2 +-
arch/powerpc/kernel/entry_32.S | 57 --------
arch/powerpc/kernel/entry_64.S | 220 ----------------------------
arch/powerpc/kernel/switch.S | 260 +++++++++++++++++++++++++++++++++
4 files changed, 261 insertions(+), 278 deletions(-)
create mode 100644 arch/powerpc/kernel/switch.S
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 9bf2be123093..ec70a1748506 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -68,7 +68,7 @@ CFLAGS_REMOVE_syscall.o = -fstack-protector -fstack-protector-strong
CFLAGS_syscall.o += -fno-stack-protector
#endif
-obj-y := cputable.o syscalls.o \
+obj-y := cputable.o syscalls.o switch.o \
irq.o align.o signal_$(BITS).o pmc.o vdso.o \
process.o systbl.o idle.o \
signal.o sysfs.o cacheinfo.o time.o \
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 5604c9a1ac22..b57994c5290b 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -197,63 +197,6 @@ ret_from_kernel_thread:
li r3,0
b ret_from_syscall
-/*
- * This routine switches between two different tasks. The process
- * state of one is saved on its kernel stack. Then the state
- * of the other is restored from its kernel stack. The memory
- * management hardware is updated to the second process's state.
- * Finally, we can return to the second process.
- * On entry, r3 points to the THREAD for the current task, r4
- * points to the THREAD for the new task.
- *
- * This routine is always called with interrupts disabled.
- *
- * Note: there are two ways to get to the "going out" portion
- * of this code; either by coming in via the entry (_switch)
- * or via "fork" which must set up an environment equivalent
- * to the "_switch" path. If you change this , you'll have to
- * change the fork code also.
- *
- * The code which creates the new task context is in 'copy_thread'
- * in arch/ppc/kernel/process.c
- */
-_GLOBAL(_switch)
- stwu r1,-SWITCH_FRAME_SIZE(r1)
- mflr r0
- stw r0,SWITCH_FRAME_SIZE+4(r1)
- /* r3-r12 are caller saved -- Cort */
- SAVE_NVGPRS(r1)
- stw r0,_NIP(r1) /* Return to switch caller */
- mfcr r10
- stw r10,_CCR(r1)
- stw r1,KSP(r3) /* Set old stack pointer */
-
-#ifdef CONFIG_SMP
- /* We need a sync somewhere here to make sure that if the
- * previous task gets rescheduled on another CPU, it sees all
- * stores it has performed on this one.
- */
- sync
-#endif /* CONFIG_SMP */
-
- tophys(r0,r4)
- mtspr SPRN_SPRG_THREAD,r0 /* Update current THREAD phys addr */
- lwz r1,KSP(r4) /* Load new stack pointer */
-
- /* save the old current 'last' for return value */
- mr r3,r2
- addi r2,r4,-THREAD /* Update current */
-
- lwz r0,_CCR(r1)
- mtcrf 0xFF,r0
- /* r3-r12 are destroyed -- Cort */
- REST_NVGPRS(r1)
-
- lwz r4,_NIP(r1) /* Return to _switch caller in new task */
- mtlr r4
- addi r1,r1,SWITCH_FRAME_SIZE
- blr
-
.globl fast_exception_return
fast_exception_return:
#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 1bf1121e17f1..f3d3885ee9fd 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -14,7 +14,6 @@
* code, and exception/interrupt return code for PowerPC.
*/
-#include <linux/objtool.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <asm/cache.h>
@@ -45,227 +44,8 @@
#include <asm/feature-fixups.h>
#include <asm/kup.h>
-/*
- * System calls.
- */
.section ".text"
-#ifdef CONFIG_PPC_BOOK3S_64
-
-#define FLUSH_COUNT_CACHE \
-1: nop; \
- patch_site 1b, patch__call_flush_branch_caches1; \
-1: nop; \
- patch_site 1b, patch__call_flush_branch_caches2; \
-1: nop; \
- patch_site 1b, patch__call_flush_branch_caches3
-
-.macro nops number
- .rept \number
- nop
- .endr
-.endm
-
-.balign 32
-.global flush_branch_caches
-flush_branch_caches:
- /* Save LR into r9 */
- mflr r9
-
- // Flush the link stack
- .rept 64
- ANNOTATE_INTRA_FUNCTION_CALL
- bl .+4
- .endr
- b 1f
- nops 6
-
- .balign 32
- /* Restore LR */
-1: mtlr r9
-
- // If we're just flushing the link stack, return here
-3: nop
- patch_site 3b patch__flush_link_stack_return
-
- li r9,0x7fff
- mtctr r9
-
- PPC_BCCTR_FLUSH
-
-2: nop
- patch_site 2b patch__flush_count_cache_return
-
- nops 3
-
- .rept 278
- .balign 32
- PPC_BCCTR_FLUSH
- nops 7
- .endr
-
- blr
-#else
-#define FLUSH_COUNT_CACHE
-#endif /* CONFIG_PPC_BOOK3S_64 */
-
-/*
- * This routine switches between two different tasks. The process
- * state of one is saved on its kernel stack. Then the state
- * of the other is restored from its kernel stack. The memory
- * management hardware is updated to the second process's state.
- * Finally, we can return to the second process, via interrupt_return.
- * On entry, r3 points to the THREAD for the current task, r4
- * points to the THREAD for the new task.
- *
- * Note: there are two ways to get to the "going out" portion
- * of this code; either by coming in via the entry (_switch)
- * or via "fork" which must set up an environment equivalent
- * to the "_switch" path. If you change this you'll have to change
- * the fork code also.
- *
- * The code which creates the new task context is in 'copy_thread'
- * in arch/powerpc/kernel/process.c
- */
- .align 7
-_GLOBAL(_switch)
- mflr r0
- std r0,16(r1)
- stdu r1,-SWITCH_FRAME_SIZE(r1)
- /* r3-r13 are caller saved -- Cort */
- SAVE_NVGPRS(r1)
- std r0,_NIP(r1) /* Return to switch caller */
- mfcr r23
- std r23,_CCR(r1)
- std r1,KSP(r3) /* Set old stack pointer */
-
- kuap_check_amr r9, r10
-
- FLUSH_COUNT_CACHE /* Clobbers r9, ctr */
-
- /*
- * On SMP kernels, care must be taken because a task may be
- * scheduled off CPUx and on to CPUy. Memory ordering must be
- * considered.
- *
- * Cacheable stores on CPUx will be visible when the task is
- * scheduled on CPUy by virtue of the core scheduler barriers
- * (see "Notes on Program-Order guarantees on SMP systems." in
- * kernel/sched/core.c).
- *
- * Uncacheable stores in the case of involuntary preemption must
- * be taken care of. The smp_mb__after_spinlock() in __schedule()
- * is implemented as hwsync on powerpc, which orders MMIO too. So
- * long as there is an hwsync in the context switch path, it will
- * be executed on the source CPU after the task has performed
- * all MMIO ops on that CPU, and on the destination CPU before the
- * task performs any MMIO ops there.
- */
-
- /*
- * The kernel context switch path must contain a spin_lock,
- * which contains larx/stcx, which will clear any reservation
- * of the task being switched.
- */
-#ifdef CONFIG_PPC_BOOK3S
-/* Cancel all explict user streams as they will have no use after context
- * switch and will stop the HW from creating streams itself
- */
- DCBT_BOOK3S_STOP_ALL_STREAM_IDS(r6)
-#endif
-
- addi r6,r4,-THREAD /* Convert THREAD to 'current' */
- std r6,PACACURRENT(r13) /* Set new 'current' */
-#if defined(CONFIG_STACKPROTECTOR)
- ld r6, TASK_CANARY(r6)
- std r6, PACA_CANARY(r13)
-#endif
-
- ld r8,KSP(r4) /* new stack pointer */
-#ifdef CONFIG_PPC_64S_HASH_MMU
-BEGIN_MMU_FTR_SECTION
- b 2f
-END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)
-BEGIN_FTR_SECTION
- clrrdi r6,r8,28 /* get its ESID */
- clrrdi r9,r1,28 /* get current sp ESID */
-FTR_SECTION_ELSE
- clrrdi r6,r8,40 /* get its 1T ESID */
- clrrdi r9,r1,40 /* get current sp 1T ESID */
-ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_1T_SEGMENT)
- clrldi. r0,r6,2 /* is new ESID c00000000? */
- cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
- cror eq,4*cr1+eq,eq
- beq 2f /* if yes, don't slbie it */
-
- /* Bolt in the new stack SLB entry */
- ld r7,KSP_VSID(r4) /* Get new stack's VSID */
- oris r0,r6,(SLB_ESID_V)@h
- ori r0,r0,(SLB_NUM_BOLTED-1)@l
-BEGIN_FTR_SECTION
- li r9,MMU_SEGSIZE_1T /* insert B field */
- oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
- rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0
-END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
-
- /* Update the last bolted SLB. No write barriers are needed
- * here, provided we only update the current CPU's SLB shadow
- * buffer.
- */
- ld r9,PACA_SLBSHADOWPTR(r13)
- li r12,0
- std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
- li r12,SLBSHADOW_STACKVSID
- STDX_BE r7,r12,r9 /* Save VSID */
- li r12,SLBSHADOW_STACKESID
- STDX_BE r0,r12,r9 /* Save ESID */
-
- /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
- * we have 1TB segments, the only CPUs known to have the errata
- * only support less than 1TB of system memory and we'll never
- * actually hit this code path.
- */
-
- isync
- slbie r6
-BEGIN_FTR_SECTION
- slbie r6 /* Workaround POWER5 < DD2.1 issue */
-END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
- slbmte r7,r0
- isync
-2:
-#endif /* CONFIG_PPC_64S_HASH_MMU */
-
- clrrdi r7, r8, THREAD_SHIFT /* base of new stack */
- /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
- because we don't need to leave the 288-byte ABI gap at the
- top of the kernel stack. */
- addi r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
-
- /*
- * PMU interrupts in radix may come in here. They will use r1, not
- * PACAKSAVE, so this stack switch will not cause a problem. They
- * will store to the process stack, which may then be migrated to
- * another CPU. However the rq lock release on this CPU paired with
- * the rq lock acquire on the new CPU before the stack becomes
- * active on the new CPU, will order those stores.
- */
- mr r1,r8 /* start using new stack pointer */
- std r7,PACAKSAVE(r13)
-
- ld r6,_CCR(r1)
- mtcrf 0xFF,r6
-
- /* r3-r13 are destroyed -- Cort */
- REST_NVGPRS(r1)
-
- /* convert old thread to its task_struct for return value */
- addi r3,r3,-THREAD
- ld r7,_NIP(r1) /* Return to _switch caller in new task */
- mtlr r7
- addi r1,r1,SWITCH_FRAME_SIZE
- blr
-
_GLOBAL(enter_prom)
mflr r0
std r0,16(r1)
diff --git a/arch/powerpc/kernel/switch.S b/arch/powerpc/kernel/switch.S
new file mode 100644
index 000000000000..064366060a2e
--- /dev/null
+++ b/arch/powerpc/kernel/switch.S
@@ -0,0 +1,260 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <linux/objtool.h>
+#include <asm/asm-offsets.h>
+#include <asm/code-patching-asm.h>
+#include <asm/kup.h>
+#include <asm/mmu.h>
+#include <asm/ppc_asm.h>
+#include <asm/thread_info.h>
+
+.section ".text","ax",@progbits
+
+#ifdef CONFIG_PPC_BOOK3S_64
+/*
+ * Cancel all explict user streams as they will have no use after context
+ * switch and will stop the HW from creating streams itself
+ */
+#define STOP_STREAMS \
+ DCBT_BOOK3S_STOP_ALL_STREAM_IDS(r6)
+
+#define FLUSH_COUNT_CACHE \
+1: nop; \
+ patch_site 1b, patch__call_flush_branch_caches1; \
+1: nop; \
+ patch_site 1b, patch__call_flush_branch_caches2; \
+1: nop; \
+ patch_site 1b, patch__call_flush_branch_caches3
+
+.macro nops number
+ .rept \number
+ nop
+ .endr
+.endm
+
+.balign 32
+.global flush_branch_caches
+flush_branch_caches:
+ /* Save LR into r9 */
+ mflr r9
+
+ // Flush the link stack
+ .rept 64
+ ANNOTATE_INTRA_FUNCTION_CALL
+ bl .+4
+ .endr
+ b 1f
+ nops 6
+
+ .balign 32
+ /* Restore LR */
+1: mtlr r9
+
+ // If we're just flushing the link stack, return here
+3: nop
+ patch_site 3b patch__flush_link_stack_return
+
+ li r9,0x7fff
+ mtctr r9
+
+ PPC_BCCTR_FLUSH
+
+2: nop
+ patch_site 2b patch__flush_count_cache_return
+
+ nops 3
+
+ .rept 278
+ .balign 32
+ PPC_BCCTR_FLUSH
+ nops 7
+ .endr
+
+ blr
+
+#ifdef CONFIG_PPC_64S_HASH_MMU
+.balign 32
+/*
+ * New stack pointer in r8, old stack pointer in r1, must not clobber r3
+ */
+pin_stack_slb:
+BEGIN_FTR_SECTION
+ clrrdi r6,r8,28 /* get its ESID */
+ clrrdi r9,r1,28 /* get current sp ESID */
+FTR_SECTION_ELSE
+ clrrdi r6,r8,40 /* get its 1T ESID */
+ clrrdi r9,r1,40 /* get current sp 1T ESID */
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_1T_SEGMENT)
+ clrldi. r0,r6,2 /* is new ESID c00000000? */
+ cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
+ cror eq,4*cr1+eq,eq
+ beq 2f /* if yes, don't slbie it */
+
+ /* Bolt in the new stack SLB entry */
+ ld r7,KSP_VSID(r4) /* Get new stack's VSID */
+ oris r0,r6,(SLB_ESID_V)@h
+ ori r0,r0,(SLB_NUM_BOLTED-1)@l
+BEGIN_FTR_SECTION
+ li r9,MMU_SEGSIZE_1T /* insert B field */
+ oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
+ rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
+
+ /* Update the last bolted SLB. No write barriers are needed
+ * here, provided we only update the current CPU's SLB shadow
+ * buffer.
+ */
+ ld r9,PACA_SLBSHADOWPTR(r13)
+ li r12,0
+ std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
+ li r12,SLBSHADOW_STACKVSID
+ STDX_BE r7,r12,r9 /* Save VSID */
+ li r12,SLBSHADOW_STACKESID
+ STDX_BE r0,r12,r9 /* Save ESID */
+
+ /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
+ * we have 1TB segments, the only CPUs known to have the errata
+ * only support less than 1TB of system memory and we'll never
+ * actually hit this code path.
+ */
+
+ isync
+ slbie r6
+BEGIN_FTR_SECTION
+ slbie r6 /* Workaround POWER5 < DD2.1 issue */
+END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
+ slbmte r7,r0
+ isync
+2: blr
+ .size pin_stack_slb,.-pin_stack_slb
+#endif /* CONFIG_PPC_64S_HASH_MMU */
+
+#else
+#define STOP_STREAMS
+#define FLUSH_COUNT_CACHE
+#endif /* CONFIG_PPC_BOOK3S_64 */
+
+/*
+ * do_switch_32/64 is invoked with r4 set to 'next' and results in r3 being
+ * set to prev. It switches the stack, current, and does other task switch
+ * housekeeping.
+ */
+.macro do_switch_32
+ tophys(r0,r4)
+ mtspr SPRN_SPRG_THREAD,r0 /* Update current THREAD phys addr */
+ lwz r1,KSP(r4) /* Load new stack pointer */
+
+ /* save the old current 'last' for return value */
+ mr r3,r2
+ addi r2,r4,-THREAD /* Update current */
+.endm
+
+.macro do_switch_64
+ ld r8,KSP(r4) /* new stack pointer */
+
+ kuap_check_amr r9, r10
+
+ FLUSH_COUNT_CACHE /* Clobbers r9, ctr */
+
+ STOP_STREAMS /* Clobbers r6 */
+
+ /* convert old thread to its task_struct for return value */
+ addi r3,r3,-THREAD
+ addi r6,r4,-THREAD /* Convert THREAD to 'current' */
+ std r6,PACACURRENT(r13) /* Set new 'current' */
+#if defined(CONFIG_STACKPROTECTOR)
+ ld r6, TASK_CANARY(r6)
+ std r6, PACA_CANARY(r13)
+#endif
+ /* Set new PACAKSAVE */
+ clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
+ addi r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
+ std r7,PACAKSAVE(r13)
+
+#ifdef CONFIG_PPC_64S_HASH_MMU
+BEGIN_MMU_FTR_SECTION
+ bl pin_stack_slb
+END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
+#endif
+ /*
+ * PMU interrupts in radix may come in here. They will use r1, not
+ * PACAKSAVE, so this stack switch will not cause a problem. They
+ * will store to the process stack, which may then be migrated to
+ * another CPU. However the rq lock release on this CPU paired with
+ * the rq lock acquire on the new CPU before the stack becomes
+ * active on the new CPU, will order those stores.
+ */
+ mr r1,r8 /* start using new stack pointer */
+.endm
+
+/*
+ * This routine switches between two different tasks. The process
+ * state of one is saved on its kernel stack. Then the state
+ * of the other is restored from its kernel stack. The memory
+ * management hardware is updated to the second process's state.
+ * Finally, we can return to the second process.
+ * On entry, r3 points to the THREAD for the current task, r4
+ * points to the THREAD for the new task.
+ *
+ * This routine is always called with interrupts disabled.
+ *
+ * Note: there are two ways to get to the "going out" portion
+ * of this code; either by coming in via the entry (_switch)
+ * or via "fork" which must set up an environment equivalent
+ * to the "_switch" path. If you change this , you'll have to
+ * change the fork code also.
+ *
+ * The code which creates the new task context is in 'copy_thread'
+ * in arch/ppc/kernel/process.c
+ *
+ * Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
+ * because we don't need to leave the 288-byte ABI gap at the
+ * top of the kernel stack.
+ */
+_GLOBAL(_switch)
+ mflr r0
+ PPC_STL r0,LRSAVE(r1)
+ PPC_STLU r1,-SWITCH_FRAME_SIZE(r1)
+ PPC_STL r1,KSP(r3) /* Set old stack pointer */
+ SAVE_NVGPRS(r1) /* volatiles are caller-saved -- Cort */
+ PPC_STL r0,_NIP(r1) /* Return to switch caller */
+ mfcr r0
+ stw r0,_CCR(r1)
+
+ /*
+ * On SMP kernels, care must be taken because a task may be
+ * scheduled off CPUx and on to CPUy. Memory ordering must be
+ * considered.
+ *
+ * Cacheable stores on CPUx will be visible when the task is
+ * scheduled on CPUy by virtue of the core scheduler barriers
+ * (see "Notes on Program-Order guarantees on SMP systems." in
+ * kernel/sched/core.c).
+ *
+ * Uncacheable stores in the case of involuntary preemption must
+ * be taken care of. The smp_mb__after_spinlock() in __schedule()
+ * is implemented as hwsync on powerpc, which orders MMIO too. So
+ * long as there is an hwsync in the context switch path, it will
+ * be executed on the source CPU after the task has performed
+ * all MMIO ops on that CPU, and on the destination CPU before the
+ * task performs any MMIO ops there.
+ */
+
+ /*
+ * The kernel context switch path must contain a spin_lock,
+ * which contains larx/stcx, which will clear any reservation
+ * of the task being switched.
+ */
+
+#ifdef CONFIG_PPC32
+ do_switch_32
+#else
+ do_switch_64
+#endif
+
+ lwz r0,_CCR(r1)
+ mtcrf 0xFF,r0
+ REST_NVGPRS(r1) /* volatiles are destroyed -- Cort */
+ PPC_LL r0,_NIP(r1) /* Return to _switch caller in new task */
+ mtlr r0
+ addi r1,r1,SWITCH_FRAME_SIZE
+ blr
--
2.37.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S
2023-03-25 13:06 [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Nicholas Piggin
@ 2023-03-25 13:06 ` Nicholas Piggin
2023-03-27 17:48 ` Christophe Leroy
2023-03-27 17:46 ` [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Christophe Leroy
1 sibling, 1 reply; 7+ messages in thread
From: Nicholas Piggin @ 2023-03-25 13:06 UTC (permalink / raw)
Cc: linuxppc-dev, Nicholas Piggin
This file contains only the enter_prom implementation now.
Trim includes and update header comment while we're here.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/Makefile | 8 +++--
.../kernel/{entry_64.S => prom_entry.S} | 30 ++-----------------
scripts/head-object-list.txt | 2 +-
3 files changed, 9 insertions(+), 31 deletions(-)
rename arch/powerpc/kernel/{entry_64.S => prom_entry.S} (73%)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index ec70a1748506..ebba0896998a 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -209,10 +209,12 @@ CFLAGS_paca.o += -fno-stack-protector
obj-$(CONFIG_PPC_FPU) += fpu.o
obj-$(CONFIG_ALTIVEC) += vector.o
-obj-$(CONFIG_PPC64) += entry_64.o
-obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
-extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check
+ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
+obj-y += prom_init.o
+obj-$(CONFIG_PPC64) += prom_entry.o
+extra-y += prom_init_check
+endif
quiet_cmd_prom_init_check = PROMCHK $@
cmd_prom_init_check = $(CONFIG_SHELL) $< "$(NM)" $(obj)/prom_init.o; touch $@
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/prom_entry.S
similarity index 73%
rename from arch/powerpc/kernel/entry_64.S
rename to arch/powerpc/kernel/prom_entry.S
index f3d3885ee9fd..0b65b2150e37 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/prom_entry.S
@@ -10,41 +10,17 @@
* Copyright (C) 1996 Paul Mackerras.
* MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
*
- * This file contains the system call entry code, context switch
- * code, and exception/interrupt return code for PowerPC.
+ * This file contains the prom entry code.
*/
-
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <asm/cache.h>
-#include <asm/unistd.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/thread_info.h>
-#include <asm/code-patching-asm.h>
-#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
-#include <asm/cputable.h>
-#include <asm/firmware.h>
-#include <asm/bug.h>
-#include <asm/ptrace.h>
-#include <asm/irqflags.h>
-#include <asm/hw_irq.h>
-#include <asm/context_tracking.h>
-#include <asm/ppc-opcode.h>
-#include <asm/barrier.h>
-#include <asm/export.h>
-#include <asm/asm-compat.h>
#ifdef CONFIG_PPC_BOOK3S
#include <asm/exception-64s.h>
#else
#include <asm/exception-64e.h>
#endif
-#include <asm/feature-fixups.h>
-#include <asm/kup.h>
+#include <asm/ppc_asm.h>
- .section ".text"
+.section ".text","ax",@progbits
_GLOBAL(enter_prom)
mflr r0
diff --git a/scripts/head-object-list.txt b/scripts/head-object-list.txt
index b2a0e21ea8d7..f0ee936872fc 100644
--- a/scripts/head-object-list.txt
+++ b/scripts/head-object-list.txt
@@ -34,7 +34,7 @@ arch/powerpc/kernel/head_64.o
arch/powerpc/kernel/head_8xx.o
arch/powerpc/kernel/head_85xx.o
arch/powerpc/kernel/head_book3s_32.o
-arch/powerpc/kernel/entry_64.o
+arch/powerpc/kernel/prom_entry.o
arch/powerpc/kernel/fpu.o
arch/powerpc/kernel/vector.o
arch/powerpc/kernel/prom_init.o
--
2.37.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation
2023-03-25 13:06 [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Nicholas Piggin
2023-03-25 13:06 ` [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S Nicholas Piggin
@ 2023-03-27 17:46 ` Christophe Leroy
2023-03-28 5:51 ` Nicholas Piggin
1 sibling, 1 reply; 7+ messages in thread
From: Christophe Leroy @ 2023-03-27 17:46 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: linuxppc-dev
Le 25/03/2023 à 14:06, Nicholas Piggin a écrit :
> The _switch stack frame setup are substantially the same, so are the
> comments. The difference in how the stack and current are switched,
> and other hardware and software housekeeping is done is moved into
> macros.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> These patches are mostly just shuffling code around. Better? Worse?
I find it nice, at least for PPC32 part.
For PPC32 generated code is almost the same, only a few reordering at
the start of the function.
Before the change I have:
00000238 <_switch>:
238: 94 21 ff 30 stwu r1,-208(r1)
23c: 7c 08 02 a6 mflr r0
240: 90 01 00 d4 stw r0,212(r1)
244: 91 a1 00 44 stw r13,68(r1)
...
28c: 93 e1 00 8c stw r31,140(r1)
290: 90 01 00 90 stw r0,144(r1)
294: 7d 40 00 26 mfcr r10
298: 91 41 00 a8 stw r10,168(r1)
29c: 90 23 00 00 stw r1,0(r3)
2a0: 3c 04 40 00 addis r0,r4,16384
2a4: 7c 13 43 a6 mtsprg 3,r0
...
After the change I have:
00000000 <_switch>:
0: 7c 08 02 a6 mflr r0
4: 90 01 00 04 stw r0,4(r1)
8: 94 21 ff 30 stwu r1,-208(r1)
c: 90 23 00 00 stw r1,0(r3)
10: 91 a1 00 44 stw r13,68(r1)
...
58: 93 e1 00 8c stw r31,140(r1)
5c: 90 01 00 90 stw r0,144(r1)
60: 7c 00 00 26 mfcr r0
64: 90 01 00 a8 stw r0,168(r1)
68: 3c 04 40 00 addis r0,r4,16384
6c: 7c 13 43 a6 mtsprg 3,r0
...
Everything else is identical.
Not sure, maybe re-using r1 immediately after stwu will introduce latency.
Christophe
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S
2023-03-25 13:06 ` [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S Nicholas Piggin
@ 2023-03-27 17:48 ` Christophe Leroy
2023-03-28 6:51 ` Nicholas Piggin
0 siblings, 1 reply; 7+ messages in thread
From: Christophe Leroy @ 2023-03-27 17:48 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: linuxppc-dev
Le 25/03/2023 à 14:06, Nicholas Piggin a écrit :
> This file contains only the enter_prom implementation now.
> Trim includes and update header comment while we're here.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> arch/powerpc/kernel/Makefile | 8 +++--
> .../kernel/{entry_64.S => prom_entry.S} | 30 ++-----------------
> scripts/head-object-list.txt | 2 +-
> 3 files changed, 9 insertions(+), 31 deletions(-)
> rename arch/powerpc/kernel/{entry_64.S => prom_entry.S} (73%)
>
> diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
> index ec70a1748506..ebba0896998a 100644
> --- a/arch/powerpc/kernel/Makefile
> +++ b/arch/powerpc/kernel/Makefile
> @@ -209,10 +209,12 @@ CFLAGS_paca.o += -fno-stack-protector
>
> obj-$(CONFIG_PPC_FPU) += fpu.o
> obj-$(CONFIG_ALTIVEC) += vector.o
> -obj-$(CONFIG_PPC64) += entry_64.o
> -obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
>
> -extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check
> +ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
You don't need that ifdef construct, you can do:
obj64-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_entry.o
> +obj-y += prom_init.o
> +obj-$(CONFIG_PPC64) += prom_entry.o
> +extra-y += prom_init_check
> +endif
>
> quiet_cmd_prom_init_check = PROMCHK $@
> cmd_prom_init_check = $(CONFIG_SHELL) $< "$(NM)" $(obj)/prom_init.o; touch $@
Christophe
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation
2023-03-27 17:46 ` [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Christophe Leroy
@ 2023-03-28 5:51 ` Nicholas Piggin
0 siblings, 0 replies; 7+ messages in thread
From: Nicholas Piggin @ 2023-03-28 5:51 UTC (permalink / raw)
To: Christophe Leroy; +Cc: linuxppc-dev
On Tue Mar 28, 2023 at 3:46 AM AEST, Christophe Leroy wrote:
>
>
> Le 25/03/2023 à 14:06, Nicholas Piggin a écrit :
> > The _switch stack frame setup are substantially the same, so are the
> > comments. The difference in how the stack and current are switched,
> > and other hardware and software housekeeping is done is moved into
> > macros.
> >
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> > These patches are mostly just shuffling code around. Better? Worse?
>
> I find it nice, at least for PPC32 part.
>
> For PPC32 generated code is almost the same, only a few reordering at
> the start of the function.
>
> Before the change I have:
>
> 00000238 <_switch>:
> 238: 94 21 ff 30 stwu r1,-208(r1)
> 23c: 7c 08 02 a6 mflr r0
> 240: 90 01 00 d4 stw r0,212(r1)
> 244: 91 a1 00 44 stw r13,68(r1)
Hmm, this is how GCC seems to emits stack prologue code for ppc32.
On ppc64 the mflr r0 comes first, then the non-volatile register
saving, then the LR save, then ther r1 stdu.
Seems a bit pointless to have to different implementations. I
think we'd like to have LR saved before r1 though, otherwise you
get an unreliable backtrace in your last 2 stack frames instead
of just the last one, don't you?
Thanks,
Nick
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S
2023-03-27 17:48 ` Christophe Leroy
@ 2023-03-28 6:51 ` Nicholas Piggin
2023-03-28 7:08 ` Christophe Leroy
0 siblings, 1 reply; 7+ messages in thread
From: Nicholas Piggin @ 2023-03-28 6:51 UTC (permalink / raw)
To: Christophe Leroy; +Cc: linuxppc-dev
On Tue Mar 28, 2023 at 3:48 AM AEST, Christophe Leroy wrote:
>
>
> Le 25/03/2023 à 14:06, Nicholas Piggin a écrit :
> > This file contains only the enter_prom implementation now.
> > Trim includes and update header comment while we're here.
> >
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> > arch/powerpc/kernel/Makefile | 8 +++--
> > .../kernel/{entry_64.S => prom_entry.S} | 30 ++-----------------
> > scripts/head-object-list.txt | 2 +-
> > 3 files changed, 9 insertions(+), 31 deletions(-)
> > rename arch/powerpc/kernel/{entry_64.S => prom_entry.S} (73%)
> >
> > diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
> > index ec70a1748506..ebba0896998a 100644
> > --- a/arch/powerpc/kernel/Makefile
> > +++ b/arch/powerpc/kernel/Makefile
> > @@ -209,10 +209,12 @@ CFLAGS_paca.o += -fno-stack-protector
> >
> > obj-$(CONFIG_PPC_FPU) += fpu.o
> > obj-$(CONFIG_ALTIVEC) += vector.o
> > -obj-$(CONFIG_PPC64) += entry_64.o
> > -obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
> >
> > -extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check
> > +ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
>
> You don't need that ifdef construct, you can do:
>
> obj64-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_entry.o
Nice. So that could have been obj64-y from the start?
Thanks,
Nick
>
> > +obj-y += prom_init.o
> > +obj-$(CONFIG_PPC64) += prom_entry.o
> > +extra-y += prom_init_check
> > +endif
> >
> > quiet_cmd_prom_init_check = PROMCHK $@
> > cmd_prom_init_check = $(CONFIG_SHELL) $< "$(NM)" $(obj)/prom_init.o; touch $@
>
>
> Christophe
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S
2023-03-28 6:51 ` Nicholas Piggin
@ 2023-03-28 7:08 ` Christophe Leroy
0 siblings, 0 replies; 7+ messages in thread
From: Christophe Leroy @ 2023-03-28 7:08 UTC (permalink / raw)
To: Nicholas Piggin; +Cc: linuxppc-dev
Le 28/03/2023 à 08:51, Nicholas Piggin a écrit :
> On Tue Mar 28, 2023 at 3:48 AM AEST, Christophe Leroy wrote:
>>
>>
>> Le 25/03/2023 à 14:06, Nicholas Piggin a écrit :
>>> This file contains only the enter_prom implementation now.
>>> Trim includes and update header comment while we're here.
>>>
>>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>>> ---
>>> arch/powerpc/kernel/Makefile | 8 +++--
>>> .../kernel/{entry_64.S => prom_entry.S} | 30 ++-----------------
>>> scripts/head-object-list.txt | 2 +-
>>> 3 files changed, 9 insertions(+), 31 deletions(-)
>>> rename arch/powerpc/kernel/{entry_64.S => prom_entry.S} (73%)
>>>
>>> diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
>>> index ec70a1748506..ebba0896998a 100644
>>> --- a/arch/powerpc/kernel/Makefile
>>> +++ b/arch/powerpc/kernel/Makefile
>>> @@ -209,10 +209,12 @@ CFLAGS_paca.o += -fno-stack-protector
>>>
>>> obj-$(CONFIG_PPC_FPU) += fpu.o
>>> obj-$(CONFIG_ALTIVEC) += vector.o
>>> -obj-$(CONFIG_PPC64) += entry_64.o
>>> -obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o
>>>
>>> -extra-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init_check
>>> +ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
>>
>> You don't need that ifdef construct, you can do:
>>
>> obj64-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_entry.o
>
> Nice. So that could have been obj64-y from the start?
Yes, allthought it is not used that way in ppc/kernel/Makefile:
$ git grep -e obj64 -e obj32 arch/powerpc/kernel/Makefile
arch/powerpc/kernel/Makefile:obj64-$(CONFIG_HIBERNATION) +=
swsusp_asm64.o
arch/powerpc/kernel/Makefile:obj64-$(CONFIG_AUDIT) +=
compat_audit.o
arch/powerpc/kernel/Makefile:obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM)
+= tm.o
arch/powerpc/kernel/Makefile:obj-$(CONFIG_PPC64) +=
$(obj64-y)
arch/powerpc/kernel/Makefile:obj-$(CONFIG_PPC32) +=
$(obj32-y)
But it is in ppc/lib/Makefile:
$ git grep -e obj64 -e obj32 arch/powerpc/lib/Makefile
arch/powerpc/lib/Makefile:obj64-y += copypage_64.o copyuser_64.o
mem_64.o hweight_64.o \
arch/powerpc/lib/Makefile:obj64-$(CONFIG_SMP) += locks.o
arch/powerpc/lib/Makefile:obj64-$(CONFIG_ALTIVEC) += vmx-helper.o
arch/powerpc/lib/Makefile:obj64-$(CONFIG_KPROBES_SANITY_TEST) +=
test_emulate_step.o \
arch/powerpc/lib/Makefile:obj64-y += quad.o
arch/powerpc/lib/Makefile:obj-$(CONFIG_PPC64) += $(obj64-y)
Christophe
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-03-28 7:10 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-25 13:06 [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Nicholas Piggin
2023-03-25 13:06 ` [PATCH 2/2] powerpc/64: Rename entry_64.S to prom_entry.S Nicholas Piggin
2023-03-27 17:48 ` Christophe Leroy
2023-03-28 6:51 ` Nicholas Piggin
2023-03-28 7:08 ` Christophe Leroy
2023-03-27 17:46 ` [PATCH 1/2] powerpc: merge 32-bit and 64-bit _switch implementation Christophe Leroy
2023-03-28 5:51 ` Nicholas Piggin
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.