[Qemu-devel] [PATCH 00/10] PPC: e500: Use u-boot as firmware

[Qemu-devel] [PATCH 00/10] PPC: e500: Use u-boot as firmware

[Alexander Graf]

Today we don't run any firmware on our e500 platform. You're either running
a Linux kernel directly through -kernel or you don't boot the VM at all.

This is bad for multiple reasons. The normal firmware on e500 based systems
is u-boot. Some OSes (IIRC FreeBSD) rely on u-boot for their 2nd stage boot
loader. Since that relies on interfaces u-boot provides we can't execute it
today.

The other case where we're falling short of expectations that I'm aware of
is network boot. With a firmware you can actually pxe boot a virtual machine.

This patch set implements all the pieces necessary to run u-boot as the
firmware for our e500 platforms: mpc8544ds and e500plat. It is based on a
u-boot patch set that I sent out earlier today and that is still pending review.

Please try out as many things as you're able to try.

If you want to revert back the the old behavior of loading a kernel directly
all you need to do is pass -kernel $uImage -bios $uImage to QEMU on the command
line. That will run the kernel as ePAPR compliant firmware instead.

Known missing bits:

  - -boot doesn't get interpreted yet
  - pflash is missing, so the environment is volatile
  - no block drivers available (ata_piix is broken in u-boot and virtio-blk
    is missing)
  - KVM is still missing a few emulation bits to support this


Alex

Alexander Graf (10):
  PPC: Make all e500 CPUs SVR aware
  PPC: Add definitions for GIVORs
  PPC: Add stub emulation for HDBCR0
  PPC: Add L1CFG1 SPR emulation
  PPC: Properly emulate L1CSR0 and L1CSR1
  PPC: Add dcbtls emulation
  PPC: guts: Add emulation of a few more registers
  PPC: e500: Expose kernel load address in dt
  PPC: Add u-boot firmware for e500
  PPC: e500: Move to u-boot as firmware

 hw/ppc/e500.c               | 116 ++++++++++++++++++++++++++++----------------
 hw/ppc/mpc8544_guts.c       |  12 +++++
 pc-bios/u-boot.e500         | Bin 0 -> 1049524 bytes
 target-ppc/cpu-models.c     |  28 +++++------
 target-ppc/cpu.h            |  20 ++++++++
 target-ppc/translate.c      |  12 +++++
 target-ppc/translate_init.c |  26 ++++++++--
 7 files changed, 154 insertions(+), 60 deletions(-)
 create mode 100755 pc-bios/u-boot.e500

-- 
1.8.1.4

[Qemu-devel] [PATCH 01/10] PPC: Make all e500 CPUs SVR aware

[Alexander Graf]

Our pre-e500mc e500 CPU types didn't get instanciated with SVR information,
even though those systems do support the SVR register.

Spawn them with the SVR tag so that they don't get confused when someone tries
to read SPR_SVR.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/cpu-models.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
index f6c9b3a..b12ad64 100644
--- a/target-ppc/cpu-models.c
+++ b/target-ppc/cpu-models.c
@@ -671,20 +671,20 @@
     POWERPC_DEF_SVR("MPC8379E", "MPC8379E",
                     CPU_POWERPC_MPC837x,      POWERPC_SVR_8379E,     e300)
     /* e500 family                                                           */
-    POWERPC_DEF("e500_v10",      CPU_POWERPC_e500v1_v10,             e500v1,
-                "PowerPC e500 v1.0 core")
-    POWERPC_DEF("e500_v20",      CPU_POWERPC_e500v1_v20,             e500v1,
-                "PowerPC e500 v2.0 core")
-    POWERPC_DEF("e500v2_v10",    CPU_POWERPC_e500v2_v10,             e500v2,
-                "PowerPC e500v2 v1.0 core")
-    POWERPC_DEF("e500v2_v20",    CPU_POWERPC_e500v2_v20,             e500v2,
-                "PowerPC e500v2 v2.0 core")
-    POWERPC_DEF("e500v2_v21",    CPU_POWERPC_e500v2_v21,             e500v2,
-                "PowerPC e500v2 v2.1 core")
-    POWERPC_DEF("e500v2_v22",    CPU_POWERPC_e500v2_v22,             e500v2,
-                "PowerPC e500v2 v2.2 core")
-    POWERPC_DEF("e500v2_v30",    CPU_POWERPC_e500v2_v30,             e500v2,
-                "PowerPC e500v2 v3.0 core")
+    POWERPC_DEF_SVR("e500_v10", "PowerPC e500 v1.0 core",
+                    CPU_POWERPC_e500v1_v10,   POWERPC_SVR_E500,      e500v1);
+    POWERPC_DEF_SVR("e500_v20", "PowerPC e500 v2.0 core",
+                    CPU_POWERPC_e500v1_v20,   POWERPC_SVR_E500,      e500v1);
+    POWERPC_DEF_SVR("e500v2_v10", "PowerPC e500v2 v1.0 core",
+                    CPU_POWERPC_e500v2_v10,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v20", "PowerPC e500v2 v2.0 core",
+                    CPU_POWERPC_e500v2_v20,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v21", "PowerPC e500v2 v2.1 core",
+                    CPU_POWERPC_e500v2_v21,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v22", "PowerPC e500v2 v2.2 core",
+                    CPU_POWERPC_e500v2_v22,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v30", "PowerPC e500v2 v3.0 core",
+                    CPU_POWERPC_e500v2_v30,   POWERPC_SVR_E500,      e500v2);
     POWERPC_DEF_SVR("e500mc", "e500mc",
                     CPU_POWERPC_e500mc,       POWERPC_SVR_E500,      e500mc)
 #ifdef TARGET_PPC64
-- 
1.8.1.4

[Qemu-devel] [PATCH 02/10] PPC: Add definitions for GIVORs

[Alexander Graf]

We're missing SPR definitions for GIVORs. Add them to the list of SPRs.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/cpu.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 51bcd4a..70708d4 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1357,6 +1357,12 @@ static inline int cpu_mmu_index (CPUPPCState *env)
 #define SPR_BOOKE_IVOR40      (0x1B2)
 #define SPR_BOOKE_IVOR41      (0x1B3)
 #define SPR_BOOKE_IVOR42      (0x1B4)
+#define SPR_BOOKE_GIVOR2      (0x1B8)
+#define SPR_BOOKE_GIVOR3      (0x1B9)
+#define SPR_BOOKE_GIVOR4      (0x1BA)
+#define SPR_BOOKE_GIVOR8      (0x1BB)
+#define SPR_BOOKE_GIVOR13     (0x1BC)
+#define SPR_BOOKE_GIVOR14     (0x1BD)
 #define SPR_BOOKE_SPEFSCR     (0x200)
 #define SPR_Exxx_BBEAR        (0x201)
 #define SPR_Exxx_BBTAR        (0x202)
-- 
1.8.1.4

[Qemu-devel] [PATCH 03/10] PPC: Add stub emulation for HDBCR0

[Alexander Graf]

The HDBCR0 register is available for hardware debuggers which we don't
emulate.

However, we can treat it as a generic storage register that doesn't
have any effect, making guests happy.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/cpu.h            | 1 +
 target-ppc/translate_init.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 70708d4..1289e13 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1597,6 +1597,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
 #define SPR_403_VTBL          (0x3CC)
 #define SPR_403_VTBU          (0x3CD)
 #define SPR_DMISS             (0x3D0)
+#define SPR_Exxx_HDBCR0       (0x3D0)
 #define SPR_DCMP              (0x3D1)
 #define SPR_HASH1             (0x3D2)
 #define SPR_HASH2             (0x3D3)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 35470d4..37a0ed2 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -4581,6 +4581,10 @@ static void init_proc_e500 (CPUPPCState *env, int version)
                  SPR_NOACCESS, SPR_NOACCESS,
                  &spr_read_generic, SPR_NOACCESS,
                  0x00000000);
+    spr_register(env, SPR_Exxx_HDBCR0, "HDBCR0",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic,
+                 0x00000000);
     /* XXX better abstract into Emb.xxx features */
     if (version == fsl_e5500) {
         spr_register(env, SPR_BOOKE_EPCR, "EPCR",
-- 
1.8.1.4

[Qemu-devel] [PATCH 04/10] PPC: Add L1CFG1 SPR emulation

[Alexander Graf]

In addition to the L1 data cache configuration register L1CFG0 there is
also another one for the L1 instruction cache called L1CFG1.

Emulate that one with the same values as the data one.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/cpu.h            | 1 +
 target-ppc/translate_init.c | 8 +++++++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 1289e13..15abad4 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1367,6 +1367,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
 #define SPR_Exxx_BBEAR        (0x201)
 #define SPR_Exxx_BBTAR        (0x202)
 #define SPR_Exxx_L1CFG0       (0x203)
+#define SPR_Exxx_L1CFG1       (0x204)
 #define SPR_Exxx_NPIDR        (0x205)
 #define SPR_ATBL              (0x20E)
 #define SPR_ATBU              (0x20F)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 37a0ed2..403ce7a 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -4437,6 +4437,8 @@ static void init_proc_e500 (CPUPPCState *env, int version)
     uint64_t ivpr_mask = 0xFFFF0000ULL;
     uint32_t l1cfg0 = 0x3800  /* 8 ways */
                     | 0x0020; /* 32 kb */
+    uint32_t l1cfg1 = 0x3800  /* 8 ways */
+                    | 0x0020; /* 32 kb */
 #if !defined(CONFIG_USER_ONLY)
     int i;
 #endif
@@ -4505,6 +4507,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
         env->dcache_line_size = 64;
         env->icache_line_size = 64;
         l1cfg0 |= 0x1000000; /* 64 byte cache block size */
+        l1cfg1 |= 0x1000000; /* 64 byte cache block size */
         break;
     default:
         cpu_abort(env, "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]);
@@ -4555,7 +4558,10 @@ static void init_proc_e500 (CPUPPCState *env, int version)
                  SPR_NOACCESS, SPR_NOACCESS,
                  &spr_read_generic, &spr_write_generic,
                  l1cfg0);
-    /* XXX : not implemented */
+    spr_register(env, SPR_Exxx_L1CFG1, "L1CFG1",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic,
+                 l1cfg1);
     spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0",
                  SPR_NOACCESS, SPR_NOACCESS,
                  &spr_read_generic, &spr_write_e500_l1csr0,
-- 
1.8.1.4

[Qemu-devel] [PATCH 05/10] PPC: Properly emulate L1CSR0 and L1CSR1

[Alexander Graf]

There are 2 L1 cache control registers - one for data (L1CSR0) and
one for instructions (L1CSR1).

Emulate both of them well enough to give the guest the illusion that
it could actually do anything about its caches.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/cpu.h            | 12 ++++++++++++
 target-ppc/translate_init.c | 14 +++++++++++---
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 15abad4..30b328d 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1708,6 +1708,18 @@ static inline int cpu_mmu_index (CPUPPCState *env)
 /* External Input Interrupt Directed to Guest State */
 #define EPCR_EXTGS            (1 << 31)
 
+#define   L1CSR0_CPE		0x00010000	/* Data Cache Parity Enable */
+#define   L1CSR0_CUL		0x00000400	/* (D-)Cache Unable to Lock */
+#define   L1CSR0_DCLFR		0x00000100	/* D-Cache Lock Flash Reset */
+#define   L1CSR0_DCFI		0x00000002	/* Data Cache Flash Invalidate */
+#define   L1CSR0_DCE		0x00000001	/* Data Cache Enable */
+
+#define   L1CSR1_CPE		0x00010000	/* Instruction Cache Parity Enable */
+#define   L1CSR1_ICUL		0x00000400	/* I-Cache Unable to Lock */
+#define   L1CSR1_ICLFR		0x00000100	/* I-Cache Lock Flash Reset */
+#define   L1CSR1_ICFI		0x00000002	/* Instruction Cache Flash Invalidate */
+#define   L1CSR1_ICE		0x00000001	/* Instruction Cache Enable */
+
 /*****************************************************************************/
 /* PowerPC Instructions types definitions                                    */
 enum {
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 403ce7a..7322116 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -1448,7 +1448,16 @@ static void spr_write_e500_l1csr0 (void *opaque, int sprn, int gprn)
 {
     TCGv t0 = tcg_temp_new();
 
-    tcg_gen_andi_tl(t0, cpu_gpr[gprn], ~256);
+    tcg_gen_andi_tl(t0, cpu_gpr[gprn], L1CSR0_DCE | L1CSR0_CPE);
+    gen_store_spr(sprn, t0);
+    tcg_temp_free(t0);
+}
+
+static void spr_write_e500_l1csr1(void *opaque, int sprn, int gprn)
+{
+    TCGv t0 = tcg_temp_new();
+
+    tcg_gen_andi_tl(t0, cpu_gpr[gprn], L1CSR1_ICE | L1CSR1_CPE);
     gen_store_spr(sprn, t0);
     tcg_temp_free(t0);
 }
@@ -4566,10 +4575,9 @@ static void init_proc_e500 (CPUPPCState *env, int version)
                  SPR_NOACCESS, SPR_NOACCESS,
                  &spr_read_generic, &spr_write_e500_l1csr0,
                  0x00000000);
-    /* XXX : not implemented */
     spr_register(env, SPR_Exxx_L1CSR1, "L1CSR1",
                  SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
+                 &spr_read_generic, &spr_write_e500_l1csr1,
                  0x00000000);
     spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
                  SPR_NOACCESS, SPR_NOACCESS,
-- 
1.8.1.4

[Qemu-devel] [PATCH 06/10] PPC: Add dcbtls emulation

[Alexander Graf]

The dcbtls instruction is able to lock data inside the L1 cache.

Unfortunately we don't emulate any caches, so we have to tell the guest
that its locking attempt failed.

However, by implementing the instruction we at least don't give the
guest a program exception which it definitely does not expect.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-ppc/translate.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 759133c..5663541 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -4270,6 +4270,17 @@ static void gen_dcbtst(DisasContext *ctx)
      */
 }
 
+/* dcbtls */
+static void gen_dcbtls(DisasContext *ctx)
+{
+    /* Always fails locking the cache */
+    TCGv t0 = tcg_temp_new();
+    gen_load_spr(t0, SPR_Exxx_L1CSR0);
+    tcg_gen_ori_tl(t0, t0, L1CSR0_CUL);
+    gen_store_spr(SPR_Exxx_L1CSR0, t0);
+    tcg_temp_free(t0);
+}
+
 /* dcbz */
 static void gen_dcbz(DisasContext *ctx)
 {
@@ -9267,6 +9278,7 @@ GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE),
 GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE),
 GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE),
 GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE),
+GEN_HANDLER_E(dcbtls, 0x1F, 0x06, 0x05, 0x02000001, PPC_BOOKE, PPC2_BOOKE206),
 GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZ),
 GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC),
 GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC),
-- 
1.8.1.4

[Qemu-devel] [PATCH 07/10] PPC: guts: Add emulation of a few more registers

[Alexander Graf]

The GUTS device is used by system software to find out about hardware
details of the current system.

We only emulate the bare minimum to be able to reboot a guest which is
not sufficient to make u-boot happy.

Add a few more registers to our portfolio with dummy values.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc/mpc8544_guts.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
index a10abe9..af8c742 100644
--- a/hw/ppc/mpc8544_guts.c
+++ b/hw/ppc/mpc8544_guts.c
@@ -25,6 +25,8 @@
 #define MPC8544_GUTS_RSTCR_RESET      0x02
 
 #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
+#define PORPLLSR_SYS_RATIO_MAX        0x3e
+#define PORPLLSR_CPU0_RATIO_MAX       (0x3f << 16)
 #define MPC8544_GUTS_ADDR_PORBMSR     0x04
 #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
 #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
@@ -36,6 +38,7 @@
 #define MPC8544_GUTS_ADDR_GPINDR      0x50
 #define MPC8544_GUTS_ADDR_PMUXCR      0x60
 #define MPC8544_GUTS_ADDR_DEVDISR     0x70
+#define DEVDISR_DISABLED_NONE         0x0
 #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
 #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
 #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
@@ -73,6 +76,15 @@ static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
 
     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
     switch (addr) {
+    case MPC8544_GUTS_ADDR_PORPLLSR:
+        value = PORPLLSR_SYS_RATIO_MAX | PORPLLSR_CPU0_RATIO_MAX;
+        break;
+    case MPC8544_GUTS_ADDR_PORDEVSR:
+        value = 0;
+        break;
+    case MPC8544_GUTS_ADDR_DEVDISR:
+        value = DEVDISR_DISABLED_NONE;
+        break;
     case MPC8544_GUTS_ADDR_PVR:
         value = env->spr[SPR_PVR];
         break;
-- 
1.8.1.4

[Qemu-devel] [PATCH 08/10] PPC: e500: Expose kernel load address in dt

[Alexander Graf]

We want to move to a model where firmware loads our kernel. To achieve
this we need to be able to tell firmware where the kernel lies.

Let's copy the mechanism we already use for -M pseries and expose the
kernel load address and size through the device tree.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc/e500.c | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index b37ce9d..f8a76b7 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -128,6 +128,8 @@ static int ppce500_load_device_tree(QEMUMachineInitArgs *args,
                                     hwaddr addr,
                                     hwaddr initrd_base,
                                     hwaddr initrd_size,
+                                    hwaddr kernel_base,
+                                    hwaddr kernel_size,
                                     bool dry_run)
 {
     CPUPPCState *env = first_cpu->env_ptr;
@@ -204,6 +206,13 @@ static int ppce500_load_device_tree(QEMUMachineInitArgs *args,
         if (ret < 0) {
             fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
         }
+
+    }
+
+    if (kernel_base != -1ULL) {
+        qemu_fdt_setprop_cells(fdt, "/chosen", "qemu,boot-kernel",
+                                     kernel_base >> 32, kernel_base,
+                                     kernel_size >> 32, kernel_size);
     }
 
     ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
@@ -389,20 +398,25 @@ typedef struct DeviceTreeParams {
     hwaddr addr;
     hwaddr initrd_base;
     hwaddr initrd_size;
+    hwaddr kernel_base;
+    hwaddr kernel_size;
 } DeviceTreeParams;
 
 static void ppce500_reset_device_tree(void *opaque)
 {
     DeviceTreeParams *p = opaque;
     ppce500_load_device_tree(&p->args, &p->params, p->addr, p->initrd_base,
-                             p->initrd_size, false);
+                             p->initrd_size, p->kernel_base, p->kernel_size,
+                             false);
 }
 
 static int ppce500_prep_device_tree(QEMUMachineInitArgs *args,
                                     PPCE500Params *params,
                                     hwaddr addr,
                                     hwaddr initrd_base,
-                                    hwaddr initrd_size)
+                                    hwaddr initrd_size,
+                                    hwaddr kernel_base,
+                                    hwaddr kernel_size)
 {
     DeviceTreeParams *p = g_new(DeviceTreeParams, 1);
     p->args = *args;
@@ -410,12 +424,15 @@ static int ppce500_prep_device_tree(QEMUMachineInitArgs *args,
     p->addr = addr;
     p->initrd_base = initrd_base;
     p->initrd_size = initrd_size;
+    p->kernel_base = kernel_base;
+    p->kernel_size = kernel_size;
 
     qemu_register_reset(ppce500_reset_device_tree, p);
 
     /* Issue the device tree loader once, so that we get the size of the blob */
     return ppce500_load_device_tree(args, params, addr, initrd_base,
-                                    initrd_size, true);
+                                    initrd_size, kernel_base, kernel_size,
+                                    true);
 }
 
 /* Create -kernel TLB entries for BookE.  */
@@ -782,7 +799,8 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
         int dt_size;
 
         dt_size = ppce500_prep_device_tree(args, params, dt_base,
-                                           initrd_base, initrd_size);
+                                           initrd_base, initrd_size,
+                                           loadaddr, kernel_size);
         if (dt_size < 0) {
             fprintf(stderr, "couldn't load device tree\n");
             exit(1);
-- 
1.8.1.4

[Qemu-devel] [PATCH 09/10] PPC: Add u-boot firmware for e500

[Alexander Graf]

This adds a special build of u-boot tailored for the e500 platforms we
emulate. It is based on patches that are currently in the review process,
so there's no hash commit to refer to yet.

This binary is provided purely for convenience and testing purposes.
Eventually we want to have it compiled based on an upstream commit.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 pc-bios/u-boot.e500 | Bin 0 -> 1049524 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100755 pc-bios/u-boot.e500

diff --git a/pc-bios/u-boot.e500 b/pc-bios/u-boot.e500
new file mode 100755
index 0000000000000000000000000000000000000000..ddd0ade5710c7a8d2420856847c96feb20fb42be
GIT binary patch
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z1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35
zP(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~
z0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%
z6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FL
zKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`
z1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35
zP(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~
z0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%
z6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FL
zKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`
z1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35
zP(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~
z0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%
z6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FL
zKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`
z1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35
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z1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35
zP(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~
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z6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FL
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z1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35
zP(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~
z0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(T3%6i`3`1r$&~0R<FLKmi35P(XqI
zPYR4F^-OK09)lakr+3evc;@uxg(;0msb|~8KibiD2^skza_5eQQtD{?-~~Gx=BG4&
z5yO0<M{3)=XvdgOF#fMcvsY^SbToUXw%>^6+fv(>Xr7naelwcqr?$^TvrlUKt!Va5
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z|M<3d{AkCNl-|}hwC9d7<5Oyz_4JOZsmJiP)O%N3x@hpn4nMVH=GPw^*Y=U8=zmdr
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z`P-R~-fii;!AxgG+pqurj;0N78#jguMVW2AT2j;Ek6$%rQR*?_(KM*}bNy4>?#lS*
zZ?D#`S1C<sKXZg-m*!9G(X*|Q<+b*QJK7fXzh(TRXWn30^<Y``Xj}WEe4gmnvLMQ&
zUuB#bjI-t(<E$yhp<i{J1N|?W|1$nXv+XeRf8aox|MI1&?JuJ}b<n@A?HkqhOWXb`
zYiAhd?eM>Lv(4v&vM$W~Rm!@!Qda-0dtO$w{};-_;pLtq8;+$j^Iz+Hz3qprBj4)9
zG*dGc{bRjtoAl_8mWe&iG)*ks)OJU&Y<+4=?>^C%E}M#XX<|Ba>dub0HzfZQP(T3%
z6i`3`1r$&~f&U)~+<B&>H?z~HNY4q=XD(ay;OdknrXFch>T&y|Nn=Yx8)r7&TAI3S
z)w=b=N~7y<uD_u)YUB;0M&3N?#?qW6ix!O-{lLv57Oq*aYSGftn#B(-Tf1!as?rT(
zZn^p98|S5IjV<@yo~Esh|0gh+cPv@8j<Qqg+q-AKo~eHA(zUH?S{E!#^{tE7x2F0v
ztD6_JE}*%1#p*?=K7X<9frYDAw?439*;<B()|MqP#M;HJ4=rY(g=^QQ`svdr)!%y8
z#QFs->#|v>U$lDV%EhY~p=ha(*{Gj3y@`RTME!!+)-}r(u4`SqmfHN+|1MzAsQ-DX
zBO9qb^?Yq;x6%6-?eCx&!}Uy^^zZrF&XhKOqT6uc9)FjS7_L_;xA1>UdrH@g=XK>T
zhKrO)G2Exer(T~vkkWM<=~nrxly@y1isAOXl6pNig{rQo3`Das+>OO>=cO~u$VDCP
zOnhLs;i8QAdq0VGhC6dQaT<d5N*T0f{i1m*=|g&DBlb`2DJ|$;zvvf#A0p>xZSh|=
zTpCn;-BsQkx<yeVvwr>4R+<yD_WZx-7ilh<mEr!L*ZoN4uQJ@jtIwSIw@OE*`(4^E
YuD<S?ZVcb6+P!}|P5URSuZ!XSFF32Z*Z=?k

literal 0
HcmV?d00001

-- 
1.8.1.4

[Qemu-devel] [PATCH 10/10] PPC: e500: Move to u-boot as firmware

[Alexander Graf]

Almost all platforms QEMU emulates have some sort of firmware they can load
to expose a guest environment that closely resembles the way it would look
like on real hardware.

This patch introduces such a firmware on our e500 platforms. U-boot is the
default firmware for most of these systems and as such our preferred choice.

For now, it is able to expose the same functionality to the user as the direct
-kernel option was, just that it prints some nice messages beforehand.

However, if you abort the boot (press any key) or boot without -kernel you
are actually able to modify the boot environment, execute a networked boot
through the e1000 emulation and execute u-boot payloads.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/ppc/e500.c | 94 ++++++++++++++++++++++++++++++++++-------------------------
 1 file changed, 54 insertions(+), 40 deletions(-)

diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index f8a76b7..d95c112 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -39,7 +39,6 @@
 
 #define EPAPR_MAGIC                (0x45504150)
 #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
-#define UIMAGE_LOAD_BASE           0
 #define DTC_LOAD_PAD               0x1800000
 #define DTC_PAD_MASK               0xFFFFF
 #define DTB_MAX_SIZE               (8 * 1024 * 1024)
@@ -618,15 +617,18 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     PCIBus *pci_bus;
     CPUPPCState *env = NULL;
-    uint64_t elf_entry;
-    uint64_t elf_lowaddr;
-    hwaddr entry=0;
-    hwaddr loadaddr=UIMAGE_LOAD_BASE;
-    target_long kernel_size=0;
-    target_ulong dt_base = 0;
-    target_ulong initrd_base = 0;
-    target_long initrd_size = 0;
-    target_ulong cur_base = 0;
+    uint64_t loadaddr;
+    hwaddr kernel_base = -1LL;
+    int kernel_size = 0;
+    hwaddr dt_base = 0;
+    hwaddr initrd_base = 0;
+    int initrd_size = 0;
+    hwaddr cur_base = 0;
+    char *filename;
+    hwaddr bios_entry = 0;
+    target_long bios_size;
+    struct boot_info *boot_info;
+    int dt_size;
     int i;
     unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
     qemu_irq **irqs, *mpic;
@@ -753,29 +755,24 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
     /* Register spinning region */
     sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
 
+    if (cur_base < (32 * 1024 * 1024)) {
+        /* u-boot occupies memory up to 32MB, so load blobs above */
+        cur_base = (32 * 1024 * 1024);
+    }
+
     /* Load kernel. */
     if (args->kernel_filename) {
-        kernel_size = load_uimage(args->kernel_filename, &entry,
-                                  &loadaddr, NULL);
-        if (kernel_size < 0) {
-            kernel_size = load_elf(args->kernel_filename, NULL, NULL,
-                                   &elf_entry, &elf_lowaddr, NULL, 1,
-                                   ELF_MACHINE, 0);
-            entry = elf_entry;
-            loadaddr = elf_lowaddr;
-        }
-        /* XXX try again as binary */
+        kernel_base = cur_base;
+        kernel_size = load_image_targphys(args->kernel_filename,
+                                          cur_base,
+                                          ram_size - cur_base);
         if (kernel_size < 0) {
             fprintf(stderr, "qemu: could not load kernel '%s'\n",
                     args->kernel_filename);
             exit(1);
         }
 
-        cur_base = loadaddr + kernel_size;
-
-        /* Reserve space for dtb */
-        dt_base = (cur_base + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
-        cur_base += DTB_MAX_SIZE;
+        cur_base += kernel_size;
     }
 
     /* Load initrd. */
@@ -793,25 +790,42 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
         cur_base = initrd_base + initrd_size;
     }
 
-    /* If we're loading a kernel directly, we must load the device tree too. */
-    if (args->kernel_filename) {
-        struct boot_info *boot_info;
-        int dt_size;
-
-        dt_size = ppce500_prep_device_tree(args, params, dt_base,
-                                           initrd_base, initrd_size,
-                                           loadaddr, kernel_size);
-        if (dt_size < 0) {
-            fprintf(stderr, "couldn't load device tree\n");
+    /* Load u-boot (ELF) */
+    if (bios_name == NULL) {
+        bios_name = "u-boot.e500";
+    }
+    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+
+    bios_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL,
+                         1, ELF_MACHINE, 0);
+    if (bios_size < 0) {
+        /*
+         * Hrm. No ELF image? Try a uImage, maybe someone is giving us an
+         * ePAPR compliant kernel
+         */
+        kernel_size = load_uimage(filename, &bios_entry, &loadaddr, NULL);
+        if (kernel_size < 0) {
+            fprintf(stderr, "qemu: could not load firmware '%s'\n", filename);
             exit(1);
         }
-        assert(dt_size < DTB_MAX_SIZE);
+    }
 
-        boot_info = env->load_info;
-        boot_info->entry = entry;
-        boot_info->dt_base = dt_base;
-        boot_info->dt_size = dt_size;
+    /* Reserve space for dtb */
+    dt_base = (loadaddr + bios_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
+
+    dt_size = ppce500_prep_device_tree(args, params, dt_base,
+                                       initrd_base, initrd_size,
+                                       kernel_base, kernel_size);
+    if (dt_size < 0) {
+        fprintf(stderr, "couldn't load device tree\n");
+        exit(1);
     }
+    assert(dt_size < DTB_MAX_SIZE);
+
+    boot_info = env->load_info;
+    boot_info->entry = bios_entry;
+    boot_info->dt_base = dt_base;
+    boot_info->dt_size = dt_size;
 
     if (kvm_enabled()) {
         kvmppc_init();
-- 
1.8.1.4

Re: [Qemu-devel] [PATCH 09/10] PPC: Add u-boot firmware for e500

[Peter Maydell]

On 19 January 2014 23:44, Alexander Graf <agraf@suse.de> wrote:
> This adds a special build of u-boot tailored for the e500 platforms we
> emulate. It is based on patches that are currently in the review process,
> so there's no hash commit to refer to yet.
>
> This binary is provided purely for convenience and testing purposes.
> Eventually we want to have it compiled based on an upstream commit.

I don't think we can commit binary blobs unless they are built
from sources that we have as a git submodule mirrored on
qemu.org, right?  (In particular u-boot is GPLed so strictly
speaking your patch email is a GPL violation :-)

thanks
-- PMM

Re: [Qemu-devel] [PATCH 09/10] PPC: Add u-boot firmware for e500

[Alexander Graf]

> Am 20.01.2014 um 01:17 schrieb Peter Maydell <peter.maydell@linaro.org>:
> 
>> On 19 January 2014 23:44, Alexander Graf <agraf@suse.de> wrote:
>> This adds a special build of u-boot tailored for the e500 platforms we
>> emulate. It is based on patches that are currently in the review process,
>> so there's no hash commit to refer to yet.
>> 
>> This binary is provided purely for convenience and testing purposes.
>> Eventually we want to have it compiled based on an upstream commit.
> 
> I don't think we can commit binary blobs unless they are built
> from sources that we have as a git submodule mirrored on
> qemu.org, right?  

Yes :). That's why I added the sbove paragraph - eventually we want all the git submodule magic.

> (In particular u-boot is GPLed so strictly
> speaking your patch email is a GPL violation :-)

Is it? I do refer to the patch set required to build it, no? :)

Alex

> 
> thanks
> -- PMM

Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/10] PPC: guts: Add emulation of a few more registers

[Scott Wood]

On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
> The GUTS device is used by system software to find out about hardware
> details of the current system.
> 
> We only emulate the bare minimum to be able to reboot a guest which is
> not sufficient to make u-boot happy.
> 
> Add a few more registers to our portfolio with dummy values.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  hw/ppc/mpc8544_guts.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
> index a10abe9..af8c742 100644
> --- a/hw/ppc/mpc8544_guts.c
> +++ b/hw/ppc/mpc8544_guts.c
> @@ -25,6 +25,8 @@
>  #define MPC8544_GUTS_RSTCR_RESET      0x02
>  
>  #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
> +#define PORPLLSR_SYS_RATIO_MAX        0x3e
> +#define PORPLLSR_CPU0_RATIO_MAX       (0x3f << 16)
>  #define MPC8544_GUTS_ADDR_PORBMSR     0x04
>  #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
>  #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
> @@ -36,6 +38,7 @@
>  #define MPC8544_GUTS_ADDR_GPINDR      0x50
>  #define MPC8544_GUTS_ADDR_PMUXCR      0x60
>  #define MPC8544_GUTS_ADDR_DEVDISR     0x70
> +#define DEVDISR_DISABLED_NONE         0x0
>  #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
>  #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
>  #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
> @@ -73,6 +76,15 @@ static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
>  
>      addr &= MPC8544_GUTS_MMIO_SIZE - 1;
>      switch (addr) {
> +    case MPC8544_GUTS_ADDR_PORPLLSR:
> +        value = PORPLLSR_SYS_RATIO_MAX | PORPLLSR_CPU0_RATIO_MAX;
> +        break;
> +    case MPC8544_GUTS_ADDR_PORDEVSR:
> +        value = 0;
> +        break;
> +    case MPC8544_GUTS_ADDR_DEVDISR:
> +        value = DEVDISR_DISABLED_NONE;
> +        break;

But we don't actually have most of these devices that you're claiming
aren't disabled via DEVDISR -- and with the paravirt target, what do
these registers even mean?

I'd rather see U-Boot not touch these registers for the QEMU target,
rather than returning arbitrary values.

-Scott

Re: [Qemu-devel] [PATCH 09/10] PPC: Add u-boot firmware for e500

[Scott Wood]

On Mon, 2014-01-20 at 11:04 +0100, Alexander Graf wrote:
> 
> > Am 20.01.2014 um 01:17 schrieb Peter Maydell <peter.maydell@linaro.org>:
> > 
> >> On 19 January 2014 23:44, Alexander Graf <agraf@suse.de> wrote:
> >> This adds a special build of u-boot tailored for the e500 platforms we
> >> emulate. It is based on patches that are currently in the review process,
> >> so there's no hash commit to refer to yet.
> >> 
> >> This binary is provided purely for convenience and testing purposes.
> >> Eventually we want to have it compiled based on an upstream commit.
> > 
> > I don't think we can commit binary blobs unless they are built
> > from sources that we have as a git submodule mirrored on
> > qemu.org, right?  
> 
> Yes :). That's why I added the sbove paragraph - eventually we want all the git submodule magic.
> 
> > (In particular u-boot is GPLed so strictly
> > speaking your patch email is a GPL violation :-)
> 
> Is it? I do refer to the patch set required to build it, no? :)

While it's not hard to find the patches, you didn't actually link to
them...

-Scott

Re: [Qemu-devel] [Qemu-ppc] [PATCH 04/10] PPC: Add L1CFG1 SPR emulation

[Scott Wood]

On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
> In addition to the L1 data cache configuration register L1CFG0 there is
> also another one for the L1 instruction cache called L1CFG1.
> 
> Emulate that one with the same values as the data one.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  target-ppc/cpu.h            | 1 +
>  target-ppc/translate_init.c | 8 +++++++-
>  2 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 1289e13..15abad4 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -1367,6 +1367,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
>  #define SPR_Exxx_BBEAR        (0x201)
>  #define SPR_Exxx_BBTAR        (0x202)
>  #define SPR_Exxx_L1CFG0       (0x203)
> +#define SPR_Exxx_L1CFG1       (0x204)
>  #define SPR_Exxx_NPIDR        (0x205)
>  #define SPR_ATBL              (0x20E)
>  #define SPR_ATBU              (0x20F)
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 37a0ed2..403ce7a 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -4437,6 +4437,8 @@ static void init_proc_e500 (CPUPPCState *env, int version)
>      uint64_t ivpr_mask = 0xFFFF0000ULL;
>      uint32_t l1cfg0 = 0x3800  /* 8 ways */
>                      | 0x0020; /* 32 kb */
> +    uint32_t l1cfg1 = 0x3800  /* 8 ways */
> +                    | 0x0020; /* 32 kb */
>  #if !defined(CONFIG_USER_ONLY)
>      int i;
>  #endif
> @@ -4505,6 +4507,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
>          env->dcache_line_size = 64;
>          env->icache_line_size = 64;
>          l1cfg0 |= 0x1000000; /* 64 byte cache block size */
> +        l1cfg1 |= 0x1000000; /* 64 byte cache block size */
>          break;
>      default:
>          cpu_abort(env, "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]);
> @@ -4555,7 +4558,10 @@ static void init_proc_e500 (CPUPPCState *env, int version)
>                   SPR_NOACCESS, SPR_NOACCESS,
>                   &spr_read_generic, &spr_write_generic,
>                   l1cfg0);
> -    /* XXX : not implemented */
> +    spr_register(env, SPR_Exxx_L1CFG1, "L1CFG1",
> +                 SPR_NOACCESS, SPR_NOACCESS,
> +                 &spr_read_generic, &spr_write_generic,
> +                 l1cfg1);

LICFGn should be read-only.

-Scott

Re: [Qemu-devel] [PATCH 10/10] PPC: e500: Move to u-boot as firmware

[Scott Wood]

On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
> Almost all platforms QEMU emulates have some sort of firmware they can load
> to expose a guest environment that closely resembles the way it would look
> like on real hardware.
> 
> This patch introduces such a firmware on our e500 platforms. U-boot is the
> default firmware for most of these systems and as such our preferred choice.
> 
> For now, it is able to expose the same functionality to the user as the direct
> -kernel option was, just that it prints some nice messages beforehand.
> 
> However, if you abort the boot (press any key) or boot without -kernel you
> are actually able to modify the boot environment, execute a networked boot
> through the e1000 emulation and execute u-boot payloads.

Have you removed support for loading the kernel directly?  I thought you
said you were only going to load U-Boot in the absence of -kernel.
Given the absence of runtime services, and the presence of a
standardized OS entry mechanism (ePAPR), inserting firmware into the
process seems like a niche use case rather than something that should be
the default, much less mandatory.

> +    /* Load u-boot (ELF) */
> +    if (bios_name == NULL) {
> +        bios_name = "u-boot.e500";
> +    }
> +    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> +
> +    bios_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL,
> +                         1, ELF_MACHINE, 0);
> +    if (bios_size < 0) {
> +        /*
> +         * Hrm. No ELF image? Try a uImage, maybe someone is giving us an
> +         * ePAPR compliant kernel
> +         */

ePAPR specifies ELF, not uImage (though QEMU does currently support
ePAPR-ish loading of uImages, as U-Boot does) -- and you still seem to
be trying to load firmware here, not a kernel.

-Scott

Re: [Qemu-devel] [PATCH 10/10] PPC: e500: Move to u-boot as firmware

[Alexander Graf]

On 23.01.2014, at 01:23, Scott Wood <scottwood@freescale.com> wrote:

> On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
>> Almost all platforms QEMU emulates have some sort of firmware they can load
>> to expose a guest environment that closely resembles the way it would look
>> like on real hardware.
>> 
>> This patch introduces such a firmware on our e500 platforms. U-boot is the
>> default firmware for most of these systems and as such our preferred choice.
>> 
>> For now, it is able to expose the same functionality to the user as the direct
>> -kernel option was, just that it prints some nice messages beforehand.
>> 
>> However, if you abort the boot (press any key) or boot without -kernel you
>> are actually able to modify the boot environment, execute a networked boot
>> through the e1000 emulation and execute u-boot payloads.
> 
> Have you removed support for loading the kernel directly?  I thought you
> said you were only going to load U-Boot in the absence of -kernel.
> Given the absence of runtime services, and the presence of a
> standardized OS entry mechanism (ePAPR), inserting firmware into the
> process seems like a niche use case rather than something that should be
> the default, much less mandatory.

It's definitely not mandatory, but it makes things consistent. I'm not sure it's the better approach, but I figured we should definitely be able to go through the full u-boot cycle before we enter the guest kernel.

> 
>> +    /* Load u-boot (ELF) */
>> +    if (bios_name == NULL) {
>> +        bios_name = "u-boot.e500";
>> +    }
>> +    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
>> +
>> +    bios_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL,
>> +                         1, ELF_MACHINE, 0);
>> +    if (bios_size < 0) {
>> +        /*
>> +         * Hrm. No ELF image? Try a uImage, maybe someone is giving us an
>> +         * ePAPR compliant kernel
>> +         */
> 
> ePAPR specifies ELF, not uImage (though QEMU does currently support
> ePAPR-ish loading of uImages, as U-Boot does) -- and you still seem to
> be trying to load firmware here, not a kernel.

Hrm. How do we load an ELF image when we have non-0 mapped memory? In fact, I'm wondering the same on uImages now that I think of it :).

So what this code does is it treats the "-bios" parameter the same as we used to treat -kernel, just in reverse probe order. So we check if -bios is an ELF image, if so, load it. If not, we load it as uImage and run it.

That means if you do -bios uImage you get a direct kernel boot, the same way we used to with -kernel before this patch set.

If we really want to make firmware only pop up when no -kernel is given (again, I'm not decided on that one yet), all we need to do is add this piece of code before the bios loader:

  if (args->kernel_filename) {
      /* Treat a -kernel passed kernel as firmware. This is possible because we don't have runtime services. */
      bios_name = args->kernel_filename;
  }

Then if we ever want to support both, all we need to do is replace the above piece of code with something that checks for a machine option on whether we want to skip firmware or not.


Alex

Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/10] PPC: guts: Add emulation of a few more registers

[Alexander Graf]

On 23.01.2014, at 01:08, Scott Wood <scottwood@freescale.com> wrote:

> On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
>> The GUTS device is used by system software to find out about hardware
>> details of the current system.
>> 
>> We only emulate the bare minimum to be able to reboot a guest which is
>> not sufficient to make u-boot happy.
>> 
>> Add a few more registers to our portfolio with dummy values.
>> 
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> ---
>> hw/ppc/mpc8544_guts.c | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>> 
>> diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
>> index a10abe9..af8c742 100644
>> --- a/hw/ppc/mpc8544_guts.c
>> +++ b/hw/ppc/mpc8544_guts.c
>> @@ -25,6 +25,8 @@
>> #define MPC8544_GUTS_RSTCR_RESET      0x02
>> 
>> #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
>> +#define PORPLLSR_SYS_RATIO_MAX        0x3e
>> +#define PORPLLSR_CPU0_RATIO_MAX       (0x3f << 16)
>> #define MPC8544_GUTS_ADDR_PORBMSR     0x04
>> #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
>> #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
>> @@ -36,6 +38,7 @@
>> #define MPC8544_GUTS_ADDR_GPINDR      0x50
>> #define MPC8544_GUTS_ADDR_PMUXCR      0x60
>> #define MPC8544_GUTS_ADDR_DEVDISR     0x70
>> +#define DEVDISR_DISABLED_NONE         0x0
>> #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
>> #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
>> #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
>> @@ -73,6 +76,15 @@ static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
>> 
>>     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
>>     switch (addr) {
>> +    case MPC8544_GUTS_ADDR_PORPLLSR:
>> +        value = PORPLLSR_SYS_RATIO_MAX | PORPLLSR_CPU0_RATIO_MAX;
>> +        break;
>> +    case MPC8544_GUTS_ADDR_PORDEVSR:
>> +        value = 0;
>> +        break;
>> +    case MPC8544_GUTS_ADDR_DEVDISR:
>> +        value = DEVDISR_DISABLED_NONE;
>> +        break;
> 
> But we don't actually have most of these devices that you're claiming
> aren't disabled via DEVDISR -- and with the paravirt target, what do
> these registers even mean?

For PORDEVSR and DEVDISR I agree - I'll just remove the code in u-boot that accesses them. It's all in board code anyway.

For PORPLLSR things are more complicated. I'm not really a big fan of touching speed.c and adding complicated and hard to test preprocessor statements. So how about we leave that one in?

Alex

> 
> I'd rather see U-Boot not touch these registers for the QEMU target,
> rather than returning arbitrary values.
> 
> -Scott

Re: [Qemu-devel] [Qemu-ppc] [PATCH 07/10] PPC: guts: Add emulation of a few more registers

[Scott Wood]

On Thu, 2014-01-23 at 12:34 +0100, Alexander Graf wrote:
> On 23.01.2014, at 01:08, Scott Wood <scottwood@freescale.com> wrote:
> 
> > On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
> >> The GUTS device is used by system software to find out about hardware
> >> details of the current system.
> >> 
> >> We only emulate the bare minimum to be able to reboot a guest which is
> >> not sufficient to make u-boot happy.
> >> 
> >> Add a few more registers to our portfolio with dummy values.
> >> 
> >> Signed-off-by: Alexander Graf <agraf@suse.de>
> >> ---
> >> hw/ppc/mpc8544_guts.c | 12 ++++++++++++
> >> 1 file changed, 12 insertions(+)
> >> 
> >> diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
> >> index a10abe9..af8c742 100644
> >> --- a/hw/ppc/mpc8544_guts.c
> >> +++ b/hw/ppc/mpc8544_guts.c
> >> @@ -25,6 +25,8 @@
> >> #define MPC8544_GUTS_RSTCR_RESET      0x02
> >> 
> >> #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
> >> +#define PORPLLSR_SYS_RATIO_MAX        0x3e
> >> +#define PORPLLSR_CPU0_RATIO_MAX       (0x3f << 16)
> >> #define MPC8544_GUTS_ADDR_PORBMSR     0x04
> >> #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
> >> #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
> >> @@ -36,6 +38,7 @@
> >> #define MPC8544_GUTS_ADDR_GPINDR      0x50
> >> #define MPC8544_GUTS_ADDR_PMUXCR      0x60
> >> #define MPC8544_GUTS_ADDR_DEVDISR     0x70
> >> +#define DEVDISR_DISABLED_NONE         0x0
> >> #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
> >> #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
> >> #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
> >> @@ -73,6 +76,15 @@ static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
> >> 
> >>     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
> >>     switch (addr) {
> >> +    case MPC8544_GUTS_ADDR_PORPLLSR:
> >> +        value = PORPLLSR_SYS_RATIO_MAX | PORPLLSR_CPU0_RATIO_MAX;
> >> +        break;
> >> +    case MPC8544_GUTS_ADDR_PORDEVSR:
> >> +        value = 0;
> >> +        break;
> >> +    case MPC8544_GUTS_ADDR_DEVDISR:
> >> +        value = DEVDISR_DISABLED_NONE;
> >> +        break;
> > 
> > But we don't actually have most of these devices that you're claiming
> > aren't disabled via DEVDISR -- and with the paravirt target, what do
> > these registers even mean?
> 
> For PORDEVSR and DEVDISR I agree - I'll just remove the code in u-boot
> that accesses them. It's all in board code anyway.
> 
> For PORPLLSR things are more complicated. I'm not really a big fan of
> touching speed.c and adding complicated and hard to test preprocessor
> statements. So how about we leave that one in?

I was thinking we could avoid the speed.c code entirely, along with
anything else that touches such things.

-Scott

Re: [Qemu-devel] [PATCH 10/10] PPC: e500: Move to u-boot as firmware

[Scott Wood]

On Thu, 2014-01-23 at 11:40 +0100, Alexander Graf wrote:
> On 23.01.2014, at 01:23, Scott Wood <scottwood@freescale.com> wrote:
> 
> > On Mon, 2014-01-20 at 00:44 +0100, Alexander Graf wrote:
> >> Almost all platforms QEMU emulates have some sort of firmware they can load
> >> to expose a guest environment that closely resembles the way it would look
> >> like on real hardware.
> >> 
> >> This patch introduces such a firmware on our e500 platforms. U-boot is the
> >> default firmware for most of these systems and as such our preferred choice.
> >> 
> >> For now, it is able to expose the same functionality to the user as the direct
> >> -kernel option was, just that it prints some nice messages beforehand.
> >> 
> >> However, if you abort the boot (press any key) or boot without -kernel you
> >> are actually able to modify the boot environment, execute a networked boot
> >> through the e1000 emulation and execute u-boot payloads.
> > 
> > Have you removed support for loading the kernel directly?  I thought you
> > said you were only going to load U-Boot in the absence of -kernel.
> > Given the absence of runtime services, and the presence of a
> > standardized OS entry mechanism (ePAPR), inserting firmware into the
> > process seems like a niche use case rather than something that should be
> > the default, much less mandatory.
> 
> It's definitely not mandatory, but it makes things consistent. I'm not
> sure it's the better approach, but I figured we should definitely be
> able to go through the full u-boot cycle before we enter the guest
> kernel.

Able to, sure, but it should be optional.  As you noted on our call,
supporting U-Boot requires KVM modifications, so requiring U-Boot would
break old host kernels.  Plus, we'd lose ePAPR-ish ELF support, add at
least one second to boot time, and add complexity to the system (another
thing to possibly go wrong).

> >> +    /* Load u-boot (ELF) */
> >> +    if (bios_name == NULL) {
> >> +        bios_name = "u-boot.e500";
> >> +    }
> >> +    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> >> +
> >> +    bios_size = load_elf(filename, NULL, NULL, &bios_entry, &loadaddr, NULL,
> >> +                         1, ELF_MACHINE, 0);
> >> +    if (bios_size < 0) {
> >> +        /*
> >> +         * Hrm. No ELF image? Try a uImage, maybe someone is giving us an
> >> +         * ePAPR compliant kernel
> >> +         */
> > 
> > ePAPR specifies ELF, not uImage (though QEMU does currently support
> > ePAPR-ish loading of uImages, as U-Boot does) -- and you still seem to
> > be trying to load firmware here, not a kernel.
> 
> Hrm. How do we load an ELF image when we have non-0 mapped memory? In
> fact, I'm wondering the same on uImages now that I think of it :).

Oh right, for mainline the answer is "we don't" -- that's currently only
in the SDK (and there, only for uImage).

But if you mean conceptually how would you do it, either you'd have the
image contain the proper load address for where memory is, or consider
it an offset into the beginning of RAM, or override it somehow.

> So what this code does is it treats the "-bios" parameter the same as
> we used to treat -kernel, just in reverse probe order. So we check if
> -bios is an ELF image, if so, load it. If not, we load it as uImage and
> run it.

OK, but the comment should be fixed.  Either the ELF or the uImage could
be an ePAPR-ish OS, and to be properly ePAPR compliant it should be ELF.

> That means if you do -bios uImage you get a direct kernel boot, the
> same way we used to with -kernel before this patch set.

Oh, I thought what you said on the call was that firmware would be used
when either -kernel is absent or -bios is specified.

The main issue with "-bios uImage", besides semantic awkwardness, is
that existing QEMU invocations will break with existing kernels when
used with newer QEMU versions.

-Scott