From: "Tian, Kevin" <kevin.tian@intel.com>
To: Jan Beulich <JBeulich@suse.com>, Roger Pau Monne <roger.pau@citrix.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v2 3/4] x86/vtd: introduce a PVH implementation of iommu_inclusive_mapping
Date: Mon, 28 Aug 2017 06:14:45 +0000 [thread overview]
Message-ID: <AADFC41AFE54684AB9EE6CBC0274A5D190D93EB5@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <599D5680020000780017258F@prv-mh.provo.novell.com>
> From: Jan Beulich [mailto:JBeulich@suse.com]
> Sent: Wednesday, August 23, 2017 4:19 PM
> To: Roger Pau Monne <roger.pau@citrix.com>
> Cc: Tian, Kevin <kevin.tian@intel.com>; xen-devel@lists.xenproject.org
> Subject: Re: [Xen-devel] [PATCH v2 3/4] x86/vtd: introduce a PVH
> implementation of iommu_inclusive_mapping
>
> >>> On 22.08.17 at 16:01, <roger.pau@citrix.com> wrote:
> > On Tue, Aug 22, 2017 at 06:31:27AM -0600, Jan Beulich wrote:
> >> >>> On 11.08.17 at 18:43, <roger.pau@citrix.com> wrote:
> >> > On certain Intel systems, as far as I can tell almost all pre-Haswell ones,
> >> > trying to boot a PVH Dom0 will freeze the box completely, up to the
> point that
> >> > not even the watchdog works. The freeze happens exactly when
> enabling the DMA
> >> > remapping in the IOMMU, the last line seen is:
> >> >
> >> > (XEN) [VT-D]iommu_enable_translation: iommu->reg =
> ffff82c00021b000
> >> >
> >> > In order to workaround this (which seems to be a lack of proper RMRR
> entries,
> >> > plus the IOMMU being unable to generate faults and freezing the
> entire system)
> >> > add a PVH specific implementation of iommu_inclusive_mapping, that
> maps
> >> > non-RAM, non-unusable regions into Dom0 p2m. Note that care is
> taken to not map
> >> > device MMIO regions that Xen is emulating, like the local APIC or the IO
> APIC.
> >> >
> >> > Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
> >>
> >> I don't mean to object to the patch, but it certainly would be helpful
> >> to understand the behavior a little better, in particular also to
> >> perhaps be able to derive what RMRRs are missing (which could
> >> then be added via command line option instead of this all-or-norhing
> >> approach). Kevin, could you perhaps help here?
> >
> > I tied that, but since the system freezes completely I have no idea
> > what's missing. It's quite clear to me that it's related to the IOMMU
> > and it's inability to properly generate a fault, but further than that
> > I have no other clue.
>
> Hence my request for Kevin to help (perhaps indirectly by pulling
> in other Intel folks). Someone being able to check what the chipset
> actually does or being able to observe what's going on in a logic
> analyzer should be able to explain the observed behavior.
>
We don't have logic analyzer specifically to examine VTd, but yes
we can help have a try whether it's reproducible in our side and
then do some analysis.
what's the hardware configuration?
Thanks
Kevin
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next prev parent reply other threads:[~2017-08-28 6:14 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-11 16:43 [PATCH v2 0/4] x86/pvh: implement iommu_inclusive_mapping for PVH Dom0 Roger Pau Monne
2017-08-11 16:43 ` [PATCH v2 1/4] x86/dom0: prevent access to MMCFG areas " Roger Pau Monne
2017-08-17 3:12 ` Tian, Kevin
2017-08-17 9:32 ` Roger Pau Monne
2017-08-28 6:04 ` Tian, Kevin
2017-08-22 12:26 ` Jan Beulich
2017-08-22 13:54 ` Roger Pau Monne
2017-08-23 8:16 ` Jan Beulich
2017-08-25 12:15 ` Roger Pau Monne
2017-08-25 12:25 ` Jan Beulich
2017-08-25 13:58 ` Roger Pau Monne
2017-08-28 6:18 ` Tian, Kevin
2017-08-29 7:33 ` Roger Pau Monne
2017-08-31 7:32 ` Chao Gao
2017-08-31 8:53 ` Roger Pau Monne
2017-08-31 9:03 ` Roger Pau Monne
2017-08-31 8:45 ` Chao Gao
2017-08-31 10:09 ` Roger Pau Monne
2017-09-04 6:25 ` Chao Gao
2017-09-04 9:00 ` Roger Pau Monné
2017-09-04 9:26 ` Roger Pau Monné
2017-09-04 8:52 ` Chao Gao
2017-09-04 15:06 ` Roger Pau Monné
2017-09-04 15:19 ` Roger Pau Monné
2017-09-04 15:39 ` Jan Beulich
2017-08-11 16:43 ` [PATCH v2 2/4] x86/dom0: prevent PVH Dom0 from mapping read-only the IO APIC area Roger Pau Monne
2017-08-17 3:12 ` Tian, Kevin
2017-08-17 9:35 ` Roger Pau Monne
2017-08-28 6:07 ` Tian, Kevin
2017-08-22 12:28 ` Jan Beulich
2017-08-11 16:43 ` [PATCH v2 3/4] x86/vtd: introduce a PVH implementation of iommu_inclusive_mapping Roger Pau Monne
2017-08-17 3:28 ` Tian, Kevin
2017-08-17 9:39 ` Roger Pau Monne
2017-08-28 6:13 ` Tian, Kevin
2017-08-22 12:31 ` Jan Beulich
2017-08-22 14:01 ` Roger Pau Monne
2017-08-23 8:18 ` Jan Beulich
2017-08-28 6:14 ` Tian, Kevin [this message]
2017-08-29 7:39 ` Roger Pau Monne
2017-08-11 16:43 ` [PATCH v2 4/4] x86/dom0: re-order DMA remapping enabling for PVH Dom0 Roger Pau Monne
2017-08-22 12:37 ` Jan Beulich
2017-08-22 14:05 ` Roger Pau Monne
2017-08-23 8:21 ` Jan Beulich
2017-08-17 3:10 ` [PATCH v2 0/4] x86/pvh: implement iommu_inclusive_mapping " Tian, Kevin
2017-08-17 9:28 ` Roger Pau Monne
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