merge two insts into one in a time sensitive routing

merge two insts into one in a time sensitive routing

[Ray Will]

The following two lines should be merged into one inst. It is the tlb
refill handler, quite time sensitive.
569         uasm_i_lui(p, tmp, PM_HUGE_MASK >> 16);
570         uasm_i_ori(p, tmp, tmp, PM_HUGE_MASK & 0xffff);

Merged to
 uasm_i_lui(p, tmp, ((PM_HUGE_MASK & 0xffff) | (PM_HUGE_MASK >> 16));


/***********************   arch/mips/mm/tlbex.c    ****************************/
560
561 static __cpuinit void build_huge_tlb_write_entry(u32 **p,
562                                                  struct uasm_label **l,
563                                                  struct uasm_reloc **r,
564                                                  unsigned int tmp,
565                                                  enum tlb_write_entry wmode,
566                                                  int restore_scratch)
567 {
568         /* Set huge page tlb entry size */
569         uasm_i_lui(p, tmp, PM_HUGE_MASK >> 16);
570         uasm_i_ori(p, tmp, tmp, PM_HUGE_MASK & 0xffff);
571         uasm_i_mtc0(p, tmp, C0_PAGEMASK);
572
573         build_tlb_write_entry(p, l, r, wmode);
574
575         build_restore_pagemask(p, r, tmp, label_leave, restore_scratch);
576 }
577

complete kernel code:

http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/mips/mm/tlbex.c;h=083d3412d0bccc7744ec151cd493de614d0375b8;hb=c723fdab8aa728dc2bf0da6a0de8bb9c3f588d84#l1294

Re: merge two insts into one in a time sensitive routing

[Ralf Baechle]

On Tue, Jan 25, 2011 at 05:04:01PM +0800, Ray Will wrote:

> The following two lines should be merged into one inst. It is the tlb
> refill handler, quite time sensitive.
> 569         uasm_i_lui(p, tmp, PM_HUGE_MASK >> 16);
> 570         uasm_i_ori(p, tmp, tmp, PM_HUGE_MASK & 0xffff);
> 
> Merged to
>  uasm_i_lui(p, tmp, ((PM_HUGE_MASK & 0xffff) | (PM_HUGE_MASK >> 16));

With 4K pages (=> 1M huge pages) we'd want the value 0x001fe000 to be
loaded.  Your change results in in a LUI $tmp, 0xe01f instruction being
generated and that's an illegal value for the c0_pagemask register so
the operation is now architecturally undefined.  Similar for other
page sizes.

All possible values for PM_HUGE_MASK will have bits set in the upper and
lower 16 halves of the register so there will always two instructions be
required to load the pagemask value.

  Ralf