Re: [Qemu-devel] [PATCH v3] Softfloat: Add support to softfloat to return floatxx_default_nan when, the corresponding target status flag is set.

[Peter Maydell <peter.maydell@linaro.org>]

On 9 February 2011 18:35, Aurelien Jarno <aurelien@aurel32.net> wrote:
> On Tue, Feb 08, 2011 at 08:06:57PM +0000, Peter Maydell wrote:
>> On 8 February 2011 18:53, Peter Maydell <peter.maydell@linaro.org> wrote:
>> Also, at the moment the commonNaNToFloatX(floatYToCommonNaN())
>> idiom doesn't do anything to avoid signaling NaNs showing up in
>> the output. On ARM this got fixed by having the helper.c wrappers
>> call float*_maybe_silence_nan() but maybe we should do it
>> in the generic softfloat code?
>>
>> ie instead of:
>>
>>     if ( mantissa )
>>         return make_float32(
>>             ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
>>     else
>>         return float32_default_nan;
>>
>> do:
>>    float32 r = make_float32(
>>             ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
>
> On an unrelated note, if we changes in this function, it might be a good
> idea to use mantissa instead of a.high>>41. It's the same, but probably
> easier to read.

Mmm, I noticed that (although I don't think I fixed it in my other
patchset.)

>>    if (!mantissa) {
>>       /* target specific, !SNAN_BIT_IS_ONE targets probably
>>        * just set the QNAN bit (true for ARM, SPARC)
>>        * others likely return the default NaN ?
>>        */
>>    } else {
>>       return float32_maybe_silence_nan(r);
>>    }
>>
>> I'm pretty sure the existing code is wrong for SPARC, for instance,
>> which is supposed to return a float32 qNaN with just the QNAN bit set
>> if it is presented with a float64 signalling NaN all of whose non-zero
>> mantissa bits are at the bottom end and don't make it into the float32.
>> (ARM dodges a bullet here because as it happens our float32
>> default_nan has only the QNAN bit set, but SPARC's has all the
>> mantissa bits set.)
>>
>> Opinions?
>>
>
> It makes sense. I will play a bit with a real MIPS machine to see how it
> behaves and come back with my results.

Thanks. (The patchset I sent skips this issue and just treats float16
the same way target-arm already treats float32 etc, ie does the
silencing in the helper wrapper function, because it seemed more
useful to fix that without bogging it down in whether we want to
do NaN handling in the softfloat core.)

-- PMM