[PATCH V2 3/3] sdhci: support H/W clock gating in Marvell PXA driver

[PATCH V2 3/3] sdhci: support H/W clock gating in Marvell PXA driver

[Philip Rakity]

Define callback (platform_hw_clk_gate) that is called when H/W clock gating
is defined. The adaptation layer is responsible for enabling hw clock
gating by:

a) setting mmc->caps |= MMC_CAP_HW_CLOCK_GATING to enable h/w gating
b) defining the callback.

This code tested in the Marvell Linux.

Signed-off-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Mark F. Brown <markb@marvell.com>
---
 drivers/mmc/host/sdhci.c |    6 ++++++
 drivers/mmc/host/sdhci.h |    1 +
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 8a74fcb..c2e7c9e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1188,6 +1188,12 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 	if (host->ops->platform_send_init_74_clocks)
 		host->ops->platform_send_init_74_clocks(host, ios->power_mode);
 
+#ifdef CONFIG_MMC_CLKGATE
+	if ((mmc->caps & MMC_CAP_HW_CLOCK_GATING)
+		&& host->ops->platform_hw_clk_gate)
+			host->ops->platform_hw_clk_gate(host);
+#endif
+
 	/*
 	 * If your platform has 8-bit width support but is not a v3 controller,
 	 * or if it requires special setup code, you should implement that in
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 1efe7dc..26a8c09 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -221,6 +221,7 @@ struct sdhci_ops {
 	void (*platform_send_init_74_clocks)(struct sdhci_host *host,
 					     u8 power_mode);
 	unsigned int    (*get_ro)(struct sdhci_host *host);
+	void		(*platform_hw_clk_gate)(struct sdhci_host *host);
 };
 
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
-- 
1.6.0.4

Re: [PATCH V2 3/3] sdhci: support H/W clock gating in Marvell PXA driver

[Kyungmin Park]

Hi,

what's the difference between previous 2/3 patch?

Thank you,
Kyungmin Park

On Wed, Dec 8, 2010 at 2:56 AM, Philip Rakity <prakity@marvell.com> wrote:
>
> Define callback (platform_hw_clk_gate) that is called when H/W clock gating
> is defined. The adaptation layer is responsible for enabling hw clock
> gating by:
>
> a) setting mmc->caps |= MMC_CAP_HW_CLOCK_GATING to enable h/w gating
> b) defining the callback.
>
> This code tested in the Marvell Linux.
>
> Signed-off-by: Philip Rakity <prakity@marvell.com>
> Signed-off-by: Mark F. Brown <markb@marvell.com>
> ---
>  drivers/mmc/host/sdhci.c |    6 ++++++
>  drivers/mmc/host/sdhci.h |    1 +
>  2 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 8a74fcb..c2e7c9e 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1188,6 +1188,12 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
>        if (host->ops->platform_send_init_74_clocks)
>                host->ops->platform_send_init_74_clocks(host, ios->power_mode);
>
> +#ifdef CONFIG_MMC_CLKGATE
> +       if ((mmc->caps & MMC_CAP_HW_CLOCK_GATING)
> +               && host->ops->platform_hw_clk_gate)
> +                       host->ops->platform_hw_clk_gate(host);
> +#endif
> +
>        /*
>         * If your platform has 8-bit width support but is not a v3 controller,
>         * or if it requires special setup code, you should implement that in
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 1efe7dc..26a8c09 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -221,6 +221,7 @@ struct sdhci_ops {
>        void (*platform_send_init_74_clocks)(struct sdhci_host *host,
>                                             u8 power_mode);
>        unsigned int    (*get_ro)(struct sdhci_host *host);
> +       void            (*platform_hw_clk_gate)(struct sdhci_host *host);
>  };
>
>  #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> --
> 1.6.0.4
>
> --
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