* [Qemu-devel] [PATCH 11/15] pxa2xx: fix SSSR TFN logic
@ 2010-09-10 21:00 Blue Swirl
0 siblings, 0 replies; 2+ messages in thread
From: Blue Swirl @ 2010-09-10 21:00 UTC (permalink / raw)
To: qemu-devel
Fix SSSR TFN logic: TX FIFO is never filled, so it is always in
underrun condition if SSP is enabled.
This also avoids a gcc warning with -Wtype-limits.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
hw/pxa2xx.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index faa3d95..88f61c0 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -636,6 +636,7 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
{
s->sssr &= ~(0xf << 12); /* Clear RFL */
s->sssr &= ~(0xf << 8); /* Clear TFL */
+ s->sssr &= ~SSSR_TFS;
s->sssr &= ~SSSR_TNF;
if (s->enable) {
s->sssr |= ((s->rx_level - 1) & 0xf) << 12;
@@ -643,14 +644,13 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
s->sssr |= SSSR_RFS;
else
s->sssr &= ~SSSR_RFS;
- if (0 <= SSCR1_TFT(s->sscr[1]))
- s->sssr |= SSSR_TFS;
- else
- s->sssr &= ~SSSR_TFS;
if (s->rx_level)
s->sssr |= SSSR_RNE;
else
s->sssr &= ~SSSR_RNE;
+ /* TX FIFO is never filled, so it is always in underrun
+ condition if SSP is enabled */
+ s->sssr |= SSSR_TFS;
s->sssr |= SSSR_TNF;
}
--
1.6.2.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [Qemu-devel] [PATCH 11/15] pxa2xx: fix SSSR TFN logic
@ 2010-09-05 15:06 Blue Swirl
0 siblings, 0 replies; 2+ messages in thread
From: Blue Swirl @ 2010-09-05 15:06 UTC (permalink / raw)
To: qemu-devel
Fix SSSR TFN logic: TX FIFO is never filled, so it is always in
underrun condition if SSP is enabled.
This also fixes a gcc warning with -Wtype-limits.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
hw/pxa2xx.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index faa3d95..88f61c0 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -636,6 +636,7 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
{
s->sssr &= ~(0xf << 12); /* Clear RFL */
s->sssr &= ~(0xf << 8); /* Clear TFL */
+ s->sssr &= ~SSSR_TFS;
s->sssr &= ~SSSR_TNF;
if (s->enable) {
s->sssr |= ((s->rx_level - 1) & 0xf) << 12;
@@ -643,14 +644,13 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
s->sssr |= SSSR_RFS;
else
s->sssr &= ~SSSR_RFS;
- if (0 <= SSCR1_TFT(s->sscr[1]))
- s->sssr |= SSSR_TFS;
- else
- s->sssr &= ~SSSR_TFS;
if (s->rx_level)
s->sssr |= SSSR_RNE;
else
s->sssr &= ~SSSR_RNE;
+ /* TX FIFO is never filled, so it is always in underrun
+ condition if SSP is enabled */
+ s->sssr |= SSSR_TFS;
s->sssr |= SSSR_TNF;
}
--
1.6.2.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
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2010-09-05 15:06 Blue Swirl
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