From: "David Laight" <David.Laight@ACULAB.COM>
To: "Ira W. Snyder" <iws@ovro.caltech.edu>,
"Felix Radensky" <felix@embedded-sol.com>
Cc: Scott Wood <scottwood@freescale.com>, linuxppc-dev@ozlabs.org
Subject: RE: FSL DMA engine transfer to PCI memory
Date: Tue, 25 Jan 2011 16:34:49 -0000 [thread overview]
Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6D8AC29@saturn3.aculab.com> (raw)
In-Reply-To: <20110125162946.GA13438@ovro.caltech.edu>
=20
> > >>>> custom board based on P2020 running linux-2.6.35. The PCI
> > >>>> device is Altera FPGA, connected directly to SoC PCI-E
controller.
=20
> This sounds like your FPGA doesn't handle burst mode accesses=20
> correctly.
> A logic analyzer will help you prove it.
He is doing PCIe, not PCI.
A PCIe transfers is an HDLC packet pair, one containing the
request, the other the response.
In order to get any significant throughput the hdlc packet(s)
have to contain all the data (eg 128 bytes).
On the ppc we used that means you have to use the dma
controller inside the PCIe interface block.
The generic dma controller can't even generate 64bit
cycles into the ppc's PCIe engine.
David
next prev parent reply other threads:[~2011-01-25 16:37 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-24 21:47 FSL DMA engine transfer to PCI memory Felix Radensky
2011-01-24 22:26 ` Ira W. Snyder
2011-01-24 23:39 ` Felix Radensky
2011-01-25 0:18 ` Ira W. Snyder
2011-01-25 14:32 ` Felix Radensky
2011-01-25 16:29 ` Ira W. Snyder
2011-01-25 16:34 ` David Laight [this message]
2011-01-25 19:57 ` Scott Wood
2011-01-26 10:18 ` David Laight
2011-01-26 19:09 ` Scott Wood
2011-01-27 8:32 ` Felix Radensky
2011-01-27 16:34 ` Ira W. Snyder
2011-01-24 22:44 ` Scott Wood
2011-01-25 8:56 ` David Laight
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