From: "A.s. Dong" <aisheng.dong@nxp.com> To: Rob Herring <robh@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "dongas86@gmail.com" <dongas86@gmail.com>, dl-linux-imx <linux-imx@nxp.com>, "kernel@pengutronix.de" <kernel@pengutronix.de>, Fabio Estevam <fabio.estevam@nxp.com>, "shawnguo@kernel.org" <shawnguo@kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: RE: [PATCH V2 3/4] dt-bindings: arm: fsl: add scu binding doc Date: Thu, 21 Jun 2018 03:38:30 +0000 [thread overview] Message-ID: <AM0PR04MB4211C2A376E6C74C7C4AC37880760@AM0PR04MB4211.eurprd04.prod.outlook.com> (raw) In-Reply-To: <20180620194438.GA3494@rob-hp-laptop> Hi Rob, > -----Original Message----- > From: Rob Herring [mailto:robh@kernel.org] > Sent: Thursday, June 21, 2018 3:45 AM > To: A.s. Dong <aisheng.dong@nxp.com> > Cc: linux-arm-kernel@lists.infradead.org; dongas86@gmail.com; > kernel@pengutronix.de; shawnguo@kernel.org; Fabio Estevam > <fabio.estevam@nxp.com>; dl-linux-imx <linux-imx@nxp.com>; Mark > Rutland <mark.rutland@arm.com>; devicetree@vger.kernel.org > Subject: Re: [PATCH V2 3/4] dt-bindings: arm: fsl: add scu binding doc > > On Sun, Jun 17, 2018 at 08:49:48PM +0800, Dong Aisheng wrote: > > The System Controller Firmware (SCFW) is a low-level system function > > which runs on a dedicated Cortex-M core to provide power, clock, and > > resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > > (QM, QP), and i.MX8QX (QXP, DX). > > > > Cc: Shawn Guo <shawnguo@kernel.org> > > Cc: Sascha Hauer <kernel@pengutronix.de> > > Cc: Fabio Estevam <fabio.estevam@nxp.com> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Mark Rutland <mark.rutland@arm.com> > > Cc: devicetree@vger.kernel.org > > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> > > --- > > v1->v2: > > * remove status > > * changed to mu1 > > --- > > .../devicetree/bindings/arm/freescale/fsl,scu.txt | 38 > > ++++++++++++++++++++++ > > 1 file changed, 38 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > > > diff --git > > a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > new file mode 100644 > > index 0000000..9b7c9fe > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > @@ -0,0 +1,38 @@ > > +NXP i.MX System Controller Firmware (SCFW) > > +-------------------------------------------------------------------- > > + > > +The System Controller Firmware (SCFW) is a low-level system function > > +which runs on a dedicated Cortex-M core to provide power, clock, and > > +resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > > +(QM, QP), and i.MX8QX (QXP, DX). > > + > > +The AP communicates with the SC using a multi-ported MU module found > > +in the LSIO subsystem. The current definition of this MU module > > +provides > > +5 remote AP connections to the SC to support up to 5 execution > > +environments (TZ, HV, standard Linux, etc.). The SC side of this MU > > +module interfaces with the LSIO DSC IP bus. The SC firmware will > > +communicate with this MU using the MSI bus. > > + > > +System Controller Device Node: > > +============================= > > + > > +Required properties: > > +------------------- > > +- compatible: should be "fsl,imx8qxp-scu" or "fsl,imx8qm-scu" > > +- fsl,mu: a phandle to the Message Unit used by SCU. Should be > > + one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need > > + to make sure not use the one which is conflict with > > + other execution environments. e.g. ATF. > > Use the mailbox binding even if you don't use the mailbox subsystem. > Looks reasonable. Will change it. BTW as I said before, the current mailbox binding fixed #mbox-cells to be at least 1 which is not suitable for i.MX SCU MU as it has only one physical channel. I will cook a patch to update it to allow #mbox-cells = <0>. If any issue please let me know. Regards Dong Aisheng > > + > > +Examples: > > +-------- > > +lsio_mu1: mu@5d1c0000 { > > + compatible = "fsl,imx8qxp-mu"; > > + reg = <0x0 0x5d1c0000 0x0 0x10000>; > > + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; }; > > + > > +scu { > > + compatible = "fsl,imx8qxp-scu"; > > + fsl,mu = <&lsio_mu1>; > > +}; > > -- > > 2.7.4 > >
WARNING: multiple messages have this Message-ID (diff)
From: aisheng.dong@nxp.com (A.s. Dong) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V2 3/4] dt-bindings: arm: fsl: add scu binding doc Date: Thu, 21 Jun 2018 03:38:30 +0000 [thread overview] Message-ID: <AM0PR04MB4211C2A376E6C74C7C4AC37880760@AM0PR04MB4211.eurprd04.prod.outlook.com> (raw) In-Reply-To: <20180620194438.GA3494@rob-hp-laptop> Hi Rob, > -----Original Message----- > From: Rob Herring [mailto:robh at kernel.org] > Sent: Thursday, June 21, 2018 3:45 AM > To: A.s. Dong <aisheng.dong@nxp.com> > Cc: linux-arm-kernel at lists.infradead.org; dongas86 at gmail.com; > kernel at pengutronix.de; shawnguo at kernel.org; Fabio Estevam > <fabio.estevam@nxp.com>; dl-linux-imx <linux-imx@nxp.com>; Mark > Rutland <mark.rutland@arm.com>; devicetree at vger.kernel.org > Subject: Re: [PATCH V2 3/4] dt-bindings: arm: fsl: add scu binding doc > > On Sun, Jun 17, 2018 at 08:49:48PM +0800, Dong Aisheng wrote: > > The System Controller Firmware (SCFW) is a low-level system function > > which runs on a dedicated Cortex-M core to provide power, clock, and > > resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > > (QM, QP), and i.MX8QX (QXP, DX). > > > > Cc: Shawn Guo <shawnguo@kernel.org> > > Cc: Sascha Hauer <kernel@pengutronix.de> > > Cc: Fabio Estevam <fabio.estevam@nxp.com> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Mark Rutland <mark.rutland@arm.com> > > Cc: devicetree at vger.kernel.org > > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> > > --- > > v1->v2: > > * remove status > > * changed to mu1 > > --- > > .../devicetree/bindings/arm/freescale/fsl,scu.txt | 38 > > ++++++++++++++++++++++ > > 1 file changed, 38 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > > > diff --git > > a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > new file mode 100644 > > index 0000000..9b7c9fe > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > > @@ -0,0 +1,38 @@ > > +NXP i.MX System Controller Firmware (SCFW) > > +-------------------------------------------------------------------- > > + > > +The System Controller Firmware (SCFW) is a low-level system function > > +which runs on a dedicated Cortex-M core to provide power, clock, and > > +resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > > +(QM, QP), and i.MX8QX (QXP, DX). > > + > > +The AP communicates with the SC using a multi-ported MU module found > > +in the LSIO subsystem. The current definition of this MU module > > +provides > > +5 remote AP connections to the SC to support up to 5 execution > > +environments (TZ, HV, standard Linux, etc.). The SC side of this MU > > +module interfaces with the LSIO DSC IP bus. The SC firmware will > > +communicate with this MU using the MSI bus. > > + > > +System Controller Device Node: > > +============================= > > + > > +Required properties: > > +------------------- > > +- compatible: should be "fsl,imx8qxp-scu" or "fsl,imx8qm-scu" > > +- fsl,mu: a phandle to the Message Unit used by SCU. Should be > > + one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need > > + to make sure not use the one which is conflict with > > + other execution environments. e.g. ATF. > > Use the mailbox binding even if you don't use the mailbox subsystem. > Looks reasonable. Will change it. BTW as I said before, the current mailbox binding fixed #mbox-cells to be at least 1 which is not suitable for i.MX SCU MU as it has only one physical channel. I will cook a patch to update it to allow #mbox-cells = <0>. If any issue please let me know. Regards Dong Aisheng > > + > > +Examples: > > +-------- > > +lsio_mu1: mu at 5d1c0000 { > > + compatible = "fsl,imx8qxp-mu"; > > + reg = <0x0 0x5d1c0000 0x0 0x10000>; > > + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; }; > > + > > +scu { > > + compatible = "fsl,imx8qxp-scu"; > > + fsl,mu = <&lsio_mu1>; > > +}; > > -- > > 2.7.4 > >
next prev parent reply other threads:[~2018-06-21 3:38 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-06-17 12:49 [PATCH V2 0/4] soc: imx: add scu firmware api support Dong Aisheng 2018-06-17 12:49 ` [PATCH V2 1/4] soc: imx: add mu library functions support Dong Aisheng 2018-06-17 12:49 ` [PATCH V2 2/4] dt-bindings: arm: fsl: add mu binding doc Dong Aisheng 2018-06-17 12:49 ` Dong Aisheng 2018-06-20 19:43 ` Rob Herring 2018-06-20 19:43 ` Rob Herring 2018-06-21 7:46 ` Sascha Hauer 2018-06-21 7:46 ` Sascha Hauer 2018-06-21 17:11 ` A.s. Dong 2018-06-21 17:11 ` A.s. Dong 2018-06-21 18:08 ` Oleksij Rempel 2018-06-21 18:08 ` Oleksij Rempel 2018-06-22 3:31 ` A.s. Dong 2018-06-22 3:31 ` A.s. Dong 2018-06-22 4:59 ` Oleksij Rempel 2018-06-22 4:59 ` Oleksij Rempel 2018-06-22 5:59 ` A.s. Dong 2018-06-22 5:59 ` A.s. Dong 2018-06-22 6:48 ` Oleksij Rempel 2018-06-22 6:48 ` Oleksij Rempel 2018-06-22 8:16 ` A.s. Dong 2018-06-22 8:16 ` A.s. Dong 2018-06-22 5:49 ` Sascha Hauer 2018-06-22 5:49 ` Sascha Hauer 2018-06-22 6:04 ` A.s. Dong 2018-06-22 6:04 ` A.s. Dong 2018-06-17 12:49 ` [PATCH V2 3/4] dt-bindings: arm: fsl: add scu " Dong Aisheng 2018-06-17 12:49 ` Dong Aisheng 2018-06-20 19:44 ` Rob Herring 2018-06-20 19:44 ` Rob Herring 2018-06-21 3:38 ` A.s. Dong [this message] 2018-06-21 3:38 ` A.s. Dong 2018-06-21 7:37 ` Sascha Hauer 2018-06-21 7:37 ` Sascha Hauer 2018-06-21 12:05 ` A.s. Dong 2018-06-21 12:05 ` A.s. Dong [not found] ` <1529239789-26849-5-git-send-email-aisheng.dong@nxp.com> 2018-06-18 8:58 ` [PATCH V2 4/4] soc: imx: add SC firmware IPC and APIs Leonard Crestez
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