[U-Boot] [PATCHv6 1/6] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

[U-Boot] [PATCHv6 1/6] armv8: fsl-layerscape: add i/d-cache enable function to enable_caches

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE has turned into another EL.

Define the function mmu_setup() for fsl-layerscape to cover the weak
one.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V6:
 - no change

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 8062106..d5bcf67 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -422,15 +422,21 @@ int arch_cpu_init(void)
 	return 0;
 }
 
+void mmu_setup(void)
+{
+	final_mmu_setup();
+}
+
 /*
- * This function is called from lib/board.c.
- * It recreates MMU table in main memory. MMU and d-cache are enabled earlier.
- * There is no need to disable d-cache for this operation.
+ * This function is called from common/board_r.c.
+ * It recreates MMU table in main memory.
  */
 void enable_caches(void)
 {
-	final_mmu_setup();
+	mmu_setup();
 	__asm_invalidate_tlb_all();
+	icache_enable();
+	dcache_enable();
 }
 #endif
 
-- 
2.1.0.27.g96db324

[U-Boot] [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This framework is introduced for ARMv8 secure monitor mode firmware.
The main functions of the framework are, on EL3, verify the firmware,
load it to the secure memory and jump into it, and while it returned
to U-Boot, do some necessary setups at the 'target exception level'
that is determined by the respective secure firmware.

So far, the framework support only FIT format image, and need to define
the name of which config node should be used in 'configurations' and
the name of property for the raw secure firmware image in that config.
The FIT image should be stored in Byte accessing memory, such as NOR
Flash, or else it should be copied to main memory to use this framework.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V6:
 - Abstracted more code from PPA to this framework.
 - Introduced gd->sec_firmware to hold the load address.
 - Refactor the func sec_firmware_support_psci_version().

V5:
 - Added c file sec_firmware.c.
 - Added declaration of sec_firmware_init().
 - Renamed the func sec_firmware_validate().

V4:
 - Reordered this patch.
 - Removed the FSL PPA related items.

 arch/arm/cpu/armv8/Makefile               |   1 +
 arch/arm/cpu/armv8/sec_firmware.c         | 262 ++++++++++++++++++++++++++++++
 arch/arm/cpu/armv8/sec_firmware_asm.S     |  53 ++++++
 arch/arm/include/asm/armv8/sec_firmware.h |  18 ++
 include/asm-generic/global_data.h         |  11 ++
 5 files changed, 346 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/sec_firmware.c
 create mode 100644 arch/arm/cpu/armv8/sec_firmware_asm.S
 create mode 100644 arch/arm/include/asm/armv8/sec_firmware.h

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index bf8644c..ee9e009 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -15,6 +15,7 @@ obj-y	+= cache.o
 obj-y	+= tlb.o
 obj-y	+= transition.o
 obj-y	+= fwcall.o
+obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
 obj-$(CONFIG_S32V234) += s32v234/
diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
new file mode 100644
index 0000000..986df48
--- /dev/null
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <linux/kernel.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/types.h>
+#include <asm/macro.h>
+#include <asm/armv8/sec_firmware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void c_runtime_cpu_setup(void);
+
+static int sec_firmware_get_data(void *sec_firmware_img,
+				const void **data, size_t *size)
+{
+	void *fit_hdr;
+	int conf_node_off, fw_node_off;
+	char *conf_node_name = NULL;
+	char *desc;
+	int ret;
+
+	fit_hdr = sec_firmware_img;
+	conf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;
+
+	conf_node_off = fit_conf_get_node(fit_hdr, conf_node_name);
+	if (conf_node_off < 0) {
+		printf("SEC Firmware: %s: no such config\n", conf_node_name);
+		return -ENOENT;
+	}
+
+	fw_node_off = fit_conf_get_prop_node(fit_hdr, conf_node_off,
+			SEC_FIRMWARE_FIT_IMAGE);
+	if (fw_node_off < 0) {
+		printf("SEC Firmware: No '%s' in config\n",
+				SEC_FIRMWARE_FIT_IMAGE);
+		return -ENOLINK;
+	}
+
+	/* Verify secure firmware image */
+	if (!(fit_image_verify(fit_hdr, fw_node_off))) {
+		printf("SEC Firmware: Bad firmware image (bad CRC)\n");
+		return -EINVAL;
+	}
+
+	if (fit_image_get_data(fit_hdr, fw_node_off, data, size)) {
+		printf("SEC Firmware: Can't get %s subimage data/size",
+				SEC_FIRMWARE_FIT_IMAGE);
+		return -ENOENT;
+	}
+
+	ret = fit_get_desc(fit_hdr, fw_node_off, &desc);
+	if (ret)
+		printf("SEC Firmware: Can't get description\n");
+	else
+		printf("%s\n", desc);
+
+	return ret;
+}
+
+/*
+ * SEC Firmware FIT image parser checks if the image is in FIT
+ * format, verifies integrity of the image and calculates raw
+ * image address and size values.
+ *
+ * Returns 0 on success and a negative errno on error task fail.
+ */
+static int sec_firmware_parse_image(void *sec_firmware_img,
+					const void **raw_image_addr,
+					size_t *raw_image_size)
+{
+	int ret;
+
+	ret = sec_firmware_get_data(sec_firmware_img, raw_image_addr,
+					raw_image_size);
+	if (ret)
+		return ret;
+
+	debug("SEC Firmware: raw_image_addr = 0x%p, raw_image_size = 0x%lx\n",
+			*raw_image_addr, *raw_image_size);
+
+	return 0;
+}
+
+static int sec_firmware_copy_image(const char *title,
+			 u64 image_addr, u32 image_size, u64 sec_firmware)
+{
+	debug("%s copied to address 0x%p\n", title, (void *)sec_firmware);
+	memcpy((void *)sec_firmware, (void *)image_addr, image_size);
+	flush_dcache_range(sec_firmware, sec_firmware + image_size);
+
+	return 0;
+}
+
+/*
+ * This function will parse the SEC Firmware image, and then load it
+ * to secure memory.
+ */
+static int sec_firmware_load_image(void *sec_firmware_img)
+{
+	const void *raw_image_addr;
+	size_t raw_image_size = 0;
+	int ret;
+
+	/*
+	 * The Excetpion Level must be EL3 to load and initialize
+	 * the SEC Firmware.
+	 */
+	if (current_el() != 3) {
+		ret = -EACCES;
+		goto out;
+	}
+
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+	/*
+	 * The SEC Firmware must be stored in secure memory.
+	 * Append SEC Firmware to secure mmu table.
+	 */
+	if (!(gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED)) {
+		ret = -ENXIO;
+		goto out;
+	}
+
+	gd->sec_firmware = (gd->secure_ram & MEM_RESERVE_SECURE_ADDR_MASK) +
+			gd->arch.tlb_size;
+#else
+#error "The CONFIG_SYS_MEM_RESERVE_SECURE must be defined when enabled SEC Firmware support"
+#endif
+
+	/* Align SEC Firmware base address to 4K */
+	gd->sec_firmware = (gd->sec_firmware + 0xfff) & ~0xfff;
+	debug("SEC Firmware: Load address: 0x%llx\n",
+			gd->sec_firmware & SEC_FIRMWARE_ADDR_MASK);
+
+	ret = sec_firmware_parse_image(sec_firmware_img, &raw_image_addr,
+			&raw_image_size);
+	if (ret)
+		goto out;
+
+	/* TODO:
+	 * Check if the end addr of SEC Firmware has been extend the secure
+	 * memory.
+	 */
+
+	/* Copy the secure firmware to secure memory */
+	ret = sec_firmware_copy_image("SEC Firmware", (u64)raw_image_addr,
+			raw_image_size, gd->sec_firmware &
+			SEC_FIRMWARE_ADDR_MASK);
+	if (ret)
+		goto out;
+
+	gd->sec_firmware |= SEC_FIRMWARE_LOADED;
+	debug("SEC Firmware: Entry point: 0x%llx\n",
+			gd->sec_firmware & SEC_FIRMWARE_ADDR_MASK);
+
+	return 0;
+
+out:
+	printf("SEC Firmware: error (%d)\n", ret);
+	gd->sec_firmware = 0;
+
+	return ret;
+}
+
+static int sec_firmware_entry(u32 *eret_hold_l, u32 *eret_hold_h)
+{
+	void *entry = (void *)(gd->sec_firmware & SEC_FIRMWARE_ADDR_MASK);
+
+	return _sec_firmware_entry(entry, eret_hold_l, eret_hold_h);
+}
+
+/* Check the secure firmware FIT image */
+__weak bool sec_firmware_is_valid(void *sec_firmware_img)
+{
+	void *fit_hdr;
+
+	fit_hdr = sec_firmware_img;
+
+	if (fdt_check_header(fit_hdr)) {
+		printf("SEC Firmware: Bad firmware image (not a FIT image)\n");
+		return false;
+	}
+
+	if (!fit_check_format(fit_hdr)) {
+		printf("SEC Firmware: Bad firmware image (bad FIT header)\n");
+		return false;
+	}
+
+	return true;
+}
+
+#ifdef CONFIG_ARMV8_PSCI
+/*
+ * The PSCI_VERSION function is added from PSCI v0.2. When the PSCI
+ * v0.1 received this function, the NOT_SUPPORTED (0xffff_ffff) error
+ * number will be returned according to SMC Calling Conventions. But
+ * when getting the NOT_SUPPORTED error number, we cannot ensure if
+ * the PSCI version is v0.1 or other error occurred. So, PSCI v0.1
+ * won't be supported by this framework.
+ * And if the secure firmware isn't running, return NOT_SUPPORTED.
+ *
+ * The return value on success is PSCI version in format
+ * major[31:16]:minor[15:0].
+ */
+unsigned int sec_firmware_support_psci_version(void)
+{
+	if (gd->sec_firmware & SEC_FIRMWARE_RUNNING)
+		return _sec_firmware_support_psci_version();
+
+	return 0xffffffff;
+}
+#endif
+
+/*
+ * sec_firmware_init - Initialize the SEC Firmware
+ * @sec_firmware_img:	the SEC Firmware image address
+ * @eret_hold_l:	the address to hold exception return address low
+ * @eret_hold_h:	the address to hold exception return address high
+ */
+int sec_firmware_init(void *sec_firmware_img,
+			u32 *eret_hold_l,
+			u32 *eret_hold_h)
+{
+	int ret;
+
+	if (!sec_firmware_is_valid(sec_firmware_img))
+		return -EINVAL;
+
+	ret = sec_firmware_load_image(sec_firmware_img);
+	if (ret) {
+		printf("SEC Firmware: Failed to load image\n");
+		return ret;
+	} else if (gd->sec_firmware & SEC_FIRMWARE_LOADED) {
+		ret = sec_firmware_entry(eret_hold_l, eret_hold_h);
+		if (ret) {
+			printf("SEC Firmware: Failed to initialize\n");
+			return ret;
+		}
+	}
+
+	debug("SEC Firmware: Return from SEC Firmware: current_el = %d\n",
+			current_el());
+
+	/*
+	 * The PE will be turned into target EL when returned from
+	 * SEC Firmware.
+	 */
+	if (current_el() != SEC_FIRMWARE_TARGET_EL)
+		return -EACCES;
+
+	gd->sec_firmware |= SEC_FIRMWARE_RUNNING;
+
+	/* Set exception table and enable caches if it isn't EL3 */
+	if (current_el() != 3) {
+		c_runtime_cpu_setup();
+		enable_caches();
+	}
+
+	return 0;
+}
diff --git a/arch/arm/cpu/armv8/sec_firmware_asm.S b/arch/arm/cpu/armv8/sec_firmware_asm.S
new file mode 100644
index 0000000..7fa2290
--- /dev/null
+++ b/arch/arm/cpu/armv8/sec_firmware_asm.S
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+#include <asm/system.h>
+#include <asm/macro.h>
+
+WEAK(_sec_firmware_entry)
+	/*
+	 * x0: Secure Firmware entry point
+	 * x1: Exception return address Low
+	 * x2: Exception return address High
+	 */
+
+	/* Save stack pointer for EL2 */
+	mov	x3, sp
+	msr	sp_el2, x3
+
+	/* Set exception return address hold pointer */
+        adr	x4, 1f
+        mov	x3, x4
+#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+        rev	w3, w3
+#endif
+        str	w3, [x1]
+        lsr	x3, x4, #32
+#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+        rev	w3, w3
+#endif
+        str	w3, [x2]
+
+/* Call SEC monitor */
+        br	x0
+
+1:
+        mov	x0, #0
+        ret
+ENDPROC(_sec_firmware_entry)
+
+#ifdef CONFIG_ARMV8_PSCI
+ENTRY(_sec_firmware_support_psci_version)
+	mov	x0, 0x84000000
+	mov	x1, 0x0
+	mov	x2, 0x0
+	mov	x3, 0x0
+	smc	#0
+	ret
+ENDPROC(_sec_firmware_support_psci_version)
+#endif
diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h
new file mode 100644
index 0000000..041fd4e
--- /dev/null
+++ b/arch/arm/include/asm/armv8/sec_firmware.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __SEC_FIRMWARE_H_
+#define __SEC_FIRMWARE_H_
+
+int sec_firmware_init(void *, u32 *, u32 *);
+int _sec_firmware_entry(void *, u32 *, u32 *);
+bool sec_firmware_is_valid(void *);
+#ifdef CONFIG_ARMV8_PSCI
+unsigned int sec_firmware_support_psci_version(void);
+unsigned int _sec_firmware_support_psci_version(void);
+#endif
+
+#endif /* __SEC_FIRMWARE_H_ */
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 0abcbe4..cd69ef9 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -69,6 +69,17 @@ typedef struct global_data {
 	 */
 	phys_addr_t secure_ram;
 #endif
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#define SEC_FIRMWARE_LOADED	0x1
+#define SEC_FIRMWARE_RUNNING	0x2
+#define SEC_FIRMWARE_ADDR_MASK	(~0x3)
+	/*
+	 * Secure firmware load addr
+	 * Flags used: 0x1 secure firmware has been loaded to secure memory
+	 *             0x2 secure firmware is running
+	 */
+	phys_addr_t sec_firmware;
+#endif
 	unsigned long mon_len;	/* monitor len */
 	unsigned long irq_sp;		/* irq stack pointer */
 	unsigned long start_addr_sp;	/* start_addr_stackpointer */
-- 
2.1.0.27.g96db324

[U-Boot] [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework

[york sun]

On 06/21/2016 08:42 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> This framework is introduced for ARMv8 secure monitor mode firmware.
> The main functions of the framework are, on EL3, verify the firmware,
> load it to the secure memory and jump into it, and while it returned
> to U-Boot, do some necessary setups at the 'target exception level'
> that is determined by the respective secure firmware.
>
> So far, the framework support only FIT format image, and need to define
> the name of which config node should be used in 'configurations' and
> the name of property for the raw secure firmware image in that config.
> The FIT image should be stored in Byte accessing memory, such as NOR
> Flash, or else it should be copied to main memory to use this framework.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V6:
>   - Abstracted more code from PPA to this framework.
>   - Introduced gd->sec_firmware to hold the load address.
>   - Refactor the func sec_firmware_support_psci_version().

A lot of change in this version.

>
> V5:
>   - Added c file sec_firmware.c.
>   - Added declaration of sec_firmware_init().
>   - Renamed the func sec_firmware_validate().
>
> V4:
>   - Reordered this patch.
>   - Removed the FSL PPA related items.
>
>   arch/arm/cpu/armv8/Makefile               |   1 +
>   arch/arm/cpu/armv8/sec_firmware.c         | 262 ++++++++++++++++++++++++++++++
>   arch/arm/cpu/armv8/sec_firmware_asm.S     |  53 ++++++
>   arch/arm/include/asm/armv8/sec_firmware.h |  18 ++
>   include/asm-generic/global_data.h         |  11 ++
>   5 files changed, 346 insertions(+)
>   create mode 100644 arch/arm/cpu/armv8/sec_firmware.c
>   create mode 100644 arch/arm/cpu/armv8/sec_firmware_asm.S
>   create mode 100644 arch/arm/include/asm/armv8/sec_firmware.h
>
> diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
> index bf8644c..ee9e009 100644
> --- a/arch/arm/cpu/armv8/Makefile
> +++ b/arch/arm/cpu/armv8/Makefile
> @@ -15,6 +15,7 @@ obj-y	+= cache.o
>   obj-y	+= tlb.o
>   obj-y	+= transition.o
>   obj-y	+= fwcall.o
> +obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
>
>   obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
>   obj-$(CONFIG_S32V234) += s32v234/
> diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
> new file mode 100644
> index 0000000..986df48
> --- /dev/null
> +++ b/arch/arm/cpu/armv8/sec_firmware.c
> @@ -0,0 +1,266 @@
> +/*
> + * Copyright 2016 NXP Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <errno.h>
> +#include <linux/kernel.h>
> +#include <asm/io.h>
> +#include <asm/system.h>
> +#include <asm/types.h>
> +#include <asm/macro.h>
> +#include <asm/armv8/sec_firmware.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +extern void c_runtime_cpu_setup(void);
> +
> +static int sec_firmware_get_data(void *sec_firmware_img,
> +				const void **data, size_t *size)

Throughout this patch, sec_firmware_img is used as read-only. How about 
add "const" to it?

> +{
> +	void *fit_hdr;

Variable fit_hdr doesn't serve more purpose. You can use 
sec_firmware_img directly.


> +	int conf_node_off, fw_node_off;
> +	char *conf_node_name = NULL;
> +	char *desc;
> +	int ret;
> +
> +	fit_hdr = sec_firmware_img;
> +	conf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;
> +
> +	conf_node_off = fit_conf_get_node(fit_hdr, conf_node_name);
> +	if (conf_node_off < 0) {
> +		printf("SEC Firmware: %s: no such config\n", conf_node_name);
> +		return -ENOENT;
> +	}
> +
> +	fw_node_off = fit_conf_get_prop_node(fit_hdr, conf_node_off,
> +			SEC_FIRMWARE_FIT_IMAGE);
> +	if (fw_node_off < 0) {
> +		printf("SEC Firmware: No '%s' in config\n",
> +				SEC_FIRMWARE_FIT_IMAGE);

You have many of this alignment issues throughout this patch.

<snip>

York

[U-Boot] [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?6?23? 0:11
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework
> 
> On 06/21/2016 08:42 PM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > This framework is introduced for ARMv8 secure monitor mode firmware.
> > The main functions of the framework are, on EL3, verify the firmware,
> > load it to the secure memory and jump into it, and while it returned
> > to U-Boot, do some necessary setups at the 'target exception level'
> > that is determined by the respective secure firmware.
> >
> > So far, the framework support only FIT format image, and need to
> > define the name of which config node should be used in
> > 'configurations' and the name of property for the raw secure firmware image in
> that config.
> > The FIT image should be stored in Byte accessing memory, such as NOR
> > Flash, or else it should be copied to main memory to use this framework.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V6:
> >   - Abstracted more code from PPA to this framework.
> >   - Introduced gd->sec_firmware to hold the load address.
> >   - Refactor the func sec_firmware_support_psci_version().
> 
> A lot of change in this version.

Yes, take a lot time to refactor the code, just hope more code can be reused.

> >
> > V5:
> >   - Added c file sec_firmware.c.
> >   - Added declaration of sec_firmware_init().
> >   - Renamed the func sec_firmware_validate().
> >
> > V4:
> >   - Reordered this patch.
> >   - Removed the FSL PPA related items.
> >
> >   arch/arm/cpu/armv8/Makefile               |   1 +
> >   arch/arm/cpu/armv8/sec_firmware.c         | 262
> ++++++++++++++++++++++++++++++
> >   arch/arm/cpu/armv8/sec_firmware_asm.S     |  53 ++++++
> >   arch/arm/include/asm/armv8/sec_firmware.h |  18 ++
> >   include/asm-generic/global_data.h         |  11 ++
> >   5 files changed, 346 insertions(+)
> >   create mode 100644 arch/arm/cpu/armv8/sec_firmware.c
> >   create mode 100644 arch/arm/cpu/armv8/sec_firmware_asm.S
> >   create mode 100644 arch/arm/include/asm/armv8/sec_firmware.h
> >
> > diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
> > index bf8644c..ee9e009 100644
> > --- a/arch/arm/cpu/armv8/Makefile
> > +++ b/arch/arm/cpu/armv8/Makefile
> > @@ -15,6 +15,7 @@ obj-y	+= cache.o
> >   obj-y	+= tlb.o
> >   obj-y	+= transition.o
> >   obj-y	+= fwcall.o
> > +obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o
> > +sec_firmware_asm.o
> >
> >   obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
> >   obj-$(CONFIG_S32V234) += s32v234/
> > diff --git a/arch/arm/cpu/armv8/sec_firmware.c
> > b/arch/arm/cpu/armv8/sec_firmware.c
> > new file mode 100644
> > index 0000000..986df48
> > --- /dev/null
> > +++ b/arch/arm/cpu/armv8/sec_firmware.c
> > @@ -0,0 +1,266 @@
> > +/*
> > + * Copyright 2016 NXP Semiconductor, Inc.
> > + *
> > + * SPDX-License-Identifier:	GPL-2.0+
> > + */
> > +
> > +#include <common.h>
> > +#include <errno.h>
> > +#include <linux/kernel.h>
> > +#include <asm/io.h>
> > +#include <asm/system.h>
> > +#include <asm/types.h>
> > +#include <asm/macro.h>
> > +#include <asm/armv8/sec_firmware.h>
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +extern void c_runtime_cpu_setup(void);
> > +
> > +static int sec_firmware_get_data(void *sec_firmware_img,
> > +				const void **data, size_t *size)
> 
> Throughout this patch, sec_firmware_img is used as read-only. How about add
> "const" to it?

Yes, will add it next version.

> 
> > +{
> > +	void *fit_hdr;
> 
> Variable fit_hdr doesn't serve more purpose. You can use sec_firmware_img
> directly.

Yes, will fix it next version. 

> 
> > +	int conf_node_off, fw_node_off;
> > +	char *conf_node_name = NULL;
> > +	char *desc;
> > +	int ret;
> > +
> > +	fit_hdr = sec_firmware_img;
> > +	conf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;
> > +
> > +	conf_node_off = fit_conf_get_node(fit_hdr, conf_node_name);
> > +	if (conf_node_off < 0) {
> > +		printf("SEC Firmware: %s: no such config\n", conf_node_name);
> > +		return -ENOENT;
> > +	}
> > +
> > +	fw_node_off = fit_conf_get_prop_node(fit_hdr, conf_node_off,
> > +			SEC_FIRMWARE_FIT_IMAGE);
> > +	if (fw_node_off < 0) {
> > +		printf("SEC Firmware: No '%s' in config\n",
> > +				SEC_FIRMWARE_FIT_IMAGE);
> 
> You have many of this alignment issues throughout this patch.
> 

Will fix the alignment issues next version.

Thanks,
Zhiqiang

[U-Boot] [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework

[york sun]

On 06/21/2016 08:42 PM, Zhiqiang Hou wrote:

<snip>

> +
> +#ifdef CONFIG_ARMV8_PSCI
> +/*
> + * The PSCI_VERSION function is added from PSCI v0.2. When the PSCI
> + * v0.1 received this function, the NOT_SUPPORTED (0xffff_ffff) error
> + * number will be returned according to SMC Calling Conventions. But
> + * when getting the NOT_SUPPORTED error number, we cannot ensure if
> + * the PSCI version is v0.1 or other error occurred. So, PSCI v0.1
> + * won't be supported by this framework.
> + * And if the secure firmware isn't running, return NOT_SUPPORTED.
> + *
> + * The return value on success is PSCI version in format
> + * major[31:16]:minor[15:0].
> + */
> +unsigned int sec_firmware_support_psci_version(void)
> +{
> +	if (gd->sec_firmware & SEC_FIRMWARE_RUNNING)
> +		return _sec_firmware_support_psci_version();
> +
> +	return 0xffffffff;
> +}
> +#endif

Does _sec_firmware_support_psci_version() always return version numbers? 
Any chance it returns an error code?

York

[U-Boot] [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?6?23? 0:20
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCHv6 2/6] ARMv8: add the secure monitor firmware framework
> 
> On 06/21/2016 08:42 PM, Zhiqiang Hou wrote:
> 
> <snip>
> 
> > +
> > +#ifdef CONFIG_ARMV8_PSCI
> > +/*
> > + * The PSCI_VERSION function is added from PSCI v0.2. When the PSCI
> > + * v0.1 received this function, the NOT_SUPPORTED (0xffff_ffff) error
> > + * number will be returned according to SMC Calling Conventions. But
> > + * when getting the NOT_SUPPORTED error number, we cannot ensure if
> > + * the PSCI version is v0.1 or other error occurred. So, PSCI v0.1
> > + * won't be supported by this framework.
> > + * And if the secure firmware isn't running, return NOT_SUPPORTED.
> > + *
> > + * The return value on success is PSCI version in format
> > + * major[31:16]:minor[15:0].
> > + */
> > +unsigned int sec_firmware_support_psci_version(void)
> > +{
> > +	if (gd->sec_firmware & SEC_FIRMWARE_RUNNING)
> > +		return _sec_firmware_support_psci_version();
> > +
> > +	return 0xffffffff;
> > +}
> > +#endif
> 
> Does _sec_firmware_support_psci_version() always return version numbers?
> Any chance it returns an error code?

If the PSCI_VERSION was supported in current PSCI version, it will return the version,
otherwise, the SMC will return the value 0xffff_ffff to indicate the PSCI_VERSION isn't
supported.
There isn't any description for returning error code in the PSCI spec.

Thanks,
Zhiqiang 

[U-Boot] [PATCHv6 3/6] ARMv8/layerscape: Add FSL PPA support

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The FSL Primary Protected Application (PPA) is a software component
loaded during boot which runs in TrustZone and remains resident
after boot.

Use the secure firmware framework to integrate FSL PPA into U-Boot.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V6:
 - Use the secure firmware framework to integrate PPA.

V5:
 - Added API sec_firmware_init() implementation.

V4:
 - Moved secure firmware validation API to this patch.
 - Moved secure firmware getting supported PSCI version API to this patch.

V3:
 - Refactor the code.
 - Add PPA firmware version info output.

 arch/arm/cpu/armv8/fsl-layerscape/Makefile     |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 48 ++++++++++++++++++++++++++
 arch/arm/include/asm/arch-fsl-layerscape/ppa.h | 16 +++++++++
 arch/arm/include/asm/armv8/sec_firmware.h      |  4 +++
 4 files changed, 69 insertions(+)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
index eb2cbc3..bcf6b48 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
@@ -10,6 +10,7 @@ obj-y += soc.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 obj-$(CONFIG_SPL) += spl.o
+obj-$(CONFIG_FSL_LS_PPA) += ppa.o
 
 ifneq ($(CONFIG_FSL_LSCH3),)
 obj-y += fsl_lsch3_speed.o
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
new file mode 100644
index 0000000..ae7d364
--- /dev/null
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <config.h>
+#include <errno.h>
+#include <asm/system.h>
+#include <asm/types.h>
+#include <asm/arch/soc.h>
+#ifdef CONFIG_FSL_LSCH3
+#include <asm/arch/immap_lsch3.h>
+#elif defined(CONFIG_FSL_LSCH2)
+#include <asm/arch/immap_lsch2.h>
+#endif
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#include <asm/armv8/sec_firmware.h>
+#endif
+
+int ppa_init(void)
+{
+	void *ppa_fit_addr;
+	u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
+	int ret;
+
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+	ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
+#else
+#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
+#endif
+
+#ifdef CONFIG_FSL_LSCH3
+	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	boot_loc_ptr_l = &gur->bootlocptrl;
+	boot_loc_ptr_h = &gur->bootlocptrh;
+#elif defined(CONFIG_FSL_LSCH2)
+	struct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);
+	boot_loc_ptr_l = &scfg->scratchrw[1];
+	boot_loc_ptr_h = &scfg->scratchrw[0];
+#endif
+
+	debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n",
+			boot_loc_ptr_l, boot_loc_ptr_h);
+	ret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h);
+
+	return ret;
+}
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ppa.h b/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
new file mode 100644
index 0000000..1f1442b
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ppa.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FSL_PPA_H_
+#define __FSL_PPA_H_
+
+#define SEC_FIRMWARE_FIT_IMAGE		"firmware"
+#define SEC_FIRMEWARE_FIT_CNF_NAME	"config at 1"
+#define SEC_FIRMWARE_TARGET_EL		2
+
+int ppa_init(void);
+
+#endif
diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h
index 041fd4e..53aefda 100644
--- a/arch/arm/include/asm/armv8/sec_firmware.h
+++ b/arch/arm/include/asm/armv8/sec_firmware.h
@@ -7,6 +7,10 @@
 #ifndef __SEC_FIRMWARE_H_
 #define __SEC_FIRMWARE_H_
 
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/arch/ppa.h>
+#endif
+
 int sec_firmware_init(void *, u32 *, u32 *);
 int _sec_firmware_entry(void *, u32 *, u32 *);
 bool sec_firmware_is_valid(void *);
-- 
2.1.0.27.g96db324

[U-Boot] [PATCHv6 3/6] ARMv8/layerscape: Add FSL PPA support

[york sun]

On 06/21/2016 08:41 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> The FSL Primary Protected Application (PPA) is a software component
> loaded during boot which runs in TrustZone and remains resident
> after boot.
>
> Use the secure firmware framework to integrate FSL PPA into U-Boot.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V6:
>   - Use the secure firmware framework to integrate PPA.
>
> V5:
>   - Added API sec_firmware_init() implementation.
>
> V4:
>   - Moved secure firmware validation API to this patch.
>   - Moved secure firmware getting supported PSCI version API to this patch.
>
> V3:
>   - Refactor the code.
>   - Add PPA firmware version info output.
>
>   arch/arm/cpu/armv8/fsl-layerscape/Makefile     |  1 +
>   arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 48 ++++++++++++++++++++++++++
>   arch/arm/include/asm/arch-fsl-layerscape/ppa.h | 16 +++++++++
>   arch/arm/include/asm/armv8/sec_firmware.h      |  4 +++
>   4 files changed, 69 insertions(+)
>   create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
>   create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> index eb2cbc3..bcf6b48 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> @@ -10,6 +10,7 @@ obj-y += soc.o
>   obj-$(CONFIG_MP) += mp.o
>   obj-$(CONFIG_OF_LIBFDT) += fdt.o
>   obj-$(CONFIG_SPL) += spl.o
> +obj-$(CONFIG_FSL_LS_PPA) += ppa.o
>
>   ifneq ($(CONFIG_FSL_LSCH3),)
>   obj-y += fsl_lsch3_speed.o
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> new file mode 100644
> index 0000000..ae7d364
> --- /dev/null
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> @@ -0,0 +1,48 @@
> +/*
> + * Copyright 2016 NXP Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +#include <common.h>
> +#include <config.h>
> +#include <errno.h>
> +#include <asm/system.h>
> +#include <asm/types.h>
> +#include <asm/arch/soc.h>
> +#ifdef CONFIG_FSL_LSCH3
> +#include <asm/arch/immap_lsch3.h>
> +#elif defined(CONFIG_FSL_LSCH2)
> +#include <asm/arch/immap_lsch2.h>
> +#endif
> +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> +#include <asm/armv8/sec_firmware.h>
> +#endif
> +
> +int ppa_init(void)
> +{
> +	void *ppa_fit_addr;
> +	u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
> +	int ret;
> +
> +#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
> +	ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR;
> +#else
> +#error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
> +#endif
> +
> +#ifdef CONFIG_FSL_LSCH3
> +	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
> +	boot_loc_ptr_l = &gur->bootlocptrl;
> +	boot_loc_ptr_h = &gur->bootlocptrh;
> +#elif defined(CONFIG_FSL_LSCH2)
> +	struct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);
> +	boot_loc_ptr_l = &scfg->scratchrw[1];
> +	boot_loc_ptr_h = &scfg->scratchrw[0];
> +#endif
> +
> +	debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n",
> +			boot_loc_ptr_l, boot_loc_ptr_h);

Alignment issue. Didn't checkpatch remind you about this?

York

[U-Boot] [PATCHv6 3/6] ARMv8/layerscape: Add FSL PPA support

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?6?23? 0:13
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCHv6 3/6] ARMv8/layerscape: Add FSL PPA support
> 
> On 06/21/2016 08:41 PM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The FSL Primary Protected Application (PPA) is a software component
> > loaded during boot which runs in TrustZone and remains resident after
> > boot.
> >
> > Use the secure firmware framework to integrate FSL PPA into U-Boot.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V6:
> >   - Use the secure firmware framework to integrate PPA.
> >
> > V5:
> >   - Added API sec_firmware_init() implementation.
> >
> > V4:
> >   - Moved secure firmware validation API to this patch.
> >   - Moved secure firmware getting supported PSCI version API to this patch.
> >
> > V3:
> >   - Refactor the code.
> >   - Add PPA firmware version info output.
> >
> >   arch/arm/cpu/armv8/fsl-layerscape/Makefile     |  1 +
> >   arch/arm/cpu/armv8/fsl-layerscape/ppa.c        | 48
> ++++++++++++++++++++++++++
> >   arch/arm/include/asm/arch-fsl-layerscape/ppa.h | 16 +++++++++
> >   arch/arm/include/asm/armv8/sec_firmware.h      |  4 +++
> >   4 files changed, 69 insertions(+)
> >   create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> >   create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/ppa.h
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > index eb2cbc3..bcf6b48 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile
> > @@ -10,6 +10,7 @@ obj-y += soc.o
> >   obj-$(CONFIG_MP) += mp.o
> >   obj-$(CONFIG_OF_LIBFDT) += fdt.o
> >   obj-$(CONFIG_SPL) += spl.o
> > +obj-$(CONFIG_FSL_LS_PPA) += ppa.o
> >
> >   ifneq ($(CONFIG_FSL_LSCH3),)
> >   obj-y += fsl_lsch3_speed.o
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > new file mode 100644
> > index 0000000..ae7d364
> > --- /dev/null
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
> > @@ -0,0 +1,48 @@
> > +/*
> > + * Copyright 2016 NXP Semiconductor, Inc.
> > + *
> > + * SPDX-License-Identifier:	GPL-2.0+
> > + */
> > +#include <common.h>
> > +#include <config.h>
> > +#include <errno.h>
> > +#include <asm/system.h>
> > +#include <asm/types.h>
> > +#include <asm/arch/soc.h>
> > +#ifdef CONFIG_FSL_LSCH3
> > +#include <asm/arch/immap_lsch3.h>
> > +#elif defined(CONFIG_FSL_LSCH2)
> > +#include <asm/arch/immap_lsch2.h>
> > +#endif
> > +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include
> > +<asm/armv8/sec_firmware.h> #endif
> > +
> > +int ppa_init(void)
> > +{
> > +	void *ppa_fit_addr;
> > +	u32 *boot_loc_ptr_l, *boot_loc_ptr_h;
> > +	int ret;
> > +
> > +#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
> > +	ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR; #else #error "No
> > +CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
> > +#endif
> > +
> > +#ifdef CONFIG_FSL_LSCH3
> > +	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
> > +	boot_loc_ptr_l = &gur->bootlocptrl;
> > +	boot_loc_ptr_h = &gur->bootlocptrh;
> > +#elif defined(CONFIG_FSL_LSCH2)
> > +	struct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);
> > +	boot_loc_ptr_l = &scfg->scratchrw[1];
> > +	boot_loc_ptr_h = &scfg->scratchrw[0]; #endif
> > +
> > +	debug("fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\n",
> > +			boot_loc_ptr_l, boot_loc_ptr_h);
> 
> Alignment issue. Didn't checkpatch remind you about this?

Will fix it.

Thanks,
Zhiqiang

[U-Boot] [PATCHv6 4/6] ARMv8/Layerscape: switch SMP method accordingly

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

If the PSCI and PPA is ready, skip the fixup for spin-table and
waking secondary cores. Otherwise, change SMP method to spin-table,
and the device node of PSCI will be removed.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V6:
 - no change

V5:
 - Changed the checking if the PSCI feature is ready to read the psci version.

V4:
 - Reordered this patch.

 arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 17 ++++++++++++++---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 34 +++++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index d5bcf67..f284b77 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -23,6 +23,9 @@
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -622,6 +625,7 @@ int arch_early_init_r(void)
 {
 #ifdef CONFIG_MP
 	int rv = 1;
+	bool psci_support = false;
 #endif
 
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
@@ -629,9 +633,16 @@ int arch_early_init_r(void)
 #endif
 
 #ifdef CONFIG_MP
-	rv = fsl_layerscape_wake_seconday_cores();
-	if (rv)
-		printf("Did not wake secondary cores\n");
+#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
+	/* Check the psci version to determine if the psci is supported */
+	psci_support = sec_firmware_support_psci_version() != 0xffffffff ?
+			true : false;
+#endif
+	if (!psci_support) {
+		rv = fsl_layerscape_wake_seconday_cores();
+		if (rv)
+			printf("Did not wake secondary cores\n");
+	}
 #endif
 
 #ifdef CONFIG_SYS_HAS_SERDES
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index d17227a..c918831 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -22,6 +22,9 @@
 #endif
 #include <fsl_sec.h>
 #include <asm/arch-fsl-layerscape/soc.h>
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#include <asm/armv8/sec_firmware.h>
+#endif
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {
@@ -38,7 +41,38 @@ void ft_fixup_cpu(void *blob)
 	int addr_cells;
 	u64 val, core_id;
 	size_t *boot_code_size = &(__secondary_boot_code_size);
+#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
+	int node;
+	bool psci_support;
+
+	/* Check the psci version to determine if the psci is supported */
+	psci_support = sec_firmware_support_psci_version() != 0xffffffff ?
+			true : false;
+	if (!psci_support) {
+		/* remove psci DT node */
+		node = fdt_path_offset(blob, "/psci");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
+		if (node >= 0)
+			goto remove_psci_node;
+
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
+		if (node >= 0)
+			goto remove_psci_node;
 
+		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
+		if (node >= 0)
+			goto remove_psci_node;
+
+remove_psci_node:
+		if (node >= 0)
+			fdt_del_node(blob, node);
+	} else {
+		return;
+	}
+#endif
 	off = fdt_path_offset(blob, "/cpus");
 	if (off < 0) {
 		puts("couldn't find /cpus node\n");
-- 
2.1.0.27.g96db324

[U-Boot] [PATCHv6 4/6] ARMv8/Layerscape: switch SMP method accordingly

[york sun]

On 06/21/2016 08:45 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> If the PSCI and PPA is ready, skip the fixup for spin-table and
> waking secondary cores. Otherwise, change SMP method to spin-table,
> and the device node of PSCI will be removed.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V6:
>   - no change
>
> V5:
>   - Changed the checking if the PSCI feature is ready to read the psci version.
>
> V4:
>   - Reordered this patch.
>
>   arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 17 ++++++++++++++---
>   arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 34 +++++++++++++++++++++++++++++++++
>   2 files changed, 48 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index d5bcf67..f284b77 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -23,6 +23,9 @@
>   #ifdef CONFIG_FSL_ESDHC
>   #include <fsl_esdhc.h>
>   #endif
> +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> +#include <asm/armv8/sec_firmware.h>
> +#endif
>
>   DECLARE_GLOBAL_DATA_PTR;
>
> @@ -622,6 +625,7 @@ int arch_early_init_r(void)
>   {
>   #ifdef CONFIG_MP
>   	int rv = 1;
> +	bool psci_support = false;
>   #endif
>
>   #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
> @@ -629,9 +633,16 @@ int arch_early_init_r(void)
>   #endif
>
>   #ifdef CONFIG_MP
> -	rv = fsl_layerscape_wake_seconday_cores();
> -	if (rv)
> -		printf("Did not wake secondary cores\n");
> +#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
> +	/* Check the psci version to determine if the psci is supported */
> +	psci_support = sec_firmware_support_psci_version() != 0xffffffff ?
> +			true : false;

If the only error code is 0xffffffff, you can delete the "? true : 
false" part. The logical operation results "true" or "false" already.

> +#endif
> +	if (!psci_support) {
> +		rv = fsl_layerscape_wake_seconday_cores();
> +		if (rv)
> +			printf("Did not wake secondary cores\n");
> +	}
>   #endif

<snip>

York

[U-Boot] [PATCHv6 4/6] ARMv8/Layerscape: switch SMP method accordingly

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?6?23? 0:22
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCHv6 4/6] ARMv8/Layerscape: switch SMP method accordingly
> 
> On 06/21/2016 08:45 PM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > If the PSCI and PPA is ready, skip the fixup for spin-table and waking
> > secondary cores. Otherwise, change SMP method to spin-table, and the
> > device node of PSCI will be removed.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V6:
> >   - no change
> >
> > V5:
> >   - Changed the checking if the PSCI feature is ready to read the psci version.
> >
> > V4:
> >   - Reordered this patch.
> >
> >   arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 17 ++++++++++++++---
> >   arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 34
> +++++++++++++++++++++++++++++++++
> >   2 files changed, 48 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index d5bcf67..f284b77 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -23,6 +23,9 @@
> >   #ifdef CONFIG_FSL_ESDHC
> >   #include <fsl_esdhc.h>
> >   #endif
> > +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include
> > +<asm/armv8/sec_firmware.h> #endif
> >
> >   DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -622,6 +625,7 @@ int arch_early_init_r(void)
> >   {
> >   #ifdef CONFIG_MP
> >   	int rv = 1;
> > +	bool psci_support = false;
> >   #endif
> >
> >   #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 @@ -629,9 +633,16 @@ int
> > arch_early_init_r(void)
> >   #endif
> >
> >   #ifdef CONFIG_MP
> > -	rv = fsl_layerscape_wake_seconday_cores();
> > -	if (rv)
> > -		printf("Did not wake secondary cores\n");
> > +#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) &&
> defined(CONFIG_ARMV8_PSCI)
> > +	/* Check the psci version to determine if the psci is supported */
> > +	psci_support = sec_firmware_support_psci_version() != 0xffffffff ?
> > +			true : false;
> 
> If the only error code is 0xffffffff, you can delete the "? true :
> false" part. The logical operation results "true" or "false" already.
> 

Yes, will fix it.

> > +#endif
> > +	if (!psci_support) {
> > +		rv = fsl_layerscape_wake_seconday_cores();
> > +		if (rv)
> > +			printf("Did not wake secondary cores\n");
> > +	}
> >   #endif
> 
> <snip>

Thanks,
Zhiqiang

[U-Boot] [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

Set the enable-method in the cpu node to PSCI, and create device
node for PSCI, when PSCI was enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V6:
 - Removed PSCI version 0.1 support.

V5:
 - Moved the weak func sec_firmware_support_psci_version to sec_firmware.c.
 - Correct the PSCI version value in switch-case. The right version format is marjor[31:16]:minor[15:0].

 arch/arm/cpu/armv8/Makefile |   1 +
 arch/arm/cpu/armv8/cpu-dt.c | 122 ++++++++++++++++++++++++++++++++++++++++++++
 arch/arm/lib/bootm-fdt.c    |   2 +-
 3 files changed, 124 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/cpu/armv8/cpu-dt.c

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index ee9e009..33e6db0 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -15,6 +15,7 @@ obj-y	+= cache.o
 obj-y	+= tlb.o
 obj-y	+= transition.o
 obj-y	+= fwcall.o
+obj-y	+= cpu-dt.o
 obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
new file mode 100644
index 0000000..6b9aa77
--- /dev/null
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <linux/sizes.h>
+#include <linux/kernel.h>
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#include <asm/armv8/sec_firmware.h>
+#endif
+
+#ifdef CONFIG_MP
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_ARMV8_PSCI)
+static int cpu_update_dt_psci(void *fdt)
+{
+	int nodeoff;
+	unsigned int psci_ver;
+	char *psci_compt;
+	int tmp;
+
+	nodeoff = fdt_path_offset(fdt, "/cpus");
+	if (nodeoff < 0) {
+		printf("couldn't find /cpus\n");
+		return nodeoff;
+	}
+
+	/* add 'enable-method = "psci"' to each cpu node */
+	for (tmp = fdt_first_subnode(fdt, nodeoff);
+	     tmp >= 0;
+	     tmp = fdt_next_subnode(fdt, tmp)) {
+		const struct fdt_property *prop;
+		int len;
+
+		prop = fdt_get_property(fdt, tmp, "device_type", &len);
+		if (!prop)
+			continue;
+		if (len < 4)
+			continue;
+		if (strcmp(prop->data, "cpu"))
+			continue;
+
+		/*
+		 * Not checking rv here, our approach is to skip over errors in
+		 * individual cpu nodes, hopefully some of the nodes are
+		 * processed correctly and those will boot
+		 */
+		fdt_setprop_string(fdt, tmp, "enable-method", "psci");
+	}
+
+	/*
+	 * The PSCI node might be called "/psci" or might be called something
+	 * else but contain either of the compatible strings
+	 * "arm,psci"/"arm,psci-0.2"
+	 */
+	nodeoff = fdt_path_offset(fdt, "/psci");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-0.2");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-1.0");
+	if (nodeoff >= 0)
+		goto init_psci_node;
+
+	nodeoff = fdt_path_offset(fdt, "/");
+	if (nodeoff < 0)
+		return nodeoff;
+
+	nodeoff = fdt_add_subnode(fdt, nodeoff, "psci");
+	if (nodeoff < 0)
+		return nodeoff;
+
+init_psci_node:
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+	psci_ver = sec_firmware_support_psci_version();
+#endif
+	switch (psci_ver) {
+	case 0x00010000:
+		psci_compt = "arm,psci-1.0";
+		break;
+	case 0x00000002:
+		psci_compt = "arm,psci-0.2";
+		break;
+	default:
+		psci_compt = "arm,psci-0.2";
+		break;
+	}
+
+	tmp = fdt_setprop_string(fdt, nodeoff, "compatible", psci_compt);
+	if (tmp)
+		return tmp;
+
+	tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc");
+	if (tmp)
+		return tmp;
+
+	return 0;
+}
+#endif
+#endif
+
+int psci_update_dt(void *fdt)
+{
+#ifdef CONFIG_MP
+#if defined(CONFIG_ARMV8_PSCI)
+	cpu_update_dt_psci(fdt);
+#endif
+#endif
+	return 0;
+}
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 7677358..c642ff8 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -42,7 +42,7 @@ int arch_fixup_fdt(void *blob)
 	}
 
 	ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
-#ifdef CONFIG_ARMV7_NONSEC
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI)
 	if (ret)
 		return ret;
 
-- 
2.1.0.27.g96db324

[U-Boot] [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI

[Chen-Yu Tsai]

On Wed, Jun 22, 2016 at 11:30 AM, Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Set the enable-method in the cpu node to PSCI, and create device
> node for PSCI, when PSCI was enabled.

ARMv7 also has a similar function. Is it possible to move that one
under arch/arm(/common)?

ChenYu

> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V6:
>  - Removed PSCI version 0.1 support.
>
> V5:
>  - Moved the weak func sec_firmware_support_psci_version to sec_firmware.c.
>  - Correct the PSCI version value in switch-case. The right version format is marjor[31:16]:minor[15:0].
>
>  arch/arm/cpu/armv8/Makefile |   1 +
>  arch/arm/cpu/armv8/cpu-dt.c | 122 ++++++++++++++++++++++++++++++++++++++++++++
>  arch/arm/lib/bootm-fdt.c    |   2 +-
>  3 files changed, 124 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/cpu/armv8/cpu-dt.c
>
> diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
> index ee9e009..33e6db0 100644
> --- a/arch/arm/cpu/armv8/Makefile
> +++ b/arch/arm/cpu/armv8/Makefile
> @@ -15,6 +15,7 @@ obj-y += cache.o
>  obj-y  += tlb.o
>  obj-y  += transition.o
>  obj-y  += fwcall.o
> +obj-y  += cpu-dt.o
>  obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
>
>  obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
> diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
> new file mode 100644
> index 0000000..6b9aa77
> --- /dev/null
> +++ b/arch/arm/cpu/armv8/cpu-dt.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright 2016 NXP Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <libfdt.h>
> +#include <fdt_support.h>
> +#include <linux/sizes.h>
> +#include <linux/kernel.h>
> +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> +#include <asm/armv8/sec_firmware.h>
> +#endif
> +
> +#ifdef CONFIG_MP
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#if defined(CONFIG_ARMV8_PSCI)
> +static int cpu_update_dt_psci(void *fdt)
> +{
> +       int nodeoff;
> +       unsigned int psci_ver;
> +       char *psci_compt;
> +       int tmp;
> +
> +       nodeoff = fdt_path_offset(fdt, "/cpus");
> +       if (nodeoff < 0) {
> +               printf("couldn't find /cpus\n");
> +               return nodeoff;
> +       }
> +
> +       /* add 'enable-method = "psci"' to each cpu node */
> +       for (tmp = fdt_first_subnode(fdt, nodeoff);
> +            tmp >= 0;
> +            tmp = fdt_next_subnode(fdt, tmp)) {
> +               const struct fdt_property *prop;
> +               int len;
> +
> +               prop = fdt_get_property(fdt, tmp, "device_type", &len);
> +               if (!prop)
> +                       continue;
> +               if (len < 4)
> +                       continue;
> +               if (strcmp(prop->data, "cpu"))
> +                       continue;
> +
> +               /*
> +                * Not checking rv here, our approach is to skip over errors in
> +                * individual cpu nodes, hopefully some of the nodes are
> +                * processed correctly and those will boot
> +                */
> +               fdt_setprop_string(fdt, tmp, "enable-method", "psci");
> +       }
> +
> +       /*
> +        * The PSCI node might be called "/psci" or might be called something
> +        * else but contain either of the compatible strings
> +        * "arm,psci"/"arm,psci-0.2"
> +        */
> +       nodeoff = fdt_path_offset(fdt, "/psci");
> +       if (nodeoff >= 0)
> +               goto init_psci_node;
> +
> +       nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci");
> +       if (nodeoff >= 0)
> +               goto init_psci_node;
> +
> +       nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-0.2");
> +       if (nodeoff >= 0)
> +               goto init_psci_node;
> +
> +       nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-1.0");
> +       if (nodeoff >= 0)
> +               goto init_psci_node;
> +
> +       nodeoff = fdt_path_offset(fdt, "/");
> +       if (nodeoff < 0)
> +               return nodeoff;
> +
> +       nodeoff = fdt_add_subnode(fdt, nodeoff, "psci");
> +       if (nodeoff < 0)
> +               return nodeoff;
> +
> +init_psci_node:
> +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> +       psci_ver = sec_firmware_support_psci_version();
> +#endif
> +       switch (psci_ver) {
> +       case 0x00010000:
> +               psci_compt = "arm,psci-1.0";
> +               break;
> +       case 0x00000002:
> +               psci_compt = "arm,psci-0.2";
> +               break;
> +       default:
> +               psci_compt = "arm,psci-0.2";
> +               break;
> +       }
> +
> +       tmp = fdt_setprop_string(fdt, nodeoff, "compatible", psci_compt);
> +       if (tmp)
> +               return tmp;
> +
> +       tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc");
> +       if (tmp)
> +               return tmp;
> +
> +       return 0;
> +}
> +#endif
> +#endif
> +
> +int psci_update_dt(void *fdt)
> +{
> +#ifdef CONFIG_MP
> +#if defined(CONFIG_ARMV8_PSCI)
> +       cpu_update_dt_psci(fdt);
> +#endif
> +#endif
> +       return 0;
> +}
> diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
> index 7677358..c642ff8 100644
> --- a/arch/arm/lib/bootm-fdt.c
> +++ b/arch/arm/lib/bootm-fdt.c
> @@ -42,7 +42,7 @@ int arch_fixup_fdt(void *blob)
>         }
>
>         ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
> -#ifdef CONFIG_ARMV7_NONSEC
> +#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI)
>         if (ret)
>                 return ret;
>
> --
> 2.1.0.27.g96db324
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI

[Zhiqiang Hou]

Hi ChenYu,

Thanks for your comments!

> -----Original Message-----
> From: Chen-Yu Tsai [mailto:wens at csie.org]
> Sent: 2016?6?22? 12:05
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Albert ARIBAUD
> <albert.u.boot@aribaud.net>; Scott Wood <scottwood@freescale.com>;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [U-Boot] [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI
> 
> On Wed, Jun 22, 2016 at 11:30 AM, Zhiqiang Hou <Zhiqiang.Hou@nxp.com> wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Set the enable-method in the cpu node to PSCI, and create device node
> > for PSCI, when PSCI was enabled.
> 
> ARMv7 also has a similar function. Is it possible to move that one under
> arch/arm(/common)?
> 

Yes, that could be arranged.

Thanks,
Zhiqiang

[U-Boot] [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI

[york sun]

On 06/21/2016 08:42 PM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>
> Set the enable-method in the cpu node to PSCI, and create device
> node for PSCI, when PSCI was enabled.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V6:
>   - Removed PSCI version 0.1 support.
>
> V5:
>   - Moved the weak func sec_firmware_support_psci_version to sec_firmware.c.
>   - Correct the PSCI version value in switch-case. The right version format is marjor[31:16]:minor[15:0].
>
>   arch/arm/cpu/armv8/Makefile |   1 +
>   arch/arm/cpu/armv8/cpu-dt.c | 122 ++++++++++++++++++++++++++++++++++++++++++++
>   arch/arm/lib/bootm-fdt.c    |   2 +-
>   3 files changed, 124 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/cpu/armv8/cpu-dt.c
>
> diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
> index ee9e009..33e6db0 100644
> --- a/arch/arm/cpu/armv8/Makefile
> +++ b/arch/arm/cpu/armv8/Makefile
> @@ -15,6 +15,7 @@ obj-y	+= cache.o
>   obj-y	+= tlb.o
>   obj-y	+= transition.o
>   obj-y	+= fwcall.o
> +obj-y	+= cpu-dt.o
>   obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
>
>   obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
> diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
> new file mode 100644
> index 0000000..6b9aa77
> --- /dev/null
> +++ b/arch/arm/cpu/armv8/cpu-dt.c
> @@ -0,0 +1,122 @@
> +/*
> + * Copyright 2016 NXP Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <libfdt.h>
> +#include <fdt_support.h>
> +#include <linux/sizes.h>
> +#include <linux/kernel.h>
> +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> +#include <asm/armv8/sec_firmware.h>
> +#endif
> +
> +#ifdef CONFIG_MP
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#if defined(CONFIG_ARMV8_PSCI)
> +static int cpu_update_dt_psci(void *fdt)
> +{
> +	int nodeoff;
> +	unsigned int psci_ver;
> +	char *psci_compt;
> +	int tmp;
> +
> +	nodeoff = fdt_path_offset(fdt, "/cpus");
> +	if (nodeoff < 0) {
> +		printf("couldn't find /cpus\n");
> +		return nodeoff;
> +	}
> +
> +	/* add 'enable-method = "psci"' to each cpu node */
> +	for (tmp = fdt_first_subnode(fdt, nodeoff);
> +	     tmp >= 0;
> +	     tmp = fdt_next_subnode(fdt, tmp)) {
> +		const struct fdt_property *prop;
> +		int len;
> +
> +		prop = fdt_get_property(fdt, tmp, "device_type", &len);
> +		if (!prop)
> +			continue;
> +		if (len < 4)
> +			continue;
> +		if (strcmp(prop->data, "cpu"))
> +			continue;
> +
> +		/*
> +		 * Not checking rv here, our approach is to skip over errors in
> +		 * individual cpu nodes, hopefully some of the nodes are
> +		 * processed correctly and those will boot
> +		 */
> +		fdt_setprop_string(fdt, tmp, "enable-method", "psci");
> +	}
> +
> +	/*
> +	 * The PSCI node might be called "/psci" or might be called something
> +	 * else but contain either of the compatible strings
> +	 * "arm,psci"/"arm,psci-0.2"
> +	 */
> +	nodeoff = fdt_path_offset(fdt, "/psci");
> +	if (nodeoff >= 0)
> +		goto init_psci_node;
> +
> +	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci");
> +	if (nodeoff >= 0)
> +		goto init_psci_node;
> +
> +	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-0.2");
> +	if (nodeoff >= 0)
> +		goto init_psci_node;
> +
> +	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-1.0");
> +	if (nodeoff >= 0)
> +		goto init_psci_node;
> +
> +	nodeoff = fdt_path_offset(fdt, "/");
> +	if (nodeoff < 0)
> +		return nodeoff;
> +
> +	nodeoff = fdt_add_subnode(fdt, nodeoff, "psci");
> +	if (nodeoff < 0)
> +		return nodeoff;
> +
> +init_psci_node:
> +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> +	psci_ver = sec_firmware_support_psci_version();
> +#endif
> +	switch (psci_ver) {
> +	case 0x00010000:
> +		psci_compt = "arm,psci-1.0";
> +		break;
> +	case 0x00000002:
> +		psci_compt = "arm,psci-0.2";
> +		break;
> +	default:
> +		psci_compt = "arm,psci-0.2";
> +		break;
> +	}
> +
> +	tmp = fdt_setprop_string(fdt, nodeoff, "compatible", psci_compt);
> +	if (tmp)
> +		return tmp;
> +
> +	tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc");
> +	if (tmp)
> +		return tmp;
> +
> +	return 0;
> +}
> +#endif
> +#endif
> +
> +int psci_update_dt(void *fdt)
> +{
> +#ifdef CONFIG_MP
> +#if defined(CONFIG_ARMV8_PSCI)
> +	cpu_update_dt_psci(fdt);
> +#endif
> +#endif
> +	return 0;
> +}
> diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
> index 7677358..c642ff8 100644
> --- a/arch/arm/lib/bootm-fdt.c
> +++ b/arch/arm/lib/bootm-fdt.c
> @@ -42,7 +42,7 @@ int arch_fixup_fdt(void *blob)
>   	}
>
>   	ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
> -#ifdef CONFIG_ARMV7_NONSEC
> +#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI)
>   	if (ret)
>   		return ret;
>
>

As far as CONFIG_ARMV8_PSCI is defined, psci_update_dt(blob) is called. 
Regardless if ppa is running, the psci node is always created and cpu 
boot method is always updated with "psci". Then previous patch (4th in 
this set) detects psci version. If it is 0xffffffff, psci node is 
removed, and cpu boot method is updated again with spin-table. Do I 
understand your flow correctly?

If my understand is correct, I suggest to add a check of psci_version 
before calling cpu_update_dt_psci(fdt). It avoids unnecessary setting 
and helps to understand the flow.

York

[U-Boot] [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI

[Zhiqiang Hou]

Hi York,

Thanks for your comments!

> -----Original Message-----
> From: york sun
> Sent: 2016?6?23? 0:52
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCHv6 5/6] ARMv8/PSCI: Fixup the device tree for PSCI
> 
> On 06/21/2016 08:42 PM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Set the enable-method in the cpu node to PSCI, and create device node
> > for PSCI, when PSCI was enabled.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V6:
> >   - Removed PSCI version 0.1 support.
> >
> > V5:
> >   - Moved the weak func sec_firmware_support_psci_version to sec_firmware.c.
> >   - Correct the PSCI version value in switch-case. The right version format is
> marjor[31:16]:minor[15:0].
> >
> >   arch/arm/cpu/armv8/Makefile |   1 +
> >   arch/arm/cpu/armv8/cpu-dt.c | 122
> ++++++++++++++++++++++++++++++++++++++++++++
> >   arch/arm/lib/bootm-fdt.c    |   2 +-
> >   3 files changed, 124 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/cpu/armv8/cpu-dt.c
> >
> > diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
> > index ee9e009..33e6db0 100644
> > --- a/arch/arm/cpu/armv8/Makefile
> > +++ b/arch/arm/cpu/armv8/Makefile
> > @@ -15,6 +15,7 @@ obj-y	+= cache.o
> >   obj-y	+= tlb.o
> >   obj-y	+= transition.o
> >   obj-y	+= fwcall.o
> > +obj-y	+= cpu-dt.o
> >   obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o
> > sec_firmware_asm.o
> >
> >   obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ diff --git
> > a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c new file
> > mode 100644 index 0000000..6b9aa77
> > --- /dev/null
> > +++ b/arch/arm/cpu/armv8/cpu-dt.c
> > @@ -0,0 +1,122 @@
> > +/*
> > + * Copyright 2016 NXP Semiconductor, Inc.
> > + *
> > + * SPDX-License-Identifier:	GPL-2.0+
> > + */
> > +
> > +#include <common.h>
> > +#include <libfdt.h>
> > +#include <fdt_support.h>
> > +#include <linux/sizes.h>
> > +#include <linux/kernel.h>
> > +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include
> > +<asm/armv8/sec_firmware.h> #endif
> > +
> > +#ifdef CONFIG_MP
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +#if defined(CONFIG_ARMV8_PSCI)
> > +static int cpu_update_dt_psci(void *fdt) {
> > +	int nodeoff;
> > +	unsigned int psci_ver;
> > +	char *psci_compt;
> > +	int tmp;
> > +
> > +	nodeoff = fdt_path_offset(fdt, "/cpus");
> > +	if (nodeoff < 0) {
> > +		printf("couldn't find /cpus\n");
> > +		return nodeoff;
> > +	}
> > +
> > +	/* add 'enable-method = "psci"' to each cpu node */
> > +	for (tmp = fdt_first_subnode(fdt, nodeoff);
> > +	     tmp >= 0;
> > +	     tmp = fdt_next_subnode(fdt, tmp)) {
> > +		const struct fdt_property *prop;
> > +		int len;
> > +
> > +		prop = fdt_get_property(fdt, tmp, "device_type", &len);
> > +		if (!prop)
> > +			continue;
> > +		if (len < 4)
> > +			continue;
> > +		if (strcmp(prop->data, "cpu"))
> > +			continue;
> > +
> > +		/*
> > +		 * Not checking rv here, our approach is to skip over errors in
> > +		 * individual cpu nodes, hopefully some of the nodes are
> > +		 * processed correctly and those will boot
> > +		 */
> > +		fdt_setprop_string(fdt, tmp, "enable-method", "psci");
> > +	}
> > +
> > +	/*
> > +	 * The PSCI node might be called "/psci" or might be called something
> > +	 * else but contain either of the compatible strings
> > +	 * "arm,psci"/"arm,psci-0.2"
> > +	 */
> > +	nodeoff = fdt_path_offset(fdt, "/psci");
> > +	if (nodeoff >= 0)
> > +		goto init_psci_node;
> > +
> > +	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci");
> > +	if (nodeoff >= 0)
> > +		goto init_psci_node;
> > +
> > +	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-0.2");
> > +	if (nodeoff >= 0)
> > +		goto init_psci_node;
> > +
> > +	nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-1.0");
> > +	if (nodeoff >= 0)
> > +		goto init_psci_node;
> > +
> > +	nodeoff = fdt_path_offset(fdt, "/");
> > +	if (nodeoff < 0)
> > +		return nodeoff;
> > +
> > +	nodeoff = fdt_add_subnode(fdt, nodeoff, "psci");
> > +	if (nodeoff < 0)
> > +		return nodeoff;
> > +
> > +init_psci_node:
> > +#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
> > +	psci_ver = sec_firmware_support_psci_version();
> > +#endif
> > +	switch (psci_ver) {
> > +	case 0x00010000:
> > +		psci_compt = "arm,psci-1.0";
> > +		break;
> > +	case 0x00000002:
> > +		psci_compt = "arm,psci-0.2";
> > +		break;
> > +	default:
> > +		psci_compt = "arm,psci-0.2";
> > +		break;
> > +	}
> > +
> > +	tmp = fdt_setprop_string(fdt, nodeoff, "compatible", psci_compt);
> > +	if (tmp)
> > +		return tmp;
> > +
> > +	tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc");
> > +	if (tmp)
> > +		return tmp;
> > +
> > +	return 0;
> > +}
> > +#endif
> > +#endif
> > +
> > +int psci_update_dt(void *fdt)
> > +{
> > +#ifdef CONFIG_MP
> > +#if defined(CONFIG_ARMV8_PSCI)
> > +	cpu_update_dt_psci(fdt);
> > +#endif
> > +#endif
> > +	return 0;
> > +}
> > diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c index
> > 7677358..c642ff8 100644
> > --- a/arch/arm/lib/bootm-fdt.c
> > +++ b/arch/arm/lib/bootm-fdt.c
> > @@ -42,7 +42,7 @@ int arch_fixup_fdt(void *blob)
> >   	}
> >
> >   	ret = fdt_fixup_memory_banks(blob, start, size,
> > CONFIG_NR_DRAM_BANKS); -#ifdef CONFIG_ARMV7_NONSEC
> > +#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI)
> >   	if (ret)
> >   		return ret;
> >
> >
> 
> As far as CONFIG_ARMV8_PSCI is defined, psci_update_dt(blob) is called.
> Regardless if ppa is running, the psci node is always created and cpu boot method
> is always updated with "psci". Then previous patch (4th in this set) detects psci
> version. If it is 0xffffffff, psci node is removed, and cpu boot method is updated
> again with spin-table. Do I understand your flow correctly?
> 
> If my understand is correct, I suggest to add a check of psci_version before calling
> cpu_update_dt_psci(fdt). It avoids unnecessary setting and helps to understand the
> flow.

Your understand is correct, and will take your suggestion.

Thanks,
Zhiqiang

[U-Boot] [PATCHv6 6/6] ARMv8/ls1043ardb: Integrate FSL PPA

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The PPA use PSCI to make secondary cores bootup. So when PPA was
enabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method
between PSCI and spin-table.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V6:
 - Refactor the integration of PPA.

V5:
 - Merged the 7th patch of this patchset in v4 to this patch.
 - Enalbed secure monitor framework support.

V4:
 - Reordered this patch.
 - Added checking the returned value of func ppa_init_pre().

 board/freescale/ls1043ardb/ls1043ardb.c |  8 +++++++-
 include/configs/ls1043ardb.h            | 11 +++++++++++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 1436520..d3e37b4 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -24,7 +24,9 @@
 #ifdef CONFIG_U_QE
 #include <fsl_qe.h>
 #endif
-
+#ifdef CONFIG_FSL_LS_PPA
+#include <asm/arch/ppa.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -92,6 +94,10 @@ int board_init(void)
 	enable_layerscape_ns_access();
 #endif
 
+#ifdef CONFIG_FSL_LS_PPA
+	ppa_init();
+#endif
+
 #ifdef CONFIG_U_QE
 	u_qe_init();
 #endif
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 94ddfb1..44f86fa 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -9,6 +9,17 @@
 
 #include "ls1043a_common.h"
 
+#if defined(CONFIG_FSL_LS_PPA)
+#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
+#define SEC_FIRMWARE_ERET_ADDR_REVERT
+#define CONFIG_ARMV8_PSCI
+
+#define CONFIG_SYS_LS_PPA_FW_IN_NOR
+#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR
+#define	CONFIG_SYS_LS_PPA_FW_ADDR	0x60500000
+#endif
+#endif
+
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-- 
2.1.0.27.g96db324