* [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification
@ 2017-01-17 7:33 Mario Six
2017-01-17 7:33 ` [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc Mario Six
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Mario Six @ 2017-01-17 7:33 UTC (permalink / raw)
To: u-boot
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.
Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
---
Changes in v2:
Patch added (following a suggestion by Joakim Tjernlund)
---
arch/powerpc/cpu/mpc83xx/start.S | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 0001687703..c366f615e7 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -258,14 +258,17 @@ in_flash:
#endif
/* set up the stack pointer in our newly created
- * cache-ram (r1) */
- lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
- ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
+ * cache-ram; use r3 to keep the new SP for now to
+ * avoid overiding the SP it uselessly */
+ lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
+ ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
li r0, 0 /* Make room for stack frame header and */
- stwu r0, -4(r1) /* clear final stack frame so that */
- stwu r0, -4(r1) /* stack backtraces terminate cleanly */
+ stwu r0, -4(r3) /* clear final stack frame so that */
+ stwu r0, -4(r3) /* stack backtraces terminate cleanly */
+ /* Finally, actually set SP */
+ mr r1, r3
/* let the C-code set up the rest */
/* */
--
2.11.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc
2017-01-17 7:33 [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Mario Six
@ 2017-01-17 7:33 ` Mario Six
2017-02-01 16:10 ` york sun
2017-01-17 8:21 ` [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Joakim Tjernlund
2017-02-01 16:10 ` york sun
2 siblings, 1 reply; 5+ messages in thread
From: Mario Six @ 2017-01-17 7:33 UTC (permalink / raw)
To: u-boot
To enable DM on MPC83xx, we need pre-relocation malloc, which is
implemented in this patch.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
---
Changes in v2:
* Switched to r3 to hold SP modifications (as suggested by Joakim Tjernlund)
---
arch/powerpc/cpu/mpc83xx/cpu_init.c | 3 +--
arch/powerpc/cpu/mpc83xx/spl_minimal.c | 4 +---
arch/powerpc/cpu/mpc83xx/start.S | 23 +++++++++++++++++++++++
3 files changed, 25 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index f911275b25..3a0916bdbf 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -205,8 +205,7 @@ void cpu_init_f (volatile immap_t * im)
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
- /* Clear initial global data */
- memset ((void *) gd, 0, sizeof (gd_t));
+ /* global data region was cleared in start.S */
/* system performance tweaking */
clrsetbits_be32(&im->arbiter.acr, acr_mask, acr_val);
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index 845861eea7..026da12e66 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -23,9 +23,7 @@ void cpu_init_f (volatile immap_t * im)
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
- /* Clear initial global data */
- for (i = 0; i < sizeof(gd_t); i++)
- ((char *)gd)[i] = 0;
+ /* global data region was cleared in start.S */
/* system performance tweaking */
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index c366f615e7..ff312892bc 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -263,6 +263,29 @@ in_flash:
lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
+ /* r4 = end of GD area */
+ addi r4, r3, GENERATED_GBL_DATA_SIZE
+
+ /* Zero GD area */
+ li r0, 0
+1:
+ subi r4, r4, 1
+ stb r0, 0(r4)
+ cmplw r3, r4
+ bne 1b
+
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+
+#if CONFIG_SYS_MALLOC_F_LEN + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
+#error "CONFIG_SYS_MALLOC_F_LEN too large to fit into initial RAM."
+#endif
+
+ /* r3 = new stack pointer / pre-reloc malloc area */
+ subi r3, r3, CONFIG_SYS_MALLOC_F_LEN
+
+ /* Set pointer to pre-reloc malloc area in GD */
+ stw r3, GD_MALLOC_BASE(r4)
+#endif
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r3) /* clear final stack frame so that */
stwu r0, -4(r3) /* stack backtraces terminate cleanly */
--
2.11.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification
2017-01-17 7:33 [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Mario Six
2017-01-17 7:33 ` [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc Mario Six
@ 2017-01-17 8:21 ` Joakim Tjernlund
2017-02-01 16:10 ` york sun
2 siblings, 0 replies; 5+ messages in thread
From: Joakim Tjernlund @ 2017-01-17 8:21 UTC (permalink / raw)
To: u-boot
On Tue, 2017-01-17 at 08:33 +0100, Mario Six wrote:
> The r1 register is modified several times during the cache-ram setup of
> the MPC83xx SoCs.
>
> Since this SP modification confuses debuggers, we use a general purpose
> register to compute the new stack pointer value, and only set the SP
> once after all computations are done.
>
> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
> ---
>
> Changes in v2:
>
> Patch added (following a suggestion by Joakim Tjernlund)
>
> ---
> arch/powerpc/cpu/mpc83xx/start.S | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
> index 0001687703..c366f615e7 100644
> --- a/arch/powerpc/cpu/mpc83xx/start.S
> +++ b/arch/powerpc/cpu/mpc83xx/start.S
> @@ -258,14 +258,17 @@ in_flash:
> #endif
>
> /* set up the stack pointer in our newly created
> - * cache-ram (r1) */
> - lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
> - ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
> + * cache-ram; use r3 to keep the new SP for now to
> + * avoid overiding the SP it uselessly */
> + lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
> + ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
>
> li r0, 0 /* Make room for stack frame header and */
> - stwu r0, -4(r1) /* clear final stack frame so that */
> - stwu r0, -4(r1) /* stack backtraces terminate cleanly */
> + stwu r0, -4(r3) /* clear final stack frame so that */
> + stwu r0, -4(r3) /* stack backtraces terminate cleanly */
>
> + /* Finally, actually set SP */
> + mr r1, r3
>
> /* let the C-code set up the rest */
> /* */
> --
> 2.11.0
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification
2017-01-17 7:33 [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Mario Six
2017-01-17 7:33 ` [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc Mario Six
2017-01-17 8:21 ` [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Joakim Tjernlund
@ 2017-02-01 16:10 ` york sun
2 siblings, 0 replies; 5+ messages in thread
From: york sun @ 2017-02-01 16:10 UTC (permalink / raw)
To: u-boot
On 01/16/2017 11:34 PM, Mario Six wrote:
> The r1 register is modified several times during the cache-ram setup of
> the MPC83xx SoCs.
>
> Since this SP modification confuses debuggers, we use a general purpose
> register to compute the new stack pointer value, and only set the SP
> once after all computations are done.
>
> Signed-off-by: Mario Six <mario.six@gdsys.cc>
> ---
>
> Changes in v2:
>
> Patch added (following a suggestion by Joakim Tjernlund)
>
Applied to u-boot-mpc85xx master, awaiting upstream. Thanks.
York
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc
2017-01-17 7:33 ` [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc Mario Six
@ 2017-02-01 16:10 ` york sun
0 siblings, 0 replies; 5+ messages in thread
From: york sun @ 2017-02-01 16:10 UTC (permalink / raw)
To: u-boot
On 01/16/2017 11:34 PM, Mario Six wrote:
> To enable DM on MPC83xx, we need pre-relocation malloc, which is
> implemented in this patch.
>
> Signed-off-by: Mario Six <mario.six@gdsys.cc>
> ---
>
> Changes in v2:
>
> * Switched to r3 to hold SP modifications (as suggested by Joakim Tjernlund)
>
Applied to u-boot-mpc85xx master after fixing a compiling warning for
unused variable 'i', awaiting upstream. Thanks.
York
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-02-01 16:10 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2017-01-17 7:33 [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Mario Six
2017-01-17 7:33 ` [U-Boot] [PATCH v2 2/2] powerpc: mpc83xx: Enable pre-relocation malloc Mario Six
2017-02-01 16:10 ` york sun
2017-01-17 8:21 ` [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification Joakim Tjernlund
2017-02-01 16:10 ` york sun
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