RE: [PATCH v1] PCI: imx6: Set MSI enable bit of RC in resume

[Hongxing Zhu <hongxing.zhu@nxp.com>]

> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: 2022年11月3日 7:11
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; linux-pci@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v1] PCI: imx6: Set MSI enable bit of RC in resume
> 
> On Tue, Nov 01, 2022 at 03:59:55PM +0800, Richard Zhu wrote:
> > The MSI Enable bit controls delivery of MSI interrupts from components
> > below the Root Port. This bit might lost during the suspend, should be
> > re-configured during resume.
> 
> Just out of curiosity, why would this bit "get lost" during suspend?
> 
> Don't the normal save and restore in the suspend/resume paths take care of
> this?  Are there other bits that might get lost?
Hi Bjorn:
Thanks for your care.
The controller might be reset to the known stat during the
re-initialization in the resume path, I think.

dw_pcie_setup_rc() configures most of the controller setting during resume.
It seems that this bit is i.MX PCIe special, should be configured in both the
 probe and suspend/resume.

Best Regards
Richard Zhu
> 
> > Encapsulate the MSI enable set into a standalone function, and invoke
> > it in both probe and resume.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 24 +++++++++++++++++-------
> >  1 file changed, 17 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 2616585ca5f8..dba15546075f 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -1041,6 +1041,21 @@ static void imx6_pcie_pm_turnoff(struct
> imx6_pcie *imx6_pcie)
> >  	usleep_range(1000, 10000);
> >  }
> >
> > +static void pci_imx_set_msi_en(struct dw_pcie *pci) {
> > +	u8 offset;
> > +	u16 val;
> > +
> > +	if (pci_msi_enabled()) {
> > +		offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> > +		dw_pcie_dbi_ro_wr_en(pci);
> > +		val = dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS);
> > +		val |= PCI_MSI_FLAGS_ENABLE;
> > +		dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val);
> > +		dw_pcie_dbi_ro_wr_dis(pci);
> > +	}
> > +}
> > +
> >  static int imx6_pcie_suspend_noirq(struct device *dev)  {
> >  	struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); @@ -1073,6
> > +1088,7 @@ static int imx6_pcie_resume_noirq(struct device *dev)
> >  	if (imx6_pcie->link_is_up)
> >  		imx6_pcie_start_link(imx6_pcie->pci);
> >
> > +	pci_imx_set_msi_en(imx6_pcie->pci);
> >  	return 0;
> >  }
> >
> > @@ -1090,7 +1106,6 @@ static int imx6_pcie_probe(struct platform_device
> *pdev)
> >  	struct resource *dbi_base;
> >  	struct device_node *node = dev->of_node;
> >  	int ret;
> > -	u16 val;
> >
> >  	imx6_pcie = devm_kzalloc(dev, sizeof(*imx6_pcie), GFP_KERNEL);
> >  	if (!imx6_pcie)
> > @@ -1282,12 +1297,7 @@ static int imx6_pcie_probe(struct
> platform_device *pdev)
> >  	if (ret < 0)
> >  		return ret;
> >
> > -	if (pci_msi_enabled()) {
> > -		u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> > -		val = dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS);
> > -		val |= PCI_MSI_FLAGS_ENABLE;
> > -		dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val);
> > -	}
> > +	pci_imx_set_msi_en(pci);
> >
> >  	return 0;
> >  }
> > --
> > 2.25.1
> >
> >
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