* (no subject)
@ 2022-11-18 2:00 Jiamei Xie
2022-11-18 2:18 ` [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore Jiamei Xie
2022-11-18 7:47 ` Michal Orzel
0 siblings, 2 replies; 6+ messages in thread
From: Jiamei Xie @ 2022-11-18 2:00 UTC (permalink / raw)
To: xen-devel
Cc: Jiamei Xie, Stefano Stabellini, Julien Grall, Bertrand Marquis,
Volodymyr Babchuk, Wei Chen
Date: Thu, 17 Nov 2022 11:07:12 +0800
Subject: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
When the guest kernel enables DMA engine with "CONFIG_DMA_ENGINE=y",
Linux SBSA PL011 driver will access PL011 DMACR register in some
functions. As chapter "B Generic UART" in "ARM Server Base System
Architecture"[1] documentation describes, SBSA UART doesn't support
DMA. In current code, when the kernel tries to access DMACR register,
Xen will inject a data abort:
Unhandled fault at 0xffffffc00944d048
Mem abort info:
ESR = 0x96000000
EC = 0x25: DABT (current EL), IL = 32 bits
SET = 0, FnV = 0
EA = 0, S1PTW = 0
FSC = 0x00: ttbr address size fault
Data abort info:
ISV = 0, ISS = 0x00000000
CM = 0, WnR = 0
swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000020e2e000
[ffffffc00944d048] pgd=100000003ffff803, p4d=100000003ffff803, pud=100000003ffff803, pmd=100000003fffa803, pte=006800009c090f13
Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP
...
Call trace:
pl011_stop_rx+0x70/0x80
tty_port_shutdown+0x7c/0xb4
tty_port_close+0x60/0xcc
uart_close+0x34/0x8c
tty_release+0x144/0x4c0
__fput+0x78/0x220
____fput+0x1c/0x30
task_work_run+0x88/0xc0
do_notify_resume+0x8d0/0x123c
el0_svc+0xa8/0xc0
el0t_64_sync_handler+0xa4/0x130
el0t_64_sync+0x1a0/0x1a4
Code: b9000083 b901f001 794038a0 8b000042 (b9000041)
---[ end trace 83dd93df15c3216f ]---
note: bootlogd[132] exited with preempt_count 1
/etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon
As discussed in [2], this commit makes the access to DMACR register
write-ignore as an improvement.
[1] https://developer.arm.com/documentation/den0094/c/?lang=en
[2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2211161552420.4020@ubuntu-linux-20-04-desktop/
Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
---
xen/arch/arm/vpl011.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
index 43522d48fd..80d00b3052 100644
--- a/xen/arch/arm/vpl011.c
+++ b/xen/arch/arm/vpl011.c
@@ -463,6 +463,7 @@ static int vpl011_mmio_write(struct vcpu *v,
case FR:
case RIS:
case MIS:
+ case DMACR:
goto write_ignore;
case IMSC:
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* RE: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
2022-11-18 2:00 Jiamei Xie
@ 2022-11-18 2:18 ` Jiamei Xie
2022-11-18 7:41 ` Michal Orzel
2022-11-18 7:47 ` Michal Orzel
1 sibling, 1 reply; 6+ messages in thread
From: Jiamei Xie @ 2022-11-18 2:18 UTC (permalink / raw)
To: Jiamei Xie, xen-devel
Cc: Stefano Stabellini, Julien Grall, Bertrand Marquis,
Volodymyr Babchuk, Wei Chen
Hi
Sorry there is no subject in the last email. So add in this one.
Best wishes
Jiamei Xie
> -----Original Message-----
> From: Jiamei Xie <jiamei.xie@arm.com>
> Sent: Friday, November 18, 2022 10:00 AM
> To: xen-devel@lists.xenproject.org
> Cc: Jiamei Xie <Jiamei.Xie@arm.com>; Stefano Stabellini
> <sstabellini@kernel.org>; Julien Grall <julien@xen.org>; Bertrand Marquis
> <Bertrand.Marquis@arm.com>; Volodymyr Babchuk
> <Volodymyr_Babchuk@epam.com>; Wei Chen <Wei.Chen@arm.com>
> Subject:
>
> Date: Thu, 17 Nov 2022 11:07:12 +0800
> Subject: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
>
> When the guest kernel enables DMA engine with
> "CONFIG_DMA_ENGINE=y",
> Linux SBSA PL011 driver will access PL011 DMACR register in some
> functions. As chapter "B Generic UART" in "ARM Server Base System
> Architecture"[1] documentation describes, SBSA UART doesn't support
> DMA. In current code, when the kernel tries to access DMACR register,
> Xen will inject a data abort:
> Unhandled fault at 0xffffffc00944d048
> Mem abort info:
> ESR = 0x96000000
> EC = 0x25: DABT (current EL), IL = 32 bits
> SET = 0, FnV = 0
> EA = 0, S1PTW = 0
> FSC = 0x00: ttbr address size fault
> Data abort info:
> ISV = 0, ISS = 0x00000000
> CM = 0, WnR = 0
> swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000020e2e000
> [ffffffc00944d048] pgd=100000003ffff803, p4d=100000003ffff803,
> pud=100000003ffff803, pmd=100000003fffa803, pte=006800009c090f13
> Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP
> ...
> Call trace:
> pl011_stop_rx+0x70/0x80
> tty_port_shutdown+0x7c/0xb4
> tty_port_close+0x60/0xcc
> uart_close+0x34/0x8c
> tty_release+0x144/0x4c0
> __fput+0x78/0x220
> ____fput+0x1c/0x30
> task_work_run+0x88/0xc0
> do_notify_resume+0x8d0/0x123c
> el0_svc+0xa8/0xc0
> el0t_64_sync_handler+0xa4/0x130
> el0t_64_sync+0x1a0/0x1a4
> Code: b9000083 b901f001 794038a0 8b000042 (b9000041)
> ---[ end trace 83dd93df15c3216f ]---
> note: bootlogd[132] exited with preempt_count 1
> /etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon
>
> As discussed in [2], this commit makes the access to DMACR register
> write-ignore as an improvement.
>
> [1] https://developer.arm.com/documentation/den0094/c/?lang=en
> [2] https://lore.kernel.org/xen-
> devel/alpine.DEB.2.22.394.2211161552420.4020@ubuntu-linux-20-04-
> desktop/
>
> Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
> ---
> xen/arch/arm/vpl011.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
> index 43522d48fd..80d00b3052 100644
> --- a/xen/arch/arm/vpl011.c
> +++ b/xen/arch/arm/vpl011.c
> @@ -463,6 +463,7 @@ static int vpl011_mmio_write(struct vcpu *v,
> case FR:
> case RIS:
> case MIS:
> + case DMACR:
> goto write_ignore;
>
> case IMSC:
> --
> 2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
2022-11-18 2:18 ` [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore Jiamei Xie
@ 2022-11-18 7:41 ` Michal Orzel
2022-11-18 8:34 ` Jiamei Xie
0 siblings, 1 reply; 6+ messages in thread
From: Michal Orzel @ 2022-11-18 7:41 UTC (permalink / raw)
To: Jiamei Xie, xen-devel
Cc: Stefano Stabellini, Julien Grall, Bertrand Marquis,
Volodymyr Babchuk, Wei Chen
Hi Jiamei,
On 18/11/2022 03:18, Jiamei Xie wrote:
>
>
> Hi
>
> Sorry there is no subject in the last email. So add in this one.
I would consider re-pushing this patch(although please wait for some comments).
The reason being, a patch without a subject is not picked by patchwork/b4 or other
tools used to grab a patch.
~Michal
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re:
2022-11-18 2:00 Jiamei Xie
2022-11-18 2:18 ` [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore Jiamei Xie
@ 2022-11-18 7:47 ` Michal Orzel
2022-11-18 9:02 ` Re: Julien Grall
1 sibling, 1 reply; 6+ messages in thread
From: Michal Orzel @ 2022-11-18 7:47 UTC (permalink / raw)
To: Jiamei Xie, xen-devel
Cc: Stefano Stabellini, Julien Grall, Bertrand Marquis,
Volodymyr Babchuk, Wei Chen
Hi Jimaei,
On 18/11/2022 03:00, Jiamei Xie wrote:
>
>
> Date: Thu, 17 Nov 2022 11:07:12 +0800
> Subject: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
>
> When the guest kernel enables DMA engine with "CONFIG_DMA_ENGINE=y",
> Linux SBSA PL011 driver will access PL011 DMACR register in some
> functions. As chapter "B Generic UART" in "ARM Server Base System
> Architecture"[1] documentation describes, SBSA UART doesn't support
> DMA. In current code, when the kernel tries to access DMACR register,
> Xen will inject a data abort:
> Unhandled fault at 0xffffffc00944d048
> Mem abort info:
> ESR = 0x96000000
> EC = 0x25: DABT (current EL), IL = 32 bits
> SET = 0, FnV = 0
> EA = 0, S1PTW = 0
> FSC = 0x00: ttbr address size fault
> Data abort info:
> ISV = 0, ISS = 0x00000000
> CM = 0, WnR = 0
> swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000020e2e000
> [ffffffc00944d048] pgd=100000003ffff803, p4d=100000003ffff803, pud=100000003ffff803, pmd=100000003fffa803, pte=006800009c090f13
> Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP
> ...
> Call trace:
> pl011_stop_rx+0x70/0x80
> tty_port_shutdown+0x7c/0xb4
> tty_port_close+0x60/0xcc
> uart_close+0x34/0x8c
> tty_release+0x144/0x4c0
> __fput+0x78/0x220
> ____fput+0x1c/0x30
> task_work_run+0x88/0xc0
> do_notify_resume+0x8d0/0x123c
> el0_svc+0xa8/0xc0
> el0t_64_sync_handler+0xa4/0x130
> el0t_64_sync+0x1a0/0x1a4
> Code: b9000083 b901f001 794038a0 8b000042 (b9000041)
> ---[ end trace 83dd93df15c3216f ]---
> note: bootlogd[132] exited with preempt_count 1
> /etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon
>
> As discussed in [2], this commit makes the access to DMACR register
> write-ignore as an improvement.
As discussed earlier, if we decide to improve vpl011 (for now only Stefano shared his opinion),
then we need to mark *all* the PL011 registers that are not part of SBSA ar RAZ/WI. So handling
DMACR and only for writes is not beneficial (it is only fixing current Linux issue, but what we
really want is to improve the code in general).
>
> [1] https://developer.arm.com/documentation/den0094/c/?lang=en
> [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2211161552420.4020@ubuntu-linux-20-04-desktop/
>
> Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
> ---
> xen/arch/arm/vpl011.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
> index 43522d48fd..80d00b3052 100644
> --- a/xen/arch/arm/vpl011.c
> +++ b/xen/arch/arm/vpl011.c
> @@ -463,6 +463,7 @@ static int vpl011_mmio_write(struct vcpu *v,
> case FR:
> case RIS:
> case MIS:
> + case DMACR:
> goto write_ignore;
>
> case IMSC:
> --
> 2.25.1
>
>
~Michal
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
2022-11-18 7:41 ` Michal Orzel
@ 2022-11-18 8:34 ` Jiamei Xie
0 siblings, 0 replies; 6+ messages in thread
From: Jiamei Xie @ 2022-11-18 8:34 UTC (permalink / raw)
To: Michal Orzel, xen-devel
Cc: Stefano Stabellini, Julien Grall, Bertrand Marquis,
Volodymyr Babchuk, Wei Chen
Hi Michal,
> -----Original Message-----
> From: Michal Orzel <michal.orzel@amd.com>
> Sent: Friday, November 18, 2022 3:42 PM
> To: Jiamei Xie <Jiamei.Xie@arm.com>; xen-devel@lists.xenproject.org
> Cc: Stefano Stabellini <sstabellini@kernel.org>; Julien Grall <julien@xen.org>;
> Bertrand Marquis <Bertrand.Marquis@arm.com>; Volodymyr Babchuk
> <Volodymyr_Babchuk@epam.com>; Wei Chen <Wei.Chen@arm.com>
> Subject: Re: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
>
> Hi Jiamei,
>
> On 18/11/2022 03:18, Jiamei Xie wrote:
> >
> >
> > Hi
> >
> > Sorry there is no subject in the last email. So add in this one.
> I would consider re-pushing this patch(although please wait for some
> comments).
> The reason being, a patch without a subject is not picked by patchwork/b4 or
> other
> tools used to grab a patch.
Got it, thanks!
Best wishes
Jiamei Xie
>
> ~Michal
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re:
2022-11-18 7:47 ` Michal Orzel
@ 2022-11-18 9:02 ` Julien Grall
0 siblings, 0 replies; 6+ messages in thread
From: Julien Grall @ 2022-11-18 9:02 UTC (permalink / raw)
To: Michal Orzel, Jiamei Xie, xen-devel
Cc: Stefano Stabellini, Bertrand Marquis, Volodymyr Babchuk, Wei Chen
On 18/11/2022 07:47, Michal Orzel wrote:
> On 18/11/2022 03:00, Jiamei Xie wrote:
>>
>>
>> Date: Thu, 17 Nov 2022 11:07:12 +0800
>> Subject: [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore
>>
>> When the guest kernel enables DMA engine with "CONFIG_DMA_ENGINE=y",
>> Linux SBSA PL011 driver will access PL011 DMACR register in some
>> functions. As chapter "B Generic UART" in "ARM Server Base System
>> Architecture"[1] documentation describes, SBSA UART doesn't support
>> DMA. In current code, when the kernel tries to access DMACR register,
>> Xen will inject a data abort:
>> Unhandled fault at 0xffffffc00944d048
>> Mem abort info:
>> ESR = 0x96000000
>> EC = 0x25: DABT (current EL), IL = 32 bits
>> SET = 0, FnV = 0
>> EA = 0, S1PTW = 0
>> FSC = 0x00: ttbr address size fault
>> Data abort info:
>> ISV = 0, ISS = 0x00000000
>> CM = 0, WnR = 0
>> swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000020e2e000
>> [ffffffc00944d048] pgd=100000003ffff803, p4d=100000003ffff803, pud=100000003ffff803, pmd=100000003fffa803, pte=006800009c090f13
>> Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP
>> ...
>> Call trace:
>> pl011_stop_rx+0x70/0x80
>> tty_port_shutdown+0x7c/0xb4
>> tty_port_close+0x60/0xcc
>> uart_close+0x34/0x8c
>> tty_release+0x144/0x4c0
>> __fput+0x78/0x220
>> ____fput+0x1c/0x30
>> task_work_run+0x88/0xc0
>> do_notify_resume+0x8d0/0x123c
>> el0_svc+0xa8/0xc0
>> el0t_64_sync_handler+0xa4/0x130
>> el0t_64_sync+0x1a0/0x1a4
>> Code: b9000083 b901f001 794038a0 8b000042 (b9000041)
>> ---[ end trace 83dd93df15c3216f ]---
>> note: bootlogd[132] exited with preempt_count 1
>> /etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon
>>
>> As discussed in [2], this commit makes the access to DMACR register
>> write-ignore as an improvement.
> As discussed earlier, if we decide to improve vpl011 (for now only Stefano shared his opinion),
> then we need to mark *all* the PL011 registers that are not part of SBSA ar RAZ/WI.
I would be fine to that. But I would like us to print a message using
XENLOG_G_DEBUG to catch any OS that would touch those registers.
Cheers,
--
Julien Grall
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-11-18 9:03 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2022-11-18 2:00 Jiamei Xie
2022-11-18 2:18 ` [PATCH] xen/arm: vpl011: Make access to DMACR write-ignore Jiamei Xie
2022-11-18 7:41 ` Michal Orzel
2022-11-18 8:34 ` Jiamei Xie
2022-11-18 7:47 ` Michal Orzel
2022-11-18 9:02 ` Re: Julien Grall
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