[PATCHv2 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[PATCHv2 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by: Jochen Friedrich <jochen@scram.de>
Cc: Laurent Pinchart <laurentp@cse-semaphore.com>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)

Changes from version 1:

- conditionally include #include <linux/of_gpio.h> in cpm_common.c, so it compiles
  when GPIO on 8xx is not selected.

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index f6eecd1..78911f6 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -283,6 +283,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 5a6c5df..9311778 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..43bac6e 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -19,6 +19,8 @@
 
 #include <linux/init.h>
 #include <linux/of_device.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>
@@ -28,6 +30,10 @@
 
 #include <mm/mmu_decl.h>
 
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include <linux/of_gpio.h>
+#endif
+
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
 static u32 __iomem *cpm_udbg_txdesc =
 	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
 	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
 }
 EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 1;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ff..23b72ee 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */
@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
-- 
1.5.5

Re: [PATCHv2 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 6698 bytes --]

On Friday 18 April 2008 19:16, Jochen Friedrich wrote:
> Based on earlier work by Laurent Pinchart.
> 
> This patch implement GPIO LIB support for the CPM2 GPIOs.
> 
> Signed-off-by: Jochen Friedrich <jochen@scram.de>
> Cc: Laurent Pinchart <laurentp@cse-semaphore.com>

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>

Is there any showstopper or can this one be applied to powerpc-next ?

> ---
>  arch/powerpc/platforms/Kconfig   |    2 +
>  arch/powerpc/sysdev/cpm2.c       |   11 ++++
>  arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
>  include/asm-powerpc/cpm.h        |    3 +
>  4 files changed, 139 insertions(+), 0 deletions(-)
> 
> Changes from version 1:
> 
> - conditionally include #include <linux/of_gpio.h> in cpm_common.c, so it compiles
>   when GPIO on 8xx is not selected.
> 
> diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
> index f6eecd1..78911f6 100644
> --- a/arch/powerpc/platforms/Kconfig
> +++ b/arch/powerpc/platforms/Kconfig
> @@ -283,6 +283,8 @@ config CPM2
>  	depends on MPC85xx || 8260
>  	select CPM
>  	select PPC_LIB_RHEAP
> +	select GENERIC_GPIO
> +	select HAVE_GPIO_LIB
>  	help
>  	  The CPM2 (Communications Processor Module) is a coprocessor on
>  	  embedded CPUs made by Freescale.  Selecting this option means that
> diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
> index 5a6c5df..9311778 100644
> --- a/arch/powerpc/sysdev/cpm2.c
> +++ b/arch/powerpc/sysdev/cpm2.c
> @@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
>  	else
>  		clrbits32(&iop[port].odr, pin);
>  }
> +
> +static int cpm_init_par_io(void)
> +{
> +	struct device_node *np;
> +
> +	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
> +		cpm2_gpiochip_add32(np);
> +	return 0;
> +}
> +arch_initcall(cpm_init_par_io);
> +
> diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
> index cb7df2d..43bac6e 100644
> --- a/arch/powerpc/sysdev/cpm_common.c
> +++ b/arch/powerpc/sysdev/cpm_common.c
> @@ -19,6 +19,8 @@
>  
>  #include <linux/init.h>
>  #include <linux/of_device.h>
> +#include <linux/spinlock.h>
> +#include <linux/of.h>
>  
>  #include <asm/udbg.h>
>  #include <asm/io.h>
> @@ -28,6 +30,10 @@
>  
>  #include <mm/mmu_decl.h>
>  
> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
> +#include <linux/of_gpio.h>
> +#endif
> +
>  #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
>  static u32 __iomem *cpm_udbg_txdesc =
>  	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
> @@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
>  	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
>  }
>  EXPORT_SYMBOL(cpm_muram_dma);
> +
> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
> +
> +struct cpm2_ioports {
> +	u32 dir, par, sor, odr, dat;
> +	u32 res[3];
> +};
> +
> +struct cpm2_gpio32_chip {
> +	struct of_mm_gpio_chip mm_gc;
> +	spinlock_t lock;
> +
> +	/* shadowed data register to clear/set bits safely */
> +	u32 cpdata;
> +};
> +
> +static inline struct cpm2_gpio32_chip *
> +to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
> +{
> +	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
> +}
> +
> +static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
> +{
> +	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +
> +	cpm2_gc->cpdata = in_be32(&iop->dat);
> +}
> +
> +static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	u32 pin_mask;
> +
> +	pin_mask = 1 << (31 - gpio);
> +
> +	return !!(in_be32(&iop->dat) & pin_mask);
> +}
> +
> +static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	unsigned long flags;
> +	u32 pin_mask = 1 << (31 - gpio);
> +
> +	spin_lock_irqsave(&cpm2_gc->lock, flags);
> +
> +	if (value)
> +		cpm2_gc->cpdata |= pin_mask;
> +	else
> +		cpm2_gc->cpdata &= ~pin_mask;
> +
> +	out_be32(&iop->dat, cpm2_gc->cpdata);
> +
> +	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
> +}
> +
> +static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	u32 pin_mask;
> +
> +	pin_mask = 1 << (31 - gpio);
> +
> +	setbits32(&iop->dir, pin_mask);
> +
> +	cpm2_gpio32_set(gc, gpio, val);
> +
> +	return 0;
> +}
> +
> +static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	u32 pin_mask;
> +
> +	pin_mask = 1 << (31 - gpio);
> +
> +	clrbits32(&iop->dir, pin_mask);
> +
> +	return 0;
> +}
> +
> +int cpm2_gpiochip_add32(struct device_node *np)
> +{
> +	struct cpm2_gpio32_chip *cpm2_gc;
> +	struct of_mm_gpio_chip *mm_gc;
> +	struct of_gpio_chip *of_gc;
> +	struct gpio_chip *gc;
> +
> +	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
> +	if (!cpm2_gc)
> +		return -ENOMEM;
> +
> +	spin_lock_init(&cpm2_gc->lock);
> +
> +	mm_gc = &cpm2_gc->mm_gc;
> +	of_gc = &mm_gc->of_gc;
> +	gc = &of_gc->gc;
> +
> +	mm_gc->save_regs = cpm2_gpio32_save_regs;
> +	of_gc->gpio_cells = 1;
> +	gc->ngpio = 32;
> +	gc->direction_input = cpm2_gpio32_dir_in;
> +	gc->direction_output = cpm2_gpio32_dir_out;
> +	gc->get = cpm2_gpio32_get;
> +	gc->set = cpm2_gpio32_set;
> +
> +	return of_mm_gpiochip_add(np, mm_gc);
> +}
> +#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
> diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
> index ede38ff..23b72ee 100644
> --- a/include/asm-powerpc/cpm.h
> +++ b/include/asm-powerpc/cpm.h
> @@ -3,6 +3,7 @@
>  
>  #include <linux/compiler.h>
>  #include <linux/types.h>
> +#include <linux/of.h>
>  
>  /* Opcodes common to CPM1 and CPM2
>  */
> @@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
>  dma_addr_t cpm_muram_dma(void __iomem *addr);
>  int cpm_command(u32 command, u8 opcode);
>  
> +int cpm2_gpiochip_add32(struct device_node *np);
> +
>  #endif

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

Re: [PATCHv2 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Anton Vorontsov]

On Fri, Jun 13, 2008 at 02:46:20PM +0200, Laurent Pinchart wrote:
> On Friday 18 April 2008 19:16, Jochen Friedrich wrote:
> > Based on earlier work by Laurent Pinchart.
> > 
> > This patch implement GPIO LIB support for the CPM2 GPIOs.
> > 
> > Signed-off-by: Jochen Friedrich <jochen@scram.de>
> > Cc: Laurent Pinchart <laurentp@cse-semaphore.com>
> 
> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> 
> Is there any showstopper or can this one be applied to powerpc-next ?

One comment below.

[...]
> > +	mm_gc->save_regs = cpm2_gpio32_save_regs;
> > +	of_gc->gpio_cells = 1;

I would strongly suggest to use gpio_cells = 2, otherwise you will not
able to pass GPIO flags (such as active-low etc) without breaking the
compatibility with older trees.

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

Re: [PATCHv2 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 1095 bytes --]

On Friday 13 June 2008 16:57, Anton Vorontsov wrote:
> On Fri, Jun 13, 2008 at 02:46:20PM +0200, Laurent Pinchart wrote:
> > On Friday 18 April 2008 19:16, Jochen Friedrich wrote:
> > > Based on earlier work by Laurent Pinchart.
> > > 
> > > This patch implement GPIO LIB support for the CPM2 GPIOs.
> > > 
> > > Signed-off-by: Jochen Friedrich <jochen@scram.de>
> > > Cc: Laurent Pinchart <laurentp@cse-semaphore.com>
> > 
> > Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> > 
> > Is there any showstopper or can this one be applied to powerpc-next ?
> 
> One comment below.
> 
> [...]
> > > +	mm_gc->save_regs = cpm2_gpio32_save_regs;
> > > +	of_gc->gpio_cells = 1;
> 
> I would strongly suggest to use gpio_cells = 2, otherwise you will not
> able to pass GPIO flags (such as active-low etc) without breaking the
> compatibility with older trees.

Agreed. Jochen, will you resubmit or should I do it ?

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

Re: [PATCHv2 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Laurent,


> Agreed. Jochen, will you resubmit or should I do it ?
>
>   

Please do as i'm currently away and won't be back until next week.

Thanks,
Jochen

[PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 5937 bytes --]

Based on earlier work by Jochen Friedrich.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Cc: Jochen Friedrich <jochen@scram.de>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 87454c5..7e67e26 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 5a6c5df..9311778 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..b957a48 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -19,6 +19,8 @@
 
 #include <linux/init.h>
 #include <linux/of_device.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>
@@ -28,6 +30,10 @@
 
 #include <mm/mmu_decl.h>
 
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include <linux/of_gpio.h>
+#endif
+
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
 static u32 __iomem *cpm_udbg_txdesc =
 	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
 	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
 }
 EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 2;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ff..23b72ee 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */
@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
-- 
1.5.0

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 6490 bytes --]

On Wednesday 18 June 2008 19:08, Laurent Pinchart wrote:
> Based on earlier work by Jochen Friedrich.
> 
> This patch implement GPIO LIB support for the CPM2 GPIOs.

Is there any pending issue or can this be applied to powerpc-next ?

> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> Cc: Jochen Friedrich <jochen@scram.de>
> ---
>  arch/powerpc/platforms/Kconfig   |    2 +
>  arch/powerpc/sysdev/cpm2.c       |   11 ++++
>  arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
>  include/asm-powerpc/cpm.h        |    3 +
>  4 files changed, 139 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
> index 87454c5..7e67e26 100644
> --- a/arch/powerpc/platforms/Kconfig
> +++ b/arch/powerpc/platforms/Kconfig
> @@ -280,6 +280,8 @@ config CPM2
>  	depends on MPC85xx || 8260
>  	select CPM
>  	select PPC_LIB_RHEAP
> +	select GENERIC_GPIO
> +	select HAVE_GPIO_LIB
>  	help
>  	  The CPM2 (Communications Processor Module) is a coprocessor on
>  	  embedded CPUs made by Freescale.  Selecting this option means that
> diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
> index 5a6c5df..9311778 100644
> --- a/arch/powerpc/sysdev/cpm2.c
> +++ b/arch/powerpc/sysdev/cpm2.c
> @@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
>  	else
>  		clrbits32(&iop[port].odr, pin);
>  }
> +
> +static int cpm_init_par_io(void)
> +{
> +	struct device_node *np;
> +
> +	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
> +		cpm2_gpiochip_add32(np);
> +	return 0;
> +}
> +arch_initcall(cpm_init_par_io);
> +
> diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
> index cb7df2d..b957a48 100644
> --- a/arch/powerpc/sysdev/cpm_common.c
> +++ b/arch/powerpc/sysdev/cpm_common.c
> @@ -19,6 +19,8 @@
>  
>  #include <linux/init.h>
>  #include <linux/of_device.h>
> +#include <linux/spinlock.h>
> +#include <linux/of.h>
>  
>  #include <asm/udbg.h>
>  #include <asm/io.h>
> @@ -28,6 +30,10 @@
>  
>  #include <mm/mmu_decl.h>
>  
> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
> +#include <linux/of_gpio.h>
> +#endif
> +
>  #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
>  static u32 __iomem *cpm_udbg_txdesc =
>  	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
> @@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
>  	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
>  }
>  EXPORT_SYMBOL(cpm_muram_dma);
> +
> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
> +
> +struct cpm2_ioports {
> +	u32 dir, par, sor, odr, dat;
> +	u32 res[3];
> +};
> +
> +struct cpm2_gpio32_chip {
> +	struct of_mm_gpio_chip mm_gc;
> +	spinlock_t lock;
> +
> +	/* shadowed data register to clear/set bits safely */
> +	u32 cpdata;
> +};
> +
> +static inline struct cpm2_gpio32_chip *
> +to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
> +{
> +	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
> +}
> +
> +static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
> +{
> +	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +
> +	cpm2_gc->cpdata = in_be32(&iop->dat);
> +}
> +
> +static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	u32 pin_mask;
> +
> +	pin_mask = 1 << (31 - gpio);
> +
> +	return !!(in_be32(&iop->dat) & pin_mask);
> +}
> +
> +static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	unsigned long flags;
> +	u32 pin_mask = 1 << (31 - gpio);
> +
> +	spin_lock_irqsave(&cpm2_gc->lock, flags);
> +
> +	if (value)
> +		cpm2_gc->cpdata |= pin_mask;
> +	else
> +		cpm2_gc->cpdata &= ~pin_mask;
> +
> +	out_be32(&iop->dat, cpm2_gc->cpdata);
> +
> +	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
> +}
> +
> +static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	u32 pin_mask;
> +
> +	pin_mask = 1 << (31 - gpio);
> +
> +	setbits32(&iop->dir, pin_mask);
> +
> +	cpm2_gpio32_set(gc, gpio, val);
> +
> +	return 0;
> +}
> +
> +static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> +	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> +	struct cpm2_ioports __iomem *iop = mm_gc->regs;
> +	u32 pin_mask;
> +
> +	pin_mask = 1 << (31 - gpio);
> +
> +	clrbits32(&iop->dir, pin_mask);
> +
> +	return 0;
> +}
> +
> +int cpm2_gpiochip_add32(struct device_node *np)
> +{
> +	struct cpm2_gpio32_chip *cpm2_gc;
> +	struct of_mm_gpio_chip *mm_gc;
> +	struct of_gpio_chip *of_gc;
> +	struct gpio_chip *gc;
> +
> +	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
> +	if (!cpm2_gc)
> +		return -ENOMEM;
> +
> +	spin_lock_init(&cpm2_gc->lock);
> +
> +	mm_gc = &cpm2_gc->mm_gc;
> +	of_gc = &mm_gc->of_gc;
> +	gc = &of_gc->gc;
> +
> +	mm_gc->save_regs = cpm2_gpio32_save_regs;
> +	of_gc->gpio_cells = 2;
> +	gc->ngpio = 32;
> +	gc->direction_input = cpm2_gpio32_dir_in;
> +	gc->direction_output = cpm2_gpio32_dir_out;
> +	gc->get = cpm2_gpio32_get;
> +	gc->set = cpm2_gpio32_set;
> +
> +	return of_mm_gpiochip_add(np, mm_gc);
> +}
> +#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
> diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
> index ede38ff..23b72ee 100644
> --- a/include/asm-powerpc/cpm.h
> +++ b/include/asm-powerpc/cpm.h
> @@ -3,6 +3,7 @@
>  
>  #include <linux/compiler.h>
>  #include <linux/types.h>
> +#include <linux/of.h>
>  
>  /* Opcodes common to CPM1 and CPM2
>  */
> @@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
>  dma_addr_t cpm_muram_dma(void __iomem *addr);
>  int cpm_command(u32 command, u8 opcode);
>  
> +int cpm2_gpiochip_add32(struct device_node *np);
> +
>  #endif
> -- 
> 1.5.0
> 

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Laurent,

> Is there any pending issue or can this be applied to powerpc-next ?

Looks OK to me.

>> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
>> Cc: Jochen Friedrich <jochen@scram.de>
Acked-by: Jochen Friedrich <jochen@scram.de>

Thanks,
Jochen

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 574 bytes --]

On Friday 27 June 2008, Jochen Friedrich wrote:
> Hi Laurent,
> 
> > Is there any pending issue or can this be applied to powerpc-next ?
> 
> Looks OK to me.
> 
> >> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> >> Cc: Jochen Friedrich <jochen@scram.de>
> Acked-by: Jochen Friedrich <jochen@scram.de>

Any news on this patch ? Kumar, could you apply it to your tree for 2.6.27 ?

Best regards,

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

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Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jul 18, 2008, at 9:38 AM, Laurent Pinchart wrote:

> On Friday 27 June 2008, Jochen Friedrich wrote:
>> Hi Laurent,
>>
>>> Is there any pending issue or can this be applied to powerpc-next ?
>>
>> Looks OK to me.
>>
>>>> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
>>>> Cc: Jochen Friedrich <jochen@scram.de>
>> Acked-by: Jochen Friedrich <jochen@scram.de>
>
> Any news on this patch ? Kumar, could you apply it to your tree for  
> 2.6.27 ?

Can you repost it.  I not sure what patch 2/2 was and if I've already  
dealt with it.

- k

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 1152 bytes --]

On Friday 18 July 2008, Kumar Gala wrote:
> 
> On Jul 18, 2008, at 9:38 AM, Laurent Pinchart wrote:
> 
> > On Friday 27 June 2008, Jochen Friedrich wrote:
> >> Hi Laurent,
> >>
> >>> Is there any pending issue or can this be applied to powerpc-next ?
> >>
> >> Looks OK to me.
> >>
> >>>> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> >>>> Cc: Jochen Friedrich <jochen@scram.de>
> >> Acked-by: Jochen Friedrich <jochen@scram.de>
> >
> > Any news on this patch ? Kumar, could you apply it to your tree for  
> > 2.6.27 ?
> 
> Can you repost it.  I not sure what patch 2/2 was and if I've already  
> dealt with it.

2/2 was "[PATCH2/2] [POWERPC] CPM1: implement GPIO LIB API on CPM1 Freescale SoC." posted by Jochen Friedrich. You haven't dealt with it yet as far as I know, but it would be up to Jochen to resubmit.

The "PATCHv3 1/2" patch can be considered as-is, as it doesn't depend on 2/2. Should I resubmit a "PATCHv4" that just changes the subject line ?

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: This is a digitally signed message part. --]
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Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jul 18, 2008, at 10:07 AM, Laurent Pinchart wrote:

> On Friday 18 July 2008, Kumar Gala wrote:
>>
>> On Jul 18, 2008, at 9:38 AM, Laurent Pinchart wrote:
>>
>>> On Friday 27 June 2008, Jochen Friedrich wrote:
>>>> Hi Laurent,
>>>>
>>>>> Is there any pending issue or can this be applied to powerpc- 
>>>>> next ?
>>>>
>>>> Looks OK to me.
>>>>
>>>>>> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
>>>>>> Cc: Jochen Friedrich <jochen@scram.de>
>>>> Acked-by: Jochen Friedrich <jochen@scram.de>
>>>
>>> Any news on this patch ? Kumar, could you apply it to your tree for
>>> 2.6.27 ?
>>
>> Can you repost it.  I not sure what patch 2/2 was and if I've already
>> dealt with it.
>
> 2/2 was "[PATCH2/2] [POWERPC] CPM1: implement GPIO LIB API on CPM1  
> Freescale SoC." posted by Jochen Friedrich. You haven't dealt with  
> it yet as far as I know, but it would be up to Jochen to resubmit.

Since it sounds like CPM1 and CPM2 gpio are different I'd like a new  
patch.  I'll send comments on v3.

> The "PATCHv3 1/2" patch can be considered as-is, as it doesn't  
> depend on 2/2. Should I resubmit a "PATCHv4" that just changes the  
> subject line ?

You can generate a v4 w/my desired changes.

- k

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jun 18, 2008, at 12:08 PM, Laurent Pinchart wrote:

> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
> +
> +struct cpm2_ioports {
> +	u32 dir, par, sor, odr, dat;
> +	u32 res[3];
> +};
> +

is this really common for both CPM2 and 8xx?  if so why the name?

- k

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Kumar,

> On Jun 18, 2008, at 12:08 PM, Laurent Pinchart wrote:
> 
>> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
>> +
>> +struct cpm2_ioports {
>> +	u32 dir, par, sor, odr, dat;
>> +	u32 res[3];
>> +};
>> +
> 
> is this really common for both CPM2 and 8xx?  if so why the name?

It is common to CPM2 and Port E of CPM1.

Thanks,
Jochen

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jul 18, 2008, at 10:30 AM, Jochen Friedrich wrote:

> Hi Kumar,
>
>> On Jun 18, 2008, at 12:08 PM, Laurent Pinchart wrote:
>>
>>> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
>>> +
>>> +struct cpm2_ioports {
>>> +	u32 dir, par, sor, odr, dat;
>>> +	u32 res[3];
>>> +};
>>> +
>>
>> is this really common for both CPM2 and 8xx?  if so why the name?
>
> It is common to CPM2 and Port E of CPM1.

but ports a-d are different on cpm1?  I guess I'd like to see both  
patches to understand the commonality and differences.

- k

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Jochen Friedrich]

Hi Kumar,

> but ports a-d are different on cpm1?  I guess I'd like to see both  
> patches to understand the commonality and differences.

Yes. Both patches are still in patchwork:

http://patchwork.ozlabs.org/linuxppc/patch?id=19045
http://patchwork.ozlabs.org/linuxppc/patch?id=19386

Thanks,
Jochen

Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

[-- Attachment #1: Type: text/plain, Size: 1008 bytes --]

Hi Kumar,

On Friday 18 July 2008, Kumar Gala wrote:
> On Jul 18, 2008, at 10:30 AM, Jochen Friedrich wrote:
> >> On Jun 18, 2008, at 12:08 PM, Laurent Pinchart wrote:
> >>
> >>> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
> >>> +
> >>> +struct cpm2_ioports {
> >>> +	u32 dir, par, sor, odr, dat;
> >>> +	u32 res[3];
> >>> +};
> >>> +
> >>
> >> is this really common for both CPM2 and 8xx?  if so why the name?
> >
> > It is common to CPM2 and Port E of CPM1.
> 
> but ports a-d are different on cpm1?  I guess I'd like to see both  
> patches to understand the commonality and differences.

As Jorgen mentionned, both patches are still in patchwork:

http://patchwork.ozlabs.org/linuxppc/patch?id=19045
http://patchwork.ozlabs.org/linuxppc/patch?id=19386

Would it be possible for you to review them in time for 2.6.27 ?

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

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Re: [PATCHv3 1/2] [POWERPC] CPM2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jul 24, 2008, at 9:46 AM, Laurent Pinchart wrote:

> Hi Kumar,
>
> On Friday 18 July 2008, Kumar Gala wrote:
>> On Jul 18, 2008, at 10:30 AM, Jochen Friedrich wrote:
>>>> On Jun 18, 2008, at 12:08 PM, Laurent Pinchart wrote:
>>>>
>>>>> +#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
>>>>> +
>>>>> +struct cpm2_ioports {
>>>>> +	u32 dir, par, sor, odr, dat;
>>>>> +	u32 res[3];
>>>>> +};
>>>>> +
>>>>
>>>> is this really common for both CPM2 and 8xx?  if so why the name?
>>>
>>> It is common to CPM2 and Port E of CPM1.
>>
>> but ports a-d are different on cpm1?  I guess I'd like to see both
>> patches to understand the commonality and differences.
>
> As Jorgen mentionned, both patches are still in patchwork:
>
> http://patchwork.ozlabs.org/linuxppc/patch?id=19045
> http://patchwork.ozlabs.org/linuxppc/patch?id=19386
>
> Would it be possible for you to review them in time for 2.6.27 ?

Yes.  Can you resend the first patch and add some details in the  
commit message about the fact we can also use this code for 8xx/CPM1  
port E.

- k

[PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

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This patch implement GPIO LIB support for the CPM2 GPIOs. The code can also be
used for CPM1 GPIO port E, as both cores are compatible at the register level.

Based on earlier work by Jochen Friedrich.

Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Cc: Jochen Friedrich <jochen@scram.de>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 87454c5..7e67e26 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 5a6c5df..9311778 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..b957a48 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -19,6 +19,8 @@
 
 #include <linux/init.h>
 #include <linux/of_device.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>
@@ -28,6 +30,10 @@
 
 #include <mm/mmu_decl.h>
 
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include <linux/of_gpio.h>
+#endif
+
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
 static u32 __iomem *cpm_udbg_txdesc =
 	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
 	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
 }
 EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 2;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ff..23b72ee 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */
@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
-- 
1.5.0

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

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Re: [PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jul 24, 2008, at 11:00 AM, Laurent Pinchart wrote:

> This patch implement GPIO LIB support for the CPM2 GPIOs. The code  
> can also be
> used for CPM1 GPIO port E, as both cores are compatible at the  
> register level.
>
> Based on earlier work by Jochen Friedrich.
>
> Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
> Cc: Jochen Friedrich <jochen@scram.de>
> ---
> arch/powerpc/platforms/Kconfig   |    2 +
> arch/powerpc/sysdev/cpm2.c       |   11 ++++
> arch/powerpc/sysdev/cpm_common.c |  123 +++++++++++++++++++++++++++++ 
> +++++++++
> include/asm-powerpc/cpm.h        |    3 +
> 4 files changed, 139 insertions(+), 0 deletions(-)

I'm having similar mailer issues with this patch.

- k

Re: [PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Laurent Pinchart]

Based on earlier work by Laurent Pinchart.

This patch implement GPIO LIB support for the CPM2 GPIOs.

Signed-off-by: Jochen Friedrich <jochen@scram.de>
Cc: Laurent Pinchart <laurentp@cse-semaphore.com>
---
 arch/powerpc/platforms/Kconfig   |    2 +
 arch/powerpc/sysdev/cpm2.c       |   11 ++++
 arch/powerpc/sysdev/cpm_common.c |  123 ++++++++++++++++++++++++++++++++++++++
 include/asm-powerpc/cpm.h        |    3 +
 4 files changed, 139 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 87454c5..7e67e26 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -280,6 +280,8 @@ config CPM2
 	depends on MPC85xx || 8260
 	select CPM
 	select PPC_LIB_RHEAP
+	select GENERIC_GPIO
+	select HAVE_GPIO_LIB
 	help
 	  The CPM2 (Communications Processor Module) is a coprocessor on
 	  embedded CPUs made by Freescale.  Selecting this option means that
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index 5a6c5df..9311778 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -377,3 +377,14 @@ void cpm2_set_pin(int port, int pin, int flags)
 	else
 		clrbits32(&iop[port].odr, pin);
 }
+
+static int cpm_init_par_io(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,cpm2-pario-bank")
+		cpm2_gpiochip_add32(np);
+	return 0;
+}
+arch_initcall(cpm_init_par_io);
+
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..b957a48 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -19,6 +19,8 @@
 
 #include <linux/init.h>
 #include <linux/of_device.h>
+#include <linux/spinlock.h>
+#include <linux/of.h>
 
 #include <asm/udbg.h>
 #include <asm/io.h>
@@ -28,6 +30,10 @@
 
 #include <mm/mmu_decl.h>
 
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+#include <linux/of_gpio.h>
+#endif
+
 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
 static u32 __iomem *cpm_udbg_txdesc =
 	(u32 __iomem __force *)CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
@@ -198,3 +204,120 @@ dma_addr_t cpm_muram_dma(void __iomem *addr)
 	return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
 }
 EXPORT_SYMBOL(cpm_muram_dma);
+
+#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
+
+struct cpm2_ioports {
+	u32 dir, par, sor, odr, dat;
+	u32 res[3];
+};
+
+struct cpm2_gpio32_chip {
+	struct of_mm_gpio_chip mm_gc;
+	spinlock_t lock;
+
+	/* shadowed data register to clear/set bits safely */
+	u32 cpdata;
+};
+
+static inline struct cpm2_gpio32_chip *
+to_cpm2_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+	return container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
+}
+
+static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+
+	cpm2_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	unsigned long flags;
+	u32 pin_mask = 1 << (31 - gpio);
+
+	spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+	if (value)
+		cpm2_gc->cpdata |= pin_mask;
+	else
+		cpm2_gc->cpdata &= ~pin_mask;
+
+	out_be32(&iop->dat, cpm2_gc->cpdata);
+
+	spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+}
+
+static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	setbits32(&iop->dir, pin_mask);
+
+	cpm2_gpio32_set(gc, gpio, val);
+
+	return 0;
+}
+
+static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+	struct cpm2_ioports __iomem *iop = mm_gc->regs;
+	u32 pin_mask;
+
+	pin_mask = 1 << (31 - gpio);
+
+	clrbits32(&iop->dir, pin_mask);
+
+	return 0;
+}
+
+int cpm2_gpiochip_add32(struct device_node *np)
+{
+	struct cpm2_gpio32_chip *cpm2_gc;
+	struct of_mm_gpio_chip *mm_gc;
+	struct of_gpio_chip *of_gc;
+	struct gpio_chip *gc;
+
+	cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
+	if (!cpm2_gc)
+		return -ENOMEM;
+
+	spin_lock_init(&cpm2_gc->lock);
+
+	mm_gc = &cpm2_gc->mm_gc;
+	of_gc = &mm_gc->of_gc;
+	gc = &of_gc->gc;
+
+	mm_gc->save_regs = cpm2_gpio32_save_regs;
+	of_gc->gpio_cells = 2;
+	gc->ngpio = 32;
+	gc->direction_input = cpm2_gpio32_dir_in;
+	gc->direction_output = cpm2_gpio32_dir_out;
+	gc->get = cpm2_gpio32_get;
+	gc->set = cpm2_gpio32_set;
+
+	return of_mm_gpiochip_add(np, mm_gc);
+}
+#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ff..23b72ee 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -3,6 +3,7 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/of.h>
 
 /* Opcodes common to CPM1 and CPM2
 */
@@ -99,4 +100,6 @@ void __iomem *cpm_muram_addr(unsigned long offset);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
+int cpm2_gpiochip_add32(struct device_node *np);
+
 #endif
-- 
1.5.0

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

Re: [PATCHv4] cpm2: Implement GPIO LIB API on CPM2 Freescale SoC.

[Kumar Gala]

On Jul 28, 2008, at 3:43 AM, Laurent Pinchart wrote:

> Based on earlier work by Laurent Pinchart.
>
> This patch implement GPIO LIB support for the CPM2 GPIOs.
>
> Signed-off-by: Jochen Friedrich <jochen@scram.de>
> Cc: Laurent Pinchart <laurentp@cse-semaphore.com>
> ---
> arch/powerpc/platforms/Kconfig   |    2 +
> arch/powerpc/sysdev/cpm2.c       |   11 ++++
> arch/powerpc/sysdev/cpm_common.c |  123 +++++++++++++++++++++++++++++ 
> +++++++++
> include/asm-powerpc/cpm.h        |    3 +
> 4 files changed, 139 insertions(+), 0 deletions(-)

applied.

- k