* [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning
@ 2019-08-03 0:33 ` Qian Cai
0 siblings, 0 replies; 8+ messages in thread
From: Qian Cai @ 2019-08-03 0:33 UTC (permalink / raw)
To: will, catalin.marinas
Cc: rrichter, robin.murphy, linux-arm-kernel, linux-kernel, Qian Cai
The commit d5370f754875 ("arm64: prefetch: add alternative pattern for
CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be
used in has_no_hw_prefetch() with rv_min=0 which generates a compilation
warning from GCC,
In file included from ./arch/arm64/include/asm/cache.h:8,
from ./include/linux/cache.h:6,
from ./include/linux/printk.h:9,
from ./include/linux/kernel.h:15,
from ./include/linux/cpumask.h:10,
from arch/arm64/kernel/cpufeature.c:11:
arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch':
./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of
unsigned expression >= 0 is always true [-Wtype-limits]
_model == (model) && rv >= (rv_min) && rv <= (rv_max); \
^~
arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro
'MIDR_IS_CPU_MODEL_RANGE'
return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX,
^~~~~~~~~~~~~~~~~~~~~~~
Fix it by making "rv" a "s32".
Signed-off-by: Qian Cai <cai@lca.pw>
---
v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered.
arch/arm64/include/asm/cputype.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index e7d46631cc42..d52fe8651c2d 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -54,7 +54,7 @@
#define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \
({ \
u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \
- u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \
+ s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \
\
_model == (model) && rv >= (rv_min) && rv <= (rv_max); \
})
--
2.20.1 (Apple Git-117)
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning @ 2019-08-03 0:33 ` Qian Cai 0 siblings, 0 replies; 8+ messages in thread From: Qian Cai @ 2019-08-03 0:33 UTC (permalink / raw) To: will, catalin.marinas Cc: rrichter, Qian Cai, robin.murphy, linux-kernel, linux-arm-kernel The commit d5370f754875 ("arm64: prefetch: add alternative pattern for CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be used in has_no_hw_prefetch() with rv_min=0 which generates a compilation warning from GCC, In file included from ./arch/arm64/include/asm/cache.h:8, from ./include/linux/cache.h:6, from ./include/linux/printk.h:9, from ./include/linux/kernel.h:15, from ./include/linux/cpumask.h:10, from arch/arm64/kernel/cpufeature.c:11: arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of unsigned expression >= 0 is always true [-Wtype-limits] _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ ^~ arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro 'MIDR_IS_CPU_MODEL_RANGE' return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, ^~~~~~~~~~~~~~~~~~~~~~~ Fix it by making "rv" a "s32". Signed-off-by: Qian Cai <cai@lca.pw> --- v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. arch/arm64/include/asm/cputype.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index e7d46631cc42..d52fe8651c2d 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -54,7 +54,7 @@ #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ ({ \ u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ \ _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ }) -- 2.20.1 (Apple Git-117) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning 2019-08-03 0:33 ` Qian Cai @ 2019-08-05 10:00 ` Will Deacon -1 siblings, 0 replies; 8+ messages in thread From: Will Deacon @ 2019-08-05 10:00 UTC (permalink / raw) To: Qian Cai Cc: catalin.marinas, rrichter, robin.murphy, linux-arm-kernel, linux-kernel On Fri, Aug 02, 2019 at 08:33:58PM -0400, Qian Cai wrote: > The commit d5370f754875 ("arm64: prefetch: add alternative pattern for > CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be > used in has_no_hw_prefetch() with rv_min=0 which generates a compilation > warning from GCC, > > In file included from ./arch/arm64/include/asm/cache.h:8, > from ./include/linux/cache.h:6, > from ./include/linux/printk.h:9, > from ./include/linux/kernel.h:15, > from ./include/linux/cpumask.h:10, > from arch/arm64/kernel/cpufeature.c:11: > arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': > ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of > unsigned expression >= 0 is always true [-Wtype-limits] > _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ > ^~ > arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro > 'MIDR_IS_CPU_MODEL_RANGE' > return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, > ^~~~~~~~~~~~~~~~~~~~~~~ > > Fix it by making "rv" a "s32". > > Signed-off-by: Qian Cai <cai@lca.pw> > --- > > v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. > > arch/arm64/include/asm/cputype.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h > index e7d46631cc42..d52fe8651c2d 100644 > --- a/arch/arm64/include/asm/cputype.h > +++ b/arch/arm64/include/asm/cputype.h > @@ -54,7 +54,7 @@ > #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ > ({ \ > u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ > - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ Hmm, but this really isn't a signed quantity: it's two fields extracted from an ID register. I think the code is fine. Are you explicitly enabling -Wtype-limits somehow? Will ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning @ 2019-08-05 10:00 ` Will Deacon 0 siblings, 0 replies; 8+ messages in thread From: Will Deacon @ 2019-08-05 10:00 UTC (permalink / raw) To: Qian Cai Cc: rrichter, catalin.marinas, robin.murphy, linux-kernel, linux-arm-kernel On Fri, Aug 02, 2019 at 08:33:58PM -0400, Qian Cai wrote: > The commit d5370f754875 ("arm64: prefetch: add alternative pattern for > CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be > used in has_no_hw_prefetch() with rv_min=0 which generates a compilation > warning from GCC, > > In file included from ./arch/arm64/include/asm/cache.h:8, > from ./include/linux/cache.h:6, > from ./include/linux/printk.h:9, > from ./include/linux/kernel.h:15, > from ./include/linux/cpumask.h:10, > from arch/arm64/kernel/cpufeature.c:11: > arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': > ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of > unsigned expression >= 0 is always true [-Wtype-limits] > _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ > ^~ > arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro > 'MIDR_IS_CPU_MODEL_RANGE' > return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, > ^~~~~~~~~~~~~~~~~~~~~~~ > > Fix it by making "rv" a "s32". > > Signed-off-by: Qian Cai <cai@lca.pw> > --- > > v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. > > arch/arm64/include/asm/cputype.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h > index e7d46631cc42..d52fe8651c2d 100644 > --- a/arch/arm64/include/asm/cputype.h > +++ b/arch/arm64/include/asm/cputype.h > @@ -54,7 +54,7 @@ > #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ > ({ \ > u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ > - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ Hmm, but this really isn't a signed quantity: it's two fields extracted from an ID register. I think the code is fine. Are you explicitly enabling -Wtype-limits somehow? Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning 2019-08-05 10:00 ` Will Deacon @ 2019-08-05 12:03 ` Qian Cai -1 siblings, 0 replies; 8+ messages in thread From: Qian Cai @ 2019-08-05 12:03 UTC (permalink / raw) To: Will Deacon Cc: Catalin Marinas, rrichter, robin.murphy, linux-arm-kernel, linux-kernel > On Aug 5, 2019, at 6:00 AM, Will Deacon <will@kernel.org> wrote: > > On Fri, Aug 02, 2019 at 08:33:58PM -0400, Qian Cai wrote: >> The commit d5370f754875 ("arm64: prefetch: add alternative pattern for >> CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be >> used in has_no_hw_prefetch() with rv_min=0 which generates a compilation >> warning from GCC, >> >> In file included from ./arch/arm64/include/asm/cache.h:8, >> from ./include/linux/cache.h:6, >> from ./include/linux/printk.h:9, >> from ./include/linux/kernel.h:15, >> from ./include/linux/cpumask.h:10, >> from arch/arm64/kernel/cpufeature.c:11: >> arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': >> ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of >> unsigned expression >= 0 is always true [-Wtype-limits] >> _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ >> ^~ >> arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro >> 'MIDR_IS_CPU_MODEL_RANGE' >> return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, >> ^~~~~~~~~~~~~~~~~~~~~~~ >> >> Fix it by making "rv" a "s32". >> >> Signed-off-by: Qian Cai <cai@lca.pw> >> --- >> >> v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. >> >> arch/arm64/include/asm/cputype.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h >> index e7d46631cc42..d52fe8651c2d 100644 >> --- a/arch/arm64/include/asm/cputype.h >> +++ b/arch/arm64/include/asm/cputype.h >> @@ -54,7 +54,7 @@ >> #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ >> ({ \ >> u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ >> - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ >> + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > > Hmm, but this really isn't a signed quantity: it's two fields extracted > from an ID register. I think the code is fine. Are you explicitly enabling > -Wtype-limits somehow? Yes, it is useful to catch unintended developer mistakes or simply optimize wasted instructions of checking like in, 919aef44d73d (“x86/efi: fix a -Wtype-limits compilation warning”) 5a82bdb48f04 (“x86/cacheinfo: Fix a -Wtype-limits warning”) It is normal to fix a false positive this way as in other mainline commits, ec6335586953 (“x86/apic: Silence -Wtype-limits compiler warnings”) Once those false-positives are under control, the warning flag could be then enabled by default in the future. ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning @ 2019-08-05 12:03 ` Qian Cai 0 siblings, 0 replies; 8+ messages in thread From: Qian Cai @ 2019-08-05 12:03 UTC (permalink / raw) To: Will Deacon Cc: rrichter, Catalin Marinas, robin.murphy, linux-kernel, linux-arm-kernel > On Aug 5, 2019, at 6:00 AM, Will Deacon <will@kernel.org> wrote: > > On Fri, Aug 02, 2019 at 08:33:58PM -0400, Qian Cai wrote: >> The commit d5370f754875 ("arm64: prefetch: add alternative pattern for >> CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be >> used in has_no_hw_prefetch() with rv_min=0 which generates a compilation >> warning from GCC, >> >> In file included from ./arch/arm64/include/asm/cache.h:8, >> from ./include/linux/cache.h:6, >> from ./include/linux/printk.h:9, >> from ./include/linux/kernel.h:15, >> from ./include/linux/cpumask.h:10, >> from arch/arm64/kernel/cpufeature.c:11: >> arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': >> ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of >> unsigned expression >= 0 is always true [-Wtype-limits] >> _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ >> ^~ >> arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro >> 'MIDR_IS_CPU_MODEL_RANGE' >> return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, >> ^~~~~~~~~~~~~~~~~~~~~~~ >> >> Fix it by making "rv" a "s32". >> >> Signed-off-by: Qian Cai <cai@lca.pw> >> --- >> >> v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. >> >> arch/arm64/include/asm/cputype.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h >> index e7d46631cc42..d52fe8651c2d 100644 >> --- a/arch/arm64/include/asm/cputype.h >> +++ b/arch/arm64/include/asm/cputype.h >> @@ -54,7 +54,7 @@ >> #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ >> ({ \ >> u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ >> - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ >> + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > > Hmm, but this really isn't a signed quantity: it's two fields extracted > from an ID register. I think the code is fine. Are you explicitly enabling > -Wtype-limits somehow? Yes, it is useful to catch unintended developer mistakes or simply optimize wasted instructions of checking like in, 919aef44d73d (“x86/efi: fix a -Wtype-limits compilation warning”) 5a82bdb48f04 (“x86/cacheinfo: Fix a -Wtype-limits warning”) It is normal to fix a false positive this way as in other mainline commits, ec6335586953 (“x86/apic: Silence -Wtype-limits compiler warnings”) Once those false-positives are under control, the warning flag could be then enabled by default in the future. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning 2019-08-05 12:03 ` Qian Cai @ 2019-08-05 17:03 ` Will Deacon -1 siblings, 0 replies; 8+ messages in thread From: Will Deacon @ 2019-08-05 17:03 UTC (permalink / raw) To: Qian Cai Cc: Catalin Marinas, rrichter, robin.murphy, linux-arm-kernel, linux-kernel On Mon, Aug 05, 2019 at 08:03:10AM -0400, Qian Cai wrote: > > > > On Aug 5, 2019, at 6:00 AM, Will Deacon <will@kernel.org> wrote: > > > > On Fri, Aug 02, 2019 at 08:33:58PM -0400, Qian Cai wrote: > >> The commit d5370f754875 ("arm64: prefetch: add alternative pattern for > >> CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be > >> used in has_no_hw_prefetch() with rv_min=0 which generates a compilation > >> warning from GCC, > >> > >> In file included from ./arch/arm64/include/asm/cache.h:8, > >> from ./include/linux/cache.h:6, > >> from ./include/linux/printk.h:9, > >> from ./include/linux/kernel.h:15, > >> from ./include/linux/cpumask.h:10, > >> from arch/arm64/kernel/cpufeature.c:11: > >> arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': > >> ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of > >> unsigned expression >= 0 is always true [-Wtype-limits] > >> _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ > >> ^~ > >> arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro > >> 'MIDR_IS_CPU_MODEL_RANGE' > >> return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, > >> ^~~~~~~~~~~~~~~~~~~~~~~ > >> > >> Fix it by making "rv" a "s32". > >> > >> Signed-off-by: Qian Cai <cai@lca.pw> > >> --- > >> > >> v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. > >> > >> arch/arm64/include/asm/cputype.h | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h > >> index e7d46631cc42..d52fe8651c2d 100644 > >> --- a/arch/arm64/include/asm/cputype.h > >> +++ b/arch/arm64/include/asm/cputype.h > >> @@ -54,7 +54,7 @@ > >> #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ > >> ({ \ > >> u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ > >> - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > >> + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > > > > Hmm, but this really isn't a signed quantity: it's two fields extracted > > from an ID register. I think the code is fine. Are you explicitly enabling > > -Wtype-limits somehow? > > Yes, it is useful to catch unintended developer mistakes or simply optimize wasted instructions of > checking like in, > > 919aef44d73d (“x86/efi: fix a -Wtype-limits compilation warning”) > > 5a82bdb48f04 (“x86/cacheinfo: Fix a -Wtype-limits warning”) > > It is normal to fix a false positive this way as in other mainline commits, > > ec6335586953 (“x86/apic: Silence -Wtype-limits compiler warnings”) > > Once those false-positives are under control, the warning flag could be then enabled by default in > the future. If there's a way to fix the code without making it more confusing, sure, but your proposal of making the field signed does not achieve that goal. Will ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning @ 2019-08-05 17:03 ` Will Deacon 0 siblings, 0 replies; 8+ messages in thread From: Will Deacon @ 2019-08-05 17:03 UTC (permalink / raw) To: Qian Cai Cc: rrichter, Catalin Marinas, robin.murphy, linux-kernel, linux-arm-kernel On Mon, Aug 05, 2019 at 08:03:10AM -0400, Qian Cai wrote: > > > > On Aug 5, 2019, at 6:00 AM, Will Deacon <will@kernel.org> wrote: > > > > On Fri, Aug 02, 2019 at 08:33:58PM -0400, Qian Cai wrote: > >> The commit d5370f754875 ("arm64: prefetch: add alternative pattern for > >> CPUs without a prefetcher") introduced MIDR_IS_CPU_MODEL_RANGE() to be > >> used in has_no_hw_prefetch() with rv_min=0 which generates a compilation > >> warning from GCC, > >> > >> In file included from ./arch/arm64/include/asm/cache.h:8, > >> from ./include/linux/cache.h:6, > >> from ./include/linux/printk.h:9, > >> from ./include/linux/kernel.h:15, > >> from ./include/linux/cpumask.h:10, > >> from arch/arm64/kernel/cpufeature.c:11: > >> arch/arm64/kernel/cpufeature.c: In function 'has_no_hw_prefetch': > >> ./arch/arm64/include/asm/cputype.h:59:26: warning: comparison of > >> unsigned expression >= 0 is always true [-Wtype-limits] > >> _model == (model) && rv >= (rv_min) && rv <= (rv_max); \ > >> ^~ > >> arch/arm64/kernel/cpufeature.c:889:9: note: in expansion of macro > >> 'MIDR_IS_CPU_MODEL_RANGE' > >> return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, > >> ^~~~~~~~~~~~~~~~~~~~~~~ > >> > >> Fix it by making "rv" a "s32". > >> > >> Signed-off-by: Qian Cai <cai@lca.pw> > >> --- > >> > >> v2: Use "s32" for "rv", so "variant 0/revision 0" can be covered. > >> > >> arch/arm64/include/asm/cputype.h | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h > >> index e7d46631cc42..d52fe8651c2d 100644 > >> --- a/arch/arm64/include/asm/cputype.h > >> +++ b/arch/arm64/include/asm/cputype.h > >> @@ -54,7 +54,7 @@ > >> #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ > >> ({ \ > >> u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \ > >> - u32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > >> + s32 rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \ > > > > Hmm, but this really isn't a signed quantity: it's two fields extracted > > from an ID register. I think the code is fine. Are you explicitly enabling > > -Wtype-limits somehow? > > Yes, it is useful to catch unintended developer mistakes or simply optimize wasted instructions of > checking like in, > > 919aef44d73d (“x86/efi: fix a -Wtype-limits compilation warning”) > > 5a82bdb48f04 (“x86/cacheinfo: Fix a -Wtype-limits warning”) > > It is normal to fix a false positive this way as in other mainline commits, > > ec6335586953 (“x86/apic: Silence -Wtype-limits compiler warnings”) > > Once those false-positives are under control, the warning flag could be then enabled by default in > the future. If there's a way to fix the code without making it more confusing, sure, but your proposal of making the field signed does not achieve that goal. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-08-05 17:04 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-08-03 0:33 [PATCH v2] arm64/prefetch: fix a -Wtype-limits warning Qian Cai 2019-08-03 0:33 ` Qian Cai 2019-08-05 10:00 ` Will Deacon 2019-08-05 10:00 ` Will Deacon 2019-08-05 12:03 ` Qian Cai 2019-08-05 12:03 ` Qian Cai 2019-08-05 17:03 ` Will Deacon 2019-08-05 17:03 ` Will Deacon
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