All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr()
@ 2020-12-07  6:42 Kevin Wang
  2020-12-07 11:44 ` Lazar, Lijo
  0 siblings, 1 reply; 2+ messages in thread
From: Kevin Wang @ 2020-12-07  6:42 UTC (permalink / raw)
  To: amd-gfx; +Cc: Kevin Wang

the smc v2_0 printer is not compatible with the smc v2_1 .
1. add smc v2_1 printer.
2. cleanup code

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 29 +++++++++++++++--------
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 2b7c90b7a712..1beb08af347f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -68,23 +68,32 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr)
 {
 	uint16_t version_major = le16_to_cpu(hdr->header_version_major);
 	uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
+	const struct smc_firmware_header_v1_0 *v1_0_hdr;
+	const struct smc_firmware_header_v2_0 *v2_0_hdr;
+	const struct smc_firmware_header_v2_1 *v2_1_hdr;
 
 	DRM_DEBUG("SMC\n");
 	amdgpu_ucode_print_common_hdr(hdr);
 
 	if (version_major == 1) {
-		const struct smc_firmware_header_v1_0 *smc_hdr =
-			container_of(hdr, struct smc_firmware_header_v1_0, header);
-
-		DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
+		v1_0_hdr = container_of(hdr, struct smc_firmware_header_v1_0, header);
+		DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(v1_0_hdr->ucode_start_addr));
 	} else if (version_major == 2) {
-		const struct smc_firmware_header_v1_0 *v1_hdr =
-			container_of(hdr, struct smc_firmware_header_v1_0, header);
-		const struct smc_firmware_header_v2_0 *v2_hdr =
-			container_of(v1_hdr, struct smc_firmware_header_v2_0, v1_0);
+		switch (version_minor) {
+		case 0:
+			v2_0_hdr = container_of(hdr, struct smc_firmware_header_v2_0, v1_0.header);
+			DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_offset_bytes));
+			DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_size_bytes));
+			break;
+		case 1:
+			v2_1_hdr = container_of(hdr, struct smc_firmware_header_v2_1, v1_0.header);
+			DRM_DEBUG("pptable_count: %u\n", le32_to_cpu(v2_1_hdr->pptable_count));
+			DRM_DEBUG("pptable_entry_offset: %u\n", le32_to_cpu(v2_1_hdr->pptable_entry_offset));
+			break;
+		default:
+			break;
+		}
 
-		DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_offset_bytes));
-		DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_size_bytes));
 	} else {
 		DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor);
 	}
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* RE: [PATCH] drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr()
  2020-12-07  6:42 [PATCH] drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr() Kevin Wang
@ 2020-12-07 11:44 ` Lazar, Lijo
  0 siblings, 0 replies; 2+ messages in thread
From: Lazar, Lijo @ 2020-12-07 11:44 UTC (permalink / raw)
  To: Wang, Kevin(Yang), amd-gfx; +Cc: Wang, Kevin(Yang)

[AMD Public Use]

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Kevin Wang
Sent: Monday, December 7, 2020 12:12 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Kevin(Yang) <Kevin1.Wang@amd.com>
Subject: [PATCH] drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr()

[CAUTION: External Email]

the smc v2_0 printer is not compatible with the smc v2_1 .
1. add smc v2_1 printer.
2. cleanup code

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 29 +++++++++++++++--------
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 2b7c90b7a712..1beb08af347f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -68,23 +68,32 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr)  {
        uint16_t version_major = le16_to_cpu(hdr->header_version_major);
        uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
+       const struct smc_firmware_header_v1_0 *v1_0_hdr;
+       const struct smc_firmware_header_v2_0 *v2_0_hdr;
+       const struct smc_firmware_header_v2_1 *v2_1_hdr;

        DRM_DEBUG("SMC\n");
        amdgpu_ucode_print_common_hdr(hdr);

        if (version_major == 1) {
-               const struct smc_firmware_header_v1_0 *smc_hdr =
-                       container_of(hdr, struct smc_firmware_header_v1_0, header);
-
-               DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
+               v1_0_hdr = container_of(hdr, struct smc_firmware_header_v1_0, header);
+               DRM_DEBUG("ucode_start_addr: %u\n", 
+ le32_to_cpu(v1_0_hdr->ucode_start_addr));
        } else if (version_major == 2) {
-               const struct smc_firmware_header_v1_0 *v1_hdr =
-                       container_of(hdr, struct smc_firmware_header_v1_0, header);
-               const struct smc_firmware_header_v2_0 *v2_hdr =
-                       container_of(v1_hdr, struct smc_firmware_header_v2_0, v1_0);
+               switch (version_minor) {
+               case 0:
+                       v2_0_hdr = container_of(hdr, struct smc_firmware_header_v2_0, v1_0.header);
+                       DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_offset_bytes));
+                       DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_0_hdr->ppt_size_bytes));
+                       break;
+               case 1:
+                       v2_1_hdr = container_of(hdr, struct smc_firmware_header_v2_1, v1_0.header);
+                       DRM_DEBUG("pptable_count: %u\n", le32_to_cpu(v2_1_hdr->pptable_count));
+                       DRM_DEBUG("pptable_entry_offset: %u\n", le32_to_cpu(v2_1_hdr->pptable_entry_offset));
+                       break;
+               default:
+                       break;
+               }

-               DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_offset_bytes));
-               DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_size_bytes));
        } else {
                DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor);
        }
--
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7Clijo.lazar%40amd.com%7C37d29083a0b9477713da08d89a7b4c3a%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637429201636429266%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=oOvoyTt5DvoNaXr%2FjqBXqZfOnDa1Im672JEXRKP8xsk%3D&amp;reserved=0
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2020-12-07 11:44 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-07  6:42 [PATCH] drm/amdgpu/pm: add smc v2_1 printer in amdgpu_ucode_print_smc_hdr() Kevin Wang
2020-12-07 11:44 ` Lazar, Lijo

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.