* [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
@ 2022-01-05 20:39 Harry Wentland
2022-01-06 0:39 ` Huang Rui
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Harry Wentland @ 2022-01-05 20:39 UTC (permalink / raw)
To: amd-gfx, christian.koenig, Becle.Lee, Rex.Huang, Ray.Huang; +Cc: Harry Wentland
For some reason this file isn't using the appropriate register
headers for DCN headers, which means that on DCN2 we're getting
the VIEWPORT_DIMENSION offset wrong.
This means that we're not correctly carving out the framebuffer
memory correctly for a framebuffer allocated by EFI and
therefore see corruption when loading amdgpu before the display
driver takes over control of the framebuffer scanout.
Fix this by checking the DCE_HWIP and picking the correct offset
accordingly.
Long-term we should expose this info from DC as GMC shouldn't
need to know about DCN registers.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 57f2729a7bd0..8367ecf61af1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -72,6 +72,9 @@
#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x049d
#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
+#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION 0x05ea
+#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX 2
+
static const char *gfxhub_client_ids[] = {
"CB",
@@ -1142,7 +1145,6 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
switch (adev->ip_versions[DCE_HWIP][0]) {
case IP_VERSION(1, 0, 0):
case IP_VERSION(1, 0, 1):
- case IP_VERSION(2, 1, 0):
viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
size = (REG_GET_FIELD(viewport,
HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
@@ -1150,6 +1152,14 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
4);
break;
+ case IP_VERSION(2, 1, 0):
+ viewport = RREG32_SOC15(DCE, 0, DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
+ size = (REG_GET_FIELD(viewport,
+ HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
+ REG_GET_FIELD(viewport,
+ HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
+ 4);
+ break;
default:
viewport = RREG32_SOC15(DCE, 0, mmSCL0_VIEWPORT_SIZE);
size = (REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) *
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-05 20:39 [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2 Harry Wentland
@ 2022-01-06 0:39 ` Huang Rui
2022-01-06 9:17 ` Christian König
2022-01-06 15:30 ` Deucher, Alexander
2 siblings, 0 replies; 9+ messages in thread
From: Huang Rui @ 2022-01-06 0:39 UTC (permalink / raw)
To: Harry Wentland; +Cc: Huang, Rex, Koenig, Christian, amd-gfx, Lee, Becle
On Thu, Jan 06, 2022 at 04:39:01AM +0800, Harry Wentland wrote:
> For some reason this file isn't using the appropriate register
> headers for DCN headers, which means that on DCN2 we're getting
> the VIEWPORT_DIMENSION offset wrong.
>
> This means that we're not correctly carving out the framebuffer
> memory correctly for a framebuffer allocated by EFI and
> therefore see corruption when loading amdgpu before the display
> driver takes over control of the framebuffer scanout.
>
> Fix this by checking the DCE_HWIP and picking the correct offset
> accordingly.
>
> Long-term we should expose this info from DC as GMC shouldn't
> need to know about DCN registers.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Look good for me, this patch needs to backport it to stable kernel (CC
stable mailing list).
Reviewed-by: Huang Rui <ray.huang@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 57f2729a7bd0..8367ecf61af1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -72,6 +72,9 @@
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x049d
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
>
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION 0x05ea
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX 2
> +
>
> static const char *gfxhub_client_ids[] = {
> "CB",
> @@ -1142,7 +1145,6 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
> switch (adev->ip_versions[DCE_HWIP][0]) {
> case IP_VERSION(1, 0, 0):
> case IP_VERSION(1, 0, 1):
> - case IP_VERSION(2, 1, 0):
> viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> size = (REG_GET_FIELD(viewport,
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> @@ -1150,6 +1152,14 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> 4);
> break;
> + case IP_VERSION(2, 1, 0):
> + viewport = RREG32_SOC15(DCE, 0, DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> + size = (REG_GET_FIELD(viewport,
> + HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> + REG_GET_FIELD(viewport,
> + HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> + 4);
> + break;
> default:
> viewport = RREG32_SOC15(DCE, 0, mmSCL0_VIEWPORT_SIZE);
> size = (REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) *
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-05 20:39 [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2 Harry Wentland
2022-01-06 0:39 ` Huang Rui
@ 2022-01-06 9:17 ` Christian König
2022-01-06 15:30 ` Deucher, Alexander
2 siblings, 0 replies; 9+ messages in thread
From: Christian König @ 2022-01-06 9:17 UTC (permalink / raw)
To: Harry Wentland, amd-gfx, Becle.Lee, Rex.Huang, Ray.Huang
Am 05.01.22 um 21:39 schrieb Harry Wentland:
> For some reason this file isn't using the appropriate register
> headers for DCN headers, which means that on DCN2 we're getting
> the VIEWPORT_DIMENSION offset wrong.
>
> This means that we're not correctly carving out the framebuffer
> memory correctly for a framebuffer allocated by EFI and
> therefore see corruption when loading amdgpu before the display
> driver takes over control of the framebuffer scanout.
>
> Fix this by checking the DCE_HWIP and picking the correct offset
> accordingly.
>
> Long-term we should expose this info from DC as GMC shouldn't
> need to know about DCN registers.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Please add a TODO comment that in the long run that code should be moved
into DC.
With that done the patch is Acked-by: Christian König
<christian.koenig@amd.com>.
Thanks,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 57f2729a7bd0..8367ecf61af1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -72,6 +72,9 @@
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x049d
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
>
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION 0x05ea
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX 2
> +
>
> static const char *gfxhub_client_ids[] = {
> "CB",
> @@ -1142,7 +1145,6 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
> switch (adev->ip_versions[DCE_HWIP][0]) {
> case IP_VERSION(1, 0, 0):
> case IP_VERSION(1, 0, 1):
> - case IP_VERSION(2, 1, 0):
> viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> size = (REG_GET_FIELD(viewport,
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> @@ -1150,6 +1152,14 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> 4);
> break;
> + case IP_VERSION(2, 1, 0):
> + viewport = RREG32_SOC15(DCE, 0, DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> + size = (REG_GET_FIELD(viewport,
> + HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> + REG_GET_FIELD(viewport,
> + HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> + 4);
> + break;
> default:
> viewport = RREG32_SOC15(DCE, 0, mmSCL0_VIEWPORT_SIZE);
> size = (REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) *
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-05 20:39 [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2 Harry Wentland
2022-01-06 0:39 ` Huang Rui
2022-01-06 9:17 ` Christian König
@ 2022-01-06 15:30 ` Deucher, Alexander
2 siblings, 0 replies; 9+ messages in thread
From: Deucher, Alexander @ 2022-01-06 15:30 UTC (permalink / raw)
To: Wentland, Harry, amd-gfx, Koenig, Christian, Lee, Becle, Huang,
Rex, Huang, Ray
Cc: Wentland, Harry
[Public]
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Harry Wentland
> Sent: Wednesday, January 5, 2022 3:39 PM
> To: amd-gfx@lists.freedesktop.org; Koenig, Christian
> <Christian.Koenig@amd.com>; Lee, Becle <Becle.Lee@amd.com>; Huang,
> Rex <Rex.Huang@amd.com>; Huang, Ray <Ray.Huang@amd.com>
> Cc: Wentland, Harry <Harry.Wentland@amd.com>
> Subject: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for
> DCN2
>
> For some reason this file isn't using the appropriate register headers for DCN
> headers, which means that on DCN2 we're getting the
> VIEWPORT_DIMENSION offset wrong.
>
> This means that we're not correctly carving out the framebuffer memory
> correctly for a framebuffer allocated by EFI and therefore see corruption
> when loading amdgpu before the display driver takes over control of the
> framebuffer scanout.
>
> Fix this by checking the DCE_HWIP and picking the correct offset accordingly.
>
> Long-term we should expose this info from DC as GMC shouldn't need to
> know about DCN registers.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 57f2729a7bd0..8367ecf61af1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -72,6 +72,9 @@
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0
> 0x049d
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX
> 2
>
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION
> 0x05ea
> +#define
> DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX
> 2
> +
We normally append the _DCN2 to the end in these cases of the macro. With that fixed,
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> static const char *gfxhub_client_ids[] = {
> "CB",
> @@ -1142,7 +1145,6 @@ static unsigned
> gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
> switch (adev->ip_versions[DCE_HWIP][0]) {
> case IP_VERSION(1, 0, 0):
> case IP_VERSION(1, 0, 1):
> - case IP_VERSION(2, 1, 0):
> viewport = RREG32_SOC15(DCE, 0,
> mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> size = (REG_GET_FIELD(viewport,
>
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> @@ -1150,6 +1152,14 @@ static unsigned
> gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
>
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> 4);
> break;
> + case IP_VERSION(2, 1, 0):
> + viewport = RREG32_SOC15(DCE, 0,
> DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> + size = (REG_GET_FIELD(viewport,
> +
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> + REG_GET_FIELD(viewport,
> +
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> + 4);
> + break;
> default:
> viewport = RREG32_SOC15(DCE, 0,
> mmSCL0_VIEWPORT_SIZE);
> size = (REG_GET_FIELD(viewport,
> SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) *
> --
> 2.34.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-25 15:52 ` Limonciello, Mario
@ 2022-01-27 15:47 ` Greg KH
0 siblings, 0 replies; 9+ messages in thread
From: Greg KH @ 2022-01-27 15:47 UTC (permalink / raw)
To: Limonciello, Mario; +Cc: stable, Deucher, Alexander, Wentland, Harry
On Tue, Jan 25, 2022 at 03:52:47PM +0000, Limonciello, Mario wrote:
> [Public]
>
> > -----Original Message-----
> > From: Greg KH <gregkh@linuxfoundation.org>
> > Sent: Tuesday, January 25, 2022 09:50
> > To: Limonciello, Mario <Mario.Limonciello@amd.com>
> > Cc: stable@vger.kernel.org; Deucher, Alexander
> > <Alexander.Deucher@amd.com>; Wentland, Harry
> > <Harry.Wentland@amd.com>
> > Subject: Re: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for
> > DCN2
> >
> > On Tue, Jan 25, 2022 at 09:21:11AM -0600, Mario Limonciello wrote:
> > > For some reason this file isn't using the appropriate register
> > > headers for DCN headers, which means that on DCN2 we're getting
> > > the VIEWPORT_DIMENSION offset wrong.
> > >
> > > This means that we're not correctly carving out the framebuffer
> > > memory correctly for a framebuffer allocated by EFI and
> > > therefore see corruption when loading amdgpu before the display
> > > driver takes over control of the framebuffer scanout.
> > >
> > > Fix this by checking the DCE_HWIP and picking the correct offset
> > > accordingly.
> > >
> > > Long-term we should expose this info from DC as GMC shouldn't
> > > need to know about DCN registers.
> > >
> > > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> > > (cherry picked from commit dc5d4aff2e99c312df8abbe1ee9a731d2913bc1b)
> > > ---
> > > This is backported from 5.17-rc1, but doesn't backport cleanly because
> > > v5.16 changed to IP version harvesting for ASIC detection. 5.15.y doesn't
> > > have this.
> > > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++++++++-
> > > 1 file changed, 13 insertions(+), 1 deletion(-)
> >
> > What stable tree(s) do you want this applied to?
> >
>
> The original commit it was cherry-picked from was CC to @stable and it
> should have applied to 5.16 from that.
>
> This fixed commit should go into 5.15.y.
Thanks, now queued up.
> > And what happened to the original signed-off-by's on the original
> > commit?
>
> I dropped them because I had to change code to do the backport, it didn't seem reasonable
> to me to keep all of their ACK's/signed-off-by's on the code still.
>
> If that's incorrect, please let me know and I can re-send with the exact same commit message.
Please keep them. I've fixed this up for now, so no need for a resend.
thanks,
greg k-h
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-25 15:50 ` Greg KH
@ 2022-01-25 15:52 ` Limonciello, Mario
2022-01-27 15:47 ` Greg KH
0 siblings, 1 reply; 9+ messages in thread
From: Limonciello, Mario @ 2022-01-25 15:52 UTC (permalink / raw)
To: Greg KH; +Cc: stable, Deucher, Alexander, Wentland, Harry
[Public]
> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Tuesday, January 25, 2022 09:50
> To: Limonciello, Mario <Mario.Limonciello@amd.com>
> Cc: stable@vger.kernel.org; Deucher, Alexander
> <Alexander.Deucher@amd.com>; Wentland, Harry
> <Harry.Wentland@amd.com>
> Subject: Re: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for
> DCN2
>
> On Tue, Jan 25, 2022 at 09:21:11AM -0600, Mario Limonciello wrote:
> > For some reason this file isn't using the appropriate register
> > headers for DCN headers, which means that on DCN2 we're getting
> > the VIEWPORT_DIMENSION offset wrong.
> >
> > This means that we're not correctly carving out the framebuffer
> > memory correctly for a framebuffer allocated by EFI and
> > therefore see corruption when loading amdgpu before the display
> > driver takes over control of the framebuffer scanout.
> >
> > Fix this by checking the DCE_HWIP and picking the correct offset
> > accordingly.
> >
> > Long-term we should expose this info from DC as GMC shouldn't
> > need to know about DCN registers.
> >
> > Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> > (cherry picked from commit dc5d4aff2e99c312df8abbe1ee9a731d2913bc1b)
> > ---
> > This is backported from 5.17-rc1, but doesn't backport cleanly because
> > v5.16 changed to IP version harvesting for ASIC detection. 5.15.y doesn't
> > have this.
> > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++++++++-
> > 1 file changed, 13 insertions(+), 1 deletion(-)
>
> What stable tree(s) do you want this applied to?
>
The original commit it was cherry-picked from was CC to @stable and it
should have applied to 5.16 from that.
This fixed commit should go into 5.15.y.
> And what happened to the original signed-off-by's on the original
> commit?
I dropped them because I had to change code to do the backport, it didn't seem reasonable
to me to keep all of their ACK's/signed-off-by's on the code still.
If that's incorrect, please let me know and I can re-send with the exact same commit message.
>
> thanks,
>
> greg k-h
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-25 15:21 Mario Limonciello
2022-01-25 15:46 ` Limonciello, Mario
@ 2022-01-25 15:50 ` Greg KH
2022-01-25 15:52 ` Limonciello, Mario
1 sibling, 1 reply; 9+ messages in thread
From: Greg KH @ 2022-01-25 15:50 UTC (permalink / raw)
To: Mario Limonciello; +Cc: stable, Alexander.Deucher, harry.wentland
On Tue, Jan 25, 2022 at 09:21:11AM -0600, Mario Limonciello wrote:
> For some reason this file isn't using the appropriate register
> headers for DCN headers, which means that on DCN2 we're getting
> the VIEWPORT_DIMENSION offset wrong.
>
> This means that we're not correctly carving out the framebuffer
> memory correctly for a framebuffer allocated by EFI and
> therefore see corruption when loading amdgpu before the display
> driver takes over control of the framebuffer scanout.
>
> Fix this by checking the DCE_HWIP and picking the correct offset
> accordingly.
>
> Long-term we should expose this info from DC as GMC shouldn't
> need to know about DCN registers.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> (cherry picked from commit dc5d4aff2e99c312df8abbe1ee9a731d2913bc1b)
> ---
> This is backported from 5.17-rc1, but doesn't backport cleanly because
> v5.16 changed to IP version harvesting for ASIC detection. 5.15.y doesn't
> have this.
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
What stable tree(s) do you want this applied to?
And what happened to the original signed-off-by's on the original
commit?
thanks,
greg k-h
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
2022-01-25 15:21 Mario Limonciello
@ 2022-01-25 15:46 ` Limonciello, Mario
2022-01-25 15:50 ` Greg KH
1 sibling, 0 replies; 9+ messages in thread
From: Limonciello, Mario @ 2022-01-25 15:46 UTC (permalink / raw)
To: stable; +Cc: Deucher, Alexander, Wentland, Harry
[Public]
> -----Original Message-----
> From: Limonciello, Mario <Mario.Limonciello@amd.com>
> Sent: Tuesday, January 25, 2022 09:21
> To: stable@vger.kernel.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Wentland, Harry
> <Harry.Wentland@amd.com>; Limonciello, Mario
> <Mario.Limonciello@amd.com>
> Subject: [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
>
> For some reason this file isn't using the appropriate register
> headers for DCN headers, which means that on DCN2 we're getting
> the VIEWPORT_DIMENSION offset wrong.
>
> This means that we're not correctly carving out the framebuffer
> memory correctly for a framebuffer allocated by EFI and
> therefore see corruption when loading amdgpu before the display
> driver takes over control of the framebuffer scanout.
>
> Fix this by checking the DCE_HWIP and picking the correct offset
> accordingly.
>
> Long-term we should expose this info from DC as GMC shouldn't
> need to know about DCN registers.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> (cherry picked from commit dc5d4aff2e99c312df8abbe1ee9a731d2913bc1b)
> ---
> This is backported from 5.17-rc1, but doesn't backport cleanly because
> v5.16 changed to IP version harvesting for ASIC detection. 5.15.y doesn't
> have this.
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
One more comment - dc5d4aff2e99c3 backports cleanly to 5.16.y.
So it should just be a straightforward cherry-pick in 5.16.y, this special
modification only for 5.15.y.
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 5551359d5dfd..a4adbbf3acab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -72,6 +72,9 @@
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0
> 0x049d
> #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX
> 2
>
> +#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2
> 0x05ea
> +#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2_BASE_IDX
> 2
> +
>
> static const char *gfxhub_client_ids[] = {
> "CB",
> @@ -1103,6 +1106,8 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct
> amdgpu_device *adev)
> u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL);
> unsigned size;
>
> + /* TODO move to DC so GMC doesn't need to hard-code DCN registers
> */
> +
> if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL,
> D1VGA_MODE_ENABLE)) {
> size = AMDGPU_VBIOS_VGA_ALLOCATION;
> } else {
> @@ -1110,7 +1115,6 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct
> amdgpu_device *adev)
>
> switch (adev->asic_type) {
> case CHIP_RAVEN:
> - case CHIP_RENOIR:
> viewport = RREG32_SOC15(DCE, 0,
> mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> size = (REG_GET_FIELD(viewport,
>
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> @@ -1118,6 +1122,14 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct
> amdgpu_device *adev)
>
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> 4);
> break;
> + case CHIP_RENOIR:
> + viewport = RREG32_SOC15(DCE, 0,
> mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2);
> + size = (REG_GET_FIELD(viewport,
> +
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> + REG_GET_FIELD(viewport,
> +
> HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> + 4);
> + break;
> case CHIP_VEGA10:
> case CHIP_VEGA12:
> case CHIP_VEGA20:
> --
> 2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
@ 2022-01-25 15:21 Mario Limonciello
2022-01-25 15:46 ` Limonciello, Mario
2022-01-25 15:50 ` Greg KH
0 siblings, 2 replies; 9+ messages in thread
From: Mario Limonciello @ 2022-01-25 15:21 UTC (permalink / raw)
To: stable; +Cc: Alexander.Deucher, harry.wentland, Mario Limonciello
For some reason this file isn't using the appropriate register
headers for DCN headers, which means that on DCN2 we're getting
the VIEWPORT_DIMENSION offset wrong.
This means that we're not correctly carving out the framebuffer
memory correctly for a framebuffer allocated by EFI and
therefore see corruption when loading amdgpu before the display
driver takes over control of the framebuffer scanout.
Fix this by checking the DCE_HWIP and picking the correct offset
accordingly.
Long-term we should expose this info from DC as GMC shouldn't
need to know about DCN registers.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
(cherry picked from commit dc5d4aff2e99c312df8abbe1ee9a731d2913bc1b)
---
This is backported from 5.17-rc1, but doesn't backport cleanly because
v5.16 changed to IP version harvesting for ASIC detection. 5.15.y doesn't
have this.
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 5551359d5dfd..a4adbbf3acab 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -72,6 +72,9 @@
#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x049d
#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
+#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2 0x05ea
+#define mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2_BASE_IDX 2
+
static const char *gfxhub_client_ids[] = {
"CB",
@@ -1103,6 +1106,8 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL);
unsigned size;
+ /* TODO move to DC so GMC doesn't need to hard-code DCN registers */
+
if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
size = AMDGPU_VBIOS_VGA_ALLOCATION;
} else {
@@ -1110,7 +1115,6 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
switch (adev->asic_type) {
case CHIP_RAVEN:
- case CHIP_RENOIR:
viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
size = (REG_GET_FIELD(viewport,
HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
@@ -1118,6 +1122,14 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
4);
break;
+ case CHIP_RENOIR:
+ viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_DCN2);
+ size = (REG_GET_FIELD(viewport,
+ HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
+ REG_GET_FIELD(viewport,
+ HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
+ 4);
+ break;
case CHIP_VEGA10:
case CHIP_VEGA12:
case CHIP_VEGA20:
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-01-27 15:48 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-01-05 20:39 [PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2 Harry Wentland
2022-01-06 0:39 ` Huang Rui
2022-01-06 9:17 ` Christian König
2022-01-06 15:30 ` Deucher, Alexander
2022-01-25 15:21 Mario Limonciello
2022-01-25 15:46 ` Limonciello, Mario
2022-01-25 15:50 ` Greg KH
2022-01-25 15:52 ` Limonciello, Mario
2022-01-27 15:47 ` Greg KH
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