[U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration

[U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration

[Bin Meng]

The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
needs to be configured.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- Correct a typo in the commit message title

 drivers/pci/pci_auto.c | 14 --------------
 1 file changed, 14 deletions(-)

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 43965d8..7c10983 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -20,8 +20,6 @@
 #define DEBUGF(x...)
 #endif /* DEBUG */
 
-#define	PCIAUTO_IDE_MODE_MASK		0x05
-
 /* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
 #ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE
 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE	8
@@ -424,7 +422,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 {
 	unsigned int sub_bus = PCI_BUS(dev);
 	unsigned short class;
-	unsigned char prg_iface;
 	int n;
 
 	pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
@@ -460,17 +457,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 #endif
 		break;
 
-	case PCI_CLASS_STORAGE_IDE:
-		pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface);
-		if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
-			DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n");
-			return sub_bus;
-		}
-
-		pciauto_setup_device(hose, dev, 6, hose->pci_mem,
-			hose->pci_prefetch, hose->pci_io);
-		break;
-
 	case PCI_CLASS_BRIDGE_CARDBUS:
 		/*
 		 * just do a minimal setup of the bridge,
-- 
1.8.2.1

[U-Boot] [PATCH v2 3/6] drivers: block: Remove the ata_piix driver

[Bin Meng]

This driver was originally added to support the native IDE mode for
Intel chipset, however it has some bugs like not supporting ATAPI
devices, endianness issue, or even broken build when CONFIG_LAB48.
Given no board is using this driver as of today, rather than fixing
all these issues we just remove it from the source tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- Correct typo of 'endianness' in the commit message

 drivers/block/Makefile   |   1 -
 drivers/block/ata_piix.c | 717 -----------------------------------------------
 drivers/block/ata_piix.h |  71 -----
 3 files changed, 789 deletions(-)
 delete mode 100644 drivers/block/ata_piix.c
 delete mode 100644 drivers/block/ata_piix.h

diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 8697da4..f161c01 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -6,7 +6,6 @@
 #
 
 obj-$(CONFIG_SCSI_AHCI) += ahci.o
-obj-$(CONFIG_ATA_PIIX) += ata_piix.o
 obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
 obj-$(CONFIG_FSL_SATA) += fsl_sata.o
 obj-$(CONFIG_IDE_FTIDE020) += ftide020.o
diff --git a/drivers/block/ata_piix.c b/drivers/block/ata_piix.c
deleted file mode 100644
index 3042684..0000000
--- a/drivers/block/ata_piix.c
+++ /dev/null
@@ -1,717 +0,0 @@
-/*
- * Copyright (C) Procsys. All rights reserved.
- * Author: Mushtaq Khan <mushtaq_k@procsys.com>
- *			<mushtaqk_921@yahoo.co.in>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * with the reference to ata_piix driver in kernel 2.4.32
- */
-
-/*
- * This file contains SATA controller and SATA drive initialization functions
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <pci.h>
-#include <command.h>
-#include <config.h>
-#include <asm/byteorder.h>
-#include <part.h>
-#include <ide.h>
-#include <ata.h>
-#include <sata.h>
-
-#define DEBUG_SATA 0		/* For debug prints set DEBUG_SATA to 1 */
-
-#define SATA_DECL
-#define DRV_DECL		/* For file specific declarations */
-#include "ata_piix.h"
-
-/* Macros realted to PCI */
-#define PCI_SATA_BUS	0x00
-#define PCI_SATA_DEV	0x1f
-#define PCI_SATA_FUNC	0x02
-
-#define PCI_SATA_BASE1 0x10
-#define PCI_SATA_BASE2 0x14
-#define PCI_SATA_BASE3 0x18
-#define PCI_SATA_BASE4 0x1c
-#define PCI_SATA_BASE5 0x20
-#define PCI_PMR         0x90
-#define PCI_PI          0x09
-#define PCI_PCS         0x92
-#define PCI_DMA_CTL     0x48
-
-#define PORT_PRESENT (1<<0)
-#define PORT_ENABLED (1<<4)
-
-u32 bdf;
-u32 iobase1;		/* Primary cmd block */
-u32 iobase2;		/* Primary ctl block */
-u32 iobase3;		/* Sec cmd block */
-u32 iobase4;		/* sec ctl block */
-u32 iobase5;		/* BMDMA*/
-
-int pci_sata_init(void)
-{
-	u32 bus = PCI_SATA_BUS;
-	u32 dev = PCI_SATA_DEV;
-	u32 fun = PCI_SATA_FUNC;
-	u16 cmd = 0;
-	u8 lat = 0, pcibios_max_latency = 0xff;
-	u8 pmr; /* Port mapping reg */
-	u8 pi; /* Prgming Interface reg */
-
-	bdf = PCI_BDF(bus, dev, fun);
-	pci_read_config_dword(bdf, PCI_SATA_BASE1, &iobase1);
-	pci_read_config_dword(bdf, PCI_SATA_BASE2, &iobase2);
-	pci_read_config_dword(bdf, PCI_SATA_BASE3, &iobase3);
-	pci_read_config_dword(bdf, PCI_SATA_BASE4, &iobase4);
-	pci_read_config_dword(bdf, PCI_SATA_BASE5, &iobase5);
-
-	if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
-	    (iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
-	    (iobase5 == 0xFFFFFFFF)) {
-		/* ERROR */
-		printf("error no base addr for SATA controller\n");
-		return 1;
-	}
-
-	iobase1 &= 0xFFFFFFFE;
-	iobase2 &= 0xFFFFFFFE;
-	iobase3 &= 0xFFFFFFFE;
-	iobase4 &= 0xFFFFFFFE;
-	iobase5 &= 0xFFFFFFFE;
-
-	/* check for mode */
-	pci_read_config_byte(bdf, PCI_PMR, &pmr);
-	if (pmr > 1) {
-		puts("combined mode not supported\n");
-		return 1;
-	}
-
-	pci_read_config_byte(bdf, PCI_PI, &pi);
-	if ((pi & 0x05) != 0x05) {
-		puts("Sata is in Legacy mode\n");
-		return 1;
-	} else
-		puts("sata is in Native mode\n");
-
-	/* MASTER CFG AND IO CFG */
-	pci_read_config_word(bdf, PCI_COMMAND, &cmd);
-	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
-	pci_write_config_word(bdf, PCI_COMMAND, cmd);
-	pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-
-	if (lat < 16)
-		lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-	else if (lat > pcibios_max_latency)
-		lat = pcibios_max_latency;
-	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-
-	return 0;
-}
-
-int sata_bus_probe(int port_no)
-{
-	int orig_mask, mask;
-	u16 pcs;
-
-	mask = (PORT_PRESENT << port_no);
-	pci_read_config_word(bdf, PCI_PCS, &pcs);
-	orig_mask = (int) pcs & 0xff;
-	if ((orig_mask & mask) != mask)
-		return 0;
-	else
-		return 1;
-}
-
-int init_sata(int dev)
-{
-	static int done;
-	u8 i, rv = 0;
-
-	if (!done)
-		done = 1;
-	else
-		return 0;
-
-	rv = pci_sata_init();
-	if (rv == 1) {
-		puts("pci initialization failed\n");
-		return 1;
-	}
-
-	port[0].port_no = 0;
-	port[0].ioaddr.cmd_addr = iobase1;
-	port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr =
-	    iobase2 | ATA_PCI_CTL_OFS;
-	port[0].ioaddr.bmdma_addr = iobase5;
-
-	port[1].port_no = 1;
-	port[1].ioaddr.cmd_addr = iobase3;
-	port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr =
-	    iobase4 | ATA_PCI_CTL_OFS;
-	port[1].ioaddr.bmdma_addr = iobase5 + 0x8;
-
-	for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++)
-		sata_port(&port[i].ioaddr);
-
-	for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
-		if (!(sata_bus_probe(i))) {
-			port[i].port_state = 0;
-			printf("SATA#%d port is not present\n", i);
-		} else {
-			printf("SATA#%d port is present\n", i);
-			if (sata_bus_softreset(i))
-				port[i].port_state = 0;
-			else
-				port[i].port_state = 1;
-		}
-	}
-
-	for (i = 0; i < CONFIG_SYS_SATA_MAXBUS; i++) {
-		u8 j, devno;
-
-		if (port[i].port_state == 0)
-			continue;
-		for (j = 0; j < CONFIG_SYS_SATA_DEVS_PER_BUS; j++) {
-			sata_identify(i, j);
-			set_Feature_cmd(i, j);
-			devno = i * CONFIG_SYS_SATA_DEVS_PER_BUS + j;
-			if ((sata_dev_desc[devno].lba > 0) &&
-			    (sata_dev_desc[devno].blksz > 0)) {
-				dev_print(&sata_dev_desc[devno]);
-				/* initialize partition type */
-				init_part(&sata_dev_desc[devno]);
-			}
-		}
-	}
-	return 0;
-}
-
-int reset_sata(int dev)
-{
-	return 0;
-}
-
-static inline u8 sata_inb(unsigned long ioaddr)
-{
-	return inb(ioaddr);
-}
-
-static inline void sata_outb(unsigned char val, unsigned long ioaddr)
-{
-	outb(val, ioaddr);
-}
-
-static void output_data(struct sata_ioports *ioaddr, ulong * sect_buf,
-		int words)
-{
-	outsw(ioaddr->data_addr, sect_buf, words << 1);
-}
-
-static int input_data(struct sata_ioports *ioaddr, ulong * sect_buf, int words)
-{
-	insw(ioaddr->data_addr, sect_buf, words << 1);
-	return 0;
-}
-
-static void sata_cpy(unsigned char *dst, unsigned char *src, unsigned int len)
-{
-	unsigned char *end, *last;
-
-	last = dst;
-	end = src + len - 1;
-
-	/* reserve space for '\0' */
-	if (len < 2)
-		goto OUT;
-
-	/* skip leading white space */
-	while ((*src) && (src < end) && (*src == ' '))
-		++src;
-
-	/* copy string, omitting trailing white space */
-	while ((*src) && (src < end)) {
-		*dst++ = *src;
-		if (*src++ != ' ')
-			last = dst;
-	}
-OUT:
-	*last = '\0';
-}
-
-int sata_bus_softreset(int num)
-{
-	u8 dev = 0, status = 0, i;
-
-	port[num].dev_mask = 0;
-
-	for (i = 0; i < CONFIG_SYS_SATA_DEVS_PER_BUS; i++) {
-		if (!(sata_devchk(&port[num].ioaddr, i))) {
-			debug("dev_chk failed for dev#%d\n", i);
-		} else {
-			port[num].dev_mask |= (1 << i);
-			debug("dev_chk passed for dev#%d\n", i);
-		}
-	}
-
-	if (!(port[num].dev_mask)) {
-		printf("no devices on port%d\n", num);
-		return 1;
-	}
-
-	dev_select(&port[num].ioaddr, dev);
-
-	port[num].ctl_reg = 0x08;	/* Default value of control reg */
-	sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
-	udelay(10);
-	sata_outb(port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
-	udelay(10);
-	sata_outb(port[num].ctl_reg, port[num].ioaddr.ctl_addr);
-
-	/*
-	 * spec mandates ">= 2ms" before checking status.
-	 * We wait 150ms, because that was the magic delay used for
-	 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
-	 * between when the ATA command register is written, and then
-	 * status is checked.  Because waiting for "a while" before
-	 * checking status is fine, post SRST, we perform this magic
-	 * delay here as well.
-	 */
-	mdelay(150);
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 300);
-	while ((status & ATA_BUSY)) {
-		mdelay(100);
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 3);
-	}
-
-	if (status & ATA_BUSY)
-		printf("ata%u is slow to respond,plz be patient\n", num);
-
-	while ((status & ATA_BUSY)) {
-		mdelay(100);
-		status = sata_chk_status(&port[num].ioaddr);
-	}
-
-	if (status & ATA_BUSY) {
-		printf("ata%u failed to respond : bus reset failed\n", num);
-		return 1;
-	}
-	return 0;
-}
-
-void sata_identify(int num, int dev)
-{
-	u8 cmd = 0, status = 0;
-	u8 devno = num * CONFIG_SYS_SATA_DEVS_PER_BUS + dev;
-	u16 iobuf[ATA_SECT_SIZE];
-	u64 n_sectors = 0;
-	u8 mask = 0;
-
-	memset(iobuf, 0, sizeof(iobuf));
-	hd_driveid_t *iop = (hd_driveid_t *) iobuf;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	if (!(port[num].dev_mask & mask)) {
-		printf("dev%d is not present on port#%d\n", dev, num);
-		return;
-	}
-
-	printf("port=%d dev=%d\n", num, dev);
-
-	dev_select(&port[num].ioaddr, dev);
-
-	status = 0;
-	cmd = ATA_CMD_IDENT;	/* Device Identify Command */
-	sata_outb(cmd, port[num].ioaddr.command_addr);
-	sata_inb(port[num].ioaddr.altstatus_addr);
-	udelay(10);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 1000);
-	if (status & ATA_ERR) {
-		puts("\ndevice not responding\n");
-		port[num].dev_mask &= ~mask;
-		return;
-	}
-
-	input_data(&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
-
-	debug("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
-		"86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
-		iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
-		iobuf[87], iobuf[88]);
-
-	/* we require LBA and DMA support (bits 8 & 9 of word 49) */
-	if (!ata_id_has_dma(iobuf) || !ata_id_has_lba(iobuf))
-		debug("ata%u: no dma/lba\n", num);
-	ata_dump_id(iobuf);
-
-	if (ata_id_has_lba48(iobuf))
-		n_sectors = ata_id_u64(iobuf, 100);
-	else
-		n_sectors = ata_id_u32(iobuf, 60);
-	debug("no. of sectors %u\n", ata_id_u64(iobuf, 100));
-	debug("no. of sectors %u\n", ata_id_u32(iobuf, 60));
-
-	if (n_sectors == 0) {
-		port[num].dev_mask &= ~mask;
-		return;
-	}
-
-	sata_cpy((unsigned char *)sata_dev_desc[devno].revision, iop->fw_rev,
-		  sizeof(sata_dev_desc[devno].revision));
-	sata_cpy((unsigned char *)sata_dev_desc[devno].vendor, iop->model,
-		  sizeof(sata_dev_desc[devno].vendor));
-	sata_cpy((unsigned char *)sata_dev_desc[devno].product, iop->serial_no,
-		  sizeof(sata_dev_desc[devno].product));
-	strswab(sata_dev_desc[devno].revision);
-	strswab(sata_dev_desc[devno].vendor);
-
-	if ((iop->config & 0x0080) == 0x0080)
-		sata_dev_desc[devno].removable = 1;
-	else
-		sata_dev_desc[devno].removable = 0;
-
-	sata_dev_desc[devno].lba = iop->lba_capacity;
-	debug("lba=0x%x", sata_dev_desc[devno].lba);
-
-#ifdef CONFIG_LBA48
-	if (iop->command_set_2 & 0x0400) {
-		sata_dev_desc[devno].lba48 = 1;
-		lba = (unsigned long long) iop->lba48_capacity[0] |
-		    ((unsigned long long) iop->lba48_capacity[1] << 16) |
-		    ((unsigned long long) iop->lba48_capacity[2] << 32) |
-		    ((unsigned long long) iop->lba48_capacity[3] << 48);
-	} else {
-		sata_dev_desc[devno].lba48 = 0;
-	}
-#endif
-
-	/* assuming HD */
-	sata_dev_desc[devno].type = DEV_TYPE_HARDDISK;
-	sata_dev_desc[devno].blksz = ATA_BLOCKSIZE;
-	sata_dev_desc[devno].log2blksz = LOG2(sata_dev_desc[devno].blksz);
-	sata_dev_desc[devno].lun = 0;	/* just to fill something in... */
-}
-
-void set_Feature_cmd(int num, int dev)
-{
-	u8 mask = 0x00, status = 0;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	if (!(port[num].dev_mask & mask)) {
-		debug("dev%d is not present on port#%d\n", dev, num);
-		return;
-	}
-
-	dev_select(&port[num].ioaddr, dev);
-
-	sata_outb(SETFEATURES_XFER, port[num].ioaddr.feature_addr);
-	sata_outb(XFER_PIO_4, port[num].ioaddr.nsect_addr);
-	sata_outb(0, port[num].ioaddr.lbal_addr);
-	sata_outb(0, port[num].ioaddr.lbam_addr);
-	sata_outb(0, port[num].ioaddr.lbah_addr);
-
-	sata_outb(ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
-	sata_outb(ATA_CMD_SETF, port[num].ioaddr.command_addr);
-
-	udelay(50);
-	mdelay(150);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 5000);
-	if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
-		printf("Error  : status 0x%02x\n", status);
-		port[num].dev_mask &= ~mask;
-	}
-}
-
-void sata_port(struct sata_ioports *ioport)
-{
-	ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
-	ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
-	ioport->feature_addr = ioport->cmd_addr + ATA_REG_FEATURE;
-	ioport->nsect_addr = ioport->cmd_addr + ATA_REG_NSECT;
-	ioport->lbal_addr = ioport->cmd_addr + ATA_REG_LBAL;
-	ioport->lbam_addr = ioport->cmd_addr + ATA_REG_LBAM;
-	ioport->lbah_addr = ioport->cmd_addr + ATA_REG_LBAH;
-	ioport->device_addr = ioport->cmd_addr + ATA_REG_DEVICE;
-	ioport->status_addr = ioport->cmd_addr + ATA_REG_STATUS;
-	ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
-}
-
-int sata_devchk(struct sata_ioports *ioaddr, int dev)
-{
-	u8 nsect, lbal;
-
-	dev_select(ioaddr, dev);
-
-	sata_outb(0x55, ioaddr->nsect_addr);
-	sata_outb(0xaa, ioaddr->lbal_addr);
-
-	sata_outb(0xaa, ioaddr->nsect_addr);
-	sata_outb(0x55, ioaddr->lbal_addr);
-
-	sata_outb(0x55, ioaddr->nsect_addr);
-	sata_outb(0xaa, ioaddr->lbal_addr);
-
-	nsect = sata_inb(ioaddr->nsect_addr);
-	lbal = sata_inb(ioaddr->lbal_addr);
-
-	if ((nsect == 0x55) && (lbal == 0xaa))
-		return 1;	/* we found a device */
-	else
-		return 0;	/* nothing found */
-}
-
-void dev_select(struct sata_ioports *ioaddr, int dev)
-{
-	u8 tmp = 0;
-
-	if (dev == 0)
-		tmp = ATA_DEVICE_OBS;
-	else
-		tmp = ATA_DEVICE_OBS | ATA_DEV1;
-
-	sata_outb(tmp, ioaddr->device_addr);
-	sata_inb(ioaddr->altstatus_addr);
-	udelay(5);
-}
-
-u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max)
-{
-	u8 status;
-
-	do {
-		udelay(1000);
-		status = sata_chk_status(ioaddr);
-		max--;
-	} while ((status & bits) && (max > 0));
-
-	return status;
-}
-
-u8 sata_chk_status(struct sata_ioports *ioaddr)
-{
-	return sata_inb(ioaddr->status_addr);
-}
-
-
-ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buff)
-{
-	ulong n = 0, *buffer = (ulong *)buff;
-	u8 dev = 0, num = 0, mask = 0, status = 0;
-
-#ifdef CONFIG_LBA48
-	unsigned char lba48 = 0;
-
-	if (blknr & 0x0000fffff0000000) {
-		if (!sata_dev_desc[devno].lba48) {
-			printf("Drive doesn't support 48-bit addressing\n");
-			return 0;
-		}
-		/* more than 28 bits used, use 48bit mode */
-		lba48 = 1;
-	}
-#endif
-	/* Port Number */
-	num = device / CONFIG_SYS_SATA_DEVS_PER_BUS;
-	/* dev on the port */
-	if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS)
-		dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS;
-	else
-		dev = device;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	if (!(port[num].dev_mask & mask)) {
-		printf("dev%d is not present on port#%d\n", dev, num);
-		return 0;
-	}
-
-	/* Select device */
-	dev_select(&port[num].ioaddr, dev);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-	if (status & ATA_BUSY) {
-		printf("ata%u failed to respond\n", port[num].port_no);
-		return n;
-	}
-	while (blkcnt-- > 0) {
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-		if (status & ATA_BUSY) {
-			printf("ata%u failed to respond\n", 0);
-			return n;
-		}
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			/* write high bits */
-			sata_outb(0, port[num].ioaddr.nsect_addr);
-			sata_outb((blknr >> 24) & 0xFF,
-				   port[num].ioaddr.lbal_addr);
-			sata_outb((blknr >> 32) & 0xFF,
-				   port[num].ioaddr.lbam_addr);
-			sata_outb((blknr >> 40) & 0xFF,
-				   port[num].ioaddr.lbah_addr);
-		}
-#endif
-		sata_outb(1, port[num].ioaddr.nsect_addr);
-		sata_outb(((blknr) >> 0) & 0xFF,
-			   port[num].ioaddr.lbal_addr);
-		sata_outb((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
-		sata_outb((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
-
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			sata_outb(ATA_LBA, port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_READ_EXT,
-				   port[num].ioaddr.command_addr);
-		} else
-#endif
-		{
-			sata_outb(ATA_LBA | ((blknr >> 24) & 0xF),
-				   port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_READ,
-				   port[num].ioaddr.command_addr);
-		}
-
-		mdelay(50);
-		/* may take up to 4 sec */
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
-
-		if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
-		    != ATA_STAT_DRQ) {
-			u8 err = 0;
-
-			printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
-				device, (ulong) blknr, status);
-			err = sata_inb(port[num].ioaddr.error_addr);
-			printf("Error reg = 0x%x\n", err);
-			return n;
-		}
-		input_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
-		sata_inb(port[num].ioaddr.altstatus_addr);
-		udelay(50);
-
-		++n;
-		++blknr;
-		buffer += ATA_SECTORWORDS;
-	}
-	return n;
-}
-
-ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, const void *buff)
-{
-	ulong n = 0, *buffer = (ulong *)buff;
-	unsigned char status = 0, num = 0, dev = 0, mask = 0;
-
-#ifdef CONFIG_LBA48
-	unsigned char lba48 = 0;
-
-	if (blknr & 0x0000fffff0000000) {
-		if (!sata_dev_desc[devno].lba48) {
-			printf("Drive doesn't support 48-bit addressing\n");
-			return 0;
-		}
-		/* more than 28 bits used, use 48bit mode */
-		lba48 = 1;
-	}
-#endif
-	/* Port Number */
-	num = device / CONFIG_SYS_SATA_DEVS_PER_BUS;
-	/* dev on the Port */
-	if (device >= CONFIG_SYS_SATA_DEVS_PER_BUS)
-		dev = device - CONFIG_SYS_SATA_DEVS_PER_BUS;
-	else
-		dev = device;
-
-	if (dev == 0)
-		mask = 0x01;
-	else
-		mask = 0x02;
-
-	/* Select device */
-	dev_select(&port[num].ioaddr, dev);
-
-	status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-	if (status & ATA_BUSY) {
-		printf("ata%u failed to respond\n", port[num].port_no);
-		return n;
-	}
-
-	while (blkcnt-- > 0) {
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 500);
-		if (status & ATA_BUSY) {
-			printf("ata%u failed to respond\n",
-				port[num].port_no);
-			return n;
-		}
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			/* write high bits */
-			sata_outb(0, port[num].ioaddr.nsect_addr);
-			sata_outb((blknr >> 24) & 0xFF,
-				   port[num].ioaddr.lbal_addr);
-			sata_outb((blknr >> 32) & 0xFF,
-				   port[num].ioaddr.lbam_addr);
-			sata_outb((blknr >> 40) & 0xFF,
-				   port[num].ioaddr.lbah_addr);
-		}
-#endif
-		sata_outb(1, port[num].ioaddr.nsect_addr);
-		sata_outb((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
-		sata_outb((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
-		sata_outb((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
-#ifdef CONFIG_LBA48
-		if (lba48) {
-			sata_outb(ATA_LBA, port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_WRITE_EXT,
-				   port[num].ioaddr.command_addr);
-		} else
-#endif
-		{
-			sata_outb(ATA_LBA | ((blknr >> 24) & 0xF),
-				   port[num].ioaddr.device_addr);
-			sata_outb(ATA_CMD_WRITE,
-				   port[num].ioaddr.command_addr);
-		}
-
-		mdelay(50);
-		/* may take up to 4 sec */
-		status = sata_busy_wait(&port[num].ioaddr, ATA_BUSY, 4000);
-		if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
-		    != ATA_STAT_DRQ) {
-			printf("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
-				device, (ulong) blknr, status);
-			return n;
-		}
-
-		output_data(&port[num].ioaddr, buffer, ATA_SECTORWORDS);
-		sata_inb(port[num].ioaddr.altstatus_addr);
-		udelay(50);
-
-		++n;
-		++blknr;
-		buffer += ATA_SECTORWORDS;
-	}
-	return n;
-}
-
-int scan_sata(int dev)
-{
-	return 0;
-}
diff --git a/drivers/block/ata_piix.h b/drivers/block/ata_piix.h
deleted file mode 100644
index 6c68ea2..0000000
--- a/drivers/block/ata_piix.h
+++ /dev/null
@@ -1,71 +0,0 @@
-#ifndef __ATA_PIIX_H__
-#define __ATA_PIIX_H__
-
-struct sata_ioports {
-	unsigned long cmd_addr;
-	unsigned long data_addr;
-	unsigned long error_addr;
-	unsigned long feature_addr;
-	unsigned long nsect_addr;
-	unsigned long lbal_addr;
-	unsigned long lbam_addr;
-	unsigned long lbah_addr;
-	unsigned long device_addr;
-	unsigned long status_addr;
-	unsigned long command_addr;
-	unsigned long altstatus_addr;
-	unsigned long ctl_addr;
-	unsigned long bmdma_addr;
-	unsigned long scr_addr;
-};
-
-struct sata_port {
-	unsigned char port_no;		/* primary=0, secondary=1	*/
-	struct sata_ioports ioaddr;	/* ATA cmd/ctl/dma reg blks	*/
-	unsigned char ctl_reg;
-	unsigned char last_ctl;
-	unsigned char port_state;	/* 1-port is available and	*/
-					/* 0-port is not available	*/
-	unsigned char dev_mask;
-};
-
-/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
-#ifdef SATA_DECL		/* SATA library specific declarations */
-inline void ata_dump_id(u16 *id)
-{
-	debug("49 = 0x%04x  "
-		"53 = 0x%04x  "
-		"63 = 0x%04x  "
-		"64 = 0x%04x  "
-		"75 = 0x%04x\n", id[49], id[53], id[63], id[64], id[75]);
-	debug("80 = 0x%04x  "
-		"81 = 0x%04x  "
-		"82 = 0x%04x  "
-		"83 = 0x%04x  "
-		"84 = 0x%04x\n", id[80], id[81], id[82], id[83], id[84]);
-	debug("88 = 0x%04x  " "93 = 0x%04x\n", id[88], id[93]);
-}
-#endif
-
-#ifdef SATA_DECL		/*SATA library specific declarations */
-int sata_bus_softreset(int num);
-void sata_identify(int num, int dev);
-void sata_port(struct sata_ioports *ioport);
-void set_Feature_cmd(int num, int dev);
-int sata_devchk(struct sata_ioports *ioaddr, int dev);
-void dev_select(struct sata_ioports *ioaddr, int dev);
-u8 sata_busy_wait(struct sata_ioports *ioaddr, int bits, unsigned int max);
-u8 sata_chk_status(struct sata_ioports *ioaddr);
-#endif
-
-/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
-
-#ifdef DRV_DECL			/* Driver specific declaration */
-int init_sata(int dev);
-#endif
-
-#ifdef DRV_DECL			/* Defines Driver Specific variables */
-struct sata_port port[CONFIG_SYS_SATA_MAXBUS];
-#endif
-
-#endif /* __ATA_PIIX_H__ */
-- 
1.8.2.1

[U-Boot] [PATCH v2 4/6] cmd_ide: Eliminate build warnings in atapi_inquiry()

[Bin Meng]

Eliminate the following build warning in atapi_inquiry():
  "warning: assignment from incompatible pointer type [enabled by default]"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- Correct the typo of 'Eliminate' in the commit message

 common/cmd_ide.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index 04a6d9b..ecd3e9d 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -79,7 +79,7 @@ static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len
 
 #ifdef CONFIG_ATAPI
 static void	atapi_inquiry(block_dev_desc_t *dev_desc);
-static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt,
+static ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
 			void *buffer);
 #endif
 
@@ -1388,13 +1388,13 @@ static void atapi_inquiry(block_dev_desc_t *dev_desc)
 #define ATAPI_READ_BLOCK_SIZE	2048	/* assuming CD part */
 #define ATAPI_READ_MAX_BLOCK	(ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
 
-ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
+ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
 {
 	ulong n = 0;
 	unsigned char ccb[12];	/* Command descriptor block */
 	ulong cnt;
 
-	debug("atapi_read dev %d start %lX, blocks " LBAF " buffer at %lX\n",
+	debug("atapi_read dev %d start " LBAF " blocks " LBAF " buffer at %lX\n",
 	      device, blknr, blkcnt, (ulong) buffer);
 
 	do {
-- 
1.8.2.1

[U-Boot] [PATCH v2 5/6] x86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h

[Bin Meng]

Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
by cmd_ide.c which is not common for modern x86 targets, hence remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v2: None

 include/configs/x86-common.h | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 0b61615..3912b39 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -37,6 +37,7 @@
 #define CONFIG_SCSI_AHCI
 #ifdef CONFIG_SCSI_AHCI
 #define CONFIG_LIBATA
+#define CONFIG_LBA48
 #define CONFIG_SYS_64BIT_LBA
 
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
@@ -76,10 +77,6 @@
 #define CONFIG_SYS_HUSH_PARSER
 
 #define CONFIG_SUPPORT_VFAT
-/************************************************************
- * ATAPI support (experimental)
- ************************************************************/
-#define CONFIG_ATAPI
 
 /************************************************************
  * DISK Partition support
-- 
1.8.2.1

[U-Boot] [PATCH v2 6/6] x86: qemu: Add ATA/SATA support

[Bin Meng]

Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2: None

 include/configs/qemu-x86.h | 26 +++++++++++++++++++++++++-
 include/pci_ids.h          |  1 +
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index e2a223f..77f88d2 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -36,8 +36,32 @@
 					"stdout=serial,vga\0" \
 					"stderr=serial,vga\0"
 
+/*
+ * ATA/SATA support for QEMU x86 targets
+ *   - Only legacy IDE controller is supported for QEMU '-M pc' target
+ *   - AHCI controller is supported for QEMU '-M q35' target
+ *
+ * Default configuraion is to support the QEMU default x86 target
+ * Undefine CONFIG_CMD_IDE to support q35 target
+ */
+#define CONFIG_CMD_IDE
+#ifdef CONFIG_CMD_IDE
+#define CONFIG_SYS_IDE_MAXBUS		2
+#define CONFIG_SYS_IDE_MAXDEVICE	4
+#define CONFIG_SYS_ATA_BASE_ADDR	0
+#define CONFIG_SYS_ATA_DATA_OFFSET	0
+#define CONFIG_SYS_ATA_REG_OFFSET	0
+#define CONFIG_SYS_ATA_ALT_OFFSET	0
+#define CONFIG_SYS_ATA_IDE0_OFFSET	0x1f0
+#define CONFIG_SYS_ATA_IDE1_OFFSET	0x170
+#define CONFIG_ATAPI
+
+#undef CONFIG_SCSI_AHCI
+#undef CONFIG_CMD_SCSI
+#else
 #define CONFIG_SCSI_DEV_LIST		\
-	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_1}
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI}
+#endif
 
 /* GPIO is not supported */
 #undef CONFIG_INTEL_ICH6_GPIO
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 2e66851..5771e12 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2838,6 +2838,7 @@
 #define PCI_DEVICE_ID_INTEL_ICH9_6	0x2930
 #define PCI_DEVICE_ID_INTEL_ICH9_7	0x2916
 #define PCI_DEVICE_ID_INTEL_ICH9_8	0x2918
+#define PCI_DEVICE_ID_INTEL_ICH9_AHCI	0x2922
 #define PCI_DEVICE_ID_INTEL_I7_MCR	0x2c18
 #define PCI_DEVICE_ID_INTEL_I7_MC_TAD	0x2c19
 #define PCI_DEVICE_ID_INTEL_I7_MC_RAS	0x2c1a
-- 
1.8.2.1

[U-Boot] [PATCH v2 3/6] drivers: block: Remove the ata_piix driver

[Simon Glass]

On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
> This driver was originally added to support the native IDE mode for
> Intel chipset, however it has some bugs like not supporting ATAPI
> devices, endianness issue, or even broken build when CONFIG_LAB48.
> Given no board is using this driver as of today, rather than fixing
> all these issues we just remove it from the source tree.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Correct typo of 'endianness' in the commit message
>
>  drivers/block/Makefile   |   1 -
>  drivers/block/ata_piix.c | 717 -----------------------------------------------
>  drivers/block/ata_piix.h |  71 -----
>  3 files changed, 789 deletions(-)
>  delete mode 100644 drivers/block/ata_piix.c
>  delete mode 100644 drivers/block/ata_piix.h
>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v2 4/6] cmd_ide: Eliminate build warnings in atapi_inquiry()

[Simon Glass]

On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
> Eliminate the following build warning in atapi_inquiry():
>   "warning: assignment from incompatible pointer type [enabled by default]"
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - Correct the typo of 'Eliminate' in the commit message
>
>  common/cmd_ide.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/common/cmd_ide.c b/common/cmd_ide.c
> index 04a6d9b..ecd3e9d 100644
> --- a/common/cmd_ide.c
> +++ b/common/cmd_ide.c
> @@ -79,7 +79,7 @@ static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len
>
>  #ifdef CONFIG_ATAPI
>  static void    atapi_inquiry(block_dev_desc_t *dev_desc);
> -static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt,
> +static ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
>                         void *buffer);
>  #endif
>
> @@ -1388,13 +1388,13 @@ static void atapi_inquiry(block_dev_desc_t *dev_desc)
>  #define ATAPI_READ_BLOCK_SIZE  2048    /* assuming CD part */
>  #define ATAPI_READ_MAX_BLOCK   (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
>
> -ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
> +ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
>  {
>         ulong n = 0;
>         unsigned char ccb[12];  /* Command descriptor block */
>         ulong cnt;
>
> -       debug("atapi_read dev %d start %lX, blocks " LBAF " buffer at %lX\n",
> +       debug("atapi_read dev %d start " LBAF " blocks " LBAF " buffer at %lX\n",
>               device, blknr, blkcnt, (ulong) buffer);
>
>         do {
> --
> 1.8.2.1
>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v2 5/6] x86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h

[Simon Glass]

On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
> Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
> by cmd_ide.c which is not common for modern x86 targets, hence remove it.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v2: None
>
>  include/configs/x86-common.h | 5 +----
>  1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
> index 0b61615..3912b39 100644
> --- a/include/configs/x86-common.h
> +++ b/include/configs/x86-common.h
> @@ -37,6 +37,7 @@
>  #define CONFIG_SCSI_AHCI
>  #ifdef CONFIG_SCSI_AHCI
>  #define CONFIG_LIBATA
> +#define CONFIG_LBA48
>  #define CONFIG_SYS_64BIT_LBA
>
>  #define CONFIG_SYS_SCSI_MAX_SCSI_ID    2
> @@ -76,10 +77,6 @@
>  #define CONFIG_SYS_HUSH_PARSER
>
>  #define CONFIG_SUPPORT_VFAT
> -/************************************************************
> - * ATAPI support (experimental)
> - ************************************************************/
> -#define CONFIG_ATAPI
>
>  /************************************************************
>   * DISK Partition support
> --
> 1.8.2.1
>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v2 6/6] x86: qemu: Add ATA/SATA support

[Simon Glass]

On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
> Enable legacy IDE support on the pc target and AHCI support on the
> q35 target. Default configuration is to support the pc target.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2: None
>
>  include/configs/qemu-x86.h | 26 +++++++++++++++++++++++++-
>  include/pci_ids.h          |  1 +
>  2 files changed, 26 insertions(+), 1 deletion(-)
>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration

[Bin Meng]

Hi Simon,

Reply this thread to the v2 patch.

On Tue, May 19, 2015 at 5:39 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
On Sat, May 16, 2015 at 9:33 AM, Bin Meng <bmeng.cn@gmail.com> wrote:
>> The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
>> needs to be configured.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Correct a typo in the commit message title
>>
>>  drivers/pci/pci_auto.c | 14 --------------
>>  1 file changed, 14 deletions(-)
>
> I don't see how this code change relates to your commit message...
>

The legacy IDE controller reports PI (offset 9 in the configuration
space) as 0x80, so the codes here will skip (!(0x80 & 0x05)) its
configuration (ie: BAR4 won't be assigned to a valid memory window)

[snip]

Regards,
Bin

[U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration

[Simon Glass]

+Wolfgang

On 18 May 2015 at 19:40, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> Reply this thread to the v2 patch.
>
> On Tue, May 19, 2015 at 5:39 AM, Simon Glass <sjg@chromium.org> wrote:
>> Hi Bin,
>>
> On Sat, May 16, 2015 at 9:33 AM, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
>>> needs to be configured.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>
>>> ---
>>>
>>> Changes in v2:
>>> - Correct a typo in the commit message title
>>>
>>>  drivers/pci/pci_auto.c | 14 --------------
>>>  1 file changed, 14 deletions(-)
>>
>> I don't see how this code change relates to your commit message...
>>
>
> The legacy IDE controller reports PI (offset 9 in the configuration
> space) as 0x80, so the codes here will skip (!(0x80 & 0x05)) its
> configuration (ie: BAR4 won't be assigned to a valid memory window)

OK I see. It looks like this code has been there since the dawn of
U-Boot. I added Wolfgang in case we are missing something.

Reviewed-by: Simon Glass <sjg@chromium.org>

Regards,
Simon

[U-Boot] [PATCH v2 2/6] pci: Do not skip legacy IDE device configuration

[Simon Glass]

On 20 May 2015 at 08:26, Simon Glass <sjg@chromium.org> wrote:
> +Wolfgang
>
> On 18 May 2015 at 19:40, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Hi Simon,
>>
>> Reply this thread to the v2 patch.
>>
>> On Tue, May 19, 2015 at 5:39 AM, Simon Glass <sjg@chromium.org> wrote:
>>> Hi Bin,
>>>
>> On Sat, May 16, 2015 at 9:33 AM, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>> The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
>>>> needs to be configured.
>>>>
>>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>>
>>>> ---
>>>>
>>>> Changes in v2:
>>>> - Correct a typo in the commit message title
>>>>
>>>>  drivers/pci/pci_auto.c | 14 --------------
>>>>  1 file changed, 14 deletions(-)
>>>
>>> I don't see how this code change relates to your commit message...
>>>
>>
>> The legacy IDE controller reports PI (offset 9 in the configuration
>> space) as 0x80, so the codes here will skip (!(0x80 & 0x05)) its
>> configuration (ie: BAR4 won't be assigned to a valid memory window)
>
> OK I see. It looks like this code has been there since the dawn of
> U-Boot. I added Wolfgang in case we are missing something.
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v2 4/6] cmd_ide: Eliminate build warnings in atapi_inquiry()

[Simon Glass]

On 18 May 2015 at 15:39, Simon Glass <sjg@chromium.org> wrote:
> On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Eliminate the following build warning in atapi_inquiry():
>>   "warning: assignment from incompatible pointer type [enabled by default]"
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Correct the typo of 'Eliminate' in the commit message
>>
>>  common/cmd_ide.c | 6 +++---
>>  1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/common/cmd_ide.c b/common/cmd_ide.c
>> index 04a6d9b..ecd3e9d 100644
>> --- a/common/cmd_ide.c
>> +++ b/common/cmd_ide.c
>> @@ -79,7 +79,7 @@ static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len
>>
>>  #ifdef CONFIG_ATAPI
>>  static void    atapi_inquiry(block_dev_desc_t *dev_desc);
>> -static ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt,
>> +static ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt,
>>                         void *buffer);
>>  #endif
>>
>> @@ -1388,13 +1388,13 @@ static void atapi_inquiry(block_dev_desc_t *dev_desc)
>>  #define ATAPI_READ_BLOCK_SIZE  2048    /* assuming CD part */
>>  #define ATAPI_READ_MAX_BLOCK   (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
>>
>> -ulong atapi_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
>> +ulong atapi_read(int device, lbaint_t blknr, lbaint_t blkcnt, void *buffer)
>>  {
>>         ulong n = 0;
>>         unsigned char ccb[12];  /* Command descriptor block */
>>         ulong cnt;
>>
>> -       debug("atapi_read dev %d start %lX, blocks " LBAF " buffer at %lX\n",
>> +       debug("atapi_read dev %d start " LBAF " blocks " LBAF " buffer at %lX\n",
>>               device, blknr, blkcnt, (ulong) buffer);
>>
>>         do {
>> --
>> 1.8.2.1
>>
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 5/6] x86: Add CONFIG_LBA48 and remove CONFIG_ATAPI in x86-common.h

[Simon Glass]

On 18 May 2015 at 15:39, Simon Glass <sjg@chromium.org> wrote:
> On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
>> by cmd_ide.c which is not common for modern x86 targets, hence remove it.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>> Changes in v2: None
>>
>>  include/configs/x86-common.h | 5 +----
>>  1 file changed, 1 insertion(+), 4 deletions(-)
>>
>> diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
>> index 0b61615..3912b39 100644
>> --- a/include/configs/x86-common.h
>> +++ b/include/configs/x86-common.h
>> @@ -37,6 +37,7 @@
>>  #define CONFIG_SCSI_AHCI
>>  #ifdef CONFIG_SCSI_AHCI
>>  #define CONFIG_LIBATA
>> +#define CONFIG_LBA48
>>  #define CONFIG_SYS_64BIT_LBA
>>
>>  #define CONFIG_SYS_SCSI_MAX_SCSI_ID    2
>> @@ -76,10 +77,6 @@
>>  #define CONFIG_SYS_HUSH_PARSER
>>
>>  #define CONFIG_SUPPORT_VFAT
>> -/************************************************************
>> - * ATAPI support (experimental)
>> - ************************************************************/
>> -#define CONFIG_ATAPI
>>
>>  /************************************************************
>>   * DISK Partition support
>> --
>> 1.8.2.1
>>
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 6/6] x86: qemu: Add ATA/SATA support

[Simon Glass]

On 18 May 2015 at 15:40, Simon Glass <sjg@chromium.org> wrote:
> On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Enable legacy IDE support on the pc target and AHCI support on the
>> q35 target. Default configuration is to support the pc target.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2: None
>>
>>  include/configs/qemu-x86.h | 26 +++++++++++++++++++++++++-
>>  include/pci_ids.h          |  1 +
>>  2 files changed, 26 insertions(+), 1 deletion(-)
>>
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 3/6] drivers: block: Remove the ata_piix driver

[Bin Meng]

Hi Simon,

On Tue, May 19, 2015 at 5:39 AM, Simon Glass <sjg@chromium.org> wrote:
> On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
>> This driver was originally added to support the native IDE mode for
>> Intel chipset, however it has some bugs like not supporting ATAPI
>> devices, endianness issue, or even broken build when CONFIG_LAB48.
>> Given no board is using this driver as of today, rather than fixing
>> all these issues we just remove it from the source tree.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - Correct typo of 'endianness' in the commit message
>>
>>  drivers/block/Makefile   |   1 -
>>  drivers/block/ata_piix.c | 717 -----------------------------------------------
>>  drivers/block/ata_piix.h |  71 -----
>>  3 files changed, 789 deletions(-)
>>  delete mode 100644 drivers/block/ata_piix.c
>>  delete mode 100644 drivers/block/ata_piix.h
>>
>
> Acked-by: Simon Glass <sjg@chromium.org>

Given we are preparing next release on u-boot-x86/master, could this
patch be applied now?

Regards,
Bin

[U-Boot] [PATCH v2 3/6] drivers: block: Remove the ata_piix driver

[Simon Glass]

Hi Bin,

On 7 July 2015 at 21:00, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Tue, May 19, 2015 at 5:39 AM, Simon Glass <sjg@chromium.org> wrote:
>> On 15 May 2015 at 19:33, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> This driver was originally added to support the native IDE mode for
>>> Intel chipset, however it has some bugs like not supporting ATAPI
>>> devices, endianness issue, or even broken build when CONFIG_LAB48.
>>> Given no board is using this driver as of today, rather than fixing
>>> all these issues we just remove it from the source tree.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>
>>> ---
>>>
>>> Changes in v2:
>>> - Correct typo of 'endianness' in the commit message
>>>
>>>  drivers/block/Makefile   |   1 -
>>>  drivers/block/ata_piix.c | 717 -----------------------------------------------
>>>  drivers/block/ata_piix.h |  71 -----
>>>  3 files changed, 789 deletions(-)
>>>  delete mode 100644 drivers/block/ata_piix.c
>>>  delete mode 100644 drivers/block/ata_piix.h
>>>
>>
>> Acked-by: Simon Glass <sjg@chromium.org>
>
> Given we are preparing next release on u-boot-x86/master, could this
> patch be applied now?

Yes!

Applied to u-boot-x86, thanks!