* [U-Boot] [PATCH 2/2] x86: qemu: Turn on legacy segments decode
[not found] <1432112645-25312-1-git-send-email-bmeng.cn@gmail.com>
@ 2015-05-20 9:04 ` Bin Meng
2015-05-20 17:45 ` Simon Glass
0 siblings, 1 reply; 2+ messages in thread
From: Bin Meng @ 2015-05-20 9:04 UTC (permalink / raw)
To: u-boot
By default the legacy segments C/D/E/F do not decode to system RAM.
Turn on the decode via Programmable Attribute Map (PAM) registers
so that we can write configuration tables in the F segment.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
arch/x86/cpu/qemu/pci.c | 20 ++++++++++++++++++++
arch/x86/include/asm/arch-qemu/qemu.h | 6 ++++++
2 files changed, 26 insertions(+)
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c
index c09bdf2..c9d5f3a 100644
--- a/arch/x86/cpu/qemu/pci.c
+++ b/arch/x86/cpu/qemu/pci.c
@@ -7,6 +7,8 @@
#include <common.h>
#include <pci.h>
#include <pci_rom.h>
+#include <asm/pci.h>
+#include <asm/arch/qemu.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -50,6 +52,8 @@ int board_pci_post_scan(struct pci_controller *hose)
ulong start;
pci_dev_t bdf;
struct pci_device_id graphic_card[] = { { 0x1234, 0x1111 } };
+ u16 device;
+ int pam, i;
/*
* QEMU emulated graphic card shows in the PCI configuration space with
@@ -67,6 +71,22 @@ int board_pci_post_scan(struct pci_controller *hose)
debug("BIOS ran in %lums\n", get_timer(start));
}
+ /*
+ * i440FX and Q35 chipset have different PAM register offset, but with
+ * the same bitfield layout. Here we determine the offset based on its
+ * PCI device ID.
+ */
+ device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID);
+ pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM;
+
+ /*
+ * Initialize Programmable Attribute Map (PAM) Registers
+ *
+ * Configure legacy segments C/D/E/F to system RAM
+ */
+ for (i = 0; i < PAM_NUM; i++)
+ x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
+
return ret;
}
diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h
index 8d7e986..7a9901d 100644
--- a/arch/x86/include/asm/arch-qemu/qemu.h
+++ b/arch/x86/include/asm/arch-qemu/qemu.h
@@ -7,6 +7,12 @@
#ifndef _ARCH_QEMU_H_
#define _ARCH_QEMU_H_
+/* Programmable Attribute Map (PAM) Registers */
+#define I440FX_PAM 0x59
+#define Q35_PAM 0x90
+#define PAM_NUM 7
+#define PAM_RW 0x33
+
/* I/O Ports */
#define CMOS_ADDR_PORT 0x70
#define CMOS_DATA_PORT 0x71
--
1.8.2.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH 2/2] x86: qemu: Turn on legacy segments decode
2015-05-20 9:04 ` [U-Boot] [PATCH 2/2] x86: qemu: Turn on legacy segments decode Bin Meng
@ 2015-05-20 17:45 ` Simon Glass
0 siblings, 0 replies; 2+ messages in thread
From: Simon Glass @ 2015-05-20 17:45 UTC (permalink / raw)
To: u-boot
On 20 May 2015 at 03:04, Bin Meng <bmeng.cn@gmail.com> wrote:
> By default the legacy segments C/D/E/F do not decode to system RAM.
> Turn on the decode via Programmable Attribute Map (PAM) registers
> so that we can write configuration tables in the F segment.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> arch/x86/cpu/qemu/pci.c | 20 ++++++++++++++++++++
> arch/x86/include/asm/arch-qemu/qemu.h | 6 ++++++
> 2 files changed, 26 insertions(+)
Acked-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2015-05-20 17:45 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
[not found] <1432112645-25312-1-git-send-email-bmeng.cn@gmail.com>
2015-05-20 9:04 ` [U-Boot] [PATCH 2/2] x86: qemu: Turn on legacy segments decode Bin Meng
2015-05-20 17:45 ` Simon Glass
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.