[U-Boot] [PATCH v2 2/6] x86: Support QEMU x86 targets

[U-Boot] [PATCH v2 2/6] x86: Support QEMU x86 targets

[Bin Meng]

This commit introduces the initial U-Boot support for QEMU x86 targets.
U-Boot can boot from coreboot as a payload, or directly without coreboot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/x86/Kconfig                      |  5 +++
 arch/x86/cpu/Makefile                 |  1 +
 arch/x86/cpu/qemu/Kconfig             | 21 +++++++++++++
 arch/x86/cpu/qemu/Makefile            |  8 +++++
 arch/x86/cpu/qemu/car.S               | 26 ++++++++++++++++
 arch/x86/cpu/qemu/dram.c              | 46 ++++++++++++++++++++++++++++
 arch/x86/cpu/qemu/pci.c               | 49 ++++++++++++++++++++++++++++++
 arch/x86/cpu/qemu/qemu.c              | 37 +++++++++++++++++++++++
 arch/x86/dts/Makefile                 |  3 +-
 arch/x86/dts/qemu-x86.dts             | 34 +++++++++++++++++++++
 arch/x86/include/asm/arch-qemu/gpio.h | 13 ++++++++
 arch/x86/include/asm/arch-qemu/qemu.h | 17 +++++++++++
 board/emulation/Kconfig               | 25 +++++++++++++++
 board/emulation/qemu-x86/Kconfig      | 24 +++++++++++++++
 board/emulation/qemu-x86/MAINTAINERS  |  6 ++++
 board/emulation/qemu-x86/Makefile     |  7 +++++
 board/emulation/qemu-x86/qemu-x86.c   | 13 ++++++++
 board/emulation/qemu-x86/start.S      |  9 ++++++
 configs/qemu-x86_defconfig            |  6 ++++
 include/configs/qemu-x86.h            | 57 +++++++++++++++++++++++++++++++++++
 20 files changed, 406 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/cpu/qemu/Kconfig
 create mode 100644 arch/x86/cpu/qemu/Makefile
 create mode 100644 arch/x86/cpu/qemu/car.S
 create mode 100644 arch/x86/cpu/qemu/dram.c
 create mode 100644 arch/x86/cpu/qemu/pci.c
 create mode 100644 arch/x86/cpu/qemu/qemu.c
 create mode 100644 arch/x86/dts/qemu-x86.dts
 create mode 100644 arch/x86/include/asm/arch-qemu/gpio.h
 create mode 100644 arch/x86/include/asm/arch-qemu/qemu.h
 create mode 100644 board/emulation/Kconfig
 create mode 100644 board/emulation/qemu-x86/Kconfig
 create mode 100644 board/emulation/qemu-x86/MAINTAINERS
 create mode 100644 board/emulation/qemu-x86/Makefile
 create mode 100644 board/emulation/qemu-x86/qemu-x86.c
 create mode 100644 board/emulation/qemu-x86/start.S
 create mode 100644 configs/qemu-x86_defconfig
 create mode 100644 include/configs/qemu-x86.h

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8e734fd..3d02620 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -17,6 +17,9 @@ choice
 config VENDOR_COREBOOT
 	bool "coreboot"
 
+config VENDOR_EMULATION
+	bool "emulation"
+
 config VENDOR_GOOGLE
 	bool "Google"
 
@@ -27,6 +30,7 @@ endchoice
 
 # board-specific options below
 source "board/coreboot/Kconfig"
+source "board/emulation/Kconfig"
 source "board/google/Kconfig"
 source "board/intel/Kconfig"
 
@@ -34,6 +38,7 @@ source "board/intel/Kconfig"
 source "arch/x86/cpu/baytrail/Kconfig"
 source "arch/x86/cpu/coreboot/Kconfig"
 source "arch/x86/cpu/ivybridge/Kconfig"
+source "arch/x86/cpu/qemu/Kconfig"
 source "arch/x86/cpu/quark/Kconfig"
 source "arch/x86/cpu/queensbay/Kconfig"
 
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 043bea2..307545a 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -14,6 +14,7 @@ obj-y	+= interrupts.o cpu.o call64.o
 
 obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
 obj-$(CONFIG_SYS_COREBOOT) += coreboot/
+obj-$(CONFIG_QEMU) += qemu/
 obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
 obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
 obj-$(CONFIG_INTEL_QUARK) += quark/
diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig
new file mode 100644
index 0000000..fb775d7
--- /dev/null
+++ b/arch/x86/cpu/qemu/Kconfig
@@ -0,0 +1,21 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+config QEMU
+	bool
+	select TSC_CALIBRATION_BYPASS
+
+if QEMU
+
+config SYS_CAR_ADDR
+	hex
+	default 0xd0000
+
+config SYS_CAR_SIZE
+	hex
+	default 0x10000
+
+endif
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
new file mode 100644
index 0000000..be79723
--- /dev/null
+++ b/arch/x86/cpu/qemu/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += car.o dram.o qemu.o
+obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/car.S b/arch/x86/cpu/qemu/car.S
new file mode 100644
index 0000000..13b3aea
--- /dev/null
+++ b/arch/x86/cpu/qemu/car.S
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/post.h>
+
+.globl car_init
+car_init:
+	/* Save the BIST result */
+	movl	%eax, %ebp
+
+	post_code(POST_CAR_START)
+
+	/*
+	 * Since we know we are running inside emulator,
+	 * we can do nothing here for CAR initialization.
+	 */
+
+	/* Restore the BIST result */
+	movl	%ebp, %eax
+
+	post_code(POST_CAR_CPU_CACHE)
+	jmp	car_init_ret
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c
new file mode 100644
index 0000000..a88d0d2
--- /dev/null
+++ b/arch/x86/cpu/qemu/dram.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/post.h>
+#include <asm/arch/qemu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	u32 ram;
+
+	outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT);
+	ram = ((u32)inb(CMOS_DATA_PORT)) << 14;
+	outb(LOW_RAM_ADDR, CMOS_ADDR_PORT);
+	ram |= ((u32)inb(CMOS_DATA_PORT)) << 6;
+	ram += 16 * 1024;
+
+	gd->ram_size = ram * 1024;
+	post_code(POST_DRAM);
+
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = 0;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary.
+ * It overrides the default implementation found elsewhere which simply
+ * picks the end of ram, wherever that may be. The location of the stack,
+ * the relocation address, and how far U-Boot is moved by relocation are
+ * set in the global data structure.
+ */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	return gd->ram_size;
+}
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c
new file mode 100644
index 0000000..d50ab75
--- /dev/null
+++ b/arch/x86/cpu/qemu/pci.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <pci.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_pci_setup_hose(struct pci_controller *hose)
+{
+	hose->first_busno = 0;
+	hose->last_busno = 0;
+
+	/* PCI memory space */
+	pci_set_region(hose->regions + 0,
+		       CONFIG_PCI_MEM_BUS,
+		       CONFIG_PCI_MEM_PHYS,
+		       CONFIG_PCI_MEM_SIZE,
+		       PCI_REGION_MEM);
+
+	/* PCI IO space */
+	pci_set_region(hose->regions + 1,
+		       CONFIG_PCI_IO_BUS,
+		       CONFIG_PCI_IO_PHYS,
+		       CONFIG_PCI_IO_SIZE,
+		       PCI_REGION_IO);
+
+	pci_set_region(hose->regions + 2,
+		       CONFIG_PCI_PREF_BUS,
+		       CONFIG_PCI_PREF_PHYS,
+		       CONFIG_PCI_PREF_SIZE,
+		       PCI_REGION_PREFETCH);
+
+	pci_set_region(hose->regions + 3,
+		       0,
+		       0,
+		       gd->ram_size,
+		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+
+	hose->region_count = 4;
+}
+
+int board_pci_post_scan(struct pci_controller *hose)
+{
+	return 0;
+}
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
new file mode 100644
index 0000000..0f98476
--- /dev/null
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/post.h>
+#include <asm/processor.h>
+
+int arch_cpu_init(void)
+{
+	int ret;
+
+	post_code(POST_CPU_INIT);
+#ifdef CONFIG_SYS_X86_TSC_TIMER
+	timer_set_base(rdtsc());
+#endif
+
+	ret = x86_cpu_init_f();
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+int print_cpuinfo(void)
+{
+	post_code(POST_CPU_INFO);
+	return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+	/* cold reset */
+	x86_full_reset();
+}
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 431bbd8..ca2eab3 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -2,7 +2,8 @@ dtb-y += chromebook_link.dtb \
 	chromebox_panther.dtb \
 	crownbay.dtb \
 	galileo.dtb \
-	minnowmax.dtb
+	minnowmax.dtb \
+	qemu-x86.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/x86/dts/qemu-x86.dts b/arch/x86/dts/qemu-x86.dts
new file mode 100644
index 0000000..f1291b5
--- /dev/null
+++ b/arch/x86/dts/qemu-x86.dts
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+/include/ "serial.dtsi"
+
+/ {
+	model = "QEMU x86";
+	compatible = "qemu,x86";
+
+	config {
+		silent_console = <0>;
+	};
+
+	chosen {
+		stdout-path = "/serial";
+	};
+
+	pci {
+		compatible = "pci-x86";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		u-boot,dm-pre-reloc;
+		ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
+			0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
+			0x01000000 0x0 0x2000 0x2000 0 0xe000>;
+	};
+
+};
diff --git a/arch/x86/include/asm/arch-qemu/gpio.h b/arch/x86/include/asm/arch-qemu/gpio.h
new file mode 100644
index 0000000..ca8cba4
--- /dev/null
+++ b/arch/x86/include/asm/arch-qemu/gpio.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _X86_ARCH_GPIO_H_
+#define _X86_ARCH_GPIO_H_
+
+/* Where in config space is the register that points to the GPIO registers? */
+#define PCI_CFG_GPIOBASE 0x44
+
+#endif /* _X86_ARCH_GPIO_H_ */
diff --git a/arch/x86/include/asm/arch-qemu/qemu.h b/arch/x86/include/asm/arch-qemu/qemu.h
new file mode 100644
index 0000000..8d7e986
--- /dev/null
+++ b/arch/x86/include/asm/arch-qemu/qemu.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ARCH_QEMU_H_
+#define _ARCH_QEMU_H_
+
+/* I/O Ports */
+#define CMOS_ADDR_PORT		0x70
+#define CMOS_DATA_PORT		0x71
+
+#define LOW_RAM_ADDR		0x34
+#define HIGH_RAM_ADDR		0x35
+
+#endif /* _ARCH_QEMU_H_ */
diff --git a/board/emulation/Kconfig b/board/emulation/Kconfig
new file mode 100644
index 0000000..36809fd
--- /dev/null
+++ b/board/emulation/Kconfig
@@ -0,0 +1,25 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+if VENDOR_EMULATION
+
+choice
+	prompt "Mainboard model"
+
+config TARGET_QEMU_X86
+	bool "QEMU x86"
+	help
+	  This is the QEMU emulated x86 board. U-Boot supports running
+	  as a coreboot payload as well as bare boot without coreboot.
+	  There are two types of x86 boards supported by QEMU which are
+	  supported by U-Boot. They are via QEMU '-M pc', an i440FX/PIIX
+	  chipset platform and '-M q35', a Q35/ICH9 chipset platform.
+
+endchoice
+
+source "board/emulation/qemu-x86/Kconfig"
+
+endif
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
new file mode 100644
index 0000000..e777ef4
--- /dev/null
+++ b/board/emulation/qemu-x86/Kconfig
@@ -0,0 +1,24 @@
+if TARGET_QEMU_X86
+
+config SYS_BOARD
+	default "qemu-x86"
+
+config SYS_VENDOR
+	default "emulation"
+
+config SYS_SOC
+	default "qemu"
+
+config SYS_CONFIG_NAME
+	default "qemu-x86"
+
+config SYS_TEXT_BASE
+	default 0xfff00000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select X86_RESET_VECTOR
+	select QEMU
+	select BOARD_ROMSIZE_KB_1024
+
+endif
diff --git a/board/emulation/qemu-x86/MAINTAINERS b/board/emulation/qemu-x86/MAINTAINERS
new file mode 100644
index 0000000..ea4dd19
--- /dev/null
+++ b/board/emulation/qemu-x86/MAINTAINERS
@@ -0,0 +1,6 @@
+QEMU X86 BOARD
+M:	Bin Meng <bmeng.cn@gmail.com>
+S:	Maintained
+F:	board/emulation/qemu-x86/
+F:	include/configs/qemu-x86.h
+F:	configs/qemu-x86_defconfig
diff --git a/board/emulation/qemu-x86/Makefile b/board/emulation/qemu-x86/Makefile
new file mode 100644
index 0000000..ad2bbb9
--- /dev/null
+++ b/board/emulation/qemu-x86/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= qemu-x86.o start.o
diff --git a/board/emulation/qemu-x86/qemu-x86.c b/board/emulation/qemu-x86/qemu-x86.c
new file mode 100644
index 0000000..fedea81
--- /dev/null
+++ b/board/emulation/qemu-x86/qemu-x86.c
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}
diff --git a/board/emulation/qemu-x86/start.S b/board/emulation/qemu-x86/start.S
new file mode 100644
index 0000000..a71db69
--- /dev/null
+++ b/board/emulation/qemu-x86/start.S
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+	jmp	early_board_init_ret
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
new file mode 100644
index 0000000..9b02322
--- /dev/null
+++ b/configs/qemu-x86_defconfig
@@ -0,0 +1,6 @@
+CONFIG_X86=y
+CONFIG_VENDOR_EMULATION=y
+CONFIG_TARGET_QEMU_X86=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_SEPARATE=y
+CONFIG_DEFAULT_DEVICE_TREE="qemu-x86"
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
new file mode 100644
index 0000000..463620d
--- /dev/null
+++ b/include/configs/qemu-x86.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#define CONFIG_SYS_MONITOR_LEN		(1 << 20)
+
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_X86_SERIAL
+
+#define CONFIG_PCI_MEM_BUS		0xc0000000
+#define CONFIG_PCI_MEM_PHYS		CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE		0x10000000
+
+#define CONFIG_PCI_PREF_BUS		0xd0000000
+#define CONFIG_PCI_PREF_PHYS		CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE		0x10000000
+
+#define CONFIG_PCI_IO_BUS		0x2000
+#define CONFIG_PCI_IO_PHYS		CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE		0xe000
+
+#define CONFIG_PCI_PNP
+#define CONFIG_E1000
+
+#define CONFIG_STD_DEVICES_SETTINGS	"stdin=serial\0" \
+					"stdout=serial\0" \
+					"stderr=serial\0"
+
+#define CONFIG_SCSI_DEV_LIST		\
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_1}
+
+/* GPIO is not supported */
+#undef CONFIG_INTEL_ICH6_GPIO
+#undef CONFIG_CMD_GPIO
+
+/* SPI is not supported */
+#undef CONFIG_ICH_SPI
+#undef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_IS_NOWHERE
+
+/* Video is not supported */
+#undef CONFIG_VIDEO
+#undef CONFIG_CFB_CONSOLE
+
+#endif	/* __CONFIG_H */
-- 
1.8.2.1

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Bin Meng]

Now that we have QEMU support, make it the default vendor in the
'make menuconfig' screen.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 arch/x86/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 3d02620..0b78f10 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -12,7 +12,7 @@ config SYS_VSNPRINTF
 
 choice
 	prompt "Mainboard vendor"
-	default VENDOR_COREBOOT
+	default VENDOR_EMULATION
 
 config VENDOR_COREBOOT
 	bool "coreboot"
-- 
1.8.2.1

[U-Boot] [PATCH v2 4/6] x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h

[Bin Meng]

Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
DRAM size printed when booting from coreboot, like this:

	CPU: x86, vendor Intel, device 663h
	DRAM:  636 KiB
	Using default environment

Change it to 8 which should be enough for both coreboot and bare
cases, and move it to x86-common.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- New patch to set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h

 include/configs/crownbay.h       | 2 --
 include/configs/galileo.h        | 2 --
 include/configs/minnowmax.h      | 2 --
 include/configs/qemu-x86.h       | 2 --
 include/configs/x86-chromebook.h | 1 -
 include/configs/x86-common.h     | 1 +
 6 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index 4fef433..0e1f046 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -17,8 +17,6 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_ARCH_MISC_INIT
 
-#define CONFIG_NR_DRAM_BANKS		1
-
 #define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
 
diff --git a/include/configs/galileo.h b/include/configs/galileo.h
index f780b8f..083d8b4 100644
--- a/include/configs/galileo.h
+++ b/include/configs/galileo.h
@@ -16,8 +16,6 @@
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_NR_DRAM_BANKS		1
-
 #define CONFIG_X86_SERIAL
 
 /* ns16550 UART is memory-mapped in Quark SoC */
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 2a1915d..bc2c580 100644
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -16,8 +16,6 @@
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 #define CONFIG_BOARD_EARLY_INIT_F
 
-#define CONFIG_NR_DRAM_BANKS		1
-
 #define CONFIG_X86_SERIAL
 #define CONFIG_SMSC_LPC47M
 
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index 463620d..bb3c085 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -15,8 +15,6 @@
 
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 
-#define CONFIG_NR_DRAM_BANKS		1
-
 #define CONFIG_X86_SERIAL
 
 #define CONFIG_PCI_MEM_BUS		0xc0000000
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index b6a76fe..e0e7fca 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -14,7 +14,6 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_NR_DRAM_BANKS			8
 #define CONFIG_X86_MRC_ADDR			0xfffa0000
 #define CONFIG_CACHE_MRC_SIZE_KB		512
 
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 3e21e09..0b61615 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -21,6 +21,7 @@
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_NR_DRAM_BANKS		8
 
 #define CONFIG_LMB
 #define CONFIG_OF_LIBFDT
-- 
1.8.2.1

[U-Boot] [PATCH v2 5/6] x86: Change coreboot default build configuration to QEMU

[Bin Meng]

QEMU is much easier for us test booting U-Boot as a coreboot payload
than having a real board like chromebook_link.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---

Changes in v2: None

 board/coreboot/coreboot/Kconfig | 6 +++---
 configs/coreboot-x86_defconfig  | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig
index 6a04158..69e3437 100644
--- a/board/coreboot/coreboot/Kconfig
+++ b/board/coreboot/coreboot/Kconfig
@@ -16,21 +16,21 @@ comment "coreboot-specific options"
 
 config SYS_CONFIG_NAME
 	string "Board configuration file"
-	default "chromebook_link"
+	default "qemu-x86"
 	help
 	  This option selects the board configuration file in include/configs/
 	  directory to be used to build U-Boot for coreboot.
 
 config DEFAULT_DEVICE_TREE
 	string "Board Device Tree Source (dts) file"
-	default "chromebook_link"
+	default "qemu-x86"
 	help
 	  This option selects the board Device Tree Source (dts) file in
 	  arch/x86/dts/ directory to be used to build U-Boot for coreboot.
 
 config SYS_CAR_ADDR
 	hex "Board specific Cache-As-RAM (CAR) address"
-	default 0x19200000
+	default 0x01920000
 	help
 	  This option specifies the board specific Cache-As-RAM (CAR) address.
 
diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 799853f..4af38f5 100644
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -3,3 +3,4 @@ CONFIG_VENDOR_COREBOOT=y
 CONFIG_TARGET_COREBOOT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DM_PCI=y
+CONFIG_TSC_CALIBRATION_BYPASS=y
-- 
1.8.2.1

[U-Boot] [PATCH v2 6/6] x86: Update README.x86 for QEMU support

[Bin Meng]

Document how to build and test U-Boot with QEMU.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

---

Changes in v2: None

 doc/README.x86 | 65 +++++++++++++++++++++++++++++++++++++++++++---------------
 1 file changed, 48 insertions(+), 17 deletions(-)

diff --git a/doc/README.x86 b/doc/README.x86
index ef13fb4..4a30f68 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -14,12 +14,13 @@ including supported boards, build instructions, todo list, etc.
 Status
 ------
 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
-(Chromebook Pixel) has been tested, but it should work with minimal adjustments
-on other x86 boards since coreboot deals with most of the low-level details.
+(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
+work with minimal adjustments on other x86 boards since coreboot deals with
+most of the low-level details.
 
 U-Boot also supports booting directly from x86 reset vector without coreboot,
-aka raw support or bare support. Currently Link, Intel Crown Bay, Intel
-Minnowboard Max and Intel Galileo support running U-Boot 'bare metal'.
+aka raw support or bare support. Currently Link, QEMU x86 targets and all
+Intel boards support running U-Boot 'bare metal'.
 
 As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
 Linux kernel as part of a FIT image. It also supports a compressed zImage.
@@ -32,15 +33,15 @@ on other architectures, like below:
 $ make coreboot-x86_defconfig
 $ make all
 
-Note this default configuration will build a U-Boot payload for the Link board.
+Note this default configuration will build a U-Boot payload for the QEMU board.
 To build a coreboot payload against another board, you can change the build
 configuration during the 'make menuconfig' process.
 
 x86 architecture  --->
 	...
-	(chromebook_link) Board configuration file
-	(chromebook_link) Board Device Tree Source (dts) file
-	(0x19200000) Board specific Cache-As-RAM (CAR) address
+	(qemu-x86) Board configuration file
+	(qemu-x86) Board Device Tree Source (dts) file
+	(0x01920000) Board specific Cache-As-RAM (CAR) address
 	(0x4000) Board specific Cache-As-RAM (CAR) size
 
 Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
@@ -78,7 +79,7 @@ Find the following files:
 * ./northbridge/intel/sandybridge/systemagent-r6.bin
 
 The 3rd one should be renamed to mrc.bin.
-As for the video ROM, you can get it here [2].
+As for the video ROM, you can get it here [3].
 Make sure all these binary blobs are put in the board directory.
 
 Now you can build U-Boot and obtain u-boot.rom:
@@ -88,8 +89,8 @@ $ make all
 
 Intel Crown Bay specific instructions:
 
-U-Boot support of Intel Crown Bay board [3] relies on a binary blob called
-Firmware Support Package [4] to perform all the necessary initialization steps
+U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
+Firmware Support Package [5] to perform all the necessary initialization steps
 as documented in the BIOS Writer Guide, including initialization of the CPU,
 memory controller, chipset and certain bus interfaces.
 
@@ -178,6 +179,13 @@ Now you can build U-Boot and obtain u-boot.rom
 $ make galileo_defconfig
 $ make all
 
+QEMU x86 target instructions:
+
+To build u-boot.rom for QEMU x86 targets, just simply run
+
+$ make qemu-x86_defconfig
+$ make all
+
 Test with coreboot
 ------------------
 For testing U-Boot as the coreboot payload, there are things that need be paid
@@ -207,10 +215,33 @@ At present it seems that for Minnowboard Max, coreboot does not pass through
 the video information correctly (it always says the resolution is 0x0). This
 works correctly for link though.
 
+Test with QEMU
+--------------
+QEMU is a fancy emulator that can enable us to test U-Boot without access to
+a real x86 board. To launch QEMU with u-boot.rom, call QEMU as follows:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom
+
+This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
+also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
+also supported by U-Boot. To instantiate such a machine, call QEMU with:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
+
+Note by default QEMU instantiated boards only have 128 MiB system memory. But
+it is enough to have U-Boot boot and function correctly. You can increase the
+system memory by pass '-m' parameter to QEMU if you want more memory:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
+
+This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
+supports 3 GiB maximum system memory and reserves the last 1 GiB address space
+for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
+would be 3072.
 
 CPU Microcode
 -------------
-Modern CPUs usually require a special bit stream called microcode [5] to be
+Modern CPUs usually require a special bit stream called microcode [6] to be
 loaded on the processor after power up in order to function properly. U-Boot
 has already integrated these as hex dumps in the source tree.
 
@@ -227,7 +258,6 @@ arch/x86/dts/ for these device tree source files.
 
 Useful Commands
 ---------------
-
 In keeping with the U-Boot philosophy of providing functions to check and
 adjust internal settings, there are several x86-specific commands that may be
 useful:
@@ -314,7 +344,8 @@ TODO List
 References
 ----------
 [1] http://www.coreboot.org
-[2] http://www.coreboot.org/~stepan/pci8086,0166.rom
-[3] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
-[4] http://www.intel.com/fsp
-[5] http://en.wikipedia.org/wiki/Microcode
+[2] http://www.qemu.org
+[3] http://www.coreboot.org/~stepan/pci8086,0166.rom
+[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
+[5] http://www.intel.com/fsp
+[6] http://en.wikipedia.org/wiki/Microcode
-- 
1.8.2.1

[U-Boot] [PATCH v2 4/6] x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h

[Simon Glass]

On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
> Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
> DRAM size printed when booting from coreboot, like this:
>
>         CPU: x86, vendor Intel, device 663h
>         DRAM:  636 KiB
>         Using default environment
>
> Change it to 8 which should be enough for both coreboot and bare
> cases, and move it to x86-common.h.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - New patch to set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h
>
>  include/configs/crownbay.h       | 2 --
>  include/configs/galileo.h        | 2 --
>  include/configs/minnowmax.h      | 2 --
>  include/configs/qemu-x86.h       | 2 --
>  include/configs/x86-chromebook.h | 1 -
>  include/configs/x86-common.h     | 1 +
>  6 files changed, 1 insertion(+), 9 deletions(-)

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH v2 2/6] x86: Support QEMU x86 targets

[Simon Glass]

On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
> This commit introduces the initial U-Boot support for QEMU x86 targets.
> U-Boot can boot from coreboot as a payload, or directly without coreboot.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> Tested-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2: None
>
>  arch/x86/Kconfig                      |  5 +++
>  arch/x86/cpu/Makefile                 |  1 +
>  arch/x86/cpu/qemu/Kconfig             | 21 +++++++++++++
>  arch/x86/cpu/qemu/Makefile            |  8 +++++
>  arch/x86/cpu/qemu/car.S               | 26 ++++++++++++++++
>  arch/x86/cpu/qemu/dram.c              | 46 ++++++++++++++++++++++++++++
>  arch/x86/cpu/qemu/pci.c               | 49 ++++++++++++++++++++++++++++++
>  arch/x86/cpu/qemu/qemu.c              | 37 +++++++++++++++++++++++
>  arch/x86/dts/Makefile                 |  3 +-
>  arch/x86/dts/qemu-x86.dts             | 34 +++++++++++++++++++++
>  arch/x86/include/asm/arch-qemu/gpio.h | 13 ++++++++
>  arch/x86/include/asm/arch-qemu/qemu.h | 17 +++++++++++
>  board/emulation/Kconfig               | 25 +++++++++++++++
>  board/emulation/qemu-x86/Kconfig      | 24 +++++++++++++++
>  board/emulation/qemu-x86/MAINTAINERS  |  6 ++++
>  board/emulation/qemu-x86/Makefile     |  7 +++++
>  board/emulation/qemu-x86/qemu-x86.c   | 13 ++++++++
>  board/emulation/qemu-x86/start.S      |  9 ++++++
>  configs/qemu-x86_defconfig            |  6 ++++
>  include/configs/qemu-x86.h            | 57 +++++++++++++++++++++++++++++++++++
>  20 files changed, 406 insertions(+), 1 deletion(-)
>  create mode 100644 arch/x86/cpu/qemu/Kconfig
>  create mode 100644 arch/x86/cpu/qemu/Makefile
>  create mode 100644 arch/x86/cpu/qemu/car.S
>  create mode 100644 arch/x86/cpu/qemu/dram.c
>  create mode 100644 arch/x86/cpu/qemu/pci.c
>  create mode 100644 arch/x86/cpu/qemu/qemu.c
>  create mode 100644 arch/x86/dts/qemu-x86.dts
>  create mode 100644 arch/x86/include/asm/arch-qemu/gpio.h
>  create mode 100644 arch/x86/include/asm/arch-qemu/qemu.h
>  create mode 100644 board/emulation/Kconfig
>  create mode 100644 board/emulation/qemu-x86/Kconfig
>  create mode 100644 board/emulation/qemu-x86/MAINTAINERS
>  create mode 100644 board/emulation/qemu-x86/Makefile
>  create mode 100644 board/emulation/qemu-x86/qemu-x86.c
>  create mode 100644 board/emulation/qemu-x86/start.S
>  create mode 100644 configs/qemu-x86_defconfig
>  create mode 100644 include/configs/qemu-x86.h

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Simon Glass]

On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
> Now that we have QEMU support, make it the default vendor in the
> 'make menuconfig' screen.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> Tested-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2: None
>
>  arch/x86/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 5/6] x86: Change coreboot default build configuration to QEMU

[Simon Glass]

On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
> QEMU is much easier for us test booting U-Boot as a coreboot payload
> than having a real board like chromebook_link.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> Tested-by: Simon Glass <sjg@chromium.org>
> ---
>
> Changes in v2: None
>
>  board/coreboot/coreboot/Kconfig | 6 +++---
>  configs/coreboot-x86_defconfig  | 1 +
>  2 files changed, 4 insertions(+), 3 deletions(-)

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 6/6] x86: Update README.x86 for QEMU support

[Simon Glass]

On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
> Document how to build and test U-Boot with QEMU.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Acked-by: Simon Glass <sjg@chromium.org>
>
> ---
>
> Changes in v2: None
>
>  doc/README.x86 | 65 +++++++++++++++++++++++++++++++++++++++++++---------------
>  1 file changed, 48 insertions(+), 17 deletions(-)

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 4/6] x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h

[Simon Glass]

On 8 May 2015 at 11:36, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
>> DRAM size printed when booting from coreboot, like this:
>>
>>         CPU: x86, vendor Intel, device 663h
>>         DRAM:  636 KiB
>>         Using default environment
>>
>> Change it to 8 which should be enough for both coreboot and bare
>> cases, and move it to x86-common.h.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>
>> ---
>>
>> Changes in v2:
>> - New patch to set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.h
>>
>>  include/configs/crownbay.h       | 2 --
>>  include/configs/galileo.h        | 2 --
>>  include/configs/minnowmax.h      | 2 --
>>  include/configs/qemu-x86.h       | 2 --
>>  include/configs/x86-chromebook.h | 1 -
>>  include/configs/x86-common.h     | 1 +
>>  6 files changed, 1 insertion(+), 9 deletions(-)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-x86, thanks!

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Simon Glass]

Hi Bin,

On 8 May 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote:
> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Now that we have QEMU support, make it the default vendor in the
>> 'make menuconfig' screen.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Acked-by: Simon Glass <sjg@chromium.org>
>> Tested-by: Simon Glass <sjg@chromium.org>
>> ---
>>
>> Changes in v2: None
>>
>>  arch/x86/Kconfig | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> Applied to u-boot-x86, thanks!

For some reason I am seeing a failure here:

04: x86: Make QEMU the default vendor
       x86:  +   coreboot-x86
+
+Device Tree Source is not correctly specified.
+Please define 'CONFIG_DEFAULT_DEVICE_TREE'
+or build with 'DEVICE_TREE=<device_tree>' argument
+make[2]: *** [arch/x86/dts/unset.dtb] Error 1
+make[1]: *** [dts/dt.dtb] Error 2
+make: *** [sub-make] Error 2

Regards,
Simon

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Bin Meng]

Hi Simon,

On Wed, May 27, 2015 at 11:57 AM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 8 May 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote:
>> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Now that we have QEMU support, make it the default vendor in the
>>> 'make menuconfig' screen.
>>>
>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>> Acked-by: Simon Glass <sjg@chromium.org>
>>> Tested-by: Simon Glass <sjg@chromium.org>
>>> ---
>>>
>>> Changes in v2: None
>>>
>>>  arch/x86/Kconfig | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> Applied to u-boot-x86, thanks!
>
> For some reason I am seeing a failure here:
>
> 04: x86: Make QEMU the default vendor
>        x86:  +   coreboot-x86
> +
> +Device Tree Source is not correctly specified.
> +Please define 'CONFIG_DEFAULT_DEVICE_TREE'
> +or build with 'DEVICE_TREE=<device_tree>' argument
> +make[2]: *** [arch/x86/dts/unset.dtb] Error 1
> +make[1]: *** [dts/dt.dtb] Error 2
> +make: *** [sub-make] Error 2
>

That's weird. I didn't see such error when building the patchset with buildman.

Regards,
Bin

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Bin Meng]

Hi Simon,

On Wed, May 27, 2015 at 12:01 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Wed, May 27, 2015 at 11:57 AM, Simon Glass <sjg@chromium.org> wrote:
>> Hi Bin,
>>
>> On 8 May 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote:
>>> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>> Now that we have QEMU support, make it the default vendor in the
>>>> 'make menuconfig' screen.
>>>>
>>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>> Acked-by: Simon Glass <sjg@chromium.org>
>>>> Tested-by: Simon Glass <sjg@chromium.org>
>>>> ---
>>>>
>>>> Changes in v2: None
>>>>
>>>>  arch/x86/Kconfig | 2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> Applied to u-boot-x86, thanks!
>>
>> For some reason I am seeing a failure here:
>>
>> 04: x86: Make QEMU the default vendor
>>        x86:  +   coreboot-x86
>> +
>> +Device Tree Source is not correctly specified.
>> +Please define 'CONFIG_DEFAULT_DEVICE_TREE'
>> +or build with 'DEVICE_TREE=<device_tree>' argument
>> +make[2]: *** [arch/x86/dts/unset.dtb] Error 1
>> +make[1]: *** [dts/dt.dtb] Error 2
>> +make: *** [sub-make] Error 2
>>
>
> That's weird. I didn't see such error when building the patchset with buildman.
>

I've figured out the root cause. For some reason which I don't
understand, commit bd328eb broke this.

+Joe,

Do you know if there is something wrong with commit bd328eb that
accidentally removed 'CONFIG_VENDOR_COREBOOT=y'?

Regards,
Bin

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Simon Glass]

Hi Bin,

On 27 May 2015 at 09:52, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Wed, May 27, 2015 at 12:01 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Hi Simon,
>>
>> On Wed, May 27, 2015 at 11:57 AM, Simon Glass <sjg@chromium.org> wrote:
>>> Hi Bin,
>>>
>>> On 8 May 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote:
>>>> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>>> Now that we have QEMU support, make it the default vendor in the
>>>>> 'make menuconfig' screen.
>>>>>
>>>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>>> Acked-by: Simon Glass <sjg@chromium.org>
>>>>> Tested-by: Simon Glass <sjg@chromium.org>
>>>>> ---
>>>>>
>>>>> Changes in v2: None
>>>>>
>>>>>  arch/x86/Kconfig | 2 +-
>>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> Applied to u-boot-x86, thanks!
>>>
>>> For some reason I am seeing a failure here:
>>>
>>> 04: x86: Make QEMU the default vendor
>>>        x86:  +   coreboot-x86
>>> +
>>> +Device Tree Source is not correctly specified.
>>> +Please define 'CONFIG_DEFAULT_DEVICE_TREE'
>>> +or build with 'DEVICE_TREE=<device_tree>' argument
>>> +make[2]: *** [arch/x86/dts/unset.dtb] Error 1
>>> +make[1]: *** [dts/dt.dtb] Error 2
>>> +make: *** [sub-make] Error 2
>>>
>>
>> That's weird. I didn't see such error when building the patchset with buildman.
>>
>
> I've figured out the root cause. For some reason which I don't
> understand, commit bd328eb broke this.
>
> +Joe,
>
> Do you know if there is something wrong with commit bd328eb that
> accidentally removed 'CONFIG_VENDOR_COREBOOT=y'?

It could perhaps be a merge conflict. If it's needed I can put it back in.

Regards,
Simon

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Bin Meng]

Hi Simon,

On Wed, May 27, 2015 at 11:53 PM, Simon Glass <sjg@chromium.org> wrote:
> Hi Bin,
>
> On 27 May 2015 at 09:52, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Hi Simon,
>>
>> On Wed, May 27, 2015 at 12:01 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Hi Simon,
>>>
>>> On Wed, May 27, 2015 at 11:57 AM, Simon Glass <sjg@chromium.org> wrote:
>>>> Hi Bin,
>>>>
>>>> On 8 May 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote:
>>>>> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>>>> Now that we have QEMU support, make it the default vendor in the
>>>>>> 'make menuconfig' screen.
>>>>>>
>>>>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>>>> Acked-by: Simon Glass <sjg@chromium.org>
>>>>>> Tested-by: Simon Glass <sjg@chromium.org>
>>>>>> ---
>>>>>>
>>>>>> Changes in v2: None
>>>>>>
>>>>>>  arch/x86/Kconfig | 2 +-
>>>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>
>>>>> Applied to u-boot-x86, thanks!
>>>>
>>>> For some reason I am seeing a failure here:
>>>>
>>>> 04: x86: Make QEMU the default vendor
>>>>        x86:  +   coreboot-x86
>>>> +
>>>> +Device Tree Source is not correctly specified.
>>>> +Please define 'CONFIG_DEFAULT_DEVICE_TREE'
>>>> +or build with 'DEVICE_TREE=<device_tree>' argument
>>>> +make[2]: *** [arch/x86/dts/unset.dtb] Error 1
>>>> +make[1]: *** [dts/dt.dtb] Error 2
>>>> +make: *** [sub-make] Error 2
>>>>
>>>
>>> That's weird. I didn't see such error when building the patchset with buildman.
>>>
>>
>> I've figured out the root cause. For some reason which I don't
>> understand, commit bd328eb broke this.
>>
>> +Joe,
>>
>> Do you know if there is something wrong with commit bd328eb that
>> accidentally removed 'CONFIG_VENDOR_COREBOOT=y'?
>
> It could perhaps be a merge conflict. If it's needed I can put it back in.
>

No, it looks Joe's commit is already there in the U-Boot main git
repo. I've just worked out a patch to revert the change and sent it to
the mailing list.

Regards,
Bin

[U-Boot] [PATCH v2 3/6] x86: Make QEMU the default vendor

[Joe Hershberger]

Hi Bin,

On Wed, May 27, 2015 at 10:58 AM, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Simon,
>
> On Wed, May 27, 2015 at 11:53 PM, Simon Glass <sjg@chromium.org> wrote:
>> Hi Bin,
>>
>> On 27 May 2015 at 09:52, Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Hi Simon,
>>>
>>> On Wed, May 27, 2015 at 12:01 PM, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>> Hi Simon,
>>>>
>>>> On Wed, May 27, 2015 at 11:57 AM, Simon Glass <sjg@chromium.org> wrote:
>>>>> Hi Bin,
>>>>>
>>>>> On 8 May 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote:
>>>>>> On 7 May 2015 at 07:34, Bin Meng <bmeng.cn@gmail.com> wrote:
>>>>>>> Now that we have QEMU support, make it the default vendor in the
>>>>>>> 'make menuconfig' screen.
>>>>>>>
>>>>>>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>>>>>>> Acked-by: Simon Glass <sjg@chromium.org>
>>>>>>> Tested-by: Simon Glass <sjg@chromium.org>
>>>>>>> ---
>>>>>>>
>>>>>>> Changes in v2: None
>>>>>>>
>>>>>>>  arch/x86/Kconfig | 2 +-
>>>>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>>>>
>>>>>> Applied to u-boot-x86, thanks!
>>>>>
>>>>> For some reason I am seeing a failure here:
>>>>>
>>>>> 04: x86: Make QEMU the default vendor
>>>>>        x86:  +   coreboot-x86
>>>>> +
>>>>> +Device Tree Source is not correctly specified.
>>>>> +Please define 'CONFIG_DEFAULT_DEVICE_TREE'
>>>>> +or build with 'DEVICE_TREE=<device_tree>' argument
>>>>> +make[2]: *** [arch/x86/dts/unset.dtb] Error 1
>>>>> +make[1]: *** [dts/dt.dtb] Error 2
>>>>> +make: *** [sub-make] Error 2
>>>>>
>>>>
>>>> That's weird. I didn't see such error when building the patchset with buildman.
>>>>
>>>
>>> I've figured out the root cause. For some reason which I don't
>>> understand, commit bd328eb broke this.
>>>
>>> +Joe,
>>>
>>> Do you know if there is something wrong with commit bd328eb that
>>> accidentally removed 'CONFIG_VENDOR_COREBOOT=y'?
>>
>> It could perhaps be a merge conflict. If it's needed I can put it back in.
>>
>
> No, it looks Joe's commit is already there in the U-Boot main git
> repo. I've just worked out a patch to revert the change and sent it to
> the mailing list.

That patch was simply a call to make *_defconfig && make savedefconfig.

The way this usually happens is that the Kconfig file is changed to
make the config (for instance CONFIG_VENDOR_COREBOOT) no longer the
default, without adding that to the defconfig files.

Cheers,
-Joe