Re: [PATCH] ixgbe:Add write memory barrier for recv pkts.

[Wang Dong <dong.wang.pro-PkbjNfxxIARBDgjK7y7TUQ@public.gmane.org>]

> On Wed, 15 Apr 2015 21:46:27 +0800
> Dong.Wang <dong.wang.pro-PkbjNfxxIARBDgjK7y7TUQ@public.gmane.org> wrote:
>
>> Yes, current implementation works well with IA, and the transmit packets
>> function's rte_wmb() is also unneccessary.
>>
>> But there are two reasons for adding rte_wmb() in recv pkts function:
>> 1) The memory barrier in recv pkts function and xmit pkts function are
>> inconsistent, rte_wmb() should be added to recv pkts function or be
>> removed from xmit pkts function.
>> 2) DPDK will support PowerPC processor (Other developers are working on
>> it), I check the memory ordering of PowerPC, there was no mention of
>> store-store instruction's principle in MPC8544 Reference Manual, only
>> said it is weak memory ordering.
>>
>> So, I think it is neccessary to add rte_wmb() to recv pkts function.
>>
>> Dong
>
> If PowerPC requires additional memory barriers then it should
> introduce a new generic set of memory barrier macros that are no-ops
> on other architectures.
>
> Please don't penalize x86 for places where other CPU's have
> weaker consistency.
>

Yes, put rte_wmb() here will penalize x86, I was inconsiderate of it.

Maybe a new set of memory barrier macros will be introduced, it be 
discussed in another thread.

For now, add rte_wmb() is unnessary, I'm waiting for new memory barrier 
macros.

Dong