* [U-Boot] [PATCH v6 01/10] mips: implement to access the KSEG0/1 memory range in map_physmem
@ 2016-01-04 11:14 Wills Wang
2016-01-05 2:45 ` Thomas Chou
0 siblings, 1 reply; 3+ messages in thread
From: Wills Wang @ 2016-01-04 11:14 UTC (permalink / raw)
To: u-boot
U-boot just use the no MMU virtual address segment(KSEG0/1), this
patch enable access the uncached memory range(KSEG1) by flag
"MAP_NOCACHE", other flag for KSEG0 access.
Signed-off-by: Wills Wang <wills.wang@live.com>
---
Changes in v6:
- Remove useless "else"
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/mips/include/asm/io.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index a7ab087..77353e5 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -485,7 +485,7 @@ static inline void sync(void)
* that can be used to access the memory range with the caching
* properties specified by "flags".
*/
-#define MAP_NOCACHE (0)
+#define MAP_NOCACHE (1)
#define MAP_WRCOMBINE (0)
#define MAP_WRBACK (0)
#define MAP_WRTHROUGH (0)
@@ -493,7 +493,9 @@ static inline void sync(void)
static inline void *
map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
{
- return (void *)paddr;
+ if (flags)
+ return (void *)KSEG1ADDR(paddr);
+ return (void *)KSEG0ADDR(paddr);
}
/*
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v6 01/10] mips: implement to access the KSEG0/1 memory range in map_physmem
2016-01-04 11:14 [U-Boot] [PATCH v6 01/10] mips: implement to access the KSEG0/1 memory range in map_physmem Wills Wang
@ 2016-01-05 2:45 ` Thomas Chou
2016-01-05 8:00 ` Wills Wang
0 siblings, 1 reply; 3+ messages in thread
From: Thomas Chou @ 2016-01-05 2:45 UTC (permalink / raw)
To: u-boot
Hi Wills,
On 2016?01?04? 19:14, Wills Wang wrote:
> U-boot just use the no MMU virtual address segment(KSEG0/1), this
> patch enable access the uncached memory range(KSEG1) by flag
> "MAP_NOCACHE", other flag for KSEG0 access.
>
> Signed-off-by: Wills Wang <wills.wang@live.com>
> ---
>
> Changes in v6:
> - Remove useless "else"
>
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> arch/mips/include/asm/io.h | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
> index a7ab087..77353e5 100644
> --- a/arch/mips/include/asm/io.h
> +++ b/arch/mips/include/asm/io.h
> @@ -485,7 +485,7 @@ static inline void sync(void)
> * that can be used to access the memory range with the caching
> * properties specified by "flags".
> */
> -#define MAP_NOCACHE (0)
> +#define MAP_NOCACHE (1)
> #define MAP_WRCOMBINE (0)
> #define MAP_WRBACK (0)
> #define MAP_WRTHROUGH (0)
> @@ -493,7 +493,9 @@ static inline void sync(void)
> static inline void *
> map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
> {
> - return (void *)paddr;
> + if (flags)
> + return (void *)KSEG1ADDR(paddr);
> + return (void *)KSEG0ADDR(paddr);
> }
>
> /*
>
But Daniel has suggested CKSEG1ADDR() instead. :)
Best regards,
Thomas
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v6 01/10] mips: implement to access the KSEG0/1 memory range in map_physmem
2016-01-05 2:45 ` Thomas Chou
@ 2016-01-05 8:00 ` Wills Wang
0 siblings, 0 replies; 3+ messages in thread
From: Wills Wang @ 2016-01-05 8:00 UTC (permalink / raw)
To: u-boot
On 01/05/2016 10:45 AM, Thomas Chou wrote:
> Hi Wills,
>
> On 2016?01?04? 19:14, Wills Wang wrote:
>> U-boot just use the no MMU virtual address segment(KSEG0/1), this
>> patch enable access the uncached memory range(KSEG1) by flag
>> "MAP_NOCACHE", other flag for KSEG0 access.
>>
>> Signed-off-by: Wills Wang <wills.wang@live.com>
>> ---
>>
>> Changes in v6:
>> - Remove useless "else"
>>
>> Changes in v5: None
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>>
>> arch/mips/include/asm/io.h | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
>> index a7ab087..77353e5 100644
>> --- a/arch/mips/include/asm/io.h
>> +++ b/arch/mips/include/asm/io.h
>> @@ -485,7 +485,7 @@ static inline void sync(void)
>> * that can be used to access the memory range with the caching
>> * properties specified by "flags".
>> */
>> -#define MAP_NOCACHE (0)
>> +#define MAP_NOCACHE (1)
>> #define MAP_WRCOMBINE (0)
>> #define MAP_WRBACK (0)
>> #define MAP_WRTHROUGH (0)
>> @@ -493,7 +493,9 @@ static inline void sync(void)
>> static inline void *
>> map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
>> {
>> - return (void *)paddr;
>> + if (flags)
>> + return (void *)KSEG1ADDR(paddr);
>> + return (void *)KSEG0ADDR(paddr);
>> }
>>
>> /*
>>
>
> But Daniel has suggested CKSEG1ADDR() instead. :)
>
I'm so sorry, i missed Daniel's email.
I will correct in the next patch.
Thomas, thank you for reminding me, or i lost an important information.
> Best regards,
> Thomas
--
Best Regards
Wills
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-01-04 11:14 [U-Boot] [PATCH v6 01/10] mips: implement to access the KSEG0/1 memory range in map_physmem Wills Wang
2016-01-05 2:45 ` Thomas Chou
2016-01-05 8:00 ` Wills Wang
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