[PATCH 1/2] ASoC: Intel: baytrail: Fix register access

[PATCH 1/2] ASoC: Intel: baytrail: Fix register access

[Amadeusz Sławiński]

Baytrail has 64 bit registers, so we should use *read64* to read from it
and then use proper mask values to check status.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
---
 sound/soc/intel/baytrail/sst-baytrail-ipc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/intel/baytrail/sst-baytrail-ipc.c b/sound/soc/intel/baytrail/sst-baytrail-ipc.c
index 74274bd38f7a..34746fd871b0 100644
--- a/sound/soc/intel/baytrail/sst-baytrail-ipc.c
+++ b/sound/soc/intel/baytrail/sst-baytrail-ipc.c
@@ -666,8 +666,8 @@ static bool byt_is_dsp_busy(struct sst_dsp *dsp)
 {
 	u64 ipcx;
 
-	ipcx = sst_dsp_shim_read_unlocked(dsp, SST_IPCX);
-	return (ipcx & (SST_IPCX_BUSY | SST_IPCX_DONE));
+	ipcx = sst_dsp_shim_read64_unlocked(dsp, SST_IPCX);
+	return (ipcx & (SST_BYT_IPCX_BUSY | SST_BYT_IPCX_DONE));
 }
 
 int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata)
-- 
2.17.1

[PATCH 2/2] ASoC: Intel: Use readq to read 64 bit registers

[Amadeusz Sławiński]

In order to fix issue described in:
"ASoC: Intel: sst: ipc command timeout"
https://patchwork.kernel.org/patch/11482829/

use readq function, which is meant to read 64 bit values from registers.
On 32 bit platforms it falls back to two readl calls.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Reported-by: Brent Lu <brent.lu@intel.com>
---
 sound/soc/intel/common/sst-dsp.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/sound/soc/intel/common/sst-dsp.c b/sound/soc/intel/common/sst-dsp.c
index ec66be269b69..36c077aa386e 100644
--- a/sound/soc/intel/common/sst-dsp.c
+++ b/sound/soc/intel/common/sst-dsp.c
@@ -10,7 +10,7 @@
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
-#include <linux/io.h>
+#include <linux/io-64-nonatomic-lo-hi.h>
 #include <linux/delay.h>
 
 #include "sst-dsp.h"
@@ -34,16 +34,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read);
 
 void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)
 {
-	memcpy_toio(addr + offset, &value, sizeof(value));
+	writeq(value, addr + offset);
 }
 EXPORT_SYMBOL_GPL(sst_shim32_write64);
 
 u64 sst_shim32_read64(void __iomem *addr, u32 offset)
 {
-	u64 val;
-
-	memcpy_fromio(&val, addr + offset, sizeof(val));
-	return val;
+	return readq(addr + offset);
 }
 EXPORT_SYMBOL_GPL(sst_shim32_read64);
 
-- 
2.17.1

Re: [PATCH 2/2] ASoC: Intel: Use readq to read 64 bit registers

[Cezary Rojewski]

On 2020-05-07 15:34, Amadeusz Sławiński wrote:
> In order to fix issue described in:
> "ASoC: Intel: sst: ipc command timeout"
> https://patchwork.kernel.org/patch/11482829/
> 
> use readq function, which is meant to read 64 bit values from registers.
> On 32 bit platforms it falls back to two readl calls.
> 
> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
> Reported-by: Brent Lu <brent.lu@intel.com>
> ---
>   sound/soc/intel/common/sst-dsp.c | 9 +++------
>   1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/sound/soc/intel/common/sst-dsp.c b/sound/soc/intel/common/sst-dsp.c
> index ec66be269b69..36c077aa386e 100644
> --- a/sound/soc/intel/common/sst-dsp.c
> +++ b/sound/soc/intel/common/sst-dsp.c
> @@ -10,7 +10,7 @@
>   #include <linux/interrupt.h>
>   #include <linux/module.h>
>   #include <linux/platform_device.h>
> -#include <linux/io.h>
> +#include <linux/io-64-nonatomic-lo-hi.h>
>   #include <linux/delay.h>
>   
>   #include "sst-dsp.h"
> @@ -34,16 +34,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read);
>   
>   void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)
>   {
> -	memcpy_toio(addr + offset, &value, sizeof(value));
> +	writeq(value, addr + offset);
>   }
>   EXPORT_SYMBOL_GPL(sst_shim32_write64);
>   
>   u64 sst_shim32_read64(void __iomem *addr, u32 offset)
>   {
> -	u64 val;
> -
> -	memcpy_fromio(&val, addr + offset, sizeof(val));
> -	return val;
> +	return readq(addr + offset);
>   }
>   EXPORT_SYMBOL_GPL(sst_shim32_read64);
>   
> 

Looks good, thanks Amadeo.

Acked-by: Cezary Rojewski <cezary.rojewski@intel.com>

RE: [PATCH 1/2] ASoC: Intel: baytrail: Fix register access

[Lu, Brent]

> -----Original Message-----
> From: Alsa-devel <alsa-devel-bounces@alsa-project.org> On Behalf Of
> Amadeusz Slawinski
> Sent: Thursday, May 7, 2020 9:34 PM
> To: Rojewski, Cezary <cezary.rojewski@intel.com>; Pierre-Louis Bossart
> <pierre-louis.bossart@linux.intel.com>; Liam Girdwood
> <lgirdwood@gmail.com>; Jie Yang <yang.jie@linux.intel.com>; Mark Brown
> <broonie@kernel.org>; Takashi Iwai <tiwai@suse.com>
> Cc: alsa-devel@alsa-project.org; Amadeusz Sławiński
> <amadeuszx.slawinski@linux.intel.com>
> Subject: [PATCH 1/2] ASoC: Intel: baytrail: Fix register access
> 
> Baytrail has 64 bit registers, so we should use *read64* to read from it and
> then use proper mask values to check status.
> 
> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>

Tested-by: Brent Lu <brent.lu@intel.com>


Regards,
Brent

> ---
>  sound/soc/intel/baytrail/sst-baytrail-ipc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/sound/soc/intel/baytrail/sst-baytrail-ipc.c
> b/sound/soc/intel/baytrail/sst-baytrail-ipc.c
> index 74274bd38f7a..34746fd871b0 100644
> --- a/sound/soc/intel/baytrail/sst-baytrail-ipc.c
> +++ b/sound/soc/intel/baytrail/sst-baytrail-ipc.c
> @@ -666,8 +666,8 @@ static bool byt_is_dsp_busy(struct sst_dsp *dsp)  {
>  	u64 ipcx;
> 
> -	ipcx = sst_dsp_shim_read_unlocked(dsp, SST_IPCX);
> -	return (ipcx & (SST_IPCX_BUSY | SST_IPCX_DONE));
> +	ipcx = sst_dsp_shim_read64_unlocked(dsp, SST_IPCX);
> +	return (ipcx & (SST_BYT_IPCX_BUSY | SST_BYT_IPCX_DONE));
>  }
> 
>  int sst_byt_dsp_init(struct device *dev, struct sst_pdata *pdata)
> --
> 2.17.1

RE: [PATCH 2/2] ASoC: Intel: Use readq to read 64 bit registers

[Lu, Brent]

> -----Original Message-----
> From: Alsa-devel <alsa-devel-bounces@alsa-project.org> On Behalf Of
> Amadeusz Slawinski
> Sent: Thursday, May 7, 2020 9:34 PM
> To: Rojewski, Cezary <cezary.rojewski@intel.com>; Pierre-Louis Bossart
> <pierre-louis.bossart@linux.intel.com>; Liam Girdwood
> <lgirdwood@gmail.com>; Jie Yang <yang.jie@linux.intel.com>; Mark Brown
> <broonie@kernel.org>; Takashi Iwai <tiwai@suse.com>
> Cc: alsa-devel@alsa-project.org; Amadeusz Sławiński
> <amadeuszx.slawinski@linux.intel.com>
> Subject: [PATCH 2/2] ASoC: Intel: Use readq to read 64 bit registers
> 
> In order to fix issue described in:
> "ASoC: Intel: sst: ipc command timeout"
> https://patchwork.kernel.org/patch/11482829/
> 
> use readq function, which is meant to read 64 bit values from registers.
> On 32 bit platforms it falls back to two readl calls.
> 
> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
> Reported-by: Brent Lu <brent.lu@intel.com>

Tested-by: Brent Lu <brent.lu@intel.com>


Regards,
Brent

> ---
>  sound/soc/intel/common/sst-dsp.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/sound/soc/intel/common/sst-dsp.c
> b/sound/soc/intel/common/sst-dsp.c
> index ec66be269b69..36c077aa386e 100644
> --- a/sound/soc/intel/common/sst-dsp.c
> +++ b/sound/soc/intel/common/sst-dsp.c
> @@ -10,7 +10,7 @@
>  #include <linux/interrupt.h>
>  #include <linux/module.h>
>  #include <linux/platform_device.h>
> -#include <linux/io.h>
> +#include <linux/io-64-nonatomic-lo-hi.h>
>  #include <linux/delay.h>
> 
>  #include "sst-dsp.h"
> @@ -34,16 +34,13 @@ EXPORT_SYMBOL_GPL(sst_shim32_read);
> 
>  void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)  {
> -	memcpy_toio(addr + offset, &value, sizeof(value));
> +	writeq(value, addr + offset);
>  }
>  EXPORT_SYMBOL_GPL(sst_shim32_write64);
> 
>  u64 sst_shim32_read64(void __iomem *addr, u32 offset)  {
> -	u64 val;
> -
> -	memcpy_fromio(&val, addr + offset, sizeof(val));
> -	return val;
> +	return readq(addr + offset);
>  }
>  EXPORT_SYMBOL_GPL(sst_shim32_read64);
> 
> --
> 2.17.1

Re: [PATCH 1/2] ASoC: Intel: baytrail: Fix register access

[Cezary Rojewski]

On 2020-05-12 8:19 AM, Lu, Brent wrote:
>> -----Original Message-----
>> From: Alsa-devel <alsa-devel-bounces@alsa-project.org> On Behalf Of
>> Amadeusz Slawinski
>> Sent: Thursday, May 7, 2020 9:34 PM
>> To: Rojewski, Cezary <cezary.rojewski@intel.com>; Pierre-Louis Bossart
>> <pierre-louis.bossart@linux.intel.com>; Liam Girdwood
>> <lgirdwood@gmail.com>; Jie Yang <yang.jie@linux.intel.com>; Mark Brown
>> <broonie@kernel.org>; Takashi Iwai <tiwai@suse.com>
>> Cc: alsa-devel@alsa-project.org; Amadeusz Sławiński
>> <amadeuszx.slawinski@linux.intel.com>
>> Subject: [PATCH 1/2] ASoC: Intel: baytrail: Fix register access
>>
>> Baytrail has 64 bit registers, so we should use *read64* to read from it and
>> then use proper mask values to check status.
>>
>> Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
> 
> Tested-by: Brent Lu <brent.lu@intel.com>
> 
> 
> Regards,
> Brent
> 

Thanks Brent!

Acked-by: Cezary Rojewski <cezary.rojewski@intel.com>

Re: [PATCH 1/2] ASoC: Intel: baytrail: Fix register access

[Mark Brown]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1266 bytes --]

On Thu, 7 May 2020 09:34:04 -0400, Amadeusz Sławiński wrote:
> Baytrail has 64 bit registers, so we should use *read64* to read from it
> and then use proper mask values to check status.

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.7

Thanks!

[1/2] ASoC: Intel: baytrail: Fix register access
      commit: 6a5d6fd332624e4eee9a450bb3d18f761548822f
[2/2] ASoC: Intel: Use readq to read 64 bit registers
      commit: 6c47660e3c3acad9401f8fe1d288d4234f05549c

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark