* [PATCH] drm/amd/powerplay: implemnent force dpm level on Vega10.
@ 2017-03-27 14:18 Rex Zhu
[not found] ` <1490624301-11487-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Rex Zhu @ 2017-03-27 14:18 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Rex Zhu
Change-Id: I13daa4ab9bdbd5a850e3ecf784fae43b19a126c9
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 38 ++++++++++++++++++++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 43e5d777..235c8a3 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3393,16 +3393,31 @@ static int vega10_upload_dpm_bootup_level(struct pp_hwmgr *hwmgr)
if (!data->registry_data.sclk_dpm_key_disabled) {
if (data->smc_state_table.gfx_boot_level !=
- data->dpm_table.gfx_table.dpm_state.soft_min_level)
+ data->dpm_table.gfx_table.dpm_state.soft_min_level) {
+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_parameter(
+ hwmgr->smumgr,
+ PPSMC_MSG_SetSoftMinGfxclkByIndex,
+ data->smc_state_table.gfx_boot_level),
+ "Failed to set soft min sclk index!",
+ return -EINVAL);
data->dpm_table.gfx_table.dpm_state.soft_min_level =
data->smc_state_table.gfx_boot_level;
+ }
}
if (!data->registry_data.mclk_dpm_key_disabled) {
if (data->smc_state_table.mem_boot_level !=
- data->dpm_table.mem_table.dpm_state.soft_min_level)
+ data->dpm_table.mem_table.dpm_state.soft_min_level) {
+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_parameter(
+ hwmgr->smumgr,
+ PPSMC_MSG_SetSoftMinUclkByIndex,
+ data->smc_state_table.mem_boot_level),
+ "Failed to set soft min mclk index!",
+ return -EINVAL);
+
data->dpm_table.mem_table.dpm_state.soft_min_level =
data->smc_state_table.mem_boot_level;
+ }
}
return 0;
@@ -3418,6 +3433,12 @@ static int vega10_upload_dpm_max_level(struct pp_hwmgr *hwmgr)
if (!data->registry_data.sclk_dpm_key_disabled) {
if (data->smc_state_table.gfx_max_level !=
data->dpm_table.gfx_table.dpm_state.soft_max_level) {
+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_parameter(
+ hwmgr->smumgr,
+ PPSMC_MSG_SetSoftMaxGfxclkByIndex,
+ data->smc_state_table.gfx_max_level),
+ "Failed to set soft max sclk index!",
+ return -EINVAL);
data->dpm_table.gfx_table.dpm_state.soft_max_level =
data->smc_state_table.gfx_max_level;
}
@@ -3426,6 +3447,12 @@ static int vega10_upload_dpm_max_level(struct pp_hwmgr *hwmgr)
if (!data->registry_data.mclk_dpm_key_disabled) {
if (data->smc_state_table.mem_max_level !=
data->dpm_table.mem_table.dpm_state.soft_max_level) {
+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_parameter(
+ hwmgr->smumgr,
+ PPSMC_MSG_SetSoftMaxUclkByIndex,
+ data->smc_state_table.mem_max_level),
+ "Failed to set soft max mclk index!",
+ return -EINVAL);
data->dpm_table.mem_table.dpm_state.soft_max_level =
data->smc_state_table.mem_max_level;
}
@@ -3443,6 +3470,7 @@ static int vega10_generate_dpm_level_enable_mask(
(const struct phm_set_power_state_input *)input;
const struct vega10_power_state *vega10_ps =
cast_const_phw_vega10_power_state(states->pnew_state);
+ int i;
PP_ASSERT_WITH_CODE(!vega10_trim_dpm_states(hwmgr, vega10_ps),
"Attempt to Trim DPM States Failed!",
@@ -3463,6 +3491,12 @@ static int vega10_generate_dpm_level_enable_mask(
PP_ASSERT_WITH_CODE(!vega10_upload_dpm_max_level(hwmgr),
"Attempt to upload DPM Max Levels Failed!",
return -1);
+ for(i = data->smc_state_table.gfx_boot_level; i < data->smc_state_table.gfx_max_level; i++)
+ data->dpm_table.gfx_table.dpm_levels[i].enabled = true;
+
+
+ for(i = data->smc_state_table.mem_boot_level; i < data->smc_state_table.mem_max_level; i++)
+ data->dpm_table.mem_table.dpm_levels[i].enabled = true;
return 0;
}
--
1.9.1
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 3+ messages in thread
* RE: [PATCH] drm/amd/powerplay: implemnent force dpm level on Vega10.
[not found] ` <1490624301-11487-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2017-03-27 16:07 ` Deucher, Alexander
2017-03-28 1:23 ` Michel Dänzer
1 sibling, 0 replies; 3+ messages in thread
From: Deucher, Alexander @ 2017-03-27 16:07 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Zhu, Rex
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Monday, March 27, 2017 10:18 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amd/powerplay: implemnent force dpm level on
> Vega10.
>
> Change-Id: I13daa4ab9bdbd5a850e3ecf784fae43b19a126c9
Missing your signed-off-by. With that fixed:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 38
> ++++++++++++++++++++--
> 1 file changed, 36 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 43e5d777..235c8a3 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -3393,16 +3393,31 @@ static int
> vega10_upload_dpm_bootup_level(struct pp_hwmgr *hwmgr)
>
> if (!data->registry_data.sclk_dpm_key_disabled) {
> if (data->smc_state_table.gfx_boot_level !=
> - data-
> >dpm_table.gfx_table.dpm_state.soft_min_level)
> + data-
> >dpm_table.gfx_table.dpm_state.soft_min_level) {
> +
> PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_paramet
> er(
> + hwmgr->smumgr,
> + PPSMC_MSG_SetSoftMinGfxclkByIndex,
> + data->smc_state_table.gfx_boot_level),
> + "Failed to set soft min sclk index!",
> + return -EINVAL);
> data-
> >dpm_table.gfx_table.dpm_state.soft_min_level =
> data-
> >smc_state_table.gfx_boot_level;
> + }
> }
>
> if (!data->registry_data.mclk_dpm_key_disabled) {
> if (data->smc_state_table.mem_boot_level !=
> - data-
> >dpm_table.mem_table.dpm_state.soft_min_level)
> + data-
> >dpm_table.mem_table.dpm_state.soft_min_level) {
> +
> PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_paramet
> er(
> + hwmgr->smumgr,
> + PPSMC_MSG_SetSoftMinUclkByIndex,
> + data->smc_state_table.mem_boot_level),
> + "Failed to set soft min mclk index!",
> + return -EINVAL);
> +
> data-
> >dpm_table.mem_table.dpm_state.soft_min_level =
> data-
> >smc_state_table.mem_boot_level;
> + }
> }
>
> return 0;
> @@ -3418,6 +3433,12 @@ static int vega10_upload_dpm_max_level(struct
> pp_hwmgr *hwmgr)
> if (!data->registry_data.sclk_dpm_key_disabled) {
> if (data->smc_state_table.gfx_max_level !=
> data-
> >dpm_table.gfx_table.dpm_state.soft_max_level) {
> +
> PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_paramet
> er(
> + hwmgr->smumgr,
> + PPSMC_MSG_SetSoftMaxGfxclkByIndex,
> + data->smc_state_table.gfx_max_level),
> + "Failed to set soft max sclk index!",
> + return -EINVAL);
> data-
> >dpm_table.gfx_table.dpm_state.soft_max_level =
> data-
> >smc_state_table.gfx_max_level;
> }
> @@ -3426,6 +3447,12 @@ static int vega10_upload_dpm_max_level(struct
> pp_hwmgr *hwmgr)
> if (!data->registry_data.mclk_dpm_key_disabled) {
> if (data->smc_state_table.mem_max_level !=
> data-
> >dpm_table.mem_table.dpm_state.soft_max_level) {
> +
> PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_paramet
> er(
> + hwmgr->smumgr,
> + PPSMC_MSG_SetSoftMaxUclkByIndex,
> + data->smc_state_table.mem_max_level),
> + "Failed to set soft max mclk index!",
> + return -EINVAL);
> data-
> >dpm_table.mem_table.dpm_state.soft_max_level =
> data-
> >smc_state_table.mem_max_level;
> }
> @@ -3443,6 +3470,7 @@ static int
> vega10_generate_dpm_level_enable_mask(
> (const struct phm_set_power_state_input *)input;
> const struct vega10_power_state *vega10_ps =
> cast_const_phw_vega10_power_state(states-
> >pnew_state);
> + int i;
>
> PP_ASSERT_WITH_CODE(!vega10_trim_dpm_states(hwmgr,
> vega10_ps),
> "Attempt to Trim DPM States Failed!",
> @@ -3463,6 +3491,12 @@ static int
> vega10_generate_dpm_level_enable_mask(
> PP_ASSERT_WITH_CODE(!vega10_upload_dpm_max_level(hwmgr),
> "Attempt to upload DPM Max Levels Failed!",
> return -1);
> + for(i = data->smc_state_table.gfx_boot_level; i < data-
> >smc_state_table.gfx_max_level; i++)
> + data->dpm_table.gfx_table.dpm_levels[i].enabled = true;
> +
> +
> + for(i = data->smc_state_table.mem_boot_level; i < data-
> >smc_state_table.mem_max_level; i++)
> + data->dpm_table.mem_table.dpm_levels[i].enabled = true;
>
> return 0;
> }
> --
> 1.9.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/amd/powerplay: implemnent force dpm level on Vega10.
[not found] ` <1490624301-11487-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2017-03-27 16:07 ` Deucher, Alexander
@ 2017-03-28 1:23 ` Michel Dänzer
1 sibling, 0 replies; 3+ messages in thread
From: Michel Dänzer @ 2017-03-28 1:23 UTC (permalink / raw)
To: Rex Zhu; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
On 27/03/17 11:18 PM, Rex Zhu wrote:
This doesn't match the coding style.
> @@ -3393,16 +3393,31 @@ static int vega10_upload_dpm_bootup_level(struct pp_hwmgr *hwmgr)
>
> if (!data->registry_data.sclk_dpm_key_disabled) {
> if (data->smc_state_table.gfx_boot_level !=
> - data->dpm_table.gfx_table.dpm_state.soft_min_level)
> + data->dpm_table.gfx_table.dpm_state.soft_min_level) {
This line needs to line up with the opening parenthesis (2 tabs and 4
spaces of indentation).
> + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc_with_parameter(
This line needs 3 tabs of indentation.
> + hwmgr->smumgr,
> + PPSMC_MSG_SetSoftMinGfxclkByIndex,
> + data->smc_state_table.gfx_boot_level),
> + "Failed to set soft min sclk index!",
> + return -EINVAL);
These lines need to line up with opening parentheses. Assigning the
return value smum_send_msg_to_smc_with_parameter to a local variable
might allow making this cleaner.
> @@ -3463,6 +3491,12 @@ static int vega10_generate_dpm_level_enable_mask(
> PP_ASSERT_WITH_CODE(!vega10_upload_dpm_max_level(hwmgr),
> "Attempt to upload DPM Max Levels Failed!",
> return -1);
> + for(i = data->smc_state_table.gfx_boot_level; i < data->smc_state_table.gfx_max_level; i++)
> + data->dpm_table.gfx_table.dpm_levels[i].enabled = true;
> +
> +
> + for(i = data->smc_state_table.mem_boot_level; i < data->smc_state_table.mem_max_level; i++)
> + data->dpm_table.mem_table.dpm_levels[i].enabled = true;
Missing space between "for" and opening parentheses.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
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amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-03-27 14:18 [PATCH] drm/amd/powerplay: implemnent force dpm level on Vega10 Rex Zhu
[not found] ` <1490624301-11487-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2017-03-27 16:07 ` Deucher, Alexander
2017-03-28 1:23 ` Michel Dänzer
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