* [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode
@ 2018-09-20 10:07 Rex Zhu
[not found] ` <1537438051-22794-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Rex Zhu @ 2018-09-20 10:07 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, hang.zhou-5C7GfCeVMHo; +Cc: Rex Zhu
before halt rlc/cp, need to
1. enter rlc safe mode
2. wait rlc/cp idle
Signed-off-by: Hang Zhou <hang.zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 86 ++++++++++++++++++++++++-----------
1 file changed, 59 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 05b5bba..93d7fe5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5080,6 +5080,55 @@ static int gfx_v8_0_kcq_disable(struct amdgpu_device *adev)
return r;
}
+static bool gfx_v8_0_is_idle(void *handle)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ if (REG_GET_FIELD(RREG32(mmGRBM_STATUS), GRBM_STATUS, GUI_ACTIVE)
+ || RREG32(mmGRBM_STATUS2) != 0x8)
+ return false;
+ else
+ return true;
+}
+
+static bool gfx_v8_0_rlc_is_idle(void *handle)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ if (RREG32(mmGRBM_STATUS2) != 0x8)
+ return false;
+ else
+ return true;
+}
+
+static int gfx_v8_0_wait_for_rlc_idle(void *handle)
+{
+ unsigned int i;
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ for (i = 0; i < adev->usec_timeout; i++) {
+ if (gfx_v8_0_rlc_is_idle(handle))
+ return 0;
+
+ udelay(1);
+ }
+ return -ETIMEDOUT;
+}
+
+static int gfx_v8_0_wait_for_idle(void *handle)
+{
+ unsigned int i;
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ for (i = 0; i < adev->usec_timeout; i++) {
+ if (gfx_v8_0_is_idle(handle))
+ return 0;
+
+ udelay(1);
+ }
+ return -ETIMEDOUT;
+}
+
static int gfx_v8_0_hw_fini(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -5098,9 +5147,16 @@ static int gfx_v8_0_hw_fini(void *handle)
pr_debug("For SRIOV client, shouldn't do anything.\n");
return 0;
}
- gfx_v8_0_cp_enable(adev, false);
- gfx_v8_0_rlc_stop(adev);
-
+ adev->gfx.rlc.funcs->enter_safe_mode(adev);
+ if (!gfx_v8_0_wait_for_idle(adev))
+ gfx_v8_0_cp_enable(adev, false);
+ else
+ pr_err("cp is busy, skip halt cp\n");
+ if (!gfx_v8_0_wait_for_rlc_idle(adev))
+ gfx_v8_0_rlc_stop(adev);
+ else
+ pr_err("rlc is busy, skip halt rlc\n");
+ adev->gfx.rlc.funcs->exit_safe_mode(adev);
return 0;
}
@@ -5121,30 +5177,6 @@ static int gfx_v8_0_resume(void *handle)
return r;
}
-static bool gfx_v8_0_is_idle(void *handle)
-{
- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
- if (REG_GET_FIELD(RREG32(mmGRBM_STATUS), GRBM_STATUS, GUI_ACTIVE))
- return false;
- else
- return true;
-}
-
-static int gfx_v8_0_wait_for_idle(void *handle)
-{
- unsigned i;
- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
- for (i = 0; i < adev->usec_timeout; i++) {
- if (gfx_v8_0_is_idle(handle))
- return 0;
-
- udelay(1);
- }
- return -ETIMEDOUT;
-}
-
static bool gfx_v8_0_check_soft_reset(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
--
1.9.1
_______________________________________________
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/4] drm/amdgpu: Remove redundant code in gfx_v8_0.c
[not found] ` <1537438051-22794-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-09-20 10:07 ` Rex Zhu
2018-09-20 10:07 ` [PATCH 3/4] drm/amd/pp: Disable dpm features on smu7/8 when suspend Rex Zhu
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Rex Zhu @ 2018-09-20 10:07 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, hang.zhou-5C7GfCeVMHo; +Cc: Rex Zhu
the CG related registers have been programed in golden setting
PG register default value is 0.
Signed-off-by: Hang Zhou <hang.zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 19 -------------------
1 file changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 93d7fe5..3670f76 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4211,28 +4211,9 @@ static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev)
u32 tmp;
gfx_v8_0_rlc_stop(adev);
-
- /* disable CG */
- tmp = RREG32(mmRLC_CGCG_CGLS_CTRL);
- tmp &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK |
- RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
- WREG32(mmRLC_CGCG_CGLS_CTRL, tmp);
- if (adev->asic_type == CHIP_POLARIS11 ||
- adev->asic_type == CHIP_POLARIS10 ||
- adev->asic_type == CHIP_POLARIS12 ||
- adev->asic_type == CHIP_VEGAM) {
- tmp = RREG32(mmRLC_CGCG_CGLS_CTRL_3D);
- tmp &= ~0x3;
- WREG32(mmRLC_CGCG_CGLS_CTRL_3D, tmp);
- }
-
- /* disable PG */
- WREG32(mmRLC_PG_CNTL, 0);
-
gfx_v8_0_rlc_reset(adev);
gfx_v8_0_init_pg(adev);
-
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
/* legacy rlc firmware loading */
r = gfx_v8_0_rlc_load_microcode(adev);
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/4] drm/amd/pp: Disable dpm features on smu7/8 when suspend
[not found] ` <1537438051-22794-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-20 10:07 ` [PATCH 2/4] drm/amdgpu: Remove redundant code in gfx_v8_0.c Rex Zhu
@ 2018-09-20 10:07 ` Rex Zhu
2018-09-20 10:07 ` [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini sequence Rex Zhu
2018-09-20 14:02 ` [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode Deucher, Alexander
3 siblings, 0 replies; 7+ messages in thread
From: Rex Zhu @ 2018-09-20 10:07 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, hang.zhou-5C7GfCeVMHo; +Cc: Rex Zhu
Need to disable dpm features before halt rlc.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 14 +++++++++
drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 37 ++++++++++++------------
2 files changed, 33 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 04b7da0..3a6e348 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -5035,6 +5035,19 @@ static int smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw
return 0;
}
+static int smu7_power_off_asic(struct pp_hwmgr *hwmgr)
+{
+ struct smu7_hwmgr *data = hwmgr->backend;
+ int result;
+
+ result = smu7_disable_dpm_tasks(hwmgr);
+ PP_ASSERT_WITH_CODE((0 == result),
+ "[disable_dpm_tasks] Failed to disable DPM!",
+ );
+
+ return result;
+}
+
static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
.backend_init = &smu7_hwmgr_backend_init,
.backend_fini = &smu7_hwmgr_backend_fini,
@@ -5092,6 +5105,7 @@ static int smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw
.get_power_profile_mode = smu7_get_power_profile_mode,
.set_power_profile_mode = smu7_set_power_profile_mode,
.get_performance_level = smu7_get_performance_level,
+ .power_off_asic = smu7_power_off_asic,
};
uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
index b863704..53cf787 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c
@@ -880,7 +880,7 @@ static int smu8_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input)
smu8_update_low_mem_pstate(hwmgr, input);
return 0;
-};
+}
static int smu8_setup_asic_task(struct pp_hwmgr *hwmgr)
@@ -934,14 +934,6 @@ static void smu8_reset_cc6_data(struct pp_hwmgr *hwmgr)
hw_data->cc6_settings.cpu_pstate_disable = false;
}
-static int smu8_power_off_asic(struct pp_hwmgr *hwmgr)
-{
- smu8_power_up_display_clock_sys_pll(hwmgr);
- smu8_clear_nb_dpm_flag(hwmgr);
- smu8_reset_cc6_data(hwmgr);
- return 0;
-};
-
static void smu8_program_voting_clients(struct pp_hwmgr *hwmgr)
{
cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
@@ -1011,6 +1003,17 @@ static void smu8_reset_acp_boot_level(struct pp_hwmgr *hwmgr)
data->acp_boot_level = 0xff;
}
+static int smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
+{
+ smu8_program_voting_clients(hwmgr);
+ if (smu8_start_dpm(hwmgr))
+ return -EINVAL;
+ smu8_program_bootup_state(hwmgr);
+ smu8_reset_acp_boot_level(hwmgr);
+
+ return 0;
+}
+
static int smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
{
smu8_disable_nb_dpm(hwmgr);
@@ -1020,18 +1023,16 @@ static int smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
return -EINVAL;
return 0;
-};
+}
-static int smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
+static int smu8_power_off_asic(struct pp_hwmgr *hwmgr)
{
- smu8_program_voting_clients(hwmgr);
- if (smu8_start_dpm(hwmgr))
- return -EINVAL;
- smu8_program_bootup_state(hwmgr);
- smu8_reset_acp_boot_level(hwmgr);
-
+ smu8_disable_dpm_tasks(hwmgr);
+ smu8_power_up_display_clock_sys_pll(hwmgr);
+ smu8_clear_nb_dpm_flag(hwmgr);
+ smu8_reset_cc6_data(hwmgr);
return 0;
-};
+}
static int smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
struct pp_power_state *prequest_ps,
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini sequence
[not found] ` <1537438051-22794-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-20 10:07 ` [PATCH 2/4] drm/amdgpu: Remove redundant code in gfx_v8_0.c Rex Zhu
2018-09-20 10:07 ` [PATCH 3/4] drm/amd/pp: Disable dpm features on smu7/8 when suspend Rex Zhu
@ 2018-09-20 10:07 ` Rex Zhu
[not found] ` <1537438051-22794-4-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-20 14:02 ` [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode Deucher, Alexander
3 siblings, 1 reply; 7+ messages in thread
From: Rex Zhu @ 2018-09-20 10:07 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, hang.zhou-5C7GfCeVMHo; +Cc: Rex Zhu
initialize gfx/sdma before dpm features enabled.
and disable dpm features before gfx/sdma fini.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/cik.c | 17 +++++++++--------
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 +++++++++--
drivers/gpu/drm/amd/amdgpu/si.c | 13 +++++++------
drivers/gpu/drm/amd/amdgpu/soc15.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/vi.c | 24 ++++++++++++------------
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 +++++++++++++---
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 18 ------------------
7 files changed, 54 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index 78ab939..f41f5f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -2002,6 +2002,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
+ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
if (amdgpu_dpm == -1)
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
else
@@ -2014,8 +2016,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v8_2_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
break;
@@ -2023,6 +2023,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block);
+ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
if (amdgpu_dpm == -1)
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
else
@@ -2035,8 +2037,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v8_5_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block);
- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
break;
@@ -2044,6 +2044,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block);
+ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -2053,8 +2055,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v8_1_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block);
- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
+
amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
break;
@@ -2063,6 +2064,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
+ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -2072,8 +2075,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v8_3_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
break;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 3670f76..8690e04 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4217,10 +4217,17 @@ static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev)
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
/* legacy rlc firmware loading */
r = gfx_v8_0_rlc_load_microcode(adev);
- if (r)
- return r;
+ } else if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU && adev->powerplay.pp_funcs->load_firmware) {
+ amdgpu_ucode_init_bo(adev);
+ r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
+ } else {
+ r = -EINVAL;
}
+ if (r) {
+ pr_err("firmware loading failed\n");
+ return r;
+ }
gfx_v8_0_rlc_start(adev);
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index c364ef9..f8408f8 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -2057,13 +2057,13 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &si_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
else
amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
- amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
/* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
/* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
break;
@@ -2071,13 +2071,14 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &si_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
else
amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
- amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
+
/* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
/* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
break;
@@ -2085,11 +2086,11 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &si_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
- amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
break;
default:
BUG();
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 138c481..a741913 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -529,6 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
else
amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
if (!amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
@@ -539,8 +541,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
#else
# warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
#endif
- amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) {
amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
@@ -551,6 +551,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -560,8 +562,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
#else
# warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
#endif
- amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block);
break;
default:
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 88b57a5..2727119 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1596,16 +1596,18 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block);
amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
break;
case CHIP_FIJI:
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block);
amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1615,8 +1617,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
if (!amdgpu_sriov_vf(adev)) {
amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);
@@ -1626,6 +1626,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1635,8 +1637,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
if (!amdgpu_sriov_vf(adev)) {
amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);
@@ -1649,6 +1649,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block);
amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1658,8 +1660,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
break;
@@ -1667,6 +1667,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1676,8 +1678,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block);
#if defined(CONFIG_DRM_AMD_ACP)
@@ -1688,6 +1688,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
if (adev->enable_virtual_display)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -1697,8 +1699,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
#endif
else
amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block);
- amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block);
amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
#if defined(CONFIG_DRM_AMD_ACP)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index da4ebff..f486d50 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -124,9 +124,6 @@ static int pp_hw_init(void *handle)
struct amdgpu_device *adev = handle;
struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
- if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
- amdgpu_ucode_init_bo(adev);
-
ret = hwmgr_hw_init(hwmgr);
if (ret)
@@ -275,6 +272,19 @@ static int pp_set_clockgating_state(void *handle,
static int pp_dpm_load_fw(void *handle)
{
+ struct pp_hwmgr *hwmgr = handle;
+ int ret = 0;
+
+ if (!hwmgr || !hwmgr->smumgr_funcs)
+ return -EINVAL;
+
+ if (hwmgr->smumgr_funcs->start_smu) {
+ ret = hwmgr->smumgr_funcs->start_smu(hwmgr);
+ if (ret) {
+ pr_err("smc start failed\n");
+ return ret;
+ }
+ }
return 0;
}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index 7500a3e..deb0e47 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -209,17 +209,6 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
{
int ret = 0;
- if (!hwmgr || !hwmgr->smumgr_funcs)
- return -EINVAL;
-
- if (hwmgr->smumgr_funcs->start_smu) {
- ret = hwmgr->smumgr_funcs->start_smu(hwmgr);
- if (ret) {
- pr_err("smc start failed\n");
- return -EINVAL;
- }
- }
-
if (!hwmgr->pm_en)
return 0;
@@ -320,13 +309,6 @@ int hwmgr_resume(struct pp_hwmgr *hwmgr)
if (!hwmgr)
return -EINVAL;
- if (hwmgr->smumgr_funcs && hwmgr->smumgr_funcs->start_smu) {
- if (hwmgr->smumgr_funcs->start_smu(hwmgr)) {
- pr_err("smc start failed\n");
- return -EINVAL;
- }
- }
-
if (!hwmgr->pm_en)
return 0;
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode
[not found] ` <1537438051-22794-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
` (2 preceding siblings ...)
2018-09-20 10:07 ` [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini sequence Rex Zhu
@ 2018-09-20 14:02 ` Deucher, Alexander
3 siblings, 0 replies; 7+ messages in thread
From: Deucher, Alexander @ 2018-09-20 14:02 UTC (permalink / raw)
To: Zhu, Rex, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Zhou, Hang
[-- Attachment #1.1: Type: text/plain, Size: 4343 bytes --]
Series is:
Acked-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
Sent: Thursday, September 20, 2018 6:07:28 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org; Zhou, Hang
Cc: Zhu, Rex
Subject: [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode
before halt rlc/cp, need to
1. enter rlc safe mode
2. wait rlc/cp idle
Signed-off-by: Hang Zhou <hang.zhou-5C7GfCeVMHo@public.gmane.org>
Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 86 ++++++++++++++++++++++++-----------
1 file changed, 59 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 05b5bba..93d7fe5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5080,6 +5080,55 @@ static int gfx_v8_0_kcq_disable(struct amdgpu_device *adev)
return r;
}
+static bool gfx_v8_0_is_idle(void *handle)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ if (REG_GET_FIELD(RREG32(mmGRBM_STATUS), GRBM_STATUS, GUI_ACTIVE)
+ || RREG32(mmGRBM_STATUS2) != 0x8)
+ return false;
+ else
+ return true;
+}
+
+static bool gfx_v8_0_rlc_is_idle(void *handle)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ if (RREG32(mmGRBM_STATUS2) != 0x8)
+ return false;
+ else
+ return true;
+}
+
+static int gfx_v8_0_wait_for_rlc_idle(void *handle)
+{
+ unsigned int i;
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ for (i = 0; i < adev->usec_timeout; i++) {
+ if (gfx_v8_0_rlc_is_idle(handle))
+ return 0;
+
+ udelay(1);
+ }
+ return -ETIMEDOUT;
+}
+
+static int gfx_v8_0_wait_for_idle(void *handle)
+{
+ unsigned int i;
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ for (i = 0; i < adev->usec_timeout; i++) {
+ if (gfx_v8_0_is_idle(handle))
+ return 0;
+
+ udelay(1);
+ }
+ return -ETIMEDOUT;
+}
+
static int gfx_v8_0_hw_fini(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -5098,9 +5147,16 @@ static int gfx_v8_0_hw_fini(void *handle)
pr_debug("For SRIOV client, shouldn't do anything.\n");
return 0;
}
- gfx_v8_0_cp_enable(adev, false);
- gfx_v8_0_rlc_stop(adev);
-
+ adev->gfx.rlc.funcs->enter_safe_mode(adev);
+ if (!gfx_v8_0_wait_for_idle(adev))
+ gfx_v8_0_cp_enable(adev, false);
+ else
+ pr_err("cp is busy, skip halt cp\n");
+ if (!gfx_v8_0_wait_for_rlc_idle(adev))
+ gfx_v8_0_rlc_stop(adev);
+ else
+ pr_err("rlc is busy, skip halt rlc\n");
+ adev->gfx.rlc.funcs->exit_safe_mode(adev);
return 0;
}
@@ -5121,30 +5177,6 @@ static int gfx_v8_0_resume(void *handle)
return r;
}
-static bool gfx_v8_0_is_idle(void *handle)
-{
- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
- if (REG_GET_FIELD(RREG32(mmGRBM_STATUS), GRBM_STATUS, GUI_ACTIVE))
- return false;
- else
- return true;
-}
-
-static int gfx_v8_0_wait_for_idle(void *handle)
-{
- unsigned i;
- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-
- for (i = 0; i < adev->usec_timeout; i++) {
- if (gfx_v8_0_is_idle(handle))
- return 0;
-
- udelay(1);
- }
- return -ETIMEDOUT;
-}
-
static bool gfx_v8_0_check_soft_reset(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
--
1.9.1
_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[-- Attachment #1.2: Type: text/html, Size: 9132 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini sequence
[not found] ` <1537438051-22794-4-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
@ 2018-09-21 4:34 ` Vishwakarma, Pratik
[not found] ` <01dd2bc5-380b-7103-e0b4-bdf0d452e6a9-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Vishwakarma, Pratik @ 2018-09-21 4:34 UTC (permalink / raw)
To: Rex Zhu, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, hang.zhou-5C7GfCeVMHo
On 9/20/2018 3:37 PM, Rex Zhu wrote:
> initialize gfx/sdma before dpm features enabled.
> and disable dpm features before gfx/sdma fini.
>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/cik.c | 17 +++++++++--------
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 +++++++++--
> drivers/gpu/drm/amd/amdgpu/si.c | 13 +++++++------
> drivers/gpu/drm/amd/amdgpu/soc15.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/vi.c | 24 ++++++++++++------------
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 +++++++++++++---
> drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 18 ------------------
> 7 files changed, 54 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
> index 78ab939..f41f5f5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cik.c
> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
> @@ -2002,6 +2002,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> if (amdgpu_dpm == -1)
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> else
> @@ -2014,8 +2016,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v8_2_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> break;
> @@ -2023,6 +2023,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block);
> + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> if (amdgpu_dpm == -1)
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> else
> @@ -2035,8 +2037,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v8_5_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block);
> - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> break;
> @@ -2044,6 +2044,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block);
> + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -2053,8 +2055,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v8_1_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block);
> - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> +
> amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> break;
> @@ -2063,6 +2064,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &cik_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -2072,8 +2075,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v8_3_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 3670f76..8690e04 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -4217,10 +4217,17 @@ static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev)
> if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
> /* legacy rlc firmware loading */
> r = gfx_v8_0_rlc_load_microcode(adev);
> - if (r)
> - return r;
> + } else if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU && adev->powerplay.pp_funcs->load_firmware) {
> + amdgpu_ucode_init_bo(adev);
> + r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
> + } else {
> + r = -EINVAL;
> }
>
Can you please explain above change? It seems unrelated to commit message.
> + if (r) {
> + pr_err("firmware loading failed\n");
> + return r;
> + }
> gfx_v8_0_rlc_start(adev);
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
> index c364ef9..f8408f8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si.c
> @@ -2057,13 +2057,13 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &si_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
> amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> else
> amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
> /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
> break;
> @@ -2071,13 +2071,14 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &si_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
> amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> else
> amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> +
> /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
> /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
> break;
> @@ -2085,11 +2086,11 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &si_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
> amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> break;
> default:
> BUG();
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index 138c481..a741913 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -529,6 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
> else
> amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> if (!amdgpu_sriov_vf(adev))
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> @@ -539,8 +541,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> #else
> # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
> #endif
> - amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) {
> amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
> @@ -551,6 +551,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
> amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
> amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -560,8 +562,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> #else
> # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
> #endif
> - amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block);
> break;
> default:
> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
> index 88b57a5..2727119 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> @@ -1596,16 +1596,18 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block);
> amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
> break;
> case CHIP_FIJI:
> amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block);
> amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -1615,8 +1617,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> if (!amdgpu_sriov_vf(adev)) {
> amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);
> @@ -1626,6 +1626,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
> amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -1635,8 +1637,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> if (!amdgpu_sriov_vf(adev)) {
> amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block);
> @@ -1649,6 +1649,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block);
> amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -1658,8 +1660,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
> amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
> break;
> @@ -1667,6 +1667,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
> amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -1676,8 +1678,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block);
> #if defined(CONFIG_DRM_AMD_ACP)
> @@ -1688,6 +1688,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
> amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
> + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> + amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
> amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> if (adev->enable_virtual_display)
> amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
> @@ -1697,8 +1699,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> #endif
> else
> amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block);
> - amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
> - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block);
> amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
> #if defined(CONFIG_DRM_AMD_ACP)
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index da4ebff..f486d50 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -124,9 +124,6 @@ static int pp_hw_init(void *handle)
> struct amdgpu_device *adev = handle;
> struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
>
> - if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
> - amdgpu_ucode_init_bo(adev);
> -
> ret = hwmgr_hw_init(hwmgr);
>
> if (ret)
> @@ -275,6 +272,19 @@ static int pp_set_clockgating_state(void *handle,
>
> static int pp_dpm_load_fw(void *handle)
> {
> + struct pp_hwmgr *hwmgr = handle;
> + int ret = 0;
> +
> + if (!hwmgr || !hwmgr->smumgr_funcs)
> + return -EINVAL;
> +
> + if (hwmgr->smumgr_funcs->start_smu) {
> + ret = hwmgr->smumgr_funcs->start_smu(hwmgr);
> + if (ret) {
> + pr_err("smc start failed\n");
> + return ret;
> + }
> + }
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> index 7500a3e..deb0e47 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> @@ -209,17 +209,6 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
> {
> int ret = 0;
>
> - if (!hwmgr || !hwmgr->smumgr_funcs)
> - return -EINVAL;
> -
> - if (hwmgr->smumgr_funcs->start_smu) {
> - ret = hwmgr->smumgr_funcs->start_smu(hwmgr);
> - if (ret) {
> - pr_err("smc start failed\n");
> - return -EINVAL;
> - }
> - }
> -
> if (!hwmgr->pm_en)
> return 0;
>
> @@ -320,13 +309,6 @@ int hwmgr_resume(struct pp_hwmgr *hwmgr)
> if (!hwmgr)
> return -EINVAL;
>
> - if (hwmgr->smumgr_funcs && hwmgr->smumgr_funcs->start_smu) {
> - if (hwmgr->smumgr_funcs->start_smu(hwmgr)) {
> - pr_err("smc start failed\n");
> - return -EINVAL;
> - }
> - }
> -
> if (!hwmgr->pm_en)
> return 0;
>
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* RE: [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini sequence
[not found] ` <01dd2bc5-380b-7103-e0b4-bdf0d452e6a9-5C7GfCeVMHo@public.gmane.org>
@ 2018-09-21 14:31 ` Zhu, Rex
0 siblings, 0 replies; 7+ messages in thread
From: Zhu, Rex @ 2018-09-21 14:31 UTC (permalink / raw)
To: Vishwakarma, Pratik, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
Zhou, Hang
> -----Original Message-----
> From: Vishwakarma, Pratik
> Sent: Friday, September 21, 2018 12:34 PM
> To: Zhu, Rex <Rex.Zhu@amd.com>; amd-gfx@lists.freedesktop.org; Zhou,
> Hang <Hang.Zhou@amd.com>
> Subject: Re: [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini
> sequence
>
> On 9/20/2018 3:37 PM, Rex Zhu wrote:
> > initialize gfx/sdma before dpm features enabled.
> > and disable dpm features before gfx/sdma fini.
> >
> > Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/cik.c | 17 +++++++++--------
> > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 +++++++++--
> > drivers/gpu/drm/amd/amdgpu/si.c | 13 +++++++------
> > drivers/gpu/drm/amd/amdgpu/soc15.c | 8 ++++----
> > drivers/gpu/drm/amd/amdgpu/vi.c | 24 ++++++++++++------------
> > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 +++++++++++++-
> --
> > drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 18 ------------------
> > 7 files changed, 54 insertions(+), 53 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c
> > b/drivers/gpu/drm/amd/amdgpu/cik.c
> > index 78ab939..f41f5f5 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/cik.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
> > @@ -2002,6 +2002,8 @@ int cik_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev,
> &cik_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> > + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > if (amdgpu_dpm == -1)
> > amdgpu_device_ip_block_add(adev,
> &pp_smu_ip_block);
> > else
> > @@ -2014,8 +2016,6 @@ int cik_set_ip_blocks(struct amdgpu_device
> *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v8_2_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> > - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> > break;
> > @@ -2023,6 +2023,8 @@ int cik_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev,
> &cik_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block);
> > + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > if (amdgpu_dpm == -1)
> > amdgpu_device_ip_block_add(adev,
> &pp_smu_ip_block);
> > else
> > @@ -2035,8 +2037,6 @@ int cik_set_ip_blocks(struct amdgpu_device
> *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v8_5_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block);
> > - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> > break;
> > @@ -2044,6 +2044,8 @@ int cik_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev,
> &cik_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block);
> > + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -2053,8 +2055,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v8_1_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block);
> > - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > +
> > amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> > break;
> > @@ -2063,6 +2064,8 @@ int cik_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev,
> &cik_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &cik_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> > + amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > amdgpu_device_ip_block_add(adev, &kv_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -2072,8 +2075,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v8_3_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block);
> > - amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block);
> > amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block);
> > break;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > index 3670f76..8690e04 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> > @@ -4217,10 +4217,17 @@ static int gfx_v8_0_rlc_resume(struct
> amdgpu_device *adev)
> > if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
> > /* legacy rlc firmware loading */
> > r = gfx_v8_0_rlc_load_microcode(adev);
> > - if (r)
> > - return r;
> > + } else if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU &&
> adev->powerplay.pp_funcs->load_firmware) {
> > + amdgpu_ucode_init_bo(adev);
> > + r = adev->powerplay.pp_funcs->load_firmware(adev-
> >powerplay.pp_handle);
> > + } else {
> > + r = -EINVAL;
> > }
> >
> Can you please explain above change? It seems unrelated to commit
> message.
On VI, rlc/me/mec/sdma firmware can be loaded via smu, so if fw_load_smu type is enabled,
We need to call smu to load firmware first.
Thanks
Rex
> > + if (r) {
> > + pr_err("firmware loading failed\n");
> > + return r;
> > + }
> > gfx_v8_0_rlc_start(adev);
> >
> > return 0;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/si.c
> > b/drivers/gpu/drm/amd/amdgpu/si.c index c364ef9..f8408f8 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/si.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/si.c
> > @@ -2057,13 +2057,13 @@ int si_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev, &si_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> > amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block);
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v6_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> > /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
> */
> > /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block);
> */
> > break;
> > @@ -2071,13 +2071,14 @@ int si_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev, &si_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> > amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block);
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v6_4_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> > +
> > /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
> */
> > /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block);
> */
> > break;
> > @@ -2085,11 +2086,11 @@ int si_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev, &si_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &si_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> > amdgpu_device_ip_block_add(adev, &si_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &si_dma_ip_block);
> > break;
> > default:
> > BUG();
> > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> > b/drivers/gpu/drm/amd/amdgpu/soc15.c
> > index 138c481..a741913 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> > @@ -529,6 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev,
> &psp_v11_0_ip_block);
> > else
> > amdgpu_device_ip_block_add(adev,
> &psp_v3_1_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> > if (!amdgpu_sriov_vf(adev))
> > amdgpu_device_ip_block_add(adev,
> &pp_smu_ip_block);
> > if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> @@
> > -539,8 +541,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> > #else
> > # warning "Enable CONFIG_DRM_AMD_DC for display support on
> SOC15."
> > #endif
> > - amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> > if (!(adev->asic_type == CHIP_VEGA20 &&
> amdgpu_sriov_vf(adev))) {
> > amdgpu_device_ip_block_add(adev,
> &uvd_v7_0_ip_block);
> > amdgpu_device_ip_block_add(adev,
> &vce_v4_0_ip_block); @@ -551,6
> > +551,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> > amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);
> > amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -560,8 +562,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
> > #else
> > # warning "Enable CONFIG_DRM_AMD_DC for display support on
> SOC15."
> > #endif
> > - amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block);
> > break;
> > default:
> > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c
> > b/drivers/gpu/drm/amd/amdgpu/vi.c index 88b57a5..2727119 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> > @@ -1596,16 +1596,18 @@ int vi_set_ip_blocks(struct amdgpu_device
> *adev)
> > amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block);
> > amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block);
> > break;
> > case CHIP_FIJI:
> > amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block);
> > amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -1615,8 +1617,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v10_1_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > if (!amdgpu_sriov_vf(adev)) {
> > amdgpu_device_ip_block_add(adev,
> &uvd_v6_0_ip_block);
> > amdgpu_device_ip_block_add(adev,
> &vce_v3_0_ip_block); @@ -1626,6
> > +1626,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -1635,8 +1637,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v10_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > if (!amdgpu_sriov_vf(adev)) {
> > amdgpu_device_ip_block_add(adev,
> &uvd_v5_0_ip_block);
> > amdgpu_device_ip_block_add(adev,
> &vce_v3_0_ip_block); @@ -1649,6
> > +1649,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block);
> > amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -1658,8 +1660,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v11_2_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block);
> > amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
> > break;
> > @@ -1667,6 +1667,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -1676,8 +1678,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v11_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block);
> > #if defined(CONFIG_DRM_AMD_ACP)
> > @@ -1688,6 +1688,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > amdgpu_device_ip_block_add(adev, &vi_common_ip_block);
> > amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &cz_ih_ip_block);
> > + amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > + amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
> > amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
> > if (adev->enable_virtual_display)
> > amdgpu_device_ip_block_add(adev,
> &dce_virtual_ip_block); @@
> > -1697,8 +1699,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
> > #endif
> > else
> > amdgpu_device_ip_block_add(adev,
> &dce_v11_0_ip_block);
> > - amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block);
> > - amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
> > amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block);
> > amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block);
> > #if defined(CONFIG_DRM_AMD_ACP)
> > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> > index da4ebff..f486d50 100644
> > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> > @@ -124,9 +124,6 @@ static int pp_hw_init(void *handle)
> > struct amdgpu_device *adev = handle;
> > struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
> >
> > - if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU)
> > - amdgpu_ucode_init_bo(adev);
> > -
> > ret = hwmgr_hw_init(hwmgr);
> >
> > if (ret)
> > @@ -275,6 +272,19 @@ static int pp_set_clockgating_state(void *handle,
> >
> > static int pp_dpm_load_fw(void *handle)
> > {
> > + struct pp_hwmgr *hwmgr = handle;
> > + int ret = 0;
> > +
> > + if (!hwmgr || !hwmgr->smumgr_funcs)
> > + return -EINVAL;
> > +
> > + if (hwmgr->smumgr_funcs->start_smu) {
> > + ret = hwmgr->smumgr_funcs->start_smu(hwmgr);
> > + if (ret) {
> > + pr_err("smc start failed\n");
> > + return ret;
> > + }
> > + }
> > return 0;
> > }
> >
> > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> > b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> > index 7500a3e..deb0e47 100644
> > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
> > @@ -209,17 +209,6 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
> > {
> > int ret = 0;
> >
> > - if (!hwmgr || !hwmgr->smumgr_funcs)
> > - return -EINVAL;
> > -
> > - if (hwmgr->smumgr_funcs->start_smu) {
> > - ret = hwmgr->smumgr_funcs->start_smu(hwmgr);
> > - if (ret) {
> > - pr_err("smc start failed\n");
> > - return -EINVAL;
> > - }
> > - }
> > -
> > if (!hwmgr->pm_en)
> > return 0;
> >
> > @@ -320,13 +309,6 @@ int hwmgr_resume(struct pp_hwmgr *hwmgr)
> > if (!hwmgr)
> > return -EINVAL;
> >
> > - if (hwmgr->smumgr_funcs && hwmgr->smumgr_funcs->start_smu) {
> > - if (hwmgr->smumgr_funcs->start_smu(hwmgr)) {
> > - pr_err("smc start failed\n");
> > - return -EINVAL;
> > - }
> > - }
> > -
> > if (!hwmgr->pm_en)
> > return 0;
> >
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-09-21 14:31 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-20 10:07 [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode Rex Zhu
[not found] ` <1537438051-22794-1-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-20 10:07 ` [PATCH 2/4] drm/amdgpu: Remove redundant code in gfx_v8_0.c Rex Zhu
2018-09-20 10:07 ` [PATCH 3/4] drm/amd/pp: Disable dpm features on smu7/8 when suspend Rex Zhu
2018-09-20 10:07 ` [PATCH 4/4] drm/amdgpu: Change the gfx/sdma init/fini sequence Rex Zhu
[not found] ` <1537438051-22794-4-git-send-email-Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
2018-09-21 4:34 ` Vishwakarma, Pratik
[not found] ` <01dd2bc5-380b-7103-e0b4-bdf0d452e6a9-5C7GfCeVMHo@public.gmane.org>
2018-09-21 14:31 ` Zhu, Rex
2018-09-20 14:02 ` [PATCH 1/4] drm/amdgpu: Halt rlc/cp in rlc_safe_mode Deucher, Alexander
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