From: "Tian, Kevin" <kevin.tian@intel.com> To: Lu Baolu <baolu.lu@linux.intel.com>, Joerg Roedel <joro@8bytes.org> Cc: "Raj, Ashok" <ashok.raj@intel.com>, "Liu, Yi L" <yi.l.liu@intel.com>, "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org> Subject: RE: [PATCH v2 3/3] iommu/vt-d: Use second level for GPA->HPA translation Date: Mon, 27 Sep 2021 01:31:50 +0000 [thread overview] Message-ID: <BN9PR11MB5433D850D9131123354088628CA79@BN9PR11MB5433.namprd11.prod.outlook.com> (raw) In-Reply-To: <20210926114535.923263-4-baolu.lu@linux.intel.com> > From: Lu Baolu <baolu.lu@linux.intel.com> > Sent: Sunday, September 26, 2021 7:46 PM > > The IOMMU VT-d implementation uses the first level for GPA->HPA > translation > by default. Although both the first level and the second level could handle > the DMA translation, they're different in some way. For example, the second > level translation has separate controls for the Access/Dirty page tracking. > With the first level translation, there's no such control. On the other > hand, the second level translation has the page-level control for forcing > snoop, but the first level only has global control with pasid granularity. > > This uses the second level for GPA->HPA translation so that we can provide > a consistent hardware interface for use cases like dirty page tracking for > live migration. > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > --- > drivers/iommu/intel/iommu.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index dc2030d014e0..426630261614 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -1991,9 +1991,15 @@ static void free_dmar_iommu(struct intel_iommu > *iommu) > * Check and return whether first level is used by default for > * DMA translation. > */ > -static bool first_level_by_default(void) > +static bool first_level_by_default(unsigned int type) > { > - return scalable_mode_support() && intel_cap_flts_sanity(); /* Only SL is available in legacy mode */ > + if (!scalable_mode_support()) > + return false; > + /* if only level (either FL or SL) is available, just use it */ > + if (intel_cap_flts_sanity() ^ intel_cap_slts_sanity()) > + return intel_cap_flts_sanity(); > + /* if both levels are available, decide it based on domain type */ > + return type != IOMMU_DOMAIN_UNMANAGED; > } with above comments added: Reviewed-by: Kevin Tian <kevin.tian@intel.com> > > static struct dmar_domain *alloc_domain(unsigned int type) > @@ -2006,7 +2012,7 @@ static struct dmar_domain > *alloc_domain(unsigned int type) > > memset(domain, 0, sizeof(*domain)); > domain->nid = NUMA_NO_NODE; > - if (first_level_by_default()) > + if (first_level_by_default(type)) > domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; > domain->has_iotlb_device = false; > INIT_LIST_HEAD(&domain->devices); > -- > 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: "Tian, Kevin" <kevin.tian@intel.com> To: Lu Baolu <baolu.lu@linux.intel.com>, Joerg Roedel <joro@8bytes.org> Cc: "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>, "Raj, Ashok" <ashok.raj@intel.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org> Subject: RE: [PATCH v2 3/3] iommu/vt-d: Use second level for GPA->HPA translation Date: Mon, 27 Sep 2021 01:31:50 +0000 [thread overview] Message-ID: <BN9PR11MB5433D850D9131123354088628CA79@BN9PR11MB5433.namprd11.prod.outlook.com> (raw) In-Reply-To: <20210926114535.923263-4-baolu.lu@linux.intel.com> > From: Lu Baolu <baolu.lu@linux.intel.com> > Sent: Sunday, September 26, 2021 7:46 PM > > The IOMMU VT-d implementation uses the first level for GPA->HPA > translation > by default. Although both the first level and the second level could handle > the DMA translation, they're different in some way. For example, the second > level translation has separate controls for the Access/Dirty page tracking. > With the first level translation, there's no such control. On the other > hand, the second level translation has the page-level control for forcing > snoop, but the first level only has global control with pasid granularity. > > This uses the second level for GPA->HPA translation so that we can provide > a consistent hardware interface for use cases like dirty page tracking for > live migration. > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> > --- > drivers/iommu/intel/iommu.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index dc2030d014e0..426630261614 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -1991,9 +1991,15 @@ static void free_dmar_iommu(struct intel_iommu > *iommu) > * Check and return whether first level is used by default for > * DMA translation. > */ > -static bool first_level_by_default(void) > +static bool first_level_by_default(unsigned int type) > { > - return scalable_mode_support() && intel_cap_flts_sanity(); /* Only SL is available in legacy mode */ > + if (!scalable_mode_support()) > + return false; > + /* if only level (either FL or SL) is available, just use it */ > + if (intel_cap_flts_sanity() ^ intel_cap_slts_sanity()) > + return intel_cap_flts_sanity(); > + /* if both levels are available, decide it based on domain type */ > + return type != IOMMU_DOMAIN_UNMANAGED; > } with above comments added: Reviewed-by: Kevin Tian <kevin.tian@intel.com> > > static struct dmar_domain *alloc_domain(unsigned int type) > @@ -2006,7 +2012,7 @@ static struct dmar_domain > *alloc_domain(unsigned int type) > > memset(domain, 0, sizeof(*domain)); > domain->nid = NUMA_NO_NODE; > - if (first_level_by_default()) > + if (first_level_by_default(type)) > domain->flags |= DOMAIN_FLAG_USE_FIRST_LEVEL; > domain->has_iotlb_device = false; > INIT_LIST_HEAD(&domain->devices); > -- > 2.25.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2021-09-27 1:31 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-26 11:45 [PATCH v2 0/3] iommu/t-d: Use SL for GPA->HPA translation Lu Baolu 2021-09-26 11:45 ` Lu Baolu 2021-09-26 11:45 ` [PATCH v2 1/3] iommu/vt-d: Remove duplicate identity domain flag Lu Baolu 2021-09-26 11:45 ` Lu Baolu 2021-09-27 1:02 ` Tian, Kevin 2021-09-27 1:02 ` Tian, Kevin 2021-09-26 11:45 ` [PATCH v2 2/3] iommu/vt-d: Check FL and SL capability sanity in scalable mode Lu Baolu 2021-09-26 11:45 ` Lu Baolu 2021-09-27 1:12 ` Tian, Kevin 2021-09-27 1:12 ` Tian, Kevin 2021-09-27 1:30 ` Tian, Kevin 2021-09-27 1:30 ` Tian, Kevin 2021-09-27 1:33 ` Tian, Kevin 2021-09-27 1:33 ` Tian, Kevin 2021-09-27 1:39 ` Lu Baolu 2021-09-27 1:39 ` Lu Baolu 2021-09-26 11:45 ` [PATCH v2 3/3] iommu/vt-d: Use second level for GPA->HPA translation Lu Baolu 2021-09-26 11:45 ` Lu Baolu 2021-09-27 1:31 ` Tian, Kevin [this message] 2021-09-27 1:31 ` Tian, Kevin
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