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* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14  8:51 ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Nicolas Ferre,
	Alexandre Belloni, linux-kernel, linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile        |   3 +-
 arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
 arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 237 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
 create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e24249..1ee94ee 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
 	at91sam9g25ek.dtb \
 	at91sam9g35ek.dtb \
 	at91sam9x25ek.dtb \
-	at91sam9x35ek.dtb
+	at91sam9x35ek.dtb \
+	at91-wb45n.dtb
 dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-kizbox2.dtb \
 	at91-nattis-2-natte-2.dtb \
diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts
new file mode 100644
index 0000000..4e88815
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb45n.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb45n.dts - Device Tree file for WB45NBT board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+*/
+/dts-v1/;
+#include "at91-wb45n.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
+	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
+
+	ahb {
+		apb {
+			watchdog@fffffe40 {
+				status = "okay";
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		irqbtn@pb18 {
+			label = "IRQBTN";
+			linux,code = <99>;
+			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&macb0 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&usart0 {
+	status = "okay";
+};
+
+&usart3 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-wb45n.dtsi
new file mode 100644
index 0000000..2fa58e2
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb45n.dtsi
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb45n.dtsi - Device Tree file for WB45NBT board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+
+#include "at91sam9g25.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
+	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	ahb {
+		apb {
+			shdwc@fffffe10 {
+				atmel,wakeup-mode = "low";
+			};
+
+			pinctrl@fffff400 {
+				usb2 {
+					pinctrl_board_usb2: usb2-board {
+						atmel,pins =
+							<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio vbus sense, deglitch */
+					};
+				};
+			};
+
+			rstc@fffffe00 {
+				compatible = "atmel,sama5d3-rstc";
+			};
+
+		};
+	};
+
+	atheros {
+		compatible = "atheros,ath6kl";
+		atheros,board-id = "SD32";
+	};
+};
+
+&slow_xtal {
+	clock-frequency = <32768>;
+};
+
+&main_xtal {
+	clock-frequency = <12000000>;
+};
+
+&ebi {
+	status = "okay";
+	nand_controller: nand-controller {
+		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
+		pinctrl-names = "default";
+		status = "okay";
+
+		nand@3 {
+			reg = <0x3 0x0 0x800000>;
+			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
+			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
+			nand-bus-width = <8>;
+			nand-ecc-mode = "hw";
+			nand-ecc-strength = <4>;
+			nand-ecc-step-size = <512>;
+			nand-on-flash-bbt;
+			label = "atmel_nand";
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				at91bootstrap@0 {
+					label = "at91bs";
+					reg = <0x0 0x20000>;
+				};
+
+				uboot@20000 {
+					label = "u-boot";
+					reg = <0x20000 0x80000>;
+				};
+
+				ubootenv@a0000 {
+					label = "u-boot-env";
+					reg = <0xa0000 0x20000>;
+				};
+
+				ubootenv@c0000 {
+					label = "redund-env";
+					reg = <0xc0000 0x20000>;
+				};
+
+				kernel-a@e0000 {
+					label = "kernel-a";
+					reg = <0xe0000 0x280000>;
+				};
+
+				kernel-b@360000 {
+					label = "kernel-b";
+					reg = <0x360000 0x280000>;
+				};
+
+				rootfs-a@5e0000 {
+					label = "rootfs-a";
+					reg = <0x5e0000 0x2600000>;
+				};
+
+				rootfs-b@2be0000 {
+					label = "rootfs-b";
+					reg = <0x2be0000 0x2600000>;
+				};
+
+				user@51e0000 {
+					label = "user";
+					reg = <0x51e0000 0x2dc0000>;
+				};
+
+				logs@7fa0000 {
+					label = "logs";
+					reg = <0x7fa0000 0x60000>;
+				};
+
+			};
+		};
+	};
+};
+
+&usb0 {
+	num-ports = <2>;
+	atmel,vbus-gpio = <
+		&pioB 12 GPIO_ACTIVE_HIGH
+		&pioA 31 GPIO_ACTIVE_HIGH
+		>;
+	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
+};
+
+&macb0 {
+	phy-mode = "rmii";
+};
+
+&spi0 {
+	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
+};
+
+&usb2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_board_usb2>;
+	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
+};
+
+&mmc0 {
+	pinctrl-0 = <
+		&pinctrl_mmc0_slot0_clk_cmd_dat0
+		&pinctrl_mmc0_slot0_dat1_3>;
+	slot@0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14  8:51 ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile        |   3 +-
 arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
 arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 237 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
 create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e24249..1ee94ee 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
 	at91sam9g25ek.dtb \
 	at91sam9g35ek.dtb \
 	at91sam9x25ek.dtb \
-	at91sam9x35ek.dtb
+	at91sam9x35ek.dtb \
+	at91-wb45n.dtb
 dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-kizbox2.dtb \
 	at91-nattis-2-natte-2.dtb \
diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts
new file mode 100644
index 0000000..4e88815
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb45n.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb45n.dts - Device Tree file for WB45NBT board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+*/
+/dts-v1/;
+#include "at91-wb45n.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
+	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
+
+	ahb {
+		apb {
+			watchdog at fffffe40 {
+				status = "okay";
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		irqbtn at pb18 {
+			label = "IRQBTN";
+			linux,code = <99>;
+			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&macb0 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&usart0 {
+	status = "okay";
+};
+
+&usart3 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-wb45n.dtsi
new file mode 100644
index 0000000..2fa58e2
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb45n.dtsi
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb45n.dtsi - Device Tree file for WB45NBT board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+
+#include "at91sam9g25.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
+	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	ahb {
+		apb {
+			shdwc at fffffe10 {
+				atmel,wakeup-mode = "low";
+			};
+
+			pinctrl at fffff400 {
+				usb2 {
+					pinctrl_board_usb2: usb2-board {
+						atmel,pins =
+							<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio vbus sense, deglitch */
+					};
+				};
+			};
+
+			rstc at fffffe00 {
+				compatible = "atmel,sama5d3-rstc";
+			};
+
+		};
+	};
+
+	atheros {
+		compatible = "atheros,ath6kl";
+		atheros,board-id = "SD32";
+	};
+};
+
+&slow_xtal {
+	clock-frequency = <32768>;
+};
+
+&main_xtal {
+	clock-frequency = <12000000>;
+};
+
+&ebi {
+	status = "okay";
+	nand_controller: nand-controller {
+		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
+		pinctrl-names = "default";
+		status = "okay";
+
+		nand at 3 {
+			reg = <0x3 0x0 0x800000>;
+			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
+			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
+			nand-bus-width = <8>;
+			nand-ecc-mode = "hw";
+			nand-ecc-strength = <4>;
+			nand-ecc-step-size = <512>;
+			nand-on-flash-bbt;
+			label = "atmel_nand";
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				at91bootstrap at 0 {
+					label = "at91bs";
+					reg = <0x0 0x20000>;
+				};
+
+				uboot at 20000 {
+					label = "u-boot";
+					reg = <0x20000 0x80000>;
+				};
+
+				ubootenv at a0000 {
+					label = "u-boot-env";
+					reg = <0xa0000 0x20000>;
+				};
+
+				ubootenv at c0000 {
+					label = "redund-env";
+					reg = <0xc0000 0x20000>;
+				};
+
+				kernel-a at e0000 {
+					label = "kernel-a";
+					reg = <0xe0000 0x280000>;
+				};
+
+				kernel-b at 360000 {
+					label = "kernel-b";
+					reg = <0x360000 0x280000>;
+				};
+
+				rootfs-a at 5e0000 {
+					label = "rootfs-a";
+					reg = <0x5e0000 0x2600000>;
+				};
+
+				rootfs-b at 2be0000 {
+					label = "rootfs-b";
+					reg = <0x2be0000 0x2600000>;
+				};
+
+				user at 51e0000 {
+					label = "user";
+					reg = <0x51e0000 0x2dc0000>;
+				};
+
+				logs at 7fa0000 {
+					label = "logs";
+					reg = <0x7fa0000 0x60000>;
+				};
+
+			};
+		};
+	};
+};
+
+&usb0 {
+	num-ports = <2>;
+	atmel,vbus-gpio = <
+		&pioB 12 GPIO_ACTIVE_HIGH
+		&pioA 31 GPIO_ACTIVE_HIGH
+		>;
+	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
+};
+
+&macb0 {
+	phy-mode = "rmii";
+};
+
+&spi0 {
+	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
+};
+
+&usb2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_board_usb2>;
+	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
+};
+
+&mmc0 {
+	pinctrl-0 = <
+		&pinctrl_mmc0_slot0_clk_cmd_dat0
+		&pinctrl_mmc0_slot0_dat1_3>;
+	slot at 0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
  2018-06-14  8:51 ` Ben Whitten
@ 2018-06-14  8:51   ` Ben Whitten
  -1 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Nicolas Ferre,
	Alexandre Belloni, linux-kernel, linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile        |   3 +-
 arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
 arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 320 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
 create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 1ee94ee..fd5f8a6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-sama5d4_ma5d4evk.dtb \
 	at91-sama5d4_xplained.dtb \
 	at91-sama5d4ek.dtb \
-	at91-vinco.dtb
+	at91-vinco.dtb \
+	at91-wb50n.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
 	atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
new file mode 100644
index 0000000..ee4f823
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb50n.dts
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb50n.dts - Device Tree file for wb50n evaluation board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+
+/dts-v1/;
+#include "at91-wb50n.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
+	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	ahb {
+		apb {
+			watchdog@fffffe40 {
+				compatible = "atmel,at91sam9260-wdt";
+				reg = <0xfffffe40 0x10>;
+				clocks = <&clk32k>;
+				status = "okay";
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		btn0@pa10 {
+			label = "BTNESC";
+			linux,code = <1>; /* ESC button */
+			gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+
+		irqbtn@pe31 {
+			label = "IRQBTN";
+			linux,code = <99>; /* SysReq button */
+			gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "wb50n:blue:led0";
+			gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		led1 {
+			label = "wb50n:green:led1";
+			gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		led2 {
+			label = "wb50n:red:led2";
+			gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+	};
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&macb1 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+/* On BB40 this port is labeled UART1 */
+&usart0 {
+	status = "okay";
+};
+
+/* On BB40 this port is labeled UART0 */
+&usart1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+
+	spidev@0 {
+		compatible = "spidev";
+		reg = <0>;
+		spi-max-frequency = <8000000>;
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/at91-wb50n.dtsi b/arch/arm/boot/dts/at91-wb50n.dtsi
new file mode 100644
index 0000000..11d8cc1
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb50n.dtsi
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+
+#include "sama5d31.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
+	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	ahb {
+		apb {
+			pinctrl@fffff200 {
+				board {
+					pinctrl_mmc0_cd: mmc0_cd {
+						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
+					};
+
+					pinctrl_usba_vbus: usba_vbus {
+						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
+					};
+				};
+			};
+		};
+	};
+};
+
+&slow_xtal {
+	clock-frequency = <32768>;
+};
+
+&main_xtal {
+	clock-frequency = <12000000>;
+};
+
+&slow_osc {
+	atmel,osc-bypass;
+};
+
+&usart1_clk {
+	atmel,clk-output-range = <0 132000000>;
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
+	cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
+	slot@0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
+	status = "okay";
+	atheros@0 {
+		compatible = "atheros,ath6kl";
+		atheros,board-id = "SD32";
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&macb1 {
+	phy-mode = "rmii";
+};
+
+&dbgu {
+	dmas = <0>, <0>;	/*  Do not use DMA for dbgu */
+};
+
+/* On BB40 this port is labeled UART1 */
+&usart0 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
+};
+
+/* On BB40 this port is labeled UART0 */
+&usart1 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+	dtr-gpios = <&pioD 13 GPIO_ACTIVE_LOW>;
+	dsr-gpios = <&pioD 11 GPIO_ACTIVE_LOW>;
+	dcd-gpios = <&pioD 7 GPIO_ACTIVE_LOW>;
+	rng-gpios = <&pioD 8 GPIO_ACTIVE_LOW>;
+};
+
+/* USART3 is direct-connect to the Bluetooth UART on the radio SIP */
+&usart3 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
+	status = "okay";
+};
+
+&spi1 {
+	cs-gpios = <&pioC 25 0>, <0>, <0>, <0>;
+};
+
+&ebi {
+	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&nand_controller {
+	status = "okay";
+
+	nand: nand@3 {
+		reg = <0x3 0x0 0x2>;
+		atmel,rb = <0>;
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		nand-on-flash-bbt;
+		label = "atmel_nand";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			at91bootstrap@0 {
+				label = "at91bs";
+				reg = <0x0 0x20000>;
+			};
+
+			uboot@20000 {
+				label = "u-boot";
+				reg = <0x20000 0x80000>;
+			};
+
+			ubootenv@a0000 {
+				label = "u-boot-env";
+				reg = <0xa0000 0x20000>;
+			};
+
+			ubootenv@c0000 {
+				label = "u-boot-env";
+				reg = <0xc0000 0x20000>;
+			};
+
+			kernel-a@e0000 {
+				label = "kernel-a";
+				reg = <0xe0000 0x500000>;
+			};
+
+			kernel-b@5e0000 {
+				label = "kernel-b";
+				reg = <0x5e0000 0x500000>;
+			};
+
+			rootfs-a@ae0000 {
+				label = "rootfs-a";
+				reg = <0xae0000 0x3000000>;
+			};
+
+			rootfs-b@3ae0000 {
+				label = "rootfs-b";
+				reg = <0x3ae0000 0x3000000>;
+			};
+
+			user@6ae0000 {
+				label = "user";
+				reg = <0x6ae0000 0x14e0000>;
+			};
+		};
+	};
+};
+
+&usb0 {
+	atmel,vbus-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usba_vbus>;
+};
+
+&usb1 {
+	num-ports = <3>;
+	atmel,vbus-gpio = <&pioA 2 GPIO_ACTIVE_LOW>;
+	atmel,oc-gpio = <&pioA 4 GPIO_ACTIVE_LOW>;
+};
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
@ 2018-06-14  8:51   ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile        |   3 +-
 arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
 arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 320 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
 create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 1ee94ee..fd5f8a6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-sama5d4_ma5d4evk.dtb \
 	at91-sama5d4_xplained.dtb \
 	at91-sama5d4ek.dtb \
-	at91-vinco.dtb
+	at91-vinco.dtb \
+	at91-wb50n.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
 	atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
new file mode 100644
index 0000000..ee4f823
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb50n.dts
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb50n.dts - Device Tree file for wb50n evaluation board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+
+/dts-v1/;
+#include "at91-wb50n.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
+	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	ahb {
+		apb {
+			watchdog at fffffe40 {
+				compatible = "atmel,at91sam9260-wdt";
+				reg = <0xfffffe40 0x10>;
+				clocks = <&clk32k>;
+				status = "okay";
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		btn0 at pa10 {
+			label = "BTNESC";
+			linux,code = <1>; /* ESC button */
+			gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+
+		irqbtn at pe31 {
+			label = "IRQBTN";
+			linux,code = <99>; /* SysReq button */
+			gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
+			gpio-key,wakeup = <1>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "wb50n:blue:led0";
+			gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		led1 {
+			label = "wb50n:green:led1";
+			gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		led2 {
+			label = "wb50n:red:led2";
+			gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+	};
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&macb1 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+/* On BB40 this port is labeled UART1 */
+&usart0 {
+	status = "okay";
+};
+
+/* On BB40 this port is labeled UART0 */
+&usart1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+
+	spidev at 0 {
+		compatible = "spidev";
+		reg = <0>;
+		spi-max-frequency = <8000000>;
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/at91-wb50n.dtsi b/arch/arm/boot/dts/at91-wb50n.dtsi
new file mode 100644
index 0000000..11d8cc1
--- /dev/null
+++ b/arch/arm/boot/dts/at91-wb50n.dtsi
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+
+#include "sama5d31.dtsi"
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
+	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x20000000 0x4000000>;
+	};
+
+	ahb {
+		apb {
+			pinctrl at fffff200 {
+				board {
+					pinctrl_mmc0_cd: mmc0_cd {
+						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
+					};
+
+					pinctrl_usba_vbus: usba_vbus {
+						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
+					};
+				};
+			};
+		};
+	};
+};
+
+&slow_xtal {
+	clock-frequency = <32768>;
+};
+
+&main_xtal {
+	clock-frequency = <12000000>;
+};
+
+&slow_osc {
+	atmel,osc-bypass;
+};
+
+&usart1_clk {
+	atmel,clk-output-range = <0 132000000>;
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
+	cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
+	slot at 0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
+	status = "okay";
+	atheros at 0 {
+		compatible = "atheros,ath6kl";
+		atheros,board-id = "SD32";
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&macb1 {
+	phy-mode = "rmii";
+};
+
+&dbgu {
+	dmas = <0>, <0>;	/*  Do not use DMA for dbgu */
+};
+
+/* On BB40 this port is labeled UART1 */
+&usart0 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
+};
+
+/* On BB40 this port is labeled UART0 */
+&usart1 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+	dtr-gpios = <&pioD 13 GPIO_ACTIVE_LOW>;
+	dsr-gpios = <&pioD 11 GPIO_ACTIVE_LOW>;
+	dcd-gpios = <&pioD 7 GPIO_ACTIVE_LOW>;
+	rng-gpios = <&pioD 8 GPIO_ACTIVE_LOW>;
+};
+
+/* USART3 is direct-connect to the Bluetooth UART on the radio SIP */
+&usart3 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
+	status = "okay";
+};
+
+&spi1 {
+	cs-gpios = <&pioC 25 0>, <0>, <0>, <0>;
+};
+
+&ebi {
+	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&nand_controller {
+	status = "okay";
+
+	nand: nand at 3 {
+		reg = <0x3 0x0 0x2>;
+		atmel,rb = <0>;
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		nand-on-flash-bbt;
+		label = "atmel_nand";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			at91bootstrap at 0 {
+				label = "at91bs";
+				reg = <0x0 0x20000>;
+			};
+
+			uboot at 20000 {
+				label = "u-boot";
+				reg = <0x20000 0x80000>;
+			};
+
+			ubootenv at a0000 {
+				label = "u-boot-env";
+				reg = <0xa0000 0x20000>;
+			};
+
+			ubootenv at c0000 {
+				label = "u-boot-env";
+				reg = <0xc0000 0x20000>;
+			};
+
+			kernel-a at e0000 {
+				label = "kernel-a";
+				reg = <0xe0000 0x500000>;
+			};
+
+			kernel-b at 5e0000 {
+				label = "kernel-b";
+				reg = <0x5e0000 0x500000>;
+			};
+
+			rootfs-a at ae0000 {
+				label = "rootfs-a";
+				reg = <0xae0000 0x3000000>;
+			};
+
+			rootfs-b at 3ae0000 {
+				label = "rootfs-b";
+				reg = <0x3ae0000 0x3000000>;
+			};
+
+			user at 6ae0000 {
+				label = "user";
+				reg = <0x6ae0000 0x14e0000>;
+			};
+		};
+	};
+};
+
+&usb0 {
+	atmel,vbus-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usba_vbus>;
+};
+
+&usb1 {
+	num-ports = <3>;
+	atmel,vbus-gpio = <&pioA 2 GPIO_ACTIVE_LOW>;
+	atmel,oc-gpio = <&pioA 4 GPIO_ACTIVE_LOW>;
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 3/4] arm: dts: add support for Gatwick board based on WB50N
  2018-06-14  8:51 ` Ben Whitten
@ 2018-06-14  8:51   ` Ben Whitten
  -1 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Nicolas Ferre,
	Alexandre Belloni, linux-kernel, linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile         |   3 +-
 arch/arm/boot/dts/at91-gatwick.dts | 125 +++++++++++++++++++++++++++++++++++++
 2 files changed, 127 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-gatwick.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index fd5f8a6..486ab59 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -62,7 +62,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-sama5d4_xplained.dtb \
 	at91-sama5d4ek.dtb \
 	at91-vinco.dtb \
-	at91-wb50n.dtb
+	at91-wb50n.dtb \
+	at91-gatwick.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
 	atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
diff --git a/arch/arm/boot/dts/at91-gatwick.dts b/arch/arm/boot/dts/at91-gatwick.dts
new file mode 100644
index 0000000..1350c08
--- /dev/null
+++ b/arch/arm/boot/dts/at91-gatwick.dts
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-gatwick.dts - Device Tree file for the Gatwick board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+/dts-v1/;
+#include "at91-wb50n.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Project Gatwick";
+	compatible = "laird,gatwick", "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	ahb {
+		apb {
+			pinctrl@fffff200 {
+				board {
+					pinctrl_key_gpio: key_gpio_0 {
+					  atmel,pins =
+						  <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pullup deglitch */
+				  };
+				};
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		autorepeat;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_key_gpio>;
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_SETUP>;
+			gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
+			wakeup-source;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		ethernet {
+			label = "gatwick:yellow:ethernet";
+			gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		wifi {
+			label = "gatwick:green:wifi";
+			gpios = <&pioA 28 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		ble {
+			label = "gatwick:blue:ble";
+			gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		lora {
+			label = "gatwick:orange:lora";
+			gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		blank {
+			label = "gatwick:green:blank";
+			gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		user {
+			label = "gatwick:yellow:user";
+			gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+	};
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&macb1 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+/* FTDI USART */
+&usart0 {
+	status = "okay";
+};
+
+/* GPS USART */
+&usart1 {
+	pinctrl-0 = <&pinctrl_usart1>;
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+
+	spidev@0 {
+		compatible = "semtech,sx1301";
+		reg = <0>;
+		spi-max-frequency = <8000000>;
+	};
+};
+
+&usb1 {
+	status = "okay";
+	/delete-property/atmel,oc-gpio;
+};
+
+&usb2 {
+	status = "okay";
+};
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 3/4] arm: dts: add support for Gatwick board based on WB50N
@ 2018-06-14  8:51   ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile         |   3 +-
 arch/arm/boot/dts/at91-gatwick.dts | 125 +++++++++++++++++++++++++++++++++++++
 2 files changed, 127 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-gatwick.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index fd5f8a6..486ab59 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -62,7 +62,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-sama5d4_xplained.dtb \
 	at91-sama5d4ek.dtb \
 	at91-vinco.dtb \
-	at91-wb50n.dtb
+	at91-wb50n.dtb \
+	at91-gatwick.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
 	atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
diff --git a/arch/arm/boot/dts/at91-gatwick.dts b/arch/arm/boot/dts/at91-gatwick.dts
new file mode 100644
index 0000000..1350c08
--- /dev/null
+++ b/arch/arm/boot/dts/at91-gatwick.dts
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-gatwick.dts - Device Tree file for the Gatwick board
+ *
+ *  Copyright (C) 2018 Laird
+ *
+ */
+/dts-v1/;
+#include "at91-wb50n.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Laird Workgroup Bridge 50N - Project Gatwick";
+	compatible = "laird,gatwick", "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
+
+	ahb {
+		apb {
+			pinctrl at fffff200 {
+				board {
+					pinctrl_key_gpio: key_gpio_0 {
+					  atmel,pins =
+						  <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pullup deglitch */
+				  };
+				};
+			};
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		autorepeat;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_key_gpio>;
+
+		reset-button {
+			label = "Reset Button";
+			linux,code = <KEY_SETUP>;
+			gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
+			wakeup-source;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		ethernet {
+			label = "gatwick:yellow:ethernet";
+			gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		wifi {
+			label = "gatwick:green:wifi";
+			gpios = <&pioA 28 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		ble {
+			label = "gatwick:blue:ble";
+			gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		lora {
+			label = "gatwick:orange:lora";
+			gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		blank {
+			label = "gatwick:green:blank";
+			gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+
+		user {
+			label = "gatwick:yellow:user";
+			gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+		};
+	};
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&macb1 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+/* FTDI USART */
+&usart0 {
+	status = "okay";
+};
+
+/* GPS USART */
+&usart1 {
+	pinctrl-0 = <&pinctrl_usart1>;
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+
+	spidev at 0 {
+		compatible = "semtech,sx1301";
+		reg = <0>;
+		spi-max-frequency = <8000000>;
+	};
+};
+
+&usb1 {
+	status = "okay";
+	/delete-property/atmel,oc-gpio;
+};
+
+&usb2 {
+	status = "okay";
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
  2018-06-14  8:51 ` Ben Whitten
@ 2018-06-14  8:51   ` Ben Whitten
  -1 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Nicolas Ferre,
	Alexandre Belloni, linux-kernel, linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile                    |   3 +-
 arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159 ++++++++++++++++++
 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
 arch/arm/boot/dts/at91-som60.dtsi             | 229 ++++++++++++++++++++++++++
 5 files changed, 581 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
 create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
 create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
 create mode 100644 arch/arm/boot/dts/at91-som60.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 486ab59..4d3d9ca 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-sama5d4ek.dtb \
 	at91-vinco.dtb \
 	at91-wb50n.dtb \
-	at91-gatwick.dtb
+	at91-gatwick.dtb \
+	at91-dvk_som60.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
 	atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts b/arch/arm/boot/dts/at91-dvk_som60.dts
new file mode 100644
index 0000000..ededd5b
--- /dev/null
+++ b/arch/arm/boot/dts/at91-dvk_som60.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+/dts-v1/;
+#include "at91-som60.dtsi"
+#include "at91-dvk_su60_somc.dtsi"
+#include "at91-dvk_su60_somc_lcm.dtsi"
+
+/ {
+	model = "Laird DVK SOM60";
+	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		stdout-path = &dbgu;
+		tick-timer = &pit;
+	};
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&ssc0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&usart1 {
+	status = "okay";
+};
+
+&usart2 {
+	status = "okay";
+};
+
+&usart3 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&pit {
+	status = "okay";
+};
+
+&adc0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&macb0 {
+	status = "okay";
+};
+
+&macb1 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
new file mode 100644
index 0000000..6031c2f
--- /dev/null
+++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+
+/ {
+	sound {
+		compatible = "atmel,asoc-wm8904";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
+
+		atmel,model = "wm8904 @ DVK-SOM60";
+		atmel,audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"IN2L", "Line In Jack",
+			"IN2R", "Line In Jack",
+			"Mic", "MICBIAS",
+			"IN1L", "Mic";
+
+		atmel,ssc-controller = <&ssc0>;
+		atmel,audio-codec = <&wm8904>;
+
+		status = "okay";
+	};
+};
+
+&mmc0 {
+	status = "okay";
+
+	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
+	slot@0 {
+		bus-width = <4>;
+		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
+		cd-inverted;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
+	spi-flash@0 {
+		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
+		spi-max-frequency = <33000000>;
+		reg = <0>;
+	};
+};
+
+&ssc0 {
+	atmel,clk-from-rk-pin;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	wm8904: wm8904@1a {
+		compatible = "wlf,wm8904";
+		reg = <0x1a>;
+		clocks = <&pck2>;
+		clock-names = "mclk";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	eeprom@87 {
+		compatible = "giantec,24c32";
+		reg = <87>;
+		pagesize = <32>;
+	};
+};
+
+&usart1 {
+	status = "okay";
+};
+
+&usart2 {
+	status = "okay";
+};
+
+&usart3 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&pit {
+	status = "okay";
+};
+
+&adc0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&macb0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	ethernet-phy@7 {
+		reg = <7>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_geth_int>;
+		interrupt-parent = <&pioB>;
+		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+		txen-skew-ps = <800>;
+		txc-skew-ps = <3000>;
+		rxdv-skew-ps = <400>;
+		rxc-skew-ps = <3000>;
+		rxd0-skew-ps = <400>;
+		rxd1-skew-ps = <400>;
+		rxd2-skew-ps = <400>;
+		rxd3-skew-ps = <400>;
+	};
+};
+
+&macb1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	ethernet-phy@1 {
+		reg = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_eth_int>;
+		interrupt-parent = <&pioC>;
+		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
new file mode 100644
index 0000000..d98c644
--- /dev/null
+++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+
+/ {
+	ahb {
+		apb {
+			pinctrl@fffff200 {
+				board {
+					pinctrl_lcd_ctp_int: lcd_ctp_int {
+						 atmel,pins =
+							 <AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+					};
+				};
+			};
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&hlcdc_pwm 0 50000 0>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <6>;
+		status = "okay";
+	};
+
+	panel: panel {
+		/* Actually Winstar WF70GTIAGDNG0 */
+		compatible = "innolux,at070tn92", "simple-panel";
+		backlight = <&backlight>;
+		power-supply = <&vcc_lcd_reg>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+
+		port@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			panel_input: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&hlcdc_panel_output>;
+			};
+		};
+	};
+
+	vcc_lcd_reg: fixedregulator_lcd {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC LCM";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	ft5426@56 {
+		/* Actually FT5426 */
+		compatible = "edt,edt-ft5406";
+		reg = <56>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
+
+		interrupt-parent = <&pioC>;
+		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
+
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <480>;
+	};
+};
+
+&hlcdc {
+	status = "okay";
+
+	hlcdc-display-controller {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
+
+		port@0 {
+			hlcdc_panel_output: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&panel_input>;
+			};
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-som60.dtsi
new file mode 100644
index 0000000..1843284
--- /dev/null
+++ b/arch/arm/boot/dts/at91-som60.dtsi
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-som60.dtsi - Device Tree file for the SOM60 module
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+#include "sama5d36.dtsi"
+
+/ {
+	model = "Laird SOM60";
+	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		stdout-path = &dbgu;
+	};
+
+	memory {
+		reg = <0x20000000 0x8000000>;
+	};
+
+	clocks {
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <12000000>;
+		};
+	};
+
+	ahb {
+		apb {
+			pinctrl@fffff200 {
+				board {
+					pinctrl_mmc0_cd: mmc0_cd {
+						atmel,pins =
+							<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+					};
+
+					pinctrl_mmc0_en: mmc0_en {
+						atmel,pins =
+							<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_nand0_wp: nand0_wp {
+						atmel,pins =
+							<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_usb_vbus: usb_vbus {
+						atmel,pins =
+							<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK */
+					};
+
+					pinctrl_usart2_sck: usart2_sck {
+						atmel,pins =
+							<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
+					};
+
+					pinctrl_usb_oc: usb_oc {
+						atmel,pins =
+							<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART3_SCK */
+					};
+
+					pinctrl_usart3_sck: usart3_sck {
+						atmel,pins =
+							<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
+					};
+
+					pinctrl_usba_vbus: usba_vbus {
+					   atmel,pins =
+							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+					};
+
+					pinctrl_geth_int: geth_int {
+						atmel,pins =
+							<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART1_SCK */
+					};
+
+					pinctrl_usart1_sck: usart1_sck {
+						atmel,pins =
+							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
+					};
+
+					pinctrl_eth_int: eth_int {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+					};
+
+					pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
+						atmel,pins =
+							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&mmc0 {
+	slot@0 {
+		reg = <0>;
+		bus-width = <8>;
+	};
+};
+
+&mmc1 {
+	status = "okay";
+	slot@0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&spi0 {
+	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
+};
+
+&usart0 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	status = "okay";
+	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
+};
+
+&usart1 {
+	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+};
+
+&usart2 {
+	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
+};
+
+&usart3 {
+	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
+};
+
+&adc0 {
+	pinctrl-0 = <
+		&pinctrl_adc0_adtrg
+		&pinctrl_adc0_ad0
+		&pinctrl_adc0_ad1
+		&pinctrl_adc0_ad2
+		&pinctrl_adc0_ad3
+		&pinctrl_adc0_ad4
+		&pinctrl_adc0_ad5
+		>;
+};
+
+&macb0 {
+	phy-mode = "rgmii";
+};
+
+&macb1 {
+	phy-mode = "rmii";
+};
+
+
+&ebi {
+	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&nand_controller {
+	status = "okay";
+
+	nand: nand@3 {
+		reg = <0x3 0x0 0x2>;
+		atmel,rb = <0>;
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		nand-on-flash-bbt;
+		label = "atmel_nand";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			ubootspl@0 {
+				label = "u-boot-spl";
+				reg = <0x0 0x20000>;
+			};
+
+			uboot@20000 {
+				label = "u-boot";
+				reg = <0x20000 0x80000>;
+			};
+
+			ubootenv@a0000 {
+				label = "u-boot-env";
+				reg = <0xa0000 0x20000>;
+			};
+
+			ubootenv@c0000 {
+				label = "u-boot-env";
+				reg = <0xc0000 0x20000>;
+			};
+
+			ubi@e0000 {
+				label = "ubi";
+				reg = <0xe0000 0xfe00000>;
+			};
+		};
+	};
+};
+
+&usb0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usba_vbus>;
+	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
+};
+
+&usb1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
+	num-ports = <3>;
+	atmel,vbus-gpio = <0
+		&pioE 20 GPIO_ACTIVE_HIGH
+		0>;
+	atmel,oc-gpio = <0
+		&pioE 15 GPIO_ACTIVE_LOW
+		0>;
+};
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 34+ messages in thread

* [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
@ 2018-06-14  8:51   ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-14  8:51 UTC (permalink / raw)
  To: linux-arm-kernel

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
---
 arch/arm/boot/dts/Makefile                    |   3 +-
 arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159 ++++++++++++++++++
 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
 arch/arm/boot/dts/at91-som60.dtsi             | 229 ++++++++++++++++++++++++++
 5 files changed, 581 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
 create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
 create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
 create mode 100644 arch/arm/boot/dts/at91-som60.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 486ab59..4d3d9ca 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
 	at91-sama5d4ek.dtb \
 	at91-vinco.dtb \
 	at91-wb50n.dtb \
-	at91-gatwick.dtb
+	at91-gatwick.dtb \
+	at91-dvk_som60.dtb
 dtb-$(CONFIG_ARCH_ATLAS6) += \
 	atlas6-evb.dtb
 dtb-$(CONFIG_ARCH_ATLAS7) += \
diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts b/arch/arm/boot/dts/at91-dvk_som60.dts
new file mode 100644
index 0000000..ededd5b
--- /dev/null
+++ b/arch/arm/boot/dts/at91-dvk_som60.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+/dts-v1/;
+#include "at91-som60.dtsi"
+#include "at91-dvk_su60_somc.dtsi"
+#include "at91-dvk_su60_somc_lcm.dtsi"
+
+/ {
+	model = "Laird DVK SOM60";
+	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		stdout-path = &dbgu;
+		tick-timer = &pit;
+	};
+};
+
+&mmc0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+};
+
+&ssc0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&usart1 {
+	status = "okay";
+};
+
+&usart2 {
+	status = "okay";
+};
+
+&usart3 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&pit {
+	status = "okay";
+};
+
+&adc0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&macb0 {
+	status = "okay";
+};
+
+&macb1 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
new file mode 100644
index 0000000..6031c2f
--- /dev/null
+++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+
+/ {
+	sound {
+		compatible = "atmel,asoc-wm8904";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
+
+		atmel,model = "wm8904 @ DVK-SOM60";
+		atmel,audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"IN2L", "Line In Jack",
+			"IN2R", "Line In Jack",
+			"Mic", "MICBIAS",
+			"IN1L", "Mic";
+
+		atmel,ssc-controller = <&ssc0>;
+		atmel,audio-codec = <&wm8904>;
+
+		status = "okay";
+	};
+};
+
+&mmc0 {
+	status = "okay";
+
+	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
+	slot at 0 {
+		bus-width = <4>;
+		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
+		cd-inverted;
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
+	spi-flash at 0 {
+		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
+		spi-max-frequency = <33000000>;
+		reg = <0>;
+	};
+};
+
+&ssc0 {
+	atmel,clk-from-rk-pin;
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	wm8904: wm8904 at 1a {
+		compatible = "wlf,wm8904";
+		reg = <0x1a>;
+		clocks = <&pck2>;
+		clock-names = "mclk";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	eeprom at 87 {
+		compatible = "giantec,24c32";
+		reg = <87>;
+		pagesize = <32>;
+	};
+};
+
+&usart1 {
+	status = "okay";
+};
+
+&usart2 {
+	status = "okay";
+};
+
+&usart3 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&dbgu {
+	status = "okay";
+};
+
+&pit {
+	status = "okay";
+};
+
+&adc0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&macb0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	ethernet-phy at 7 {
+		reg = <7>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_geth_int>;
+		interrupt-parent = <&pioB>;
+		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
+		txen-skew-ps = <800>;
+		txc-skew-ps = <3000>;
+		rxdv-skew-ps = <400>;
+		rxc-skew-ps = <3000>;
+		rxd0-skew-ps = <400>;
+		rxd1-skew-ps = <400>;
+		rxd2-skew-ps = <400>;
+		rxd3-skew-ps = <400>;
+	};
+};
+
+&macb1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	ethernet-phy at 1 {
+		reg = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_eth_int>;
+		interrupt-parent = <&pioC>;
+		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
+	};
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
new file mode 100644
index 0000000..d98c644
--- /dev/null
+++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+
+/ {
+	ahb {
+		apb {
+			pinctrl at fffff200 {
+				board {
+					pinctrl_lcd_ctp_int: lcd_ctp_int {
+						 atmel,pins =
+							 <AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+					};
+				};
+			};
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&hlcdc_pwm 0 50000 0>;
+		brightness-levels = <0 4 8 16 32 64 128 255>;
+		default-brightness-level = <6>;
+		status = "okay";
+	};
+
+	panel: panel {
+		/* Actually Winstar WF70GTIAGDNG0 */
+		compatible = "innolux,at070tn92", "simple-panel";
+		backlight = <&backlight>;
+		power-supply = <&vcc_lcd_reg>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+
+		port at 0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			panel_input: endpoint at 0 {
+				reg = <0>;
+				remote-endpoint = <&hlcdc_panel_output>;
+			};
+		};
+	};
+
+	vcc_lcd_reg: fixedregulator_lcd {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC LCM";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		regulator-always-on;
+		status = "okay";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	ft5426 at 56 {
+		/* Actually FT5426 */
+		compatible = "edt,edt-ft5406";
+		reg = <56>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
+
+		interrupt-parent = <&pioC>;
+		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
+
+		touchscreen-size-x = <800>;
+		touchscreen-size-y = <480>;
+	};
+};
+
+&hlcdc {
+	status = "okay";
+
+	hlcdc-display-controller {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
+
+		port at 0 {
+			hlcdc_panel_output: endpoint at 0 {
+				reg = <0>;
+				remote-endpoint = <&panel_input>;
+			};
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-som60.dtsi
new file mode 100644
index 0000000..1843284
--- /dev/null
+++ b/arch/arm/boot/dts/at91-som60.dtsi
@@ -0,0 +1,229 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * at91-som60.dtsi - Device Tree file for the SOM60 module
+ *
+ *  Copyright (C) 2018 Laird,
+ *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
+ *
+ */
+#include "sama5d36.dtsi"
+
+/ {
+	model = "Laird SOM60";
+	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
+
+	chosen {
+		stdout-path = &dbgu;
+	};
+
+	memory {
+		reg = <0x20000000 0x8000000>;
+	};
+
+	clocks {
+		slow_xtal {
+			clock-frequency = <32768>;
+		};
+
+		main_xtal {
+			clock-frequency = <12000000>;
+		};
+	};
+
+	ahb {
+		apb {
+			pinctrl at fffff200 {
+				board {
+					pinctrl_mmc0_cd: mmc0_cd {
+						atmel,pins =
+							<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+					};
+
+					pinctrl_mmc0_en: mmc0_en {
+						atmel,pins =
+							<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_nand0_wp: nand0_wp {
+						atmel,pins =
+							<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+					};
+
+					pinctrl_usb_vbus: usb_vbus {
+						atmel,pins =
+							<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK */
+					};
+
+					pinctrl_usart2_sck: usart2_sck {
+						atmel,pins =
+							<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
+					};
+
+					pinctrl_usb_oc: usb_oc {
+						atmel,pins =
+							<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART3_SCK */
+					};
+
+					pinctrl_usart3_sck: usart3_sck {
+						atmel,pins =
+							<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
+					};
+
+					pinctrl_usba_vbus: usba_vbus {
+					   atmel,pins =
+							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+					};
+
+					pinctrl_geth_int: geth_int {
+						atmel,pins =
+							<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART1_SCK */
+					};
+
+					pinctrl_usart1_sck: usart1_sck {
+						atmel,pins =
+							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
+					};
+
+					pinctrl_eth_int: eth_int {
+						atmel,pins =
+							<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
+					};
+
+					pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
+						atmel,pins =
+							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&mmc0 {
+	slot at 0 {
+		reg = <0>;
+		bus-width = <8>;
+	};
+};
+
+&mmc1 {
+	status = "okay";
+	slot at 0 {
+		reg = <0>;
+		bus-width = <4>;
+	};
+};
+
+&spi0 {
+	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
+};
+
+&usart0 {
+	atmel,use-dma-rx;
+	atmel,use-dma-tx;
+	status = "okay";
+	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
+};
+
+&usart1 {
+	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
+};
+
+&usart2 {
+	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
+};
+
+&usart3 {
+	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
+};
+
+&adc0 {
+	pinctrl-0 = <
+		&pinctrl_adc0_adtrg
+		&pinctrl_adc0_ad0
+		&pinctrl_adc0_ad1
+		&pinctrl_adc0_ad2
+		&pinctrl_adc0_ad3
+		&pinctrl_adc0_ad4
+		&pinctrl_adc0_ad5
+		>;
+};
+
+&macb0 {
+	phy-mode = "rgmii";
+};
+
+&macb1 {
+	phy-mode = "rmii";
+};
+
+
+&ebi {
+	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&nand_controller {
+	status = "okay";
+
+	nand: nand at 3 {
+		reg = <0x3 0x0 0x2>;
+		atmel,rb = <0>;
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <8>;
+		nand-ecc-step-size = <512>;
+		nand-on-flash-bbt;
+		label = "atmel_nand";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			ubootspl at 0 {
+				label = "u-boot-spl";
+				reg = <0x0 0x20000>;
+			};
+
+			uboot at 20000 {
+				label = "u-boot";
+				reg = <0x20000 0x80000>;
+			};
+
+			ubootenv at a0000 {
+				label = "u-boot-env";
+				reg = <0xa0000 0x20000>;
+			};
+
+			ubootenv at c0000 {
+				label = "u-boot-env";
+				reg = <0xc0000 0x20000>;
+			};
+
+			ubi at e0000 {
+				label = "ubi";
+				reg = <0xe0000 0xfe00000>;
+			};
+		};
+	};
+};
+
+&usb0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usba_vbus>;
+	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
+};
+
+&usb1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
+	num-ports = <3>;
+	atmel,vbus-gpio = <0
+		&pioE 20 GPIO_ACTIVE_HIGH
+		0>;
+	atmel,oc-gpio = <0
+		&pioE 15 GPIO_ACTIVE_LOW
+		0>;
+};
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
  2018-06-14  8:51 ` Ben Whitten
@ 2018-06-14  9:07   ` Alexandre Belloni
  -1 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14  9:07 UTC (permalink / raw)
  To: Ben Whitten
  Cc: devicetree, Ben Whitten, Rob Herring, Mark Rutland,
	Nicolas Ferre, linux-kernel, linux-arm-kernel

Hi,

On 14/06/2018 09:51:54+0100, Ben Whitten wrote:

This need a proper commit message. Maybe you can also add a link to the
technical brief for the platform?

> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>  arch/arm/boot/dts/Makefile        |   3 +-
>  arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>  arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 237 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>  create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7e24249..1ee94ee 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>  	at91sam9g25ek.dtb \
>  	at91sam9g35ek.dtb \
>  	at91sam9x25ek.dtb \
> -	at91sam9x35ek.dtb
> +	at91sam9x35ek.dtb \
> +	at91-wb45n.dtb

The proper name for the file is <soc>-board.dtb so this should be
at91sam9g25-wb45n.dtb.


-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14  9:07   ` Alexandre Belloni
  0 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14  9:07 UTC (permalink / raw)
  To: linux-arm-kernel

Hi,

On 14/06/2018 09:51:54+0100, Ben Whitten wrote:

This need a proper commit message. Maybe you can also add a link to the
technical brief for the platform?

> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>  arch/arm/boot/dts/Makefile        |   3 +-
>  arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>  arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 237 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>  create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7e24249..1ee94ee 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>  	at91sam9g25ek.dtb \
>  	at91sam9g35ek.dtb \
>  	at91sam9x25ek.dtb \
> -	at91sam9x35ek.dtb
> +	at91sam9x35ek.dtb \
> +	at91-wb45n.dtb

The proper name for the file is <soc>-board.dtb so this should be
at91sam9g25-wb45n.dtb.


-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
  2018-06-14  8:51   ` Ben Whitten
@ 2018-06-14  9:50     ` Alexandre Belloni
  -1 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14  9:50 UTC (permalink / raw)
  To: Ben Whitten, Nicolas Ferre
  Cc: devicetree, Ben Whitten, Rob Herring, Mark Rutland, linux-kernel,
	linux-arm-kernel

On 14/06/2018 09:51:55+0100, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>  arch/arm/boot/dts/Makefile        |   3 +-
>  arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
>  arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 320 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
>  create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 1ee94ee..fd5f8a6 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>  	at91-sama5d4_ma5d4evk.dtb \
>  	at91-sama5d4_xplained.dtb \
>  	at91-sama5d4ek.dtb \
> -	at91-vinco.dtb
> +	at91-vinco.dtb \
> +	at91-wb50n.dtb

I know we have been bad at this but this should be
at91-<soc>-<board>.dtb so at91-sama5d31-wb50n.dtb

>  dtb-$(CONFIG_ARCH_ATLAS6) += \
>  	atlas6-evb.dtb
>  dtb-$(CONFIG_ARCH_ATLAS7) += \
> diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
> new file mode 100644
> index 0000000..ee4f823
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb50n.dts
> @@ -0,0 +1,116 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb50n.dts - Device Tree file for wb50n evaluation board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> + */
> +
> +/dts-v1/;
> +#include "at91-wb50n.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
> +	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
> +
> +	ahb {
> +		apb {
> +			watchdog@fffffe40 {

I don't mind if you want to have a preparation patch adding the
necessary labels in the soc dtsi so you don't have to reproduce the
ahb/apb hierarchy here.

> +	ahb {
> +		apb {
> +			pinctrl@fffff200 {

Ditto

> +				board {
> +					pinctrl_mmc0_cd: mmc0_cd {
> +						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
> +					};
> +
> +					pinctrl_usba_vbus: usba_vbus {
> +						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
> +					};
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&slow_osc {
> +	atmel,osc-bypass;
> +};

After the clock binding rework, this will have to be moved to the pmc
node (the rework is not posted, this is just to remind me that this will
have to be done).

> +
> +&usart1_clk {
> +	atmel,clk-output-range = <0 132000000>;
> +};

The datasheet explicitly states that 66 MHz is the maximum allowed
frequency for the USART. Note that the new binding will not allow you to
do that.

However, I see the table disappeared from the latest datasheet. Maybe
Nicolas can comment on that?

-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
@ 2018-06-14  9:50     ` Alexandre Belloni
  0 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14  9:50 UTC (permalink / raw)
  To: linux-arm-kernel

On 14/06/2018 09:51:55+0100, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>  arch/arm/boot/dts/Makefile        |   3 +-
>  arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
>  arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 320 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
>  create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 1ee94ee..fd5f8a6 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>  	at91-sama5d4_ma5d4evk.dtb \
>  	at91-sama5d4_xplained.dtb \
>  	at91-sama5d4ek.dtb \
> -	at91-vinco.dtb
> +	at91-vinco.dtb \
> +	at91-wb50n.dtb

I know we have been bad at this but this should be
at91-<soc>-<board>.dtb so at91-sama5d31-wb50n.dtb

>  dtb-$(CONFIG_ARCH_ATLAS6) += \
>  	atlas6-evb.dtb
>  dtb-$(CONFIG_ARCH_ATLAS7) += \
> diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
> new file mode 100644
> index 0000000..ee4f823
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb50n.dts
> @@ -0,0 +1,116 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb50n.dts - Device Tree file for wb50n evaluation board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> + */
> +
> +/dts-v1/;
> +#include "at91-wb50n.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
> +	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
> +
> +	ahb {
> +		apb {
> +			watchdog at fffffe40 {

I don't mind if you want to have a preparation patch adding the
necessary labels in the soc dtsi so you don't have to reproduce the
ahb/apb hierarchy here.

> +	ahb {
> +		apb {
> +			pinctrl at fffff200 {

Ditto

> +				board {
> +					pinctrl_mmc0_cd: mmc0_cd {
> +						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
> +					};
> +
> +					pinctrl_usba_vbus: usba_vbus {
> +						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
> +					};
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&slow_osc {
> +	atmel,osc-bypass;
> +};

After the clock binding rework, this will have to be moved to the pmc
node (the rework is not posted, this is just to remind me that this will
have to be done).

> +
> +&usart1_clk {
> +	atmel,clk-output-range = <0 132000000>;
> +};

The datasheet explicitly states that 66 MHz is the maximum allowed
frequency for the USART. Note that the new binding will not allow you to
do that.

However, I see the table disappeared from the latest datasheet. Maybe
Nicolas can comment on that?

-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
  2018-06-14  9:07   ` Alexandre Belloni
@ 2018-06-14 11:24     ` Alexandre Belloni
  -1 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14 11:24 UTC (permalink / raw)
  To: Ben Whitten
  Cc: devicetree, Ben Whitten, Rob Herring, Mark Rutland,
	Nicolas Ferre, linux-kernel, linux-arm-kernel

On 14/06/2018 11:07:33+0200, Alexandre Belloni wrote:
> Hi,
> 
> On 14/06/2018 09:51:54+0100, Ben Whitten wrote:
> 
> This need a proper commit message. Maybe you can also add a link to the
> technical brief for the platform?
> 
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >  arch/arm/boot/dts/Makefile        |   3 +-
> >  arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
> >  arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 237 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
> >  create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> > 
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 7e24249..1ee94ee 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
> >  	at91sam9g25ek.dtb \
> >  	at91sam9g35ek.dtb \
> >  	at91sam9x25ek.dtb \
> > -	at91sam9x35ek.dtb
> > +	at91sam9x35ek.dtb \
> > +	at91-wb45n.dtb
> 
> The proper name for the file is <soc>-board.dtb so this should be
> at91sam9g25-wb45n.dtb.
> 

Nicolas tells me that the name was right, please disregard my comment
(also on the other patches).

-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14 11:24     ` Alexandre Belloni
  0 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14 11:24 UTC (permalink / raw)
  To: linux-arm-kernel

On 14/06/2018 11:07:33+0200, Alexandre Belloni wrote:
> Hi,
> 
> On 14/06/2018 09:51:54+0100, Ben Whitten wrote:
> 
> This need a proper commit message. Maybe you can also add a link to the
> technical brief for the platform?
> 
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >  arch/arm/boot/dts/Makefile        |   3 +-
> >  arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
> >  arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 237 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
> >  create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> > 
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 7e24249..1ee94ee 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
> >  	at91sam9g25ek.dtb \
> >  	at91sam9g35ek.dtb \
> >  	at91sam9x25ek.dtb \
> > -	at91sam9x35ek.dtb
> > +	at91sam9x35ek.dtb \
> > +	at91-wb45n.dtb
> 
> The proper name for the file is <soc>-board.dtb so this should be
> at91sam9g25-wb45n.dtb.
> 

Nicolas tells me that the name was right, please disregard my comment
(also on the other patches).

-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
  2018-06-14  9:50     ` Alexandre Belloni
  (?)
@ 2018-06-14 11:47       ` Nicolas Ferre
  -1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 11:47 UTC (permalink / raw)
  To: Alexandre Belloni, Ben Whitten
  Cc: devicetree, Ben Whitten, Rob Herring, Mark Rutland, linux-kernel,
	linux-arm-kernel

On 14/06/2018 at 11:50, Alexandre Belloni wrote:
> On 14/06/2018 09:51:55+0100, Ben Whitten wrote:
>> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
>> ---
>>   arch/arm/boot/dts/Makefile        |   3 +-
>>   arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
>>   arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 320 insertions(+), 1 deletion(-)
>>   create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
>>   create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 1ee94ee..fd5f8a6 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>>   	at91-sama5d4_ma5d4evk.dtb \
>>   	at91-sama5d4_xplained.dtb \
>>   	at91-sama5d4ek.dtb \
>> -	at91-vinco.dtb
>> +	at91-vinco.dtb \
>> +	at91-wb50n.dtb
> 
> I know we have been bad at this but this should be
> at91-<soc>-<board>.dtb so at91-sama5d31-wb50n.dtb

See new message by Alexandre.

Actually, the current convention is explained here:
https://elixir.bootlin.com/linux/latest/source/Documentation/arm/Microchip/README#L159

>>   dtb-$(CONFIG_ARCH_ATLAS6) += \
>>   	atlas6-evb.dtb
>>   dtb-$(CONFIG_ARCH_ATLAS7) += \
>> diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
>> new file mode 100644
>> index 0000000..ee4f823
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91-wb50n.dts
>> @@ -0,0 +1,116 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * at91-wb50n.dts - Device Tree file for wb50n evaluation board
>> + *
>> + *  Copyright (C) 2018 Laird
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +#include "at91-wb50n.dtsi"
>> +
>> +/ {
>> +	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
>> +	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
>> +
>> +	ahb {
>> +		apb {
>> +			watchdog@fffffe40 {
> 
> I don't mind if you want to have a preparation patch adding the
> necessary labels in the soc dtsi so you don't have to reproduce the
> ahb/apb hierarchy here.

I agree: +1

>> +	ahb {
>> +		apb {
>> +			pinctrl@fffff200 {
> 
> Ditto
> 
>> +				board {
>> +					pinctrl_mmc0_cd: mmc0_cd {
>> +						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
>> +					};
>> +
>> +					pinctrl_usba_vbus: usba_vbus {
>> +						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +};
>> +
>> +&slow_osc {
>> +	atmel,osc-bypass;
>> +};
> 
> After the clock binding rework, this will have to be moved to the pmc
> node (the rework is not posted, this is just to remind me that this will
> have to be done).
> 
>> +
>> +&usart1_clk {
>> +	atmel,clk-output-range = <0 132000000>;
>> +};
> 
> The datasheet explicitly states that 66 MHz is the maximum allowed
> frequency for the USART. Note that the new binding will not allow you to
> do that.
> 
> However, I see the table disappeared from the latest datasheet. Maybe
> Nicolas can comment on that?

You're right, 66 MHz is the maximum frequency for all USART and UART on 
this sama5d3 SoC.

The disappearing of this table is a bug in the latest datasheet. I can 
see that the one "11121B–ATARM–08-Mar-13" still have it. I report this 
issue to the team in charge of datasheets (it will be certainly fixed 
for next release of this document).

Best regards,
-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
@ 2018-06-14 11:47       ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 11:47 UTC (permalink / raw)
  To: Alexandre Belloni, Ben Whitten
  Cc: devicetree, Ben Whitten, Rob Herring, Mark Rutland, linux-kernel,
	linux-arm-kernel

On 14/06/2018 at 11:50, Alexandre Belloni wrote:
> On 14/06/2018 09:51:55+0100, Ben Whitten wrote:
>> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
>> ---
>>   arch/arm/boot/dts/Makefile        |   3 +-
>>   arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
>>   arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 320 insertions(+), 1 deletion(-)
>>   create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
>>   create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 1ee94ee..fd5f8a6 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>>   	at91-sama5d4_ma5d4evk.dtb \
>>   	at91-sama5d4_xplained.dtb \
>>   	at91-sama5d4ek.dtb \
>> -	at91-vinco.dtb
>> +	at91-vinco.dtb \
>> +	at91-wb50n.dtb
> 
> I know we have been bad at this but this should be
> at91-<soc>-<board>.dtb so at91-sama5d31-wb50n.dtb

See new message by Alexandre.

Actually, the current convention is explained here:
https://elixir.bootlin.com/linux/latest/source/Documentation/arm/Microchip/README#L159

>>   dtb-$(CONFIG_ARCH_ATLAS6) += \
>>   	atlas6-evb.dtb
>>   dtb-$(CONFIG_ARCH_ATLAS7) += \
>> diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
>> new file mode 100644
>> index 0000000..ee4f823
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91-wb50n.dts
>> @@ -0,0 +1,116 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * at91-wb50n.dts - Device Tree file for wb50n evaluation board
>> + *
>> + *  Copyright (C) 2018 Laird
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +#include "at91-wb50n.dtsi"
>> +
>> +/ {
>> +	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
>> +	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
>> +
>> +	ahb {
>> +		apb {
>> +			watchdog@fffffe40 {
> 
> I don't mind if you want to have a preparation patch adding the
> necessary labels in the soc dtsi so you don't have to reproduce the
> ahb/apb hierarchy here.

I agree: +1

>> +	ahb {
>> +		apb {
>> +			pinctrl@fffff200 {
> 
> Ditto
> 
>> +				board {
>> +					pinctrl_mmc0_cd: mmc0_cd {
>> +						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
>> +					};
>> +
>> +					pinctrl_usba_vbus: usba_vbus {
>> +						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +};
>> +
>> +&slow_osc {
>> +	atmel,osc-bypass;
>> +};
> 
> After the clock binding rework, this will have to be moved to the pmc
> node (the rework is not posted, this is just to remind me that this will
> have to be done).
> 
>> +
>> +&usart1_clk {
>> +	atmel,clk-output-range = <0 132000000>;
>> +};
> 
> The datasheet explicitly states that 66 MHz is the maximum allowed
> frequency for the USART. Note that the new binding will not allow you to
> do that.
> 
> However, I see the table disappeared from the latest datasheet. Maybe
> Nicolas can comment on that?

You're right, 66 MHz is the maximum frequency for all USART and UART on 
this sama5d3 SoC.

The disappearing of this table is a bug in the latest datasheet. I can 
see that the one "11121B–ATARM–08-Mar-13" still have it. I report this 
issue to the team in charge of datasheets (it will be certainly fixed 
for next release of this document).

Best regards,
-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 2/4] arm: dts: add support for Laird WB50N cpu module and DVK
@ 2018-06-14 11:47       ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 11:47 UTC (permalink / raw)
  To: linux-arm-kernel

On 14/06/2018 at 11:50, Alexandre Belloni wrote:
> On 14/06/2018 09:51:55+0100, Ben Whitten wrote:
>> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
>> ---
>>   arch/arm/boot/dts/Makefile        |   3 +-
>>   arch/arm/boot/dts/at91-wb50n.dts  | 116 ++++++++++++++++++++++
>>   arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++++++++++++++++++++++++++++++++++++++
>>   3 files changed, 320 insertions(+), 1 deletion(-)
>>   create mode 100644 arch/arm/boot/dts/at91-wb50n.dts
>>   create mode 100644 arch/arm/boot/dts/at91-wb50n.dtsi
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 1ee94ee..fd5f8a6 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -61,7 +61,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>>   	at91-sama5d4_ma5d4evk.dtb \
>>   	at91-sama5d4_xplained.dtb \
>>   	at91-sama5d4ek.dtb \
>> -	at91-vinco.dtb
>> +	at91-vinco.dtb \
>> +	at91-wb50n.dtb
> 
> I know we have been bad at this but this should be
> at91-<soc>-<board>.dtb so at91-sama5d31-wb50n.dtb

See new message by Alexandre.

Actually, the current convention is explained here:
https://elixir.bootlin.com/linux/latest/source/Documentation/arm/Microchip/README#L159

>>   dtb-$(CONFIG_ARCH_ATLAS6) += \
>>   	atlas6-evb.dtb
>>   dtb-$(CONFIG_ARCH_ATLAS7) += \
>> diff --git a/arch/arm/boot/dts/at91-wb50n.dts b/arch/arm/boot/dts/at91-wb50n.dts
>> new file mode 100644
>> index 0000000..ee4f823
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91-wb50n.dts
>> @@ -0,0 +1,116 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * at91-wb50n.dts - Device Tree file for wb50n evaluation board
>> + *
>> + *  Copyright (C) 2018 Laird
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +#include "at91-wb50n.dtsi"
>> +
>> +/ {
>> +	model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
>> +	compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
>> +
>> +	ahb {
>> +		apb {
>> +			watchdog at fffffe40 {
> 
> I don't mind if you want to have a preparation patch adding the
> necessary labels in the soc dtsi so you don't have to reproduce the
> ahb/apb hierarchy here.

I agree: +1

>> +	ahb {
>> +		apb {
>> +			pinctrl at fffff200 {
> 
> Ditto
> 
>> +				board {
>> +					pinctrl_mmc0_cd: mmc0_cd {
>> +						atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
>> +					};
>> +
>> +					pinctrl_usba_vbus: usba_vbus {
>> +						atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +};
>> +
>> +&slow_osc {
>> +	atmel,osc-bypass;
>> +};
> 
> After the clock binding rework, this will have to be moved to the pmc
> node (the rework is not posted, this is just to remind me that this will
> have to be done).
> 
>> +
>> +&usart1_clk {
>> +	atmel,clk-output-range = <0 132000000>;
>> +};
> 
> The datasheet explicitly states that 66 MHz is the maximum allowed
> frequency for the USART. Note that the new binding will not allow you to
> do that.
> 
> However, I see the table disappeared from the latest datasheet. Maybe
> Nicolas can comment on that?

You're right, 66 MHz is the maximum frequency for all USART and UART on 
this sama5d3 SoC.

The disappearing of this table is a bug in the latest datasheet. I can 
see that the one "11121B?ATARM?08-Mar-13" still have it. I report this 
issue to the team in charge of datasheets (it will be certainly fixed 
for next release of this document).

Best regards,
-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
  2018-06-14  8:51 ` Ben Whitten
  (?)
@ 2018-06-14 12:52   ` Nicolas Ferre
  -1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 12:52 UTC (permalink / raw)
  To: Ben Whitten, devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Alexandre Belloni,
	linux-kernel, linux-arm-kernel

On 14/06/2018 at 10:51, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>   arch/arm/boot/dts/Makefile        |   3 +-
>   arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>   arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
>   3 files changed, 237 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>   create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7e24249..1ee94ee 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>   	at91sam9g25ek.dtb \
>   	at91sam9g35ek.dtb \
>   	at91sam9x25ek.dtb \
> -	at91sam9x35ek.dtb
> +	at91sam9x35ek.dtb \
> +	at91-wb45n.dtb
>   dtb-$(CONFIG_SOC_SAM_V7) += \
>   	at91-kizbox2.dtb \
>   	at91-nattis-2-natte-2.dtb \
> diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts
> new file mode 100644
> index 0000000..4e88815
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb45n.dts
> @@ -0,0 +1,66 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb45n.dts - Device Tree file for WB45NBT board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> +*/
> +/dts-v1/;
> +#include "at91-wb45n.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";

"laird" prefix must be added to 
Documentation/devicetree/bindings/vendor-prefixes.txt before using it: 
you can do a little patch as a first patch of this series.
Otherwise it will trigger a warning message while running 
scripts/checkpatch.pl on top of your patch.


> +
> +	ahb {
> +		apb {
> +			watchdog@fffffe40 {
> +				status = "okay";
> +			};
> +		};
> +	};
> +
> +	gpio_keys {
> +		compatible = "gpio-keys";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		irqbtn@pb18 {

I'm not sure that the @pb18 can be used like this. This address 
extension must be used in a "reg" property in the node. dtc used with 
warning switch on might trigger an error for this.

> +			label = "IRQBTN";
> +			linux,code = <99>;
> +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
> +			gpio-key,wakeup = <1>;
> +		};
> +	};
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&usart0 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-wb45n.dtsi
> new file mode 100644
> index 0000000..2fa58e2
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
> @@ -0,0 +1,169 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> + */
> +
> +#include "at91sam9g25.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
> +
> +	chosen {
> +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x4000000>;
> +	};
> +
> +	ahb {
> +		apb {
> +			shdwc@fffffe10 {

I would advice you to take exactly the node name:
"shutdown-controller@fffffe10"; Anyway, it will go away after you use 
the label notation as advised by Alexandre.

> +				atmel,wakeup-mode = "low";
> +			};
> +
> +			pinctrl@fffff400 {
> +				usb2 {
> +					pinctrl_board_usb2: usb2-board {
> +						atmel,pins =
> +							<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio vbus sense, deglitch */
> +					};
> +				};
> +			};
> +
> +			rstc@fffffe00 {
> +				compatible = "atmel,sama5d3-rstc";
> +			};

I don't think this node is needed.

> +
> +		};
> +	};
> +
> +	atheros {
> +		compatible = "atheros,ath6kl";
> +		atheros,board-id = "SD32";
> +	};
> +};
> +
> +&slow_xtal {
> +	clock-frequency = <32768>;
> +};
> +
> +&main_xtal {
> +	clock-frequency = <12000000>;
> +};
> +
> +&ebi {
> +	status = "okay";
> +	nand_controller: nand-controller {
> +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
> +		pinctrl-names = "default";
> +		status = "okay";
> +
> +		nand@3 {
> +			reg = <0x3 0x0 0x800000>;
> +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
> +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
> +			nand-bus-width = <8>;
> +			nand-ecc-mode = "hw";
> +			nand-ecc-strength = <4>;
> +			nand-ecc-step-size = <512>;
> +			nand-on-flash-bbt;
> +			label = "atmel_nand";
> +
> +			partitions {
> +				compatible = "fixed-partitions";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +
> +				at91bootstrap@0 {
> +					label = "at91bs";
> +					reg = <0x0 0x20000>;
> +				};
> +
> +				uboot@20000 {
> +					label = "u-boot";
> +					reg = <0x20000 0x80000>;
> +				};
> +
> +				ubootenv@a0000 {
> +					label = "u-boot-env";
> +					reg = <0xa0000 0x20000>;
> +				};
> +
> +				ubootenv@c0000 {
> +					label = "redund-env";
> +					reg = <0xc0000 0x20000>;
> +				};
> +
> +				kernel-a@e0000 {
> +					label = "kernel-a";
> +					reg = <0xe0000 0x280000>;
> +				};
> +
> +				kernel-b@360000 {
> +					label = "kernel-b";
> +					reg = <0x360000 0x280000>;
> +				};
> +
> +				rootfs-a@5e0000 {
> +					label = "rootfs-a";
> +					reg = <0x5e0000 0x2600000>;
> +				};
> +
> +				rootfs-b@2be0000 {
> +					label = "rootfs-b";
> +					reg = <0x2be0000 0x2600000>;
> +				};
> +
> +				user@51e0000 {
> +					label = "user";
> +					reg = <0x51e0000 0x2dc0000>;
> +				};
> +
> +				logs@7fa0000 {
> +					label = "logs";
> +					reg = <0x7fa0000 0x60000>;
> +				};
> +
> +			};
> +		};
> +	};
> +};
> +
> +&usb0 {

This must be &usb1 label, isn't it?
Because you are referring to ohci binding I suspect (found by having a 
look at: atmel,oc-gpio property...).

> +	num-ports = <2>;
> +	atmel,vbus-gpio = <
> +		&pioB 12 GPIO_ACTIVE_HIGH
> +		&pioA 31 GPIO_ACTIVE_HIGH
> +		>;
> +	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
> +};
> +
> +&macb0 {
> +	phy-mode = "rmii";
> +};
> +
> +&spi0 {
> +	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
> +};
> +
> +&usb2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_board_usb2>;
> +	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&mmc0 {
> +	pinctrl-0 = <
> +		&pinctrl_mmc0_slot0_clk_cmd_dat0
> +		&pinctrl_mmc0_slot0_dat1_3>;
> +	slot@0 {
> +		reg = <0>;
> +		bus-width = <4>;
> +	};
> +};
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14 12:52   ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 12:52 UTC (permalink / raw)
  To: Ben Whitten, devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Alexandre Belloni,
	linux-kernel, linux-arm-kernel

On 14/06/2018 at 10:51, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>   arch/arm/boot/dts/Makefile        |   3 +-
>   arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>   arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
>   3 files changed, 237 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>   create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7e24249..1ee94ee 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>   	at91sam9g25ek.dtb \
>   	at91sam9g35ek.dtb \
>   	at91sam9x25ek.dtb \
> -	at91sam9x35ek.dtb
> +	at91sam9x35ek.dtb \
> +	at91-wb45n.dtb
>   dtb-$(CONFIG_SOC_SAM_V7) += \
>   	at91-kizbox2.dtb \
>   	at91-nattis-2-natte-2.dtb \
> diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts
> new file mode 100644
> index 0000000..4e88815
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb45n.dts
> @@ -0,0 +1,66 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb45n.dts - Device Tree file for WB45NBT board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> +*/
> +/dts-v1/;
> +#include "at91-wb45n.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";

"laird" prefix must be added to 
Documentation/devicetree/bindings/vendor-prefixes.txt before using it: 
you can do a little patch as a first patch of this series.
Otherwise it will trigger a warning message while running 
scripts/checkpatch.pl on top of your patch.


> +
> +	ahb {
> +		apb {
> +			watchdog@fffffe40 {
> +				status = "okay";
> +			};
> +		};
> +	};
> +
> +	gpio_keys {
> +		compatible = "gpio-keys";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		irqbtn@pb18 {

I'm not sure that the @pb18 can be used like this. This address 
extension must be used in a "reg" property in the node. dtc used with 
warning switch on might trigger an error for this.

> +			label = "IRQBTN";
> +			linux,code = <99>;
> +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
> +			gpio-key,wakeup = <1>;
> +		};
> +	};
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&usart0 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-wb45n.dtsi
> new file mode 100644
> index 0000000..2fa58e2
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
> @@ -0,0 +1,169 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> + */
> +
> +#include "at91sam9g25.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
> +
> +	chosen {
> +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x4000000>;
> +	};
> +
> +	ahb {
> +		apb {
> +			shdwc@fffffe10 {

I would advice you to take exactly the node name:
"shutdown-controller@fffffe10"; Anyway, it will go away after you use 
the label notation as advised by Alexandre.

> +				atmel,wakeup-mode = "low";
> +			};
> +
> +			pinctrl@fffff400 {
> +				usb2 {
> +					pinctrl_board_usb2: usb2-board {
> +						atmel,pins =
> +							<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio vbus sense, deglitch */
> +					};
> +				};
> +			};
> +
> +			rstc@fffffe00 {
> +				compatible = "atmel,sama5d3-rstc";
> +			};

I don't think this node is needed.

> +
> +		};
> +	};
> +
> +	atheros {
> +		compatible = "atheros,ath6kl";
> +		atheros,board-id = "SD32";
> +	};
> +};
> +
> +&slow_xtal {
> +	clock-frequency = <32768>;
> +};
> +
> +&main_xtal {
> +	clock-frequency = <12000000>;
> +};
> +
> +&ebi {
> +	status = "okay";
> +	nand_controller: nand-controller {
> +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
> +		pinctrl-names = "default";
> +		status = "okay";
> +
> +		nand@3 {
> +			reg = <0x3 0x0 0x800000>;
> +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
> +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
> +			nand-bus-width = <8>;
> +			nand-ecc-mode = "hw";
> +			nand-ecc-strength = <4>;
> +			nand-ecc-step-size = <512>;
> +			nand-on-flash-bbt;
> +			label = "atmel_nand";
> +
> +			partitions {
> +				compatible = "fixed-partitions";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +
> +				at91bootstrap@0 {
> +					label = "at91bs";
> +					reg = <0x0 0x20000>;
> +				};
> +
> +				uboot@20000 {
> +					label = "u-boot";
> +					reg = <0x20000 0x80000>;
> +				};
> +
> +				ubootenv@a0000 {
> +					label = "u-boot-env";
> +					reg = <0xa0000 0x20000>;
> +				};
> +
> +				ubootenv@c0000 {
> +					label = "redund-env";
> +					reg = <0xc0000 0x20000>;
> +				};
> +
> +				kernel-a@e0000 {
> +					label = "kernel-a";
> +					reg = <0xe0000 0x280000>;
> +				};
> +
> +				kernel-b@360000 {
> +					label = "kernel-b";
> +					reg = <0x360000 0x280000>;
> +				};
> +
> +				rootfs-a@5e0000 {
> +					label = "rootfs-a";
> +					reg = <0x5e0000 0x2600000>;
> +				};
> +
> +				rootfs-b@2be0000 {
> +					label = "rootfs-b";
> +					reg = <0x2be0000 0x2600000>;
> +				};
> +
> +				user@51e0000 {
> +					label = "user";
> +					reg = <0x51e0000 0x2dc0000>;
> +				};
> +
> +				logs@7fa0000 {
> +					label = "logs";
> +					reg = <0x7fa0000 0x60000>;
> +				};
> +
> +			};
> +		};
> +	};
> +};
> +
> +&usb0 {

This must be &usb1 label, isn't it?
Because you are referring to ohci binding I suspect (found by having a 
look at: atmel,oc-gpio property...).

> +	num-ports = <2>;
> +	atmel,vbus-gpio = <
> +		&pioB 12 GPIO_ACTIVE_HIGH
> +		&pioA 31 GPIO_ACTIVE_HIGH
> +		>;
> +	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
> +};
> +
> +&macb0 {
> +	phy-mode = "rmii";
> +};
> +
> +&spi0 {
> +	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
> +};
> +
> +&usb2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_board_usb2>;
> +	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&mmc0 {
> +	pinctrl-0 = <
> +		&pinctrl_mmc0_slot0_clk_cmd_dat0
> +		&pinctrl_mmc0_slot0_dat1_3>;
> +	slot@0 {
> +		reg = <0>;
> +		bus-width = <4>;
> +	};
> +};
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14 12:52   ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 12:52 UTC (permalink / raw)
  To: linux-arm-kernel

On 14/06/2018 at 10:51, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>   arch/arm/boot/dts/Makefile        |   3 +-
>   arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>   arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++++++++++++++++++++++++++++++++++++++
>   3 files changed, 237 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>   create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 7e24249..1ee94ee 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>   	at91sam9g25ek.dtb \
>   	at91sam9g35ek.dtb \
>   	at91sam9x25ek.dtb \
> -	at91sam9x35ek.dtb
> +	at91sam9x35ek.dtb \
> +	at91-wb45n.dtb
>   dtb-$(CONFIG_SOC_SAM_V7) += \
>   	at91-kizbox2.dtb \
>   	at91-nattis-2-natte-2.dtb \
> diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-wb45n.dts
> new file mode 100644
> index 0000000..4e88815
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb45n.dts
> @@ -0,0 +1,66 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb45n.dts - Device Tree file for WB45NBT board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> +*/
> +/dts-v1/;
> +#include "at91-wb45n.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";

"laird" prefix must be added to 
Documentation/devicetree/bindings/vendor-prefixes.txt before using it: 
you can do a little patch as a first patch of this series.
Otherwise it will trigger a warning message while running 
scripts/checkpatch.pl on top of your patch.


> +
> +	ahb {
> +		apb {
> +			watchdog at fffffe40 {
> +				status = "okay";
> +			};
> +		};
> +	};
> +
> +	gpio_keys {
> +		compatible = "gpio-keys";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		irqbtn at pb18 {

I'm not sure that the @pb18 can be used like this. This address 
extension must be used in a "reg" property in the node. dtc used with 
warning switch on might trigger an error for this.

> +			label = "IRQBTN";
> +			linux,code = <99>;
> +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
> +			gpio-key,wakeup = <1>;
> +		};
> +	};
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&usart0 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-wb45n.dtsi
> new file mode 100644
> index 0000000..2fa58e2
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
> @@ -0,0 +1,169 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
> + *
> + *  Copyright (C) 2018 Laird
> + *
> + */
> +
> +#include "at91sam9g25.dtsi"
> +
> +/ {
> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
> +
> +	chosen {
> +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x4000000>;
> +	};
> +
> +	ahb {
> +		apb {
> +			shdwc at fffffe10 {

I would advice you to take exactly the node name:
"shutdown-controller at fffffe10"; Anyway, it will go away after you use 
the label notation as advised by Alexandre.

> +				atmel,wakeup-mode = "low";
> +			};
> +
> +			pinctrl at fffff400 {
> +				usb2 {
> +					pinctrl_board_usb2: usb2-board {
> +						atmel,pins =
> +							<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio vbus sense, deglitch */
> +					};
> +				};
> +			};
> +
> +			rstc at fffffe00 {
> +				compatible = "atmel,sama5d3-rstc";
> +			};

I don't think this node is needed.

> +
> +		};
> +	};
> +
> +	atheros {
> +		compatible = "atheros,ath6kl";
> +		atheros,board-id = "SD32";
> +	};
> +};
> +
> +&slow_xtal {
> +	clock-frequency = <32768>;
> +};
> +
> +&main_xtal {
> +	clock-frequency = <12000000>;
> +};
> +
> +&ebi {
> +	status = "okay";
> +	nand_controller: nand-controller {
> +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
> +		pinctrl-names = "default";
> +		status = "okay";
> +
> +		nand at 3 {
> +			reg = <0x3 0x0 0x800000>;
> +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
> +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
> +			nand-bus-width = <8>;
> +			nand-ecc-mode = "hw";
> +			nand-ecc-strength = <4>;
> +			nand-ecc-step-size = <512>;
> +			nand-on-flash-bbt;
> +			label = "atmel_nand";
> +
> +			partitions {
> +				compatible = "fixed-partitions";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +
> +				at91bootstrap at 0 {
> +					label = "at91bs";
> +					reg = <0x0 0x20000>;
> +				};
> +
> +				uboot at 20000 {
> +					label = "u-boot";
> +					reg = <0x20000 0x80000>;
> +				};
> +
> +				ubootenv at a0000 {
> +					label = "u-boot-env";
> +					reg = <0xa0000 0x20000>;
> +				};
> +
> +				ubootenv at c0000 {
> +					label = "redund-env";
> +					reg = <0xc0000 0x20000>;
> +				};
> +
> +				kernel-a at e0000 {
> +					label = "kernel-a";
> +					reg = <0xe0000 0x280000>;
> +				};
> +
> +				kernel-b at 360000 {
> +					label = "kernel-b";
> +					reg = <0x360000 0x280000>;
> +				};
> +
> +				rootfs-a at 5e0000 {
> +					label = "rootfs-a";
> +					reg = <0x5e0000 0x2600000>;
> +				};
> +
> +				rootfs-b at 2be0000 {
> +					label = "rootfs-b";
> +					reg = <0x2be0000 0x2600000>;
> +				};
> +
> +				user at 51e0000 {
> +					label = "user";
> +					reg = <0x51e0000 0x2dc0000>;
> +				};
> +
> +				logs at 7fa0000 {
> +					label = "logs";
> +					reg = <0x7fa0000 0x60000>;
> +				};
> +
> +			};
> +		};
> +	};
> +};
> +
> +&usb0 {

This must be &usb1 label, isn't it?
Because you are referring to ohci binding I suspect (found by having a 
look at: atmel,oc-gpio property...).

> +	num-ports = <2>;
> +	atmel,vbus-gpio = <
> +		&pioB 12 GPIO_ACTIVE_HIGH
> +		&pioA 31 GPIO_ACTIVE_HIGH
> +		>;
> +	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
> +};
> +
> +&macb0 {
> +	phy-mode = "rmii";
> +};
> +
> +&spi0 {
> +	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
> +};
> +
> +&usb2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_board_usb2>;
> +	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&mmc0 {
> +	pinctrl-0 = <
> +		&pinctrl_mmc0_slot0_clk_cmd_dat0
> +		&pinctrl_mmc0_slot0_dat1_3>;
> +	slot at 0 {
> +		reg = <0>;
> +		bus-width = <4>;
> +	};
> +};
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
  2018-06-14 12:52   ` Nicolas Ferre
@ 2018-06-14 13:00     ` Alexandre Belloni
  -1 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14 13:00 UTC (permalink / raw)
  To: Nicolas Ferre
  Cc: Ben Whitten, devicetree, Ben Whitten, Rob Herring, Mark Rutland,
	linux-kernel, linux-arm-kernel

On 14/06/2018 14:52:25+0200, Nicolas Ferre wrote:
> > +	gpio_keys {
> > +		compatible = "gpio-keys";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		irqbtn@pb18 {
> 
> I'm not sure that the @pb18 can be used like this. This address extension
> must be used in a "reg" property in the node. dtc used with warning switch
> on might trigger an error for this.
> 

Indeed, no unit-address without a reg property.


-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-14 13:00     ` Alexandre Belloni
  0 siblings, 0 replies; 34+ messages in thread
From: Alexandre Belloni @ 2018-06-14 13:00 UTC (permalink / raw)
  To: linux-arm-kernel

On 14/06/2018 14:52:25+0200, Nicolas Ferre wrote:
> > +	gpio_keys {
> > +		compatible = "gpio-keys";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		irqbtn at pb18 {
> 
> I'm not sure that the @pb18 can be used like this. This address extension
> must be used in a "reg" property in the node. dtc used with warning switch
> on might trigger an error for this.
> 

Indeed, no unit-address without a reg property.


-- 
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
  2018-06-14  8:51   ` Ben Whitten
  (?)
@ 2018-06-14 13:14     ` Nicolas Ferre
  -1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 13:14 UTC (permalink / raw)
  To: Ben Whitten, devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Alexandre Belloni,
	linux-kernel, linux-arm-kernel

On 14/06/2018 at 10:51, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>   arch/arm/boot/dts/Makefile                    |   3 +-
>   arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
>   arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159 ++++++++++++++++++
>   arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
>   arch/arm/boot/dts/at91-som60.dtsi             | 229 ++++++++++++++++++++++++++
>   5 files changed, 581 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
>   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
>   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
>   create mode 100644 arch/arm/boot/dts/at91-som60.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 486ab59..4d3d9ca 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>   	at91-sama5d4ek.dtb \
>   	at91-vinco.dtb \

About where you added dtbs...

>   	at91-wb50n.dtb \
> -	at91-gatwick.dtb
> +	at91-gatwick.dtb \
> +	at91-dvk_som60.dtb

1/ As they are based on sama5d3, I would like to see them between 
"at91-sama5d2_xplained.dtb" and "sama5d31ek.dtb"
2/ within this range, please sort all these 4 alphabetically
3/ don't laugh at me, I try to deal with our historical way of "sorting" 
entries in this Makefile for AT91... ;-)

BTW, I realize now that your "at91-wb45n.dtb" entry from patch 1 should 
go just after the "at91-kizboxmini.dts" (alphabetical order in 
at91sam9x5 "location").


>   dtb-$(CONFIG_ARCH_ATLAS6) += \
>   	atlas6-evb.dtb
>   dtb-$(CONFIG_ARCH_ATLAS7) += \
> diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts b/arch/arm/boot/dts/at91-dvk_som60.dts
> new file mode 100644
> index 0000000..ededd5b
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_som60.dts
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +/dts-v1/;
> +#include "at91-som60.dtsi"
> +#include "at91-dvk_su60_somc.dtsi"
> +#include "at91-dvk_su60_somc_lcm.dtsi"
> +
> +/ {
> +	model = "Laird DVK SOM60";
> +	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = &dbgu;
> +		tick-timer = &pit;
> +	};
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> +
> +&ssc0 {
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +};
> +
> +&usart1 {
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&pit {
> +	status = "okay";
> +};
> +
> +&adc0 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	status = "okay";
> +};
> +
> +&macb1 {
> +	status = "okay";
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&usb1 {
> +	status = "okay";
> +};
> +
> +&usb2 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> new file mode 100644
> index 0000000..6031c2f
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> @@ -0,0 +1,159 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +
> +/ {
> +	sound {
> +		compatible = "atmel,asoc-wm8904";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
> +
> +		atmel,model = "wm8904 @ DVK-SOM60";
> +		atmel,audio-routing =
> +			"Headphone Jack", "HPOUTL",
> +			"Headphone Jack", "HPOUTR",
> +			"IN2L", "Line In Jack",
> +			"IN2R", "Line In Jack",
> +			"Mic", "MICBIAS",
> +			"IN1L", "Mic";
> +
> +		atmel,ssc-controller = <&ssc0>;
> +		atmel,audio-codec = <&wm8904>;
> +
> +		status = "okay";
> +	};
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +
> +	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
> +	slot@0 {
> +		bus-width = <4>;
> +		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
> +		cd-inverted;
> +	};
> +};
> +
> +&spi0 {
> +	status = "okay";
> +
> +	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
> +	spi-flash@0 {
> +		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
> +		spi-max-frequency = <33000000>;
> +		reg = <0>;
> +	};
> +};
> +
> +&ssc0 {
> +	atmel,clk-from-rk-pin;
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +
> +	wm8904: wm8904@1a {
> +		compatible = "wlf,wm8904";
> +		reg = <0x1a>;
> +		clocks = <&pck2>;
> +		clock-names = "mclk";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +
> +	eeprom@87 {
> +		compatible = "giantec,24c32";

It must work, however...

I read in recent patches on dts directory that :

"We now require all at24 users to use the "atmel,<model>" fallback in 
device tree for different manufacturers."

Moreover, I don't see giantec in the vendor prefix list.


> +		reg = <87>;
> +		pagesize = <32>;
> +	};
> +};
> +
> +&usart1 {
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&pit {
> +	status = "okay";
> +};
> +
> +&adc0 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	ethernet-phy@7 {
> +		reg = <7>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_geth_int>;
> +		interrupt-parent = <&pioB>;
> +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> +		txen-skew-ps = <800>;
> +		txc-skew-ps = <3000>;
> +		rxdv-skew-ps = <400>;
> +		rxc-skew-ps = <3000>;
> +		rxd0-skew-ps = <400>;
> +		rxd1-skew-ps = <400>;
> +		rxd2-skew-ps = <400>;
> +		rxd3-skew-ps = <400>;
> +	};
> +};
> +
> +&macb1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	ethernet-phy@1 {
> +		reg = <1>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_eth_int>;
> +		interrupt-parent = <&pioC>;
> +		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> +	};
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&usb1 {
> +	status = "okay";
> +};
> +
> +&usb2 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> new file mode 100644
> index 0000000..d98c644
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> @@ -0,0 +1,96 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +
> +/ {
> +	ahb {
> +		apb {
> +			pinctrl@fffff200 {
> +				board {
> +					pinctrl_lcd_ctp_int: lcd_ctp_int {
> +						 atmel,pins =
> +							 <AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
> +	backlight: backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&hlcdc_pwm 0 50000 0>;
> +		brightness-levels = <0 4 8 16 32 64 128 255>;
> +		default-brightness-level = <6>;
> +		status = "okay";
> +	};
> +
> +	panel: panel {
> +		/* Actually Winstar WF70GTIAGDNG0 */
> +		compatible = "innolux,at070tn92", "simple-panel";
> +		backlight = <&backlight>;
> +		power-supply = <&vcc_lcd_reg>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		status = "okay";
> +
> +		port@0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0>;
> +
> +			panel_input: endpoint@0 {
> +				reg = <0>;
> +				remote-endpoint = <&hlcdc_panel_output>;
> +			};
> +		};
> +	};
> +
> +	vcc_lcd_reg: fixedregulator_lcd {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC LCM";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +		status = "okay";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +
> +	ft5426@56 {
> +		/* Actually FT5426 */
> +		compatible = "edt,edt-ft5406";
> +		reg = <56>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
> +
> +		interrupt-parent = <&pioC>;
> +		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> +
> +		touchscreen-size-x = <800>;
> +		touchscreen-size-y = <480>;
> +	};
> +};
> +
> +&hlcdc {
> +	status = "okay";
> +
> +	hlcdc-display-controller {
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
> +
> +		port@0 {
> +			hlcdc_panel_output: endpoint@0 {
> +				reg = <0>;
> +				remote-endpoint = <&panel_input>;
> +			};
> +		};
> +	};
> +};
> diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-som60.dtsi
> new file mode 100644
> index 0000000..1843284
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-som60.dtsi
> @@ -0,0 +1,229 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-som60.dtsi - Device Tree file for the SOM60 module
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +#include "sama5d36.dtsi"
> +
> +/ {
> +	model = "Laird SOM60";
> +	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = &dbgu;
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x8000000>;
> +	};
> +
> +	clocks {
> +		slow_xtal {
> +			clock-frequency = <32768>;
> +		};
> +
> +		main_xtal {
> +			clock-frequency = <12000000>;
> +		};
> +	};
> +
> +	ahb {
> +		apb {
> +			pinctrl@fffff200 {
> +				board {
> +					pinctrl_mmc0_cd: mmc0_cd {
> +						atmel,pins =
> +							<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_mmc0_en: mmc0_en {
> +						atmel,pins =
> +							<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> +					};
> +
> +					pinctrl_nand0_wp: nand0_wp {
> +						atmel,pins =
> +							<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> +					};
> +
> +					pinctrl_usb_vbus: usb_vbus {
> +						atmel,pins =
> +							<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK */
> +					};
> +
> +					pinctrl_usart2_sck: usart2_sck {
> +						atmel,pins =
> +							<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
> +					};
> +
> +					pinctrl_usb_oc: usb_oc {
> +						atmel,pins =
> +							<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART3_SCK */
> +					};
> +
> +					pinctrl_usart3_sck: usart3_sck {
> +						atmel,pins =
> +							<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
> +					};
> +
> +					pinctrl_usba_vbus: usba_vbus {
> +					   atmel,pins =
> +							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_geth_int: geth_int {
> +						atmel,pins =
> +							<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART1_SCK */
> +					};
> +
> +					pinctrl_usart1_sck: usart1_sck {
> +						atmel,pins =
> +							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
> +					};
> +
> +					pinctrl_eth_int: eth_int {
> +						atmel,pins =
> +							<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
> +						atmel,pins =
> +							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&mmc0 {
> +	slot@0 {
> +		reg = <0>;
> +		bus-width = <8>;
> +	};
> +};
> +
> +&mmc1 {
> +	status = "okay";
> +	slot@0 {
> +		reg = <0>;
> +		bus-width = <4>;
> +	};
> +};
> +
> +&spi0 {
> +	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> +};
> +
> +&usart0 {
> +	atmel,use-dma-rx;
> +	atmel,use-dma-tx;
> +	status = "okay";
> +	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
> +};
> +
> +&usart1 {
> +	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> +};
> +
> +&usart2 {
> +	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
> +};
> +
> +&usart3 {
> +	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
> +};
> +
> +&adc0 {
> +	pinctrl-0 = <
> +		&pinctrl_adc0_adtrg
> +		&pinctrl_adc0_ad0
> +		&pinctrl_adc0_ad1
> +		&pinctrl_adc0_ad2
> +		&pinctrl_adc0_ad3
> +		&pinctrl_adc0_ad4
> +		&pinctrl_adc0_ad5
> +		>;
> +};
> +
> +&macb0 {
> +	phy-mode = "rgmii";
> +};
> +
> +&macb1 {
> +	phy-mode = "rmii";
> +};
> +
> +
> +&ebi {
> +	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> +
> +&nand_controller {
> +	status = "okay";
> +
> +	nand: nand@3 {
> +		reg = <0x3 0x0 0x2>;
> +		atmel,rb = <0>;
> +		nand-bus-width = <8>;
> +		nand-ecc-mode = "hw";
> +		nand-ecc-strength = <8>;
> +		nand-ecc-step-size = <512>;
> +		nand-on-flash-bbt;
> +		label = "atmel_nand";
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			ubootspl@0 {
> +				label = "u-boot-spl";
> +				reg = <0x0 0x20000>;
> +			};
> +
> +			uboot@20000 {
> +				label = "u-boot";
> +				reg = <0x20000 0x80000>;
> +			};
> +
> +			ubootenv@a0000 {
> +				label = "u-boot-env";
> +				reg = <0xa0000 0x20000>;
> +			};
> +
> +			ubootenv@c0000 {
> +				label = "u-boot-env";
> +				reg = <0xc0000 0x20000>;
> +			};
> +
> +			ubi@e0000 {
> +				label = "ubi";
> +				reg = <0xe0000 0xfe00000>;
> +			};
> +		};
> +	};
> +};
> +
> +&usb0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usba_vbus>;
> +	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&usb1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
> +	num-ports = <3>;
> +	atmel,vbus-gpio = <0
> +		&pioE 20 GPIO_ACTIVE_HIGH
> +		0>;
> +	atmel,oc-gpio = <0
> +		&pioE 15 GPIO_ACTIVE_LOW
> +		0>;
> +};
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
@ 2018-06-14 13:14     ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 13:14 UTC (permalink / raw)
  To: Ben Whitten, devicetree
  Cc: Ben Whitten, Rob Herring, Mark Rutland, Alexandre Belloni,
	linux-kernel, linux-arm-kernel

On 14/06/2018 at 10:51, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>   arch/arm/boot/dts/Makefile                    |   3 +-
>   arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
>   arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159 ++++++++++++++++++
>   arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
>   arch/arm/boot/dts/at91-som60.dtsi             | 229 ++++++++++++++++++++++++++
>   5 files changed, 581 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
>   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
>   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
>   create mode 100644 arch/arm/boot/dts/at91-som60.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 486ab59..4d3d9ca 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>   	at91-sama5d4ek.dtb \
>   	at91-vinco.dtb \

About where you added dtbs...

>   	at91-wb50n.dtb \
> -	at91-gatwick.dtb
> +	at91-gatwick.dtb \
> +	at91-dvk_som60.dtb

1/ As they are based on sama5d3, I would like to see them between 
"at91-sama5d2_xplained.dtb" and "sama5d31ek.dtb"
2/ within this range, please sort all these 4 alphabetically
3/ don't laugh at me, I try to deal with our historical way of "sorting" 
entries in this Makefile for AT91... ;-)

BTW, I realize now that your "at91-wb45n.dtb" entry from patch 1 should 
go just after the "at91-kizboxmini.dts" (alphabetical order in 
at91sam9x5 "location").


>   dtb-$(CONFIG_ARCH_ATLAS6) += \
>   	atlas6-evb.dtb
>   dtb-$(CONFIG_ARCH_ATLAS7) += \
> diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts b/arch/arm/boot/dts/at91-dvk_som60.dts
> new file mode 100644
> index 0000000..ededd5b
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_som60.dts
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +/dts-v1/;
> +#include "at91-som60.dtsi"
> +#include "at91-dvk_su60_somc.dtsi"
> +#include "at91-dvk_su60_somc_lcm.dtsi"
> +
> +/ {
> +	model = "Laird DVK SOM60";
> +	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = &dbgu;
> +		tick-timer = &pit;
> +	};
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> +
> +&ssc0 {
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +};
> +
> +&usart1 {
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&pit {
> +	status = "okay";
> +};
> +
> +&adc0 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	status = "okay";
> +};
> +
> +&macb1 {
> +	status = "okay";
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&usb1 {
> +	status = "okay";
> +};
> +
> +&usb2 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> new file mode 100644
> index 0000000..6031c2f
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> @@ -0,0 +1,159 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +
> +/ {
> +	sound {
> +		compatible = "atmel,asoc-wm8904";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
> +
> +		atmel,model = "wm8904 @ DVK-SOM60";
> +		atmel,audio-routing =
> +			"Headphone Jack", "HPOUTL",
> +			"Headphone Jack", "HPOUTR",
> +			"IN2L", "Line In Jack",
> +			"IN2R", "Line In Jack",
> +			"Mic", "MICBIAS",
> +			"IN1L", "Mic";
> +
> +		atmel,ssc-controller = <&ssc0>;
> +		atmel,audio-codec = <&wm8904>;
> +
> +		status = "okay";
> +	};
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +
> +	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
> +	slot@0 {
> +		bus-width = <4>;
> +		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
> +		cd-inverted;
> +	};
> +};
> +
> +&spi0 {
> +	status = "okay";
> +
> +	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
> +	spi-flash@0 {
> +		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
> +		spi-max-frequency = <33000000>;
> +		reg = <0>;
> +	};
> +};
> +
> +&ssc0 {
> +	atmel,clk-from-rk-pin;
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +
> +	wm8904: wm8904@1a {
> +		compatible = "wlf,wm8904";
> +		reg = <0x1a>;
> +		clocks = <&pck2>;
> +		clock-names = "mclk";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +
> +	eeprom@87 {
> +		compatible = "giantec,24c32";

It must work, however...

I read in recent patches on dts directory that :

"We now require all at24 users to use the "atmel,<model>" fallback in 
device tree for different manufacturers."

Moreover, I don't see giantec in the vendor prefix list.


> +		reg = <87>;
> +		pagesize = <32>;
> +	};
> +};
> +
> +&usart1 {
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&pit {
> +	status = "okay";
> +};
> +
> +&adc0 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	ethernet-phy@7 {
> +		reg = <7>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_geth_int>;
> +		interrupt-parent = <&pioB>;
> +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> +		txen-skew-ps = <800>;
> +		txc-skew-ps = <3000>;
> +		rxdv-skew-ps = <400>;
> +		rxc-skew-ps = <3000>;
> +		rxd0-skew-ps = <400>;
> +		rxd1-skew-ps = <400>;
> +		rxd2-skew-ps = <400>;
> +		rxd3-skew-ps = <400>;
> +	};
> +};
> +
> +&macb1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	ethernet-phy@1 {
> +		reg = <1>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_eth_int>;
> +		interrupt-parent = <&pioC>;
> +		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> +	};
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&usb1 {
> +	status = "okay";
> +};
> +
> +&usb2 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> new file mode 100644
> index 0000000..d98c644
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> @@ -0,0 +1,96 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +
> +/ {
> +	ahb {
> +		apb {
> +			pinctrl@fffff200 {
> +				board {
> +					pinctrl_lcd_ctp_int: lcd_ctp_int {
> +						 atmel,pins =
> +							 <AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
> +	backlight: backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&hlcdc_pwm 0 50000 0>;
> +		brightness-levels = <0 4 8 16 32 64 128 255>;
> +		default-brightness-level = <6>;
> +		status = "okay";
> +	};
> +
> +	panel: panel {
> +		/* Actually Winstar WF70GTIAGDNG0 */
> +		compatible = "innolux,at070tn92", "simple-panel";
> +		backlight = <&backlight>;
> +		power-supply = <&vcc_lcd_reg>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		status = "okay";
> +
> +		port@0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0>;
> +
> +			panel_input: endpoint@0 {
> +				reg = <0>;
> +				remote-endpoint = <&hlcdc_panel_output>;
> +			};
> +		};
> +	};
> +
> +	vcc_lcd_reg: fixedregulator_lcd {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC LCM";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +		status = "okay";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +
> +	ft5426@56 {
> +		/* Actually FT5426 */
> +		compatible = "edt,edt-ft5406";
> +		reg = <56>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
> +
> +		interrupt-parent = <&pioC>;
> +		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> +
> +		touchscreen-size-x = <800>;
> +		touchscreen-size-y = <480>;
> +	};
> +};
> +
> +&hlcdc {
> +	status = "okay";
> +
> +	hlcdc-display-controller {
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
> +
> +		port@0 {
> +			hlcdc_panel_output: endpoint@0 {
> +				reg = <0>;
> +				remote-endpoint = <&panel_input>;
> +			};
> +		};
> +	};
> +};
> diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-som60.dtsi
> new file mode 100644
> index 0000000..1843284
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-som60.dtsi
> @@ -0,0 +1,229 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-som60.dtsi - Device Tree file for the SOM60 module
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +#include "sama5d36.dtsi"
> +
> +/ {
> +	model = "Laird SOM60";
> +	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = &dbgu;
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x8000000>;
> +	};
> +
> +	clocks {
> +		slow_xtal {
> +			clock-frequency = <32768>;
> +		};
> +
> +		main_xtal {
> +			clock-frequency = <12000000>;
> +		};
> +	};
> +
> +	ahb {
> +		apb {
> +			pinctrl@fffff200 {
> +				board {
> +					pinctrl_mmc0_cd: mmc0_cd {
> +						atmel,pins =
> +							<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_mmc0_en: mmc0_en {
> +						atmel,pins =
> +							<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> +					};
> +
> +					pinctrl_nand0_wp: nand0_wp {
> +						atmel,pins =
> +							<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> +					};
> +
> +					pinctrl_usb_vbus: usb_vbus {
> +						atmel,pins =
> +							<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK */
> +					};
> +
> +					pinctrl_usart2_sck: usart2_sck {
> +						atmel,pins =
> +							<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
> +					};
> +
> +					pinctrl_usb_oc: usb_oc {
> +						atmel,pins =
> +							<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART3_SCK */
> +					};
> +
> +					pinctrl_usart3_sck: usart3_sck {
> +						atmel,pins =
> +							<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
> +					};
> +
> +					pinctrl_usba_vbus: usba_vbus {
> +					   atmel,pins =
> +							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_geth_int: geth_int {
> +						atmel,pins =
> +							<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART1_SCK */
> +					};
> +
> +					pinctrl_usart1_sck: usart1_sck {
> +						atmel,pins =
> +							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
> +					};
> +
> +					pinctrl_eth_int: eth_int {
> +						atmel,pins =
> +							<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
> +						atmel,pins =
> +							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&mmc0 {
> +	slot@0 {
> +		reg = <0>;
> +		bus-width = <8>;
> +	};
> +};
> +
> +&mmc1 {
> +	status = "okay";
> +	slot@0 {
> +		reg = <0>;
> +		bus-width = <4>;
> +	};
> +};
> +
> +&spi0 {
> +	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> +};
> +
> +&usart0 {
> +	atmel,use-dma-rx;
> +	atmel,use-dma-tx;
> +	status = "okay";
> +	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
> +};
> +
> +&usart1 {
> +	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> +};
> +
> +&usart2 {
> +	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
> +};
> +
> +&usart3 {
> +	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
> +};
> +
> +&adc0 {
> +	pinctrl-0 = <
> +		&pinctrl_adc0_adtrg
> +		&pinctrl_adc0_ad0
> +		&pinctrl_adc0_ad1
> +		&pinctrl_adc0_ad2
> +		&pinctrl_adc0_ad3
> +		&pinctrl_adc0_ad4
> +		&pinctrl_adc0_ad5
> +		>;
> +};
> +
> +&macb0 {
> +	phy-mode = "rgmii";
> +};
> +
> +&macb1 {
> +	phy-mode = "rmii";
> +};
> +
> +
> +&ebi {
> +	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> +
> +&nand_controller {
> +	status = "okay";
> +
> +	nand: nand@3 {
> +		reg = <0x3 0x0 0x2>;
> +		atmel,rb = <0>;
> +		nand-bus-width = <8>;
> +		nand-ecc-mode = "hw";
> +		nand-ecc-strength = <8>;
> +		nand-ecc-step-size = <512>;
> +		nand-on-flash-bbt;
> +		label = "atmel_nand";
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			ubootspl@0 {
> +				label = "u-boot-spl";
> +				reg = <0x0 0x20000>;
> +			};
> +
> +			uboot@20000 {
> +				label = "u-boot";
> +				reg = <0x20000 0x80000>;
> +			};
> +
> +			ubootenv@a0000 {
> +				label = "u-boot-env";
> +				reg = <0xa0000 0x20000>;
> +			};
> +
> +			ubootenv@c0000 {
> +				label = "u-boot-env";
> +				reg = <0xc0000 0x20000>;
> +			};
> +
> +			ubi@e0000 {
> +				label = "ubi";
> +				reg = <0xe0000 0xfe00000>;
> +			};
> +		};
> +	};
> +};
> +
> +&usb0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usba_vbus>;
> +	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&usb1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
> +	num-ports = <3>;
> +	atmel,vbus-gpio = <0
> +		&pioE 20 GPIO_ACTIVE_HIGH
> +		0>;
> +	atmel,oc-gpio = <0
> +		&pioE 15 GPIO_ACTIVE_LOW
> +		0>;
> +};
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
@ 2018-06-14 13:14     ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-14 13:14 UTC (permalink / raw)
  To: linux-arm-kernel

On 14/06/2018 at 10:51, Ben Whitten wrote:
> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> ---
>   arch/arm/boot/dts/Makefile                    |   3 +-
>   arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
>   arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159 ++++++++++++++++++
>   arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
>   arch/arm/boot/dts/at91-som60.dtsi             | 229 ++++++++++++++++++++++++++
>   5 files changed, 581 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
>   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
>   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
>   create mode 100644 arch/arm/boot/dts/at91-som60.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 486ab59..4d3d9ca 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
>   	at91-sama5d4ek.dtb \
>   	at91-vinco.dtb \

About where you added dtbs...

>   	at91-wb50n.dtb \
> -	at91-gatwick.dtb
> +	at91-gatwick.dtb \
> +	at91-dvk_som60.dtb

1/ As they are based on sama5d3, I would like to see them between 
"at91-sama5d2_xplained.dtb" and "sama5d31ek.dtb"
2/ within this range, please sort all these 4 alphabetically
3/ don't laugh at me, I try to deal with our historical way of "sorting" 
entries in this Makefile for AT91... ;-)

BTW, I realize now that your "at91-wb45n.dtb" entry from patch 1 should 
go just after the "at91-kizboxmini.dts" (alphabetical order in 
at91sam9x5 "location").


>   dtb-$(CONFIG_ARCH_ATLAS6) += \
>   	atlas6-evb.dtb
>   dtb-$(CONFIG_ARCH_ATLAS7) += \
> diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts b/arch/arm/boot/dts/at91-dvk_som60.dts
> new file mode 100644
> index 0000000..ededd5b
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_som60.dts
> @@ -0,0 +1,95 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +/dts-v1/;
> +#include "at91-som60.dtsi"
> +#include "at91-dvk_su60_somc.dtsi"
> +#include "at91-dvk_su60_somc_lcm.dtsi"
> +
> +/ {
> +	model = "Laird DVK SOM60";
> +	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = &dbgu;
> +		tick-timer = &pit;
> +	};
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +};
> +
> +&spi0 {
> +	status = "okay";
> +};
> +
> +&ssc0 {
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +};
> +
> +&usart1 {
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&pit {
> +	status = "okay";
> +};
> +
> +&adc0 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	status = "okay";
> +};
> +
> +&macb1 {
> +	status = "okay";
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&usb1 {
> +	status = "okay";
> +};
> +
> +&usb2 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> new file mode 100644
> index 0000000..6031c2f
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> @@ -0,0 +1,159 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +
> +/ {
> +	sound {
> +		compatible = "atmel,asoc-wm8904";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
> +
> +		atmel,model = "wm8904 @ DVK-SOM60";
> +		atmel,audio-routing =
> +			"Headphone Jack", "HPOUTL",
> +			"Headphone Jack", "HPOUTR",
> +			"IN2L", "Line In Jack",
> +			"IN2R", "Line In Jack",
> +			"Mic", "MICBIAS",
> +			"IN1L", "Mic";
> +
> +		atmel,ssc-controller = <&ssc0>;
> +		atmel,audio-codec = <&wm8904>;
> +
> +		status = "okay";
> +	};
> +};
> +
> +&mmc0 {
> +	status = "okay";
> +
> +	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
> +	slot at 0 {
> +		bus-width = <4>;
> +		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
> +		cd-inverted;
> +	};
> +};
> +
> +&spi0 {
> +	status = "okay";
> +
> +	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
> +	spi-flash at 0 {
> +		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
> +		spi-max-frequency = <33000000>;
> +		reg = <0>;
> +	};
> +};
> +
> +&ssc0 {
> +	atmel,clk-from-rk-pin;
> +	status = "okay";
> +};
> +
> +&i2c0 {
> +	status = "okay";
> +
> +	wm8904: wm8904 at 1a {
> +		compatible = "wlf,wm8904";
> +		reg = <0x1a>;
> +		clocks = <&pck2>;
> +		clock-names = "mclk";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +
> +	eeprom at 87 {
> +		compatible = "giantec,24c32";

It must work, however...

I read in recent patches on dts directory that :

"We now require all at24 users to use the "atmel,<model>" fallback in 
device tree for different manufacturers."

Moreover, I don't see giantec in the vendor prefix list.


> +		reg = <87>;
> +		pagesize = <32>;
> +	};
> +};
> +
> +&usart1 {
> +	status = "okay";
> +};
> +
> +&usart2 {
> +	status = "okay";
> +};
> +
> +&usart3 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&dbgu {
> +	status = "okay";
> +};
> +
> +&pit {
> +	status = "okay";
> +};
> +
> +&adc0 {
> +	status = "okay";
> +};
> +
> +&can1 {
> +	status = "okay";
> +};
> +
> +&macb0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	ethernet-phy at 7 {
> +		reg = <7>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_geth_int>;
> +		interrupt-parent = <&pioB>;
> +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> +		txen-skew-ps = <800>;
> +		txc-skew-ps = <3000>;
> +		rxdv-skew-ps = <400>;
> +		rxc-skew-ps = <3000>;
> +		rxd0-skew-ps = <400>;
> +		rxd1-skew-ps = <400>;
> +		rxd2-skew-ps = <400>;
> +		rxd3-skew-ps = <400>;
> +	};
> +};
> +
> +&macb1 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	status = "okay";
> +
> +	ethernet-phy at 1 {
> +		reg = <1>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_eth_int>;
> +		interrupt-parent = <&pioC>;
> +		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> +	};
> +};
> +
> +&usb0 {
> +	status = "okay";
> +};
> +
> +&usb1 {
> +	status = "okay";
> +};
> +
> +&usb2 {
> +	status = "okay";
> +};
> +
> diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> new file mode 100644
> index 0000000..d98c644
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> @@ -0,0 +1,96 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +
> +/ {
> +	ahb {
> +		apb {
> +			pinctrl at fffff200 {
> +				board {
> +					pinctrl_lcd_ctp_int: lcd_ctp_int {
> +						 atmel,pins =
> +							 <AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
> +	backlight: backlight {
> +		compatible = "pwm-backlight";
> +		pwms = <&hlcdc_pwm 0 50000 0>;
> +		brightness-levels = <0 4 8 16 32 64 128 255>;
> +		default-brightness-level = <6>;
> +		status = "okay";
> +	};
> +
> +	panel: panel {
> +		/* Actually Winstar WF70GTIAGDNG0 */
> +		compatible = "innolux,at070tn92", "simple-panel";
> +		backlight = <&backlight>;
> +		power-supply = <&vcc_lcd_reg>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		status = "okay";
> +
> +		port at 0 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0>;
> +
> +			panel_input: endpoint at 0 {
> +				reg = <0>;
> +				remote-endpoint = <&hlcdc_panel_output>;
> +			};
> +		};
> +	};
> +
> +	vcc_lcd_reg: fixedregulator_lcd {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VCC LCM";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +		status = "okay";
> +	};
> +};
> +
> +&i2c1 {
> +	status = "okay";
> +
> +	ft5426 at 56 {
> +		/* Actually FT5426 */
> +		compatible = "edt,edt-ft5406";
> +		reg = <56>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
> +
> +		interrupt-parent = <&pioC>;
> +		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> +
> +		touchscreen-size-x = <800>;
> +		touchscreen-size-y = <480>;
> +	};
> +};
> +
> +&hlcdc {
> +	status = "okay";
> +
> +	hlcdc-display-controller {
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
> +
> +		port at 0 {
> +			hlcdc_panel_output: endpoint at 0 {
> +				reg = <0>;
> +				remote-endpoint = <&panel_input>;
> +			};
> +		};
> +	};
> +};
> diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-som60.dtsi
> new file mode 100644
> index 0000000..1843284
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91-som60.dtsi
> @@ -0,0 +1,229 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * at91-som60.dtsi - Device Tree file for the SOM60 module
> + *
> + *  Copyright (C) 2018 Laird,
> + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> + *
> + */
> +#include "sama5d36.dtsi"
> +
> +/ {
> +	model = "Laird SOM60";
> +	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
> +
> +	chosen {
> +		stdout-path = &dbgu;
> +	};
> +
> +	memory {
> +		reg = <0x20000000 0x8000000>;
> +	};
> +
> +	clocks {
> +		slow_xtal {
> +			clock-frequency = <32768>;
> +		};
> +
> +		main_xtal {
> +			clock-frequency = <12000000>;
> +		};
> +	};
> +
> +	ahb {
> +		apb {
> +			pinctrl at fffff200 {
> +				board {
> +					pinctrl_mmc0_cd: mmc0_cd {
> +						atmel,pins =
> +							<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_mmc0_en: mmc0_en {
> +						atmel,pins =
> +							<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> +					};
> +
> +					pinctrl_nand0_wp: nand0_wp {
> +						atmel,pins =
> +							<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> +					};
> +
> +					pinctrl_usb_vbus: usb_vbus {
> +						atmel,pins =
> +							<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK */
> +					};
> +
> +					pinctrl_usart2_sck: usart2_sck {
> +						atmel,pins =
> +							<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
> +					};
> +
> +					pinctrl_usb_oc: usb_oc {
> +						atmel,pins =
> +							<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART3_SCK */
> +					};
> +
> +					pinctrl_usart3_sck: usart3_sck {
> +						atmel,pins =
> +							<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
> +					};
> +
> +					pinctrl_usba_vbus: usba_vbus {
> +					   atmel,pins =
> +							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_geth_int: geth_int {
> +						atmel,pins =
> +							<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with USART1_SCK */
> +					};
> +
> +					pinctrl_usart1_sck: usart1_sck {
> +						atmel,pins =
> +							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
> +					};
> +
> +					pinctrl_eth_int: eth_int {
> +						atmel,pins =
> +							<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> +					};
> +
> +					pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
> +						atmel,pins =
> +							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&mmc0 {
> +	slot at 0 {
> +		reg = <0>;
> +		bus-width = <8>;
> +	};
> +};
> +
> +&mmc1 {
> +	status = "okay";
> +	slot at 0 {
> +		reg = <0>;
> +		bus-width = <4>;
> +	};
> +};
> +
> +&spi0 {
> +	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> +};
> +
> +&usart0 {
> +	atmel,use-dma-rx;
> +	atmel,use-dma-tx;
> +	status = "okay";
> +	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
> +};
> +
> +&usart1 {
> +	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> +};
> +
> +&usart2 {
> +	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
> +};
> +
> +&usart3 {
> +	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
> +};
> +
> +&adc0 {
> +	pinctrl-0 = <
> +		&pinctrl_adc0_adtrg
> +		&pinctrl_adc0_ad0
> +		&pinctrl_adc0_ad1
> +		&pinctrl_adc0_ad2
> +		&pinctrl_adc0_ad3
> +		&pinctrl_adc0_ad4
> +		&pinctrl_adc0_ad5
> +		>;
> +};
> +
> +&macb0 {
> +	phy-mode = "rgmii";
> +};
> +
> +&macb1 {
> +	phy-mode = "rmii";
> +};
> +
> +
> +&ebi {
> +	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
> +	pinctrl-names = "default";
> +	status = "okay";
> +};
> +
> +&nand_controller {
> +	status = "okay";
> +
> +	nand: nand at 3 {
> +		reg = <0x3 0x0 0x2>;
> +		atmel,rb = <0>;
> +		nand-bus-width = <8>;
> +		nand-ecc-mode = "hw";
> +		nand-ecc-strength = <8>;
> +		nand-ecc-step-size = <512>;
> +		nand-on-flash-bbt;
> +		label = "atmel_nand";
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			ubootspl at 0 {
> +				label = "u-boot-spl";
> +				reg = <0x0 0x20000>;
> +			};
> +
> +			uboot at 20000 {
> +				label = "u-boot";
> +				reg = <0x20000 0x80000>;
> +			};
> +
> +			ubootenv at a0000 {
> +				label = "u-boot-env";
> +				reg = <0xa0000 0x20000>;
> +			};
> +
> +			ubootenv at c0000 {
> +				label = "u-boot-env";
> +				reg = <0xc0000 0x20000>;
> +			};
> +
> +			ubi at e0000 {
> +				label = "ubi";
> +				reg = <0xe0000 0xfe00000>;
> +			};
> +		};
> +	};
> +};
> +
> +&usb0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usba_vbus>;
> +	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
> +};
> +
> +&usb1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
> +	num-ports = <3>;
> +	atmel,vbus-gpio = <0
> +		&pioE 20 GPIO_ACTIVE_HIGH
> +		0>;
> +	atmel,oc-gpio = <0
> +		&pioE 15 GPIO_ACTIVE_LOW
> +		0>;
> +};
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* RE: [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
  2018-06-14 13:14     ` Nicolas Ferre
  (?)
@ 2018-06-15  8:57       ` Ben Whitten
  -1 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-15  8:57 UTC (permalink / raw)
  To: Nicolas Ferre, Ben Whitten, devicetree, Alexandre Belloni
  Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel

Thanks all for the reviews and comments, I will work on a new series.

> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >   arch/arm/boot/dts/Makefile                    |   3 +-
> >   arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
> >   arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159
> ++++++++++++++++++
> >   arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
> >   arch/arm/boot/dts/at91-som60.dtsi             | 229
> ++++++++++++++++++++++++++
> >   5 files changed, 581 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> >   create mode 100644 arch/arm/boot/dts/at91-som60.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 486ab59..4d3d9ca 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
> >   	at91-sama5d4ek.dtb \
> >   	at91-vinco.dtb \
> 
> About where you added dtbs...
> 
> >   	at91-wb50n.dtb \
> > -	at91-gatwick.dtb
> > +	at91-gatwick.dtb \
> > +	at91-dvk_som60.dtb
> 
> 1/ As they are based on sama5d3, I would like to see them between
> "at91-sama5d2_xplained.dtb" and "sama5d31ek.dtb"
> 2/ within this range, please sort all these 4 alphabetically
> 3/ don't laugh at me, I try to deal with our historical way of "sorting"
> entries in this Makefile for AT91... ;-)
> 
> BTW, I realize now that your "at91-wb45n.dtb" entry from patch 1 should
> go just after the "at91-kizboxmini.dts" (alphabetical order in
> at91sam9x5 "location").
> 
> 
> >   dtb-$(CONFIG_ARCH_ATLAS6) += \
> >   	atlas6-evb.dtb
> >   dtb-$(CONFIG_ARCH_ATLAS7) += \
> > diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts
> b/arch/arm/boot/dts/at91-dvk_som60.dts
> > new file mode 100644
> > index 0000000..ededd5b
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_som60.dts
> > @@ -0,0 +1,95 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +/dts-v1/;
> > +#include "at91-som60.dtsi"
> > +#include "at91-dvk_su60_somc.dtsi"
> > +#include "at91-dvk_su60_somc_lcm.dtsi"
> > +
> > +/ {
> > +	model = "Laird DVK SOM60";
> > +	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36",
> "atmel,sama5d3", "atmel,sama5";
> > +
> > +	chosen {
> > +		stdout-path = &dbgu;
> > +		tick-timer = &pit;
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +};
> > +
> > +&ssc0 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart2 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&pit {
> > +	status = "okay";
> > +};
> > +
> > +&adc0 {
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	status = "okay";
> > +};
> > +
> > +&macb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&usb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb2 {
> > +	status = "okay";
> > +};
> > +
> > diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> > new file mode 100644
> > index 0000000..6031c2f
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> > @@ -0,0 +1,159 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base
> board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +
> > +/ {
> > +	sound {
> > +		compatible = "atmel,asoc-wm8904";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
> > +
> > +		atmel,model = "wm8904 @ DVK-SOM60";
> > +		atmel,audio-routing =
> > +			"Headphone Jack", "HPOUTL",
> > +			"Headphone Jack", "HPOUTR",
> > +			"IN2L", "Line In Jack",
> > +			"IN2R", "Line In Jack",
> > +			"Mic", "MICBIAS",
> > +			"IN1L", "Mic";
> > +
> > +		atmel,ssc-controller = <&ssc0>;
> > +		atmel,audio-codec = <&wm8904>;
> > +
> > +		status = "okay";
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +
> > +	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3
> &pinctrl_mmc0_cd>;
> > +	slot@0 {
> > +		bus-width = <4>;
> > +		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
> > +		cd-inverted;
> > +	};
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +
> > +	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
> > +	spi-flash@0 {
> > +		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
> > +		spi-max-frequency = <33000000>;
> > +		reg = <0>;
> > +	};
> > +};
> > +
> > +&ssc0 {
> > +	atmel,clk-from-rk-pin;
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	status = "okay";
> > +
> > +	wm8904: wm8904@1a {
> > +		compatible = "wlf,wm8904";
> > +		reg = <0x1a>;
> > +		clocks = <&pck2>;
> > +		clock-names = "mclk";
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +
> > +	eeprom@87 {
> > +		compatible = "giantec,24c32";
> 
> It must work, however...
> 
> I read in recent patches on dts directory that :
> 
> "We now require all at24 users to use the "atmel,<model>" fallback in
> device tree for different manufacturers."
> 
> Moreover, I don't see giantec in the vendor prefix list.

I see, I have added parts which are compatible and made note what the real
part is, should I typically be adding the real part to the compatible list and
update vendor prefixes if necessary?

> 
> > +		reg = <87>;
> > +		pagesize = <32>;
> > +	};
> > +};
> > +
> > +&usart1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart2 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&pit {
> > +	status = "okay";
> > +};
> > +
> > +&adc0 {
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	status = "okay";
> > +
> > +	ethernet-phy@7 {
> > +		reg = <7>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_geth_int>;
> > +		interrupt-parent = <&pioB>;
> > +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> > +		txen-skew-ps = <800>;
> > +		txc-skew-ps = <3000>;
> > +		rxdv-skew-ps = <400>;
> > +		rxc-skew-ps = <3000>;
> > +		rxd0-skew-ps = <400>;
> > +		rxd1-skew-ps = <400>;
> > +		rxd2-skew-ps = <400>;
> > +		rxd3-skew-ps = <400>;
> > +	};
> > +};
> > +
> > +&macb1 {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	status = "okay";
> > +
> > +	ethernet-phy@1 {
> > +		reg = <1>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_eth_int>;
> > +		interrupt-parent = <&pioC>;
> > +		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&usb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb2 {
> > +	status = "okay";
> > +};
> > +
> > diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> > new file mode 100644
> > index 0000000..d98c644
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> > @@ -0,0 +1,96 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD
> board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +
> > +/ {
> > +	ahb {
> > +		apb {
> > +			pinctrl@fffff200 {
> > +				board {
> > +					pinctrl_lcd_ctp_int: lcd_ctp_int {
> > +						 atmel,pins =
> > +							 <AT91_PIOC 28
> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
> > +					};
> > +				};
> > +			};
> > +		};
> > +	};
> > +
> > +	backlight: backlight {
> > +		compatible = "pwm-backlight";
> > +		pwms = <&hlcdc_pwm 0 50000 0>;
> > +		brightness-levels = <0 4 8 16 32 64 128 255>;
> > +		default-brightness-level = <6>;
> > +		status = "okay";
> > +	};
> > +
> > +	panel: panel {
> > +		/* Actually Winstar WF70GTIAGDNG0 */
> > +		compatible = "innolux,at070tn92", "simple-panel";
> > +		backlight = <&backlight>;
> > +		power-supply = <&vcc_lcd_reg>;
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		status = "okay";
> > +
> > +		port@0 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			reg = <0>;
> > +
> > +			panel_input: endpoint@0 {
> > +				reg = <0>;
> > +				remote-endpoint = <&hlcdc_panel_output>;
> > +			};
> > +		};
> > +	};
> > +
> > +	vcc_lcd_reg: fixedregulator_lcd {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "VCC LCM";
> > +		regulator-min-microvolt = <5000000>;
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +		status = "okay";
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +
> > +	ft5426@56 {
> > +		/* Actually FT5426 */
> > +		compatible = "edt,edt-ft5406";
> > +		reg = <56>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
> > +
> > +		interrupt-parent = <&pioC>;
> > +		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> > +
> > +		touchscreen-size-x = <800>;
> > +		touchscreen-size-y = <480>;
> > +	};
> > +};
> > +
> > +&hlcdc {
> > +	status = "okay";
> > +
> > +	hlcdc-display-controller {
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
> > +
> > +		port@0 {
> > +			hlcdc_panel_output: endpoint@0 {
> > +				reg = <0>;
> > +				remote-endpoint = <&panel_input>;
> > +			};
> > +		};
> > +	};
> > +};
> > diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-
> som60.dtsi
> > new file mode 100644
> > index 0000000..1843284
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-som60.dtsi
> > @@ -0,0 +1,229 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-som60.dtsi - Device Tree file for the SOM60 module
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +#include "sama5d36.dtsi"
> > +
> > +/ {
> > +	model = "Laird SOM60";
> > +	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3",
> "atmel,sama5";
> > +
> > +	chosen {
> > +		stdout-path = &dbgu;
> > +	};
> > +
> > +	memory {
> > +		reg = <0x20000000 0x8000000>;
> > +	};
> > +
> > +	clocks {
> > +		slow_xtal {
> > +			clock-frequency = <32768>;
> > +		};
> > +
> > +		main_xtal {
> > +			clock-frequency = <12000000>;
> > +		};
> > +	};
> > +
> > +	ahb {
> > +		apb {
> > +			pinctrl@fffff200 {
> > +				board {
> > +					pinctrl_mmc0_cd: mmc0_cd {
> > +						atmel,pins =
> > +							<AT91_PIOE 31
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_mmc0_en: mmc0_en {
> > +						atmel,pins =
> > +							<AT91_PIOE 30
> AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> > +					};
> > +
> > +					pinctrl_nand0_wp: nand0_wp {
> > +						atmel,pins =
> > +							<AT91_PIOE 14
> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> > +					};
> > +
> > +					pinctrl_usb_vbus: usb_vbus {
> > +						atmel,pins =
> > +							<AT91_PIOE 20
> AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK
> */
> > +					};
> > +
> > +					pinctrl_usart2_sck: usart2_sck {
> > +						atmel,pins =
> > +							<AT91_PIOE 20
> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
> > +					};
> > +
> > +					pinctrl_usb_oc: usb_oc {
> > +						atmel,pins =
> > +							<AT91_PIOE 15
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with
> USART3_SCK */
> > +					};
> > +
> > +					pinctrl_usart3_sck: usart3_sck {
> > +						atmel,pins =
> > +							<AT91_PIOE 15
> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
> > +					};
> > +
> > +					pinctrl_usba_vbus: usba_vbus {
> > +					   atmel,pins =
> > +							<AT91_PIOC 14
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_geth_int: geth_int {
> > +						atmel,pins =
> > +							<AT91_PIOB 25
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with
> USART1_SCK */
> > +					};
> > +
> > +					pinctrl_usart1_sck: usart1_sck {
> > +						atmel,pins =
> > +							<AT91_PIOB 25
> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
> > +					};
> > +
> > +					pinctrl_eth_int: eth_int {
> > +						atmel,pins =
> > +							<AT91_PIOC 10
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_pck2_as_audio_mck:
> pck2_as_audio_mck {
> > +						atmel,pins =
> > +							<AT91_PIOC 15
> AT91_PERIPH_B AT91_PINCTRL_NONE>;
> > +					};
> > +				};
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	slot@0 {
> > +		reg = <0>;
> > +		bus-width = <8>;
> > +	};
> > +};
> > +
> > +&mmc1 {
> > +	status = "okay";
> > +	slot@0 {
> > +		reg = <0>;
> > +		bus-width = <4>;
> > +	};
> > +};
> > +
> > +&spi0 {
> > +	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> > +};
> > +
> > +&usart0 {
> > +	atmel,use-dma-rx;
> > +	atmel,use-dma-tx;
> > +	status = "okay";
> > +	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
> > +};
> > +
> > +&usart1 {
> > +	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> > +};
> > +
> > +&usart2 {
> > +	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
> > +};
> > +
> > +&usart3 {
> > +	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
> > +};
> > +
> > +&adc0 {
> > +	pinctrl-0 = <
> > +		&pinctrl_adc0_adtrg
> > +		&pinctrl_adc0_ad0
> > +		&pinctrl_adc0_ad1
> > +		&pinctrl_adc0_ad2
> > +		&pinctrl_adc0_ad3
> > +		&pinctrl_adc0_ad4
> > +		&pinctrl_adc0_ad5
> > +		>;
> > +};
> > +
> > +&macb0 {
> > +	phy-mode = "rgmii";
> > +};
> > +
> > +&macb1 {
> > +	phy-mode = "rmii";
> > +};
> > +
> > +
> > +&ebi {
> > +	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
> > +	pinctrl-names = "default";
> > +	status = "okay";
> > +};
> > +
> > +&nand_controller {
> > +	status = "okay";
> > +
> > +	nand: nand@3 {
> > +		reg = <0x3 0x0 0x2>;
> > +		atmel,rb = <0>;
> > +		nand-bus-width = <8>;
> > +		nand-ecc-mode = "hw";
> > +		nand-ecc-strength = <8>;
> > +		nand-ecc-step-size = <512>;
> > +		nand-on-flash-bbt;
> > +		label = "atmel_nand";
> > +
> > +		partitions {
> > +			compatible = "fixed-partitions";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +
> > +			ubootspl@0 {
> > +				label = "u-boot-spl";
> > +				reg = <0x0 0x20000>;
> > +			};
> > +
> > +			uboot@20000 {
> > +				label = "u-boot";
> > +				reg = <0x20000 0x80000>;
> > +			};
> > +
> > +			ubootenv@a0000 {
> > +				label = "u-boot-env";
> > +				reg = <0xa0000 0x20000>;
> > +			};
> > +
> > +			ubootenv@c0000 {
> > +				label = "u-boot-env";
> > +				reg = <0xc0000 0x20000>;
> > +			};
> > +
> > +			ubi@e0000 {
> > +				label = "ubi";
> > +				reg = <0xe0000 0xfe00000>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usba_vbus>;
> > +	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > +&usb1 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
> > +	num-ports = <3>;
> > +	atmel,vbus-gpio = <0
> > +		&pioE 20 GPIO_ACTIVE_HIGH
> > +		0>;
> > +	atmel,oc-gpio = <0
> > +		&pioE 15 GPIO_ACTIVE_LOW
> > +		0>;
> > +};
> >
> 
> 
> --
> Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* RE: [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
@ 2018-06-15  8:57       ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-15  8:57 UTC (permalink / raw)
  To: Nicolas Ferre, Ben Whitten, devicetree, Alexandre Belloni
  Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel

Thanks all for the reviews and comments, I will work on a new series.

> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >   arch/arm/boot/dts/Makefile                    |   3 +-
> >   arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
> >   arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159
> ++++++++++++++++++
> >   arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
> >   arch/arm/boot/dts/at91-som60.dtsi             | 229
> ++++++++++++++++++++++++++
> >   5 files changed, 581 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> >   create mode 100644 arch/arm/boot/dts/at91-som60.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 486ab59..4d3d9ca 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
> >   	at91-sama5d4ek.dtb \
> >   	at91-vinco.dtb \
> 
> About where you added dtbs...
> 
> >   	at91-wb50n.dtb \
> > -	at91-gatwick.dtb
> > +	at91-gatwick.dtb \
> > +	at91-dvk_som60.dtb
> 
> 1/ As they are based on sama5d3, I would like to see them between
> "at91-sama5d2_xplained.dtb" and "sama5d31ek.dtb"
> 2/ within this range, please sort all these 4 alphabetically
> 3/ don't laugh at me, I try to deal with our historical way of "sorting"
> entries in this Makefile for AT91... ;-)
> 
> BTW, I realize now that your "at91-wb45n.dtb" entry from patch 1 should
> go just after the "at91-kizboxmini.dts" (alphabetical order in
> at91sam9x5 "location").
> 
> 
> >   dtb-$(CONFIG_ARCH_ATLAS6) += \
> >   	atlas6-evb.dtb
> >   dtb-$(CONFIG_ARCH_ATLAS7) += \
> > diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts
> b/arch/arm/boot/dts/at91-dvk_som60.dts
> > new file mode 100644
> > index 0000000..ededd5b
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_som60.dts
> > @@ -0,0 +1,95 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +/dts-v1/;
> > +#include "at91-som60.dtsi"
> > +#include "at91-dvk_su60_somc.dtsi"
> > +#include "at91-dvk_su60_somc_lcm.dtsi"
> > +
> > +/ {
> > +	model = "Laird DVK SOM60";
> > +	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36",
> "atmel,sama5d3", "atmel,sama5";
> > +
> > +	chosen {
> > +		stdout-path = &dbgu;
> > +		tick-timer = &pit;
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +};
> > +
> > +&ssc0 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart2 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&pit {
> > +	status = "okay";
> > +};
> > +
> > +&adc0 {
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	status = "okay";
> > +};
> > +
> > +&macb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&usb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb2 {
> > +	status = "okay";
> > +};
> > +
> > diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> > new file mode 100644
> > index 0000000..6031c2f
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> > @@ -0,0 +1,159 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base
> board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +
> > +/ {
> > +	sound {
> > +		compatible = "atmel,asoc-wm8904";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
> > +
> > +		atmel,model = "wm8904 @ DVK-SOM60";
> > +		atmel,audio-routing =
> > +			"Headphone Jack", "HPOUTL",
> > +			"Headphone Jack", "HPOUTR",
> > +			"IN2L", "Line In Jack",
> > +			"IN2R", "Line In Jack",
> > +			"Mic", "MICBIAS",
> > +			"IN1L", "Mic";
> > +
> > +		atmel,ssc-controller = <&ssc0>;
> > +		atmel,audio-codec = <&wm8904>;
> > +
> > +		status = "okay";
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +
> > +	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3
> &pinctrl_mmc0_cd>;
> > +	slot@0 {
> > +		bus-width = <4>;
> > +		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
> > +		cd-inverted;
> > +	};
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +
> > +	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
> > +	spi-flash@0 {
> > +		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
> > +		spi-max-frequency = <33000000>;
> > +		reg = <0>;
> > +	};
> > +};
> > +
> > +&ssc0 {
> > +	atmel,clk-from-rk-pin;
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	status = "okay";
> > +
> > +	wm8904: wm8904@1a {
> > +		compatible = "wlf,wm8904";
> > +		reg = <0x1a>;
> > +		clocks = <&pck2>;
> > +		clock-names = "mclk";
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +
> > +	eeprom@87 {
> > +		compatible = "giantec,24c32";
> 
> It must work, however...
> 
> I read in recent patches on dts directory that :
> 
> "We now require all at24 users to use the "atmel,<model>" fallback in
> device tree for different manufacturers."
> 
> Moreover, I don't see giantec in the vendor prefix list.

I see, I have added parts which are compatible and made note what the real
part is, should I typically be adding the real part to the compatible list and
update vendor prefixes if necessary?

> 
> > +		reg = <87>;
> > +		pagesize = <32>;
> > +	};
> > +};
> > +
> > +&usart1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart2 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&pit {
> > +	status = "okay";
> > +};
> > +
> > +&adc0 {
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	status = "okay";
> > +
> > +	ethernet-phy@7 {
> > +		reg = <7>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_geth_int>;
> > +		interrupt-parent = <&pioB>;
> > +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> > +		txen-skew-ps = <800>;
> > +		txc-skew-ps = <3000>;
> > +		rxdv-skew-ps = <400>;
> > +		rxc-skew-ps = <3000>;
> > +		rxd0-skew-ps = <400>;
> > +		rxd1-skew-ps = <400>;
> > +		rxd2-skew-ps = <400>;
> > +		rxd3-skew-ps = <400>;
> > +	};
> > +};
> > +
> > +&macb1 {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	status = "okay";
> > +
> > +	ethernet-phy@1 {
> > +		reg = <1>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_eth_int>;
> > +		interrupt-parent = <&pioC>;
> > +		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&usb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb2 {
> > +	status = "okay";
> > +};
> > +
> > diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> > new file mode 100644
> > index 0000000..d98c644
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> > @@ -0,0 +1,96 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD
> board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +
> > +/ {
> > +	ahb {
> > +		apb {
> > +			pinctrl@fffff200 {
> > +				board {
> > +					pinctrl_lcd_ctp_int: lcd_ctp_int {
> > +						 atmel,pins =
> > +							 <AT91_PIOC 28
> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
> > +					};
> > +				};
> > +			};
> > +		};
> > +	};
> > +
> > +	backlight: backlight {
> > +		compatible = "pwm-backlight";
> > +		pwms = <&hlcdc_pwm 0 50000 0>;
> > +		brightness-levels = <0 4 8 16 32 64 128 255>;
> > +		default-brightness-level = <6>;
> > +		status = "okay";
> > +	};
> > +
> > +	panel: panel {
> > +		/* Actually Winstar WF70GTIAGDNG0 */
> > +		compatible = "innolux,at070tn92", "simple-panel";
> > +		backlight = <&backlight>;
> > +		power-supply = <&vcc_lcd_reg>;
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		status = "okay";
> > +
> > +		port@0 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			reg = <0>;
> > +
> > +			panel_input: endpoint@0 {
> > +				reg = <0>;
> > +				remote-endpoint = <&hlcdc_panel_output>;
> > +			};
> > +		};
> > +	};
> > +
> > +	vcc_lcd_reg: fixedregulator_lcd {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "VCC LCM";
> > +		regulator-min-microvolt = <5000000>;
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +		status = "okay";
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +
> > +	ft5426@56 {
> > +		/* Actually FT5426 */
> > +		compatible = "edt,edt-ft5406";
> > +		reg = <56>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
> > +
> > +		interrupt-parent = <&pioC>;
> > +		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> > +
> > +		touchscreen-size-x = <800>;
> > +		touchscreen-size-y = <480>;
> > +	};
> > +};
> > +
> > +&hlcdc {
> > +	status = "okay";
> > +
> > +	hlcdc-display-controller {
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
> > +
> > +		port@0 {
> > +			hlcdc_panel_output: endpoint@0 {
> > +				reg = <0>;
> > +				remote-endpoint = <&panel_input>;
> > +			};
> > +		};
> > +	};
> > +};
> > diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-
> som60.dtsi
> > new file mode 100644
> > index 0000000..1843284
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-som60.dtsi
> > @@ -0,0 +1,229 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-som60.dtsi - Device Tree file for the SOM60 module
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +#include "sama5d36.dtsi"
> > +
> > +/ {
> > +	model = "Laird SOM60";
> > +	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3",
> "atmel,sama5";
> > +
> > +	chosen {
> > +		stdout-path = &dbgu;
> > +	};
> > +
> > +	memory {
> > +		reg = <0x20000000 0x8000000>;
> > +	};
> > +
> > +	clocks {
> > +		slow_xtal {
> > +			clock-frequency = <32768>;
> > +		};
> > +
> > +		main_xtal {
> > +			clock-frequency = <12000000>;
> > +		};
> > +	};
> > +
> > +	ahb {
> > +		apb {
> > +			pinctrl@fffff200 {
> > +				board {
> > +					pinctrl_mmc0_cd: mmc0_cd {
> > +						atmel,pins =
> > +							<AT91_PIOE 31
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_mmc0_en: mmc0_en {
> > +						atmel,pins =
> > +							<AT91_PIOE 30
> AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> > +					};
> > +
> > +					pinctrl_nand0_wp: nand0_wp {
> > +						atmel,pins =
> > +							<AT91_PIOE 14
> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> > +					};
> > +
> > +					pinctrl_usb_vbus: usb_vbus {
> > +						atmel,pins =
> > +							<AT91_PIOE 20
> AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK
> */
> > +					};
> > +
> > +					pinctrl_usart2_sck: usart2_sck {
> > +						atmel,pins =
> > +							<AT91_PIOE 20
> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
> > +					};
> > +
> > +					pinctrl_usb_oc: usb_oc {
> > +						atmel,pins =
> > +							<AT91_PIOE 15
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with
> USART3_SCK */
> > +					};
> > +
> > +					pinctrl_usart3_sck: usart3_sck {
> > +						atmel,pins =
> > +							<AT91_PIOE 15
> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
> > +					};
> > +
> > +					pinctrl_usba_vbus: usba_vbus {
> > +					   atmel,pins =
> > +							<AT91_PIOC 14
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_geth_int: geth_int {
> > +						atmel,pins =
> > +							<AT91_PIOB 25
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with
> USART1_SCK */
> > +					};
> > +
> > +					pinctrl_usart1_sck: usart1_sck {
> > +						atmel,pins =
> > +							<AT91_PIOB 25
> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
> > +					};
> > +
> > +					pinctrl_eth_int: eth_int {
> > +						atmel,pins =
> > +							<AT91_PIOC 10
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_pck2_as_audio_mck:
> pck2_as_audio_mck {
> > +						atmel,pins =
> > +							<AT91_PIOC 15
> AT91_PERIPH_B AT91_PINCTRL_NONE>;
> > +					};
> > +				};
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	slot@0 {
> > +		reg = <0>;
> > +		bus-width = <8>;
> > +	};
> > +};
> > +
> > +&mmc1 {
> > +	status = "okay";
> > +	slot@0 {
> > +		reg = <0>;
> > +		bus-width = <4>;
> > +	};
> > +};
> > +
> > +&spi0 {
> > +	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> > +};
> > +
> > +&usart0 {
> > +	atmel,use-dma-rx;
> > +	atmel,use-dma-tx;
> > +	status = "okay";
> > +	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
> > +};
> > +
> > +&usart1 {
> > +	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> > +};
> > +
> > +&usart2 {
> > +	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
> > +};
> > +
> > +&usart3 {
> > +	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
> > +};
> > +
> > +&adc0 {
> > +	pinctrl-0 = <
> > +		&pinctrl_adc0_adtrg
> > +		&pinctrl_adc0_ad0
> > +		&pinctrl_adc0_ad1
> > +		&pinctrl_adc0_ad2
> > +		&pinctrl_adc0_ad3
> > +		&pinctrl_adc0_ad4
> > +		&pinctrl_adc0_ad5
> > +		>;
> > +};
> > +
> > +&macb0 {
> > +	phy-mode = "rgmii";
> > +};
> > +
> > +&macb1 {
> > +	phy-mode = "rmii";
> > +};
> > +
> > +
> > +&ebi {
> > +	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
> > +	pinctrl-names = "default";
> > +	status = "okay";
> > +};
> > +
> > +&nand_controller {
> > +	status = "okay";
> > +
> > +	nand: nand@3 {
> > +		reg = <0x3 0x0 0x2>;
> > +		atmel,rb = <0>;
> > +		nand-bus-width = <8>;
> > +		nand-ecc-mode = "hw";
> > +		nand-ecc-strength = <8>;
> > +		nand-ecc-step-size = <512>;
> > +		nand-on-flash-bbt;
> > +		label = "atmel_nand";
> > +
> > +		partitions {
> > +			compatible = "fixed-partitions";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +
> > +			ubootspl@0 {
> > +				label = "u-boot-spl";
> > +				reg = <0x0 0x20000>;
> > +			};
> > +
> > +			uboot@20000 {
> > +				label = "u-boot";
> > +				reg = <0x20000 0x80000>;
> > +			};
> > +
> > +			ubootenv@a0000 {
> > +				label = "u-boot-env";
> > +				reg = <0xa0000 0x20000>;
> > +			};
> > +
> > +			ubootenv@c0000 {
> > +				label = "u-boot-env";
> > +				reg = <0xc0000 0x20000>;
> > +			};
> > +
> > +			ubi@e0000 {
> > +				label = "ubi";
> > +				reg = <0xe0000 0xfe00000>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usba_vbus>;
> > +	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > +&usb1 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
> > +	num-ports = <3>;
> > +	atmel,vbus-gpio = <0
> > +		&pioE 20 GPIO_ACTIVE_HIGH
> > +		0>;
> > +	atmel,oc-gpio = <0
> > +		&pioE 15 GPIO_ACTIVE_LOW
> > +		0>;
> > +};
> >
> 
> 
> --
> Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards
@ 2018-06-15  8:57       ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-15  8:57 UTC (permalink / raw)
  To: linux-arm-kernel

Thanks all for the reviews and comments, I will work on a new series.

> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >   arch/arm/boot/dts/Makefile                    |   3 +-
> >   arch/arm/boot/dts/at91-dvk_som60.dts          |  95 +++++++++++
> >   arch/arm/boot/dts/at91-dvk_su60_somc.dtsi     | 159
> ++++++++++++++++++
> >   arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi |  96 +++++++++++
> >   arch/arm/boot/dts/at91-som60.dtsi             | 229
> ++++++++++++++++++++++++++
> >   5 files changed, 581 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_som60.dts
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> >   create mode 100644 arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> >   create mode 100644 arch/arm/boot/dts/at91-som60.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 486ab59..4d3d9ca 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -63,7 +63,8 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
> >   	at91-sama5d4ek.dtb \
> >   	at91-vinco.dtb \
> 
> About where you added dtbs...
> 
> >   	at91-wb50n.dtb \
> > -	at91-gatwick.dtb
> > +	at91-gatwick.dtb \
> > +	at91-dvk_som60.dtb
> 
> 1/ As they are based on sama5d3, I would like to see them between
> "at91-sama5d2_xplained.dtb" and "sama5d31ek.dtb"
> 2/ within this range, please sort all these 4 alphabetically
> 3/ don't laugh at me, I try to deal with our historical way of "sorting"
> entries in this Makefile for AT91... ;-)
> 
> BTW, I realize now that your "at91-wb45n.dtb" entry from patch 1 should
> go just after the "at91-kizboxmini.dts" (alphabetical order in
> at91sam9x5 "location").
> 
> 
> >   dtb-$(CONFIG_ARCH_ATLAS6) += \
> >   	atlas6-evb.dtb
> >   dtb-$(CONFIG_ARCH_ATLAS7) += \
> > diff --git a/arch/arm/boot/dts/at91-dvk_som60.dts
> b/arch/arm/boot/dts/at91-dvk_som60.dts
> > new file mode 100644
> > index 0000000..ededd5b
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_som60.dts
> > @@ -0,0 +1,95 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +/dts-v1/;
> > +#include "at91-som60.dtsi"
> > +#include "at91-dvk_su60_somc.dtsi"
> > +#include "at91-dvk_su60_somc_lcm.dtsi"
> > +
> > +/ {
> > +	model = "Laird DVK SOM60";
> > +	compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36",
> "atmel,sama5d3", "atmel,sama5";
> > +
> > +	chosen {
> > +		stdout-path = &dbgu;
> > +		tick-timer = &pit;
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +};
> > +
> > +&ssc0 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart2 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&pit {
> > +	status = "okay";
> > +};
> > +
> > +&adc0 {
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	status = "okay";
> > +};
> > +
> > +&macb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&usb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb2 {
> > +	status = "okay";
> > +};
> > +
> > diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> > new file mode 100644
> > index 0000000..6031c2f
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
> > @@ -0,0 +1,159 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base
> board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +
> > +/ {
> > +	sound {
> > +		compatible = "atmel,asoc-wm8904";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
> > +
> > +		atmel,model = "wm8904 @ DVK-SOM60";
> > +		atmel,audio-routing =
> > +			"Headphone Jack", "HPOUTL",
> > +			"Headphone Jack", "HPOUTR",
> > +			"IN2L", "Line In Jack",
> > +			"IN2R", "Line In Jack",
> > +			"Mic", "MICBIAS",
> > +			"IN1L", "Mic";
> > +
> > +		atmel,ssc-controller = <&ssc0>;
> > +		atmel,audio-codec = <&wm8904>;
> > +
> > +		status = "okay";
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +
> > +	pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3
> &pinctrl_mmc0_cd>;
> > +	slot at 0 {
> > +		bus-width = <4>;
> > +		cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
> > +		cd-inverted;
> > +	};
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +
> > +	/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
> > +	spi-flash at 0 {
> > +		compatible = "mxicy,mx25u4035", "jedec,spi-nor";
> > +		spi-max-frequency = <33000000>;
> > +		reg = <0>;
> > +	};
> > +};
> > +
> > +&ssc0 {
> > +	atmel,clk-from-rk-pin;
> > +	status = "okay";
> > +};
> > +
> > +&i2c0 {
> > +	status = "okay";
> > +
> > +	wm8904: wm8904 at 1a {
> > +		compatible = "wlf,wm8904";
> > +		reg = <0x1a>;
> > +		clocks = <&pck2>;
> > +		clock-names = "mclk";
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +
> > +	eeprom at 87 {
> > +		compatible = "giantec,24c32";
> 
> It must work, however...
> 
> I read in recent patches on dts directory that :
> 
> "We now require all at24 users to use the "atmel,<model>" fallback in
> device tree for different manufacturers."
> 
> Moreover, I don't see giantec in the vendor prefix list.

I see, I have added parts which are compatible and made note what the real
part is, should I typically be adding the real part to the compatible list and
update vendor prefixes if necessary?

> 
> > +		reg = <87>;
> > +		pagesize = <32>;
> > +	};
> > +};
> > +
> > +&usart1 {
> > +	status = "okay";
> > +};
> > +
> > +&usart2 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&pit {
> > +	status = "okay";
> > +};
> > +
> > +&adc0 {
> > +	status = "okay";
> > +};
> > +
> > +&can1 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	status = "okay";
> > +
> > +	ethernet-phy at 7 {
> > +		reg = <7>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_geth_int>;
> > +		interrupt-parent = <&pioB>;
> > +		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> > +		txen-skew-ps = <800>;
> > +		txc-skew-ps = <3000>;
> > +		rxdv-skew-ps = <400>;
> > +		rxc-skew-ps = <3000>;
> > +		rxd0-skew-ps = <400>;
> > +		rxd1-skew-ps = <400>;
> > +		rxd2-skew-ps = <400>;
> > +		rxd3-skew-ps = <400>;
> > +	};
> > +};
> > +
> > +&macb1 {
> > +	#address-cells = <1>;
> > +	#size-cells = <0>;
> > +	status = "okay";
> > +
> > +	ethernet-phy at 1 {
> > +		reg = <1>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_eth_int>;
> > +		interrupt-parent = <&pioC>;
> > +		interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&usb1 {
> > +	status = "okay";
> > +};
> > +
> > +&usb2 {
> > +	status = "okay";
> > +};
> > +
> > diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> > new file mode 100644
> > index 0000000..d98c644
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
> > @@ -0,0 +1,96 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD
> board
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +
> > +/ {
> > +	ahb {
> > +		apb {
> > +			pinctrl at fffff200 {
> > +				board {
> > +					pinctrl_lcd_ctp_int: lcd_ctp_int {
> > +						 atmel,pins =
> > +							 <AT91_PIOC 28
> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
> > +					};
> > +				};
> > +			};
> > +		};
> > +	};
> > +
> > +	backlight: backlight {
> > +		compatible = "pwm-backlight";
> > +		pwms = <&hlcdc_pwm 0 50000 0>;
> > +		brightness-levels = <0 4 8 16 32 64 128 255>;
> > +		default-brightness-level = <6>;
> > +		status = "okay";
> > +	};
> > +
> > +	panel: panel {
> > +		/* Actually Winstar WF70GTIAGDNG0 */
> > +		compatible = "innolux,at070tn92", "simple-panel";
> > +		backlight = <&backlight>;
> > +		power-supply = <&vcc_lcd_reg>;
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		status = "okay";
> > +
> > +		port at 0 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			reg = <0>;
> > +
> > +			panel_input: endpoint at 0 {
> > +				reg = <0>;
> > +				remote-endpoint = <&hlcdc_panel_output>;
> > +			};
> > +		};
> > +	};
> > +
> > +	vcc_lcd_reg: fixedregulator_lcd {
> > +		compatible = "regulator-fixed";
> > +		regulator-name = "VCC LCM";
> > +		regulator-min-microvolt = <5000000>;
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-boot-on;
> > +		regulator-always-on;
> > +		status = "okay";
> > +	};
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +
> > +	ft5426 at 56 {
> > +		/* Actually FT5426 */
> > +		compatible = "edt,edt-ft5406";
> > +		reg = <56>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_lcd_ctp_int>;
> > +
> > +		interrupt-parent = <&pioC>;
> > +		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
> > +
> > +		touchscreen-size-x = <800>;
> > +		touchscreen-size-y = <480>;
> > +	};
> > +};
> > +
> > +&hlcdc {
> > +	status = "okay";
> > +
> > +	hlcdc-display-controller {
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
> > +
> > +		port at 0 {
> > +			hlcdc_panel_output: endpoint at 0 {
> > +				reg = <0>;
> > +				remote-endpoint = <&panel_input>;
> > +			};
> > +		};
> > +	};
> > +};
> > diff --git a/arch/arm/boot/dts/at91-som60.dtsi b/arch/arm/boot/dts/at91-
> som60.dtsi
> > new file mode 100644
> > index 0000000..1843284
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-som60.dtsi
> > @@ -0,0 +1,229 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-som60.dtsi - Device Tree file for the SOM60 module
> > + *
> > + *  Copyright (C) 2018 Laird,
> > + *		  2018 Ben Whitten <ben.whitten@lairdtech.com>
> > + *
> > + */
> > +#include "sama5d36.dtsi"
> > +
> > +/ {
> > +	model = "Laird SOM60";
> > +	compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3",
> "atmel,sama5";
> > +
> > +	chosen {
> > +		stdout-path = &dbgu;
> > +	};
> > +
> > +	memory {
> > +		reg = <0x20000000 0x8000000>;
> > +	};
> > +
> > +	clocks {
> > +		slow_xtal {
> > +			clock-frequency = <32768>;
> > +		};
> > +
> > +		main_xtal {
> > +			clock-frequency = <12000000>;
> > +		};
> > +	};
> > +
> > +	ahb {
> > +		apb {
> > +			pinctrl at fffff200 {
> > +				board {
> > +					pinctrl_mmc0_cd: mmc0_cd {
> > +						atmel,pins =
> > +							<AT91_PIOE 31
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_mmc0_en: mmc0_en {
> > +						atmel,pins =
> > +							<AT91_PIOE 30
> AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> > +					};
> > +
> > +					pinctrl_nand0_wp: nand0_wp {
> > +						atmel,pins =
> > +							<AT91_PIOE 14
> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> > +					};
> > +
> > +					pinctrl_usb_vbus: usb_vbus {
> > +						atmel,pins =
> > +							<AT91_PIOE 20
> AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* Conflicts with USART2_SCK
> */
> > +					};
> > +
> > +					pinctrl_usart2_sck: usart2_sck {
> > +						atmel,pins =
> > +							<AT91_PIOE 20
> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_VBUS */
> > +					};
> > +
> > +					pinctrl_usb_oc: usb_oc {
> > +						atmel,pins =
> > +							<AT91_PIOE 15
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with
> USART3_SCK */
> > +					};
> > +
> > +					pinctrl_usart3_sck: usart3_sck {
> > +						atmel,pins =
> > +							<AT91_PIOE 15
> AT91_PERIPH_B AT91_PINCTRL_NONE>; /* Conflicts with USB_OC */
> > +					};
> > +
> > +					pinctrl_usba_vbus: usba_vbus {
> > +					   atmel,pins =
> > +							<AT91_PIOC 14
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_geth_int: geth_int {
> > +						atmel,pins =
> > +							<AT91_PIOB 25
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* Conflicts with
> USART1_SCK */
> > +					};
> > +
> > +					pinctrl_usart1_sck: usart1_sck {
> > +						atmel,pins =
> > +							<AT91_PIOB 25
> AT91_PERIPH_A AT91_PINCTRL_NONE>; /* Conflicts with GETH_INT */
> > +					};
> > +
> > +					pinctrl_eth_int: eth_int {
> > +						atmel,pins =
> > +							<AT91_PIOC 10
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
> > +					};
> > +
> > +					pinctrl_pck2_as_audio_mck:
> pck2_as_audio_mck {
> > +						atmel,pins =
> > +							<AT91_PIOC 15
> AT91_PERIPH_B AT91_PINCTRL_NONE>;
> > +					};
> > +				};
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&mmc0 {
> > +	slot at 0 {
> > +		reg = <0>;
> > +		bus-width = <8>;
> > +	};
> > +};
> > +
> > +&mmc1 {
> > +	status = "okay";
> > +	slot at 0 {
> > +		reg = <0>;
> > +		bus-width = <4>;
> > +	};
> > +};
> > +
> > +&spi0 {
> > +	cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> > +};
> > +
> > +&usart0 {
> > +	atmel,use-dma-rx;
> > +	atmel,use-dma-tx;
> > +	status = "okay";
> > +	pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
> > +};
> > +
> > +&usart1 {
> > +	pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> > +};
> > +
> > +&usart2 {
> > +	pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
> > +};
> > +
> > +&usart3 {
> > +	pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
> > +};
> > +
> > +&adc0 {
> > +	pinctrl-0 = <
> > +		&pinctrl_adc0_adtrg
> > +		&pinctrl_adc0_ad0
> > +		&pinctrl_adc0_ad1
> > +		&pinctrl_adc0_ad2
> > +		&pinctrl_adc0_ad3
> > +		&pinctrl_adc0_ad4
> > +		&pinctrl_adc0_ad5
> > +		>;
> > +};
> > +
> > +&macb0 {
> > +	phy-mode = "rgmii";
> > +};
> > +
> > +&macb1 {
> > +	phy-mode = "rmii";
> > +};
> > +
> > +
> > +&ebi {
> > +	pinctrl-0 = <&pinctrl_ebi_nand_addr>;
> > +	pinctrl-names = "default";
> > +	status = "okay";
> > +};
> > +
> > +&nand_controller {
> > +	status = "okay";
> > +
> > +	nand: nand at 3 {
> > +		reg = <0x3 0x0 0x2>;
> > +		atmel,rb = <0>;
> > +		nand-bus-width = <8>;
> > +		nand-ecc-mode = "hw";
> > +		nand-ecc-strength = <8>;
> > +		nand-ecc-step-size = <512>;
> > +		nand-on-flash-bbt;
> > +		label = "atmel_nand";
> > +
> > +		partitions {
> > +			compatible = "fixed-partitions";
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +
> > +			ubootspl at 0 {
> > +				label = "u-boot-spl";
> > +				reg = <0x0 0x20000>;
> > +			};
> > +
> > +			uboot at 20000 {
> > +				label = "u-boot";
> > +				reg = <0x20000 0x80000>;
> > +			};
> > +
> > +			ubootenv at a0000 {
> > +				label = "u-boot-env";
> > +				reg = <0xa0000 0x20000>;
> > +			};
> > +
> > +			ubootenv at c0000 {
> > +				label = "u-boot-env";
> > +				reg = <0xc0000 0x20000>;
> > +			};
> > +
> > +			ubi at e0000 {
> > +				label = "ubi";
> > +				reg = <0xe0000 0xfe00000>;
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usba_vbus>;
> > +	atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > +&usb1 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
> > +	num-ports = <3>;
> > +	atmel,vbus-gpio = <0
> > +		&pioE 20 GPIO_ACTIVE_HIGH
> > +		0>;
> > +	atmel,oc-gpio = <0
> > +		&pioE 15 GPIO_ACTIVE_LOW
> > +		0>;
> > +};
> >
> 
> 
> --
> Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* RE: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
  2018-06-14 12:52   ` Nicolas Ferre
  (?)
@ 2018-06-15 10:01     ` Ben Whitten
  -1 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-15 10:01 UTC (permalink / raw)
  To: Nicolas Ferre, Ben Whitten, devicetree, Alexandre Belloni
  Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel

> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >   arch/arm/boot/dts/Makefile        |   3 +-
> >   arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
> >   arch/arm/boot/dts/at91-wb45n.dtsi | 169
> ++++++++++++++++++++++++++++++++++++++
> >   3 files changed, 237 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
> >   create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 7e24249..1ee94ee 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
> >   	at91sam9g25ek.dtb \
> >   	at91sam9g35ek.dtb \
> >   	at91sam9x25ek.dtb \
> > -	at91sam9x35ek.dtb
> > +	at91sam9x35ek.dtb \
> > +	at91-wb45n.dtb
> >   dtb-$(CONFIG_SOC_SAM_V7) += \
> >   	at91-kizbox2.dtb \
> >   	at91-nattis-2-natte-2.dtb \
> > diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-
> wb45n.dts
> > new file mode 100644
> > index 0000000..4e88815
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-wb45n.dts
> > @@ -0,0 +1,66 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-wb45n.dts - Device Tree file for WB45NBT board
> > + *
> > + *  Copyright (C) 2018 Laird
> > + *
> > +*/
> > +/dts-v1/;
> > +#include "at91-wb45n.dtsi"
> > +
> > +/ {
> > +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> > +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
> "atmel,at91sam9";
> 
> "laird" prefix must be added to
> Documentation/devicetree/bindings/vendor-prefixes.txt before using it:
> you can do a little patch as a first patch of this series.
> Otherwise it will trigger a warning message while running
> scripts/checkpatch.pl on top of your patch.
> 
> 
> > +
> > +	ahb {
> > +		apb {
> > +			watchdog@fffffe40 {
> > +				status = "okay";
> > +			};
> > +		};
> > +	};
> > +
> > +	gpio_keys {
> > +		compatible = "gpio-keys";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		irqbtn@pb18 {
> 
> I'm not sure that the @pb18 can be used like this. This address
> extension must be used in a "reg" property in the node. dtc used with
> warning switch on might trigger an error for this.
> 
> > +			label = "IRQBTN";
> > +			linux,code = <99>;
> > +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
> > +			gpio-key,wakeup = <1>;
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&usart0 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +};
> > diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-
> wb45n.dtsi
> > new file mode 100644
> > index 0000000..2fa58e2
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
> > @@ -0,0 +1,169 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
> > + *
> > + *  Copyright (C) 2018 Laird
> > + *
> > + */
> > +
> > +#include "at91sam9g25.dtsi"
> > +
> > +/ {
> > +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> > +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
> "atmel,at91sam9";
> > +
> > +	chosen {
> > +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs
> rw";
> > +		stdout-path = "serial0:115200n8";
> > +	};
> > +
> > +	memory {
> > +		reg = <0x20000000 0x4000000>;
> > +	};
> > +
> > +	ahb {
> > +		apb {
> > +			shdwc@fffffe10 {
> 
> I would advice you to take exactly the node name:
> "shutdown-controller@fffffe10"; Anyway, it will go away after you use
> the label notation as advised by Alexandre.
> 
> > +				atmel,wakeup-mode = "low";
> > +			};
> > +
> > +			pinctrl@fffff400 {
> > +				usb2 {
> > +					pinctrl_board_usb2: usb2-board {
> > +						atmel,pins =
> > +							<AT91_PIOB 11
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio
> vbus sense, deglitch */
> > +					};
> > +				};
> > +			};
> > +
> > +			rstc@fffffe00 {
> > +				compatible = "atmel,sama5d3-rstc";
> > +			};
> 
> I don't think this node is needed.

I dug through our old code reviews and found this message relating to testing
reboot over several thousand times in our testbed:
After the slow clock has been enabled on the reset controller via upstream
changes, the dram disable access and power down code is causing the SAM9G25
to hang occasionally on reboot.  Using the simple reset function provided
for SAMA5D3 instead.

So it appears to be a workaround for a bug that existed ~2 years ago, may still be
relevant as there haven't been many changes to the reset code in that time.

> > +
> > +		};
> > +	};
> > +
> > +	atheros {
> > +		compatible = "atheros,ath6kl";
> > +		atheros,board-id = "SD32";
> > +	};
> > +};
> > +
> > +&slow_xtal {
> > +	clock-frequency = <32768>;
> > +};
> > +
> > +&main_xtal {
> > +	clock-frequency = <12000000>;
> > +};
> > +
> > +&ebi {
> > +	status = "okay";
> > +	nand_controller: nand-controller {
> > +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb
> &pinctrl_nand_oe_we>;
> > +		pinctrl-names = "default";
> > +		status = "okay";
> > +
> > +		nand@3 {
> > +			reg = <0x3 0x0 0x800000>;
> > +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
> > +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
> > +			nand-bus-width = <8>;
> > +			nand-ecc-mode = "hw";
> > +			nand-ecc-strength = <4>;
> > +			nand-ecc-step-size = <512>;
> > +			nand-on-flash-bbt;
> > +			label = "atmel_nand";
> > +
> > +			partitions {
> > +				compatible = "fixed-partitions";
> > +				#address-cells = <1>;
> > +				#size-cells = <1>;
> > +
> > +				at91bootstrap@0 {
> > +					label = "at91bs";
> > +					reg = <0x0 0x20000>;
> > +				};
> > +
> > +				uboot@20000 {
> > +					label = "u-boot";
> > +					reg = <0x20000 0x80000>;
> > +				};
> > +
> > +				ubootenv@a0000 {
> > +					label = "u-boot-env";
> > +					reg = <0xa0000 0x20000>;
> > +				};
> > +
> > +				ubootenv@c0000 {
> > +					label = "redund-env";
> > +					reg = <0xc0000 0x20000>;
> > +				};
> > +
> > +				kernel-a@e0000 {
> > +					label = "kernel-a";
> > +					reg = <0xe0000 0x280000>;
> > +				};
> > +
> > +				kernel-b@360000 {
> > +					label = "kernel-b";
> > +					reg = <0x360000 0x280000>;
> > +				};
> > +
> > +				rootfs-a@5e0000 {
> > +					label = "rootfs-a";
> > +					reg = <0x5e0000 0x2600000>;
> > +				};
> > +
> > +				rootfs-b@2be0000 {
> > +					label = "rootfs-b";
> > +					reg = <0x2be0000 0x2600000>;
> > +				};
> > +
> > +				user@51e0000 {
> > +					label = "user";
> > +					reg = <0x51e0000 0x2dc0000>;
> > +				};
> > +
> > +				logs@7fa0000 {
> > +					label = "logs";
> > +					reg = <0x7fa0000 0x60000>;
> > +				};
> > +
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> 
> This must be &usb1 label, isn't it?
> Because you are referring to ohci binding I suspect (found by having a
> look at: atmel,oc-gpio property...).

I believe usb0 is correct, as this is a at91sam9x5 part, the node in dtsi is -ohci.
sama5d3 is usb1 for -ohci.

> > +	num-ports = <2>;
> > +	atmel,vbus-gpio = <
> > +		&pioB 12 GPIO_ACTIVE_HIGH
> > +		&pioA 31 GPIO_ACTIVE_HIGH
> > +		>;
> > +	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
> > +};
> > +
> > +&macb0 {
> > +	phy-mode = "rmii";
> > +};
> > +
> > +&spi0 {
> > +	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
> > +};
> > +
> > +&usb2 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_board_usb2>;
> > +	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > +&mmc0 {
> > +	pinctrl-0 = <
> > +		&pinctrl_mmc0_slot0_clk_cmd_dat0
> > +		&pinctrl_mmc0_slot0_dat1_3>;
> > +	slot@0 {
> > +		reg = <0>;
> > +		bus-width = <4>;
> > +	};
> > +};
> >
> 
> 
> --
> Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* RE: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-15 10:01     ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-15 10:01 UTC (permalink / raw)
  To: Nicolas Ferre, Ben Whitten, devicetree, Alexandre Belloni
  Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel

> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >   arch/arm/boot/dts/Makefile        |   3 +-
> >   arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
> >   arch/arm/boot/dts/at91-wb45n.dtsi | 169
> ++++++++++++++++++++++++++++++++++++++
> >   3 files changed, 237 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
> >   create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 7e24249..1ee94ee 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
> >   	at91sam9g25ek.dtb \
> >   	at91sam9g35ek.dtb \
> >   	at91sam9x25ek.dtb \
> > -	at91sam9x35ek.dtb
> > +	at91sam9x35ek.dtb \
> > +	at91-wb45n.dtb
> >   dtb-$(CONFIG_SOC_SAM_V7) += \
> >   	at91-kizbox2.dtb \
> >   	at91-nattis-2-natte-2.dtb \
> > diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-
> wb45n.dts
> > new file mode 100644
> > index 0000000..4e88815
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-wb45n.dts
> > @@ -0,0 +1,66 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-wb45n.dts - Device Tree file for WB45NBT board
> > + *
> > + *  Copyright (C) 2018 Laird
> > + *
> > +*/
> > +/dts-v1/;
> > +#include "at91-wb45n.dtsi"
> > +
> > +/ {
> > +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> > +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
> "atmel,at91sam9";
> 
> "laird" prefix must be added to
> Documentation/devicetree/bindings/vendor-prefixes.txt before using it:
> you can do a little patch as a first patch of this series.
> Otherwise it will trigger a warning message while running
> scripts/checkpatch.pl on top of your patch.
> 
> 
> > +
> > +	ahb {
> > +		apb {
> > +			watchdog@fffffe40 {
> > +				status = "okay";
> > +			};
> > +		};
> > +	};
> > +
> > +	gpio_keys {
> > +		compatible = "gpio-keys";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		irqbtn@pb18 {
> 
> I'm not sure that the @pb18 can be used like this. This address
> extension must be used in a "reg" property in the node. dtc used with
> warning switch on might trigger an error for this.
> 
> > +			label = "IRQBTN";
> > +			linux,code = <99>;
> > +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
> > +			gpio-key,wakeup = <1>;
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&usart0 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +};
> > diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-
> wb45n.dtsi
> > new file mode 100644
> > index 0000000..2fa58e2
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
> > @@ -0,0 +1,169 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
> > + *
> > + *  Copyright (C) 2018 Laird
> > + *
> > + */
> > +
> > +#include "at91sam9g25.dtsi"
> > +
> > +/ {
> > +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> > +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
> "atmel,at91sam9";
> > +
> > +	chosen {
> > +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs
> rw";
> > +		stdout-path = "serial0:115200n8";
> > +	};
> > +
> > +	memory {
> > +		reg = <0x20000000 0x4000000>;
> > +	};
> > +
> > +	ahb {
> > +		apb {
> > +			shdwc@fffffe10 {
> 
> I would advice you to take exactly the node name:
> "shutdown-controller@fffffe10"; Anyway, it will go away after you use
> the label notation as advised by Alexandre.
> 
> > +				atmel,wakeup-mode = "low";
> > +			};
> > +
> > +			pinctrl@fffff400 {
> > +				usb2 {
> > +					pinctrl_board_usb2: usb2-board {
> > +						atmel,pins =
> > +							<AT91_PIOB 11
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio
> vbus sense, deglitch */
> > +					};
> > +				};
> > +			};
> > +
> > +			rstc@fffffe00 {
> > +				compatible = "atmel,sama5d3-rstc";
> > +			};
> 
> I don't think this node is needed.

I dug through our old code reviews and found this message relating to testing
reboot over several thousand times in our testbed:
After the slow clock has been enabled on the reset controller via upstream
changes, the dram disable access and power down code is causing the SAM9G25
to hang occasionally on reboot.  Using the simple reset function provided
for SAMA5D3 instead.

So it appears to be a workaround for a bug that existed ~2 years ago, may still be
relevant as there haven't been many changes to the reset code in that time.

> > +
> > +		};
> > +	};
> > +
> > +	atheros {
> > +		compatible = "atheros,ath6kl";
> > +		atheros,board-id = "SD32";
> > +	};
> > +};
> > +
> > +&slow_xtal {
> > +	clock-frequency = <32768>;
> > +};
> > +
> > +&main_xtal {
> > +	clock-frequency = <12000000>;
> > +};
> > +
> > +&ebi {
> > +	status = "okay";
> > +	nand_controller: nand-controller {
> > +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb
> &pinctrl_nand_oe_we>;
> > +		pinctrl-names = "default";
> > +		status = "okay";
> > +
> > +		nand@3 {
> > +			reg = <0x3 0x0 0x800000>;
> > +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
> > +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
> > +			nand-bus-width = <8>;
> > +			nand-ecc-mode = "hw";
> > +			nand-ecc-strength = <4>;
> > +			nand-ecc-step-size = <512>;
> > +			nand-on-flash-bbt;
> > +			label = "atmel_nand";
> > +
> > +			partitions {
> > +				compatible = "fixed-partitions";
> > +				#address-cells = <1>;
> > +				#size-cells = <1>;
> > +
> > +				at91bootstrap@0 {
> > +					label = "at91bs";
> > +					reg = <0x0 0x20000>;
> > +				};
> > +
> > +				uboot@20000 {
> > +					label = "u-boot";
> > +					reg = <0x20000 0x80000>;
> > +				};
> > +
> > +				ubootenv@a0000 {
> > +					label = "u-boot-env";
> > +					reg = <0xa0000 0x20000>;
> > +				};
> > +
> > +				ubootenv@c0000 {
> > +					label = "redund-env";
> > +					reg = <0xc0000 0x20000>;
> > +				};
> > +
> > +				kernel-a@e0000 {
> > +					label = "kernel-a";
> > +					reg = <0xe0000 0x280000>;
> > +				};
> > +
> > +				kernel-b@360000 {
> > +					label = "kernel-b";
> > +					reg = <0x360000 0x280000>;
> > +				};
> > +
> > +				rootfs-a@5e0000 {
> > +					label = "rootfs-a";
> > +					reg = <0x5e0000 0x2600000>;
> > +				};
> > +
> > +				rootfs-b@2be0000 {
> > +					label = "rootfs-b";
> > +					reg = <0x2be0000 0x2600000>;
> > +				};
> > +
> > +				user@51e0000 {
> > +					label = "user";
> > +					reg = <0x51e0000 0x2dc0000>;
> > +				};
> > +
> > +				logs@7fa0000 {
> > +					label = "logs";
> > +					reg = <0x7fa0000 0x60000>;
> > +				};
> > +
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> 
> This must be &usb1 label, isn't it?
> Because you are referring to ohci binding I suspect (found by having a
> look at: atmel,oc-gpio property...).

I believe usb0 is correct, as this is a at91sam9x5 part, the node in dtsi is -ohci.
sama5d3 is usb1 for -ohci.

> > +	num-ports = <2>;
> > +	atmel,vbus-gpio = <
> > +		&pioB 12 GPIO_ACTIVE_HIGH
> > +		&pioA 31 GPIO_ACTIVE_HIGH
> > +		>;
> > +	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
> > +};
> > +
> > +&macb0 {
> > +	phy-mode = "rmii";
> > +};
> > +
> > +&spi0 {
> > +	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
> > +};
> > +
> > +&usb2 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_board_usb2>;
> > +	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > +&mmc0 {
> > +	pinctrl-0 = <
> > +		&pinctrl_mmc0_slot0_clk_cmd_dat0
> > +		&pinctrl_mmc0_slot0_dat1_3>;
> > +	slot@0 {
> > +		reg = <0>;
> > +		bus-width = <4>;
> > +	};
> > +};
> >
> 
> 
> --
> Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-15 10:01     ` Ben Whitten
  0 siblings, 0 replies; 34+ messages in thread
From: Ben Whitten @ 2018-06-15 10:01 UTC (permalink / raw)
  To: linux-arm-kernel

> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
> > ---
> >   arch/arm/boot/dts/Makefile        |   3 +-
> >   arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
> >   arch/arm/boot/dts/at91-wb45n.dtsi | 169
> ++++++++++++++++++++++++++++++++++++++
> >   3 files changed, 237 insertions(+), 1 deletion(-)
> >   create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
> >   create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 7e24249..1ee94ee 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
> >   	at91sam9g25ek.dtb \
> >   	at91sam9g35ek.dtb \
> >   	at91sam9x25ek.dtb \
> > -	at91sam9x35ek.dtb
> > +	at91sam9x35ek.dtb \
> > +	at91-wb45n.dtb
> >   dtb-$(CONFIG_SOC_SAM_V7) += \
> >   	at91-kizbox2.dtb \
> >   	at91-nattis-2-natte-2.dtb \
> > diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-
> wb45n.dts
> > new file mode 100644
> > index 0000000..4e88815
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-wb45n.dts
> > @@ -0,0 +1,66 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-wb45n.dts - Device Tree file for WB45NBT board
> > + *
> > + *  Copyright (C) 2018 Laird
> > + *
> > +*/
> > +/dts-v1/;
> > +#include "at91-wb45n.dtsi"
> > +
> > +/ {
> > +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> > +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
> "atmel,at91sam9";
> 
> "laird" prefix must be added to
> Documentation/devicetree/bindings/vendor-prefixes.txt before using it:
> you can do a little patch as a first patch of this series.
> Otherwise it will trigger a warning message while running
> scripts/checkpatch.pl on top of your patch.
> 
> 
> > +
> > +	ahb {
> > +		apb {
> > +			watchdog at fffffe40 {
> > +				status = "okay";
> > +			};
> > +		};
> > +	};
> > +
> > +	gpio_keys {
> > +		compatible = "gpio-keys";
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +		irqbtn at pb18 {
> 
> I'm not sure that the @pb18 can be used like this. This address
> extension must be used in a "reg" property in the node. dtc used with
> warning switch on might trigger an error for this.
> 
> > +			label = "IRQBTN";
> > +			linux,code = <99>;
> > +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
> > +			gpio-key,wakeup = <1>;
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> > +	status = "okay";
> > +};
> > +
> > +&mmc0 {
> > +	status = "okay";
> > +};
> > +
> > +&spi0 {
> > +	status = "okay";
> > +};
> > +
> > +&macb0 {
> > +	status = "okay";
> > +};
> > +
> > +&dbgu {
> > +	status = "okay";
> > +};
> > +
> > +&usart0 {
> > +	status = "okay";
> > +};
> > +
> > +&usart3 {
> > +	status = "okay";
> > +};
> > +
> > +&i2c1 {
> > +	status = "okay";
> > +};
> > diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-
> wb45n.dtsi
> > new file mode 100644
> > index 0000000..2fa58e2
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
> > @@ -0,0 +1,169 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
> > + *
> > + *  Copyright (C) 2018 Laird
> > + *
> > + */
> > +
> > +#include "at91sam9g25.dtsi"
> > +
> > +/ {
> > +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
> > +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
> "atmel,at91sam9";
> > +
> > +	chosen {
> > +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs
> rw";
> > +		stdout-path = "serial0:115200n8";
> > +	};
> > +
> > +	memory {
> > +		reg = <0x20000000 0x4000000>;
> > +	};
> > +
> > +	ahb {
> > +		apb {
> > +			shdwc at fffffe10 {
> 
> I would advice you to take exactly the node name:
> "shutdown-controller at fffffe10"; Anyway, it will go away after you use
> the label notation as advised by Alexandre.
> 
> > +				atmel,wakeup-mode = "low";
> > +			};
> > +
> > +			pinctrl at fffff400 {
> > +				usb2 {
> > +					pinctrl_board_usb2: usb2-board {
> > +						atmel,pins =
> > +							<AT91_PIOB 11
> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio
> vbus sense, deglitch */
> > +					};
> > +				};
> > +			};
> > +
> > +			rstc at fffffe00 {
> > +				compatible = "atmel,sama5d3-rstc";
> > +			};
> 
> I don't think this node is needed.

I dug through our old code reviews and found this message relating to testing
reboot over several thousand times in our testbed:
After the slow clock has been enabled on the reset controller via upstream
changes, the dram disable access and power down code is causing the SAM9G25
to hang occasionally on reboot.  Using the simple reset function provided
for SAMA5D3 instead.

So it appears to be a workaround for a bug that existed ~2 years ago, may still be
relevant as there haven't been many changes to the reset code in that time.

> > +
> > +		};
> > +	};
> > +
> > +	atheros {
> > +		compatible = "atheros,ath6kl";
> > +		atheros,board-id = "SD32";
> > +	};
> > +};
> > +
> > +&slow_xtal {
> > +	clock-frequency = <32768>;
> > +};
> > +
> > +&main_xtal {
> > +	clock-frequency = <12000000>;
> > +};
> > +
> > +&ebi {
> > +	status = "okay";
> > +	nand_controller: nand-controller {
> > +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb
> &pinctrl_nand_oe_we>;
> > +		pinctrl-names = "default";
> > +		status = "okay";
> > +
> > +		nand at 3 {
> > +			reg = <0x3 0x0 0x800000>;
> > +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
> > +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
> > +			nand-bus-width = <8>;
> > +			nand-ecc-mode = "hw";
> > +			nand-ecc-strength = <4>;
> > +			nand-ecc-step-size = <512>;
> > +			nand-on-flash-bbt;
> > +			label = "atmel_nand";
> > +
> > +			partitions {
> > +				compatible = "fixed-partitions";
> > +				#address-cells = <1>;
> > +				#size-cells = <1>;
> > +
> > +				at91bootstrap at 0 {
> > +					label = "at91bs";
> > +					reg = <0x0 0x20000>;
> > +				};
> > +
> > +				uboot at 20000 {
> > +					label = "u-boot";
> > +					reg = <0x20000 0x80000>;
> > +				};
> > +
> > +				ubootenv at a0000 {
> > +					label = "u-boot-env";
> > +					reg = <0xa0000 0x20000>;
> > +				};
> > +
> > +				ubootenv at c0000 {
> > +					label = "redund-env";
> > +					reg = <0xc0000 0x20000>;
> > +				};
> > +
> > +				kernel-a at e0000 {
> > +					label = "kernel-a";
> > +					reg = <0xe0000 0x280000>;
> > +				};
> > +
> > +				kernel-b at 360000 {
> > +					label = "kernel-b";
> > +					reg = <0x360000 0x280000>;
> > +				};
> > +
> > +				rootfs-a at 5e0000 {
> > +					label = "rootfs-a";
> > +					reg = <0x5e0000 0x2600000>;
> > +				};
> > +
> > +				rootfs-b at 2be0000 {
> > +					label = "rootfs-b";
> > +					reg = <0x2be0000 0x2600000>;
> > +				};
> > +
> > +				user at 51e0000 {
> > +					label = "user";
> > +					reg = <0x51e0000 0x2dc0000>;
> > +				};
> > +
> > +				logs at 7fa0000 {
> > +					label = "logs";
> > +					reg = <0x7fa0000 0x60000>;
> > +				};
> > +
> > +			};
> > +		};
> > +	};
> > +};
> > +
> > +&usb0 {
> 
> This must be &usb1 label, isn't it?
> Because you are referring to ohci binding I suspect (found by having a
> look at: atmel,oc-gpio property...).

I believe usb0 is correct, as this is a at91sam9x5 part, the node in dtsi is -ohci.
sama5d3 is usb1 for -ohci.

> > +	num-ports = <2>;
> > +	atmel,vbus-gpio = <
> > +		&pioB 12 GPIO_ACTIVE_HIGH
> > +		&pioA 31 GPIO_ACTIVE_HIGH
> > +		>;
> > +	atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
> > +};
> > +
> > +&macb0 {
> > +	phy-mode = "rmii";
> > +};
> > +
> > +&spi0 {
> > +	cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
> > +};
> > +
> > +&usb2 {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_board_usb2>;
> > +	atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
> > +};
> > +
> > +&mmc0 {
> > +	pinctrl-0 = <
> > +		&pinctrl_mmc0_slot0_clk_cmd_dat0
> > +		&pinctrl_mmc0_slot0_dat1_3>;
> > +	slot at 0 {
> > +		reg = <0>;
> > +		bus-width = <4>;
> > +	};
> > +};
> >
> 
> 
> --
> Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
  2018-06-15 10:01     ` Ben Whitten
  (?)
@ 2018-06-15 12:07       ` Nicolas Ferre
  -1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-15 12:07 UTC (permalink / raw)
  To: Ben Whitten, Ben Whitten, devicetree, Alexandre Belloni
  Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel

On 15/06/2018 at 12:01, Ben Whitten wrote:
>> On 14/06/2018 at 10:51, Ben Whitten wrote:
>>> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
>>> ---
>>>    arch/arm/boot/dts/Makefile        |   3 +-
>>>    arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>>>    arch/arm/boot/dts/at91-wb45n.dtsi | 169
>> ++++++++++++++++++++++++++++++++++++++
>>>    3 files changed, 237 insertions(+), 1 deletion(-)
>>>    create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>>>    create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index 7e24249..1ee94ee 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>>>    	at91sam9g25ek.dtb \
>>>    	at91sam9g35ek.dtb \
>>>    	at91sam9x25ek.dtb \
>>> -	at91sam9x35ek.dtb
>>> +	at91sam9x35ek.dtb \
>>> +	at91-wb45n.dtb
>>>    dtb-$(CONFIG_SOC_SAM_V7) += \
>>>    	at91-kizbox2.dtb \
>>>    	at91-nattis-2-natte-2.dtb \
>>> diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-
>> wb45n.dts
>>> new file mode 100644
>>> index 0000000..4e88815
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-wb45n.dts
>>> @@ -0,0 +1,66 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * at91-wb45n.dts - Device Tree file for WB45NBT board
>>> + *
>>> + *  Copyright (C) 2018 Laird
>>> + *
>>> +*/
>>> +/dts-v1/;
>>> +#include "at91-wb45n.dtsi"
>>> +
>>> +/ {
>>> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
>>> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
>> "atmel,at91sam9";
>>
>> "laird" prefix must be added to
>> Documentation/devicetree/bindings/vendor-prefixes.txt before using it:
>> you can do a little patch as a first patch of this series.
>> Otherwise it will trigger a warning message while running
>> scripts/checkpatch.pl on top of your patch.
>>
>>
>>> +
>>> +	ahb {
>>> +		apb {
>>> +			watchdog@fffffe40 {
>>> +				status = "okay";
>>> +			};
>>> +		};
>>> +	};
>>> +
>>> +	gpio_keys {
>>> +		compatible = "gpio-keys";
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +		irqbtn@pb18 {
>>
>> I'm not sure that the @pb18 can be used like this. This address
>> extension must be used in a "reg" property in the node. dtc used with
>> warning switch on might trigger an error for this.
>>
>>> +			label = "IRQBTN";
>>> +			linux,code = <99>;
>>> +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
>>> +			gpio-key,wakeup = <1>;
>>> +		};
>>> +	};
>>> +};
>>> +
>>> +&usb0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&mmc0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&spi0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&macb0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&dbgu {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&usart0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&usart3 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&i2c1 {
>>> +	status = "okay";
>>> +};
>>> diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-
>> wb45n.dtsi
>>> new file mode 100644
>>> index 0000000..2fa58e2
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
>>> @@ -0,0 +1,169 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
>>> + *
>>> + *  Copyright (C) 2018 Laird
>>> + *
>>> + */
>>> +
>>> +#include "at91sam9g25.dtsi"
>>> +
>>> +/ {
>>> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
>>> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
>> "atmel,at91sam9";
>>> +
>>> +	chosen {
>>> +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs
>> rw";
>>> +		stdout-path = "serial0:115200n8";
>>> +	};
>>> +
>>> +	memory {
>>> +		reg = <0x20000000 0x4000000>;
>>> +	};
>>> +
>>> +	ahb {
>>> +		apb {
>>> +			shdwc@fffffe10 {
>>
>> I would advice you to take exactly the node name:
>> "shutdown-controller@fffffe10"; Anyway, it will go away after you use
>> the label notation as advised by Alexandre.
>>
>>> +				atmel,wakeup-mode = "low";
>>> +			};
>>> +
>>> +			pinctrl@fffff400 {
>>> +				usb2 {
>>> +					pinctrl_board_usb2: usb2-board {
>>> +						atmel,pins =
>>> +							<AT91_PIOB 11
>> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio
>> vbus sense, deglitch */
>>> +					};
>>> +				};
>>> +			};
>>> +
>>> +			rstc@fffffe00 {
>>> +				compatible = "atmel,sama5d3-rstc";
>>> +			};
>>
>> I don't think this node is needed.
> 
> I dug through our old code reviews and found this message relating to testing
> reboot over several thousand times in our testbed:
> After the slow clock has been enabled on the reset controller via upstream
> changes, the dram disable access and power down code is causing the SAM9G25
> to hang occasionally on reboot.  Using the simple reset function provided
> for SAMA5D3 instead.
> 
> So it appears to be a workaround for a bug that existed ~2 years ago, may still be
> relevant as there haven't been many changes to the reset code in that time.

All right, I read too quickly and thought it was sama5d3... Your 
feedback is interesting anyway. I'll store this for future reference and 
investigation.

>>> +
>>> +		};
>>> +	};
>>> +
>>> +	atheros {
>>> +		compatible = "atheros,ath6kl";
>>> +		atheros,board-id = "SD32";
>>> +	};
>>> +};
>>> +
>>> +&slow_xtal {
>>> +	clock-frequency = <32768>;
>>> +};
>>> +
>>> +&main_xtal {
>>> +	clock-frequency = <12000000>;
>>> +};
>>> +
>>> +&ebi {
>>> +	status = "okay";
>>> +	nand_controller: nand-controller {
>>> +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb
>> &pinctrl_nand_oe_we>;
>>> +		pinctrl-names = "default";
>>> +		status = "okay";
>>> +
>>> +		nand@3 {
>>> +			reg = <0x3 0x0 0x800000>;
>>> +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
>>> +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
>>> +			nand-bus-width = <8>;
>>> +			nand-ecc-mode = "hw";
>>> +			nand-ecc-strength = <4>;
>>> +			nand-ecc-step-size = <512>;
>>> +			nand-on-flash-bbt;
>>> +			label = "atmel_nand";
>>> +
>>> +			partitions {
>>> +				compatible = "fixed-partitions";
>>> +				#address-cells = <1>;
>>> +				#size-cells = <1>;
>>> +
>>> +				at91bootstrap@0 {
>>> +					label = "at91bs";
>>> +					reg = <0x0 0x20000>;
>>> +				};
>>> +
>>> +				uboot@20000 {
>>> +					label = "u-boot";
>>> +					reg = <0x20000 0x80000>;
>>> +				};
>>> +
>>> +				ubootenv@a0000 {
>>> +					label = "u-boot-env";
>>> +					reg = <0xa0000 0x20000>;
>>> +				};
>>> +
>>> +				ubootenv@c0000 {
>>> +					label = "redund-env";
>>> +					reg = <0xc0000 0x20000>;
>>> +				};
>>> +
>>> +				kernel-a@e0000 {
>>> +					label = "kernel-a";
>>> +					reg = <0xe0000 0x280000>;
>>> +				};
>>> +
>>> +				kernel-b@360000 {
>>> +					label = "kernel-b";
>>> +					reg = <0x360000 0x280000>;
>>> +				};
>>> +
>>> +				rootfs-a@5e0000 {
>>> +					label = "rootfs-a";
>>> +					reg = <0x5e0000 0x2600000>;
>>> +				};
>>> +
>>> +				rootfs-b@2be0000 {
>>> +					label = "rootfs-b";
>>> +					reg = <0x2be0000 0x2600000>;
>>> +				};
>>> +
>>> +				user@51e0000 {
>>> +					label = "user";
>>> +					reg = <0x51e0000 0x2dc0000>;
>>> +				};
>>> +
>>> +				logs@7fa0000 {
>>> +					label = "logs";
>>> +					reg = <0x7fa0000 0x60000>;
>>> +				};
>>> +
>>> +			};
>>> +		};
>>> +	};
>>> +};
>>> +
>>> +&usb0 {
>>
>> This must be &usb1 label, isn't it?
>> Because you are referring to ohci binding I suspect (found by having a
>> look at: atmel,oc-gpio property...).
> 
> I believe usb0 is correct, as this is a at91sam9x5 part, the node in dtsi is -ohci.
> sama5d3 is usb1 for -ohci.

All right, like previous comment, I thought it was sama5d3: sorry for 
the noise.

Best regards,
   Nicolas
-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* Re: [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-15 12:07       ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-15 12:07 UTC (permalink / raw)
  To: Ben Whitten, Ben Whitten, devicetree, Alexandre Belloni
  Cc: Rob Herring, Mark Rutland, linux-kernel, linux-arm-kernel

On 15/06/2018 at 12:01, Ben Whitten wrote:
>> On 14/06/2018 at 10:51, Ben Whitten wrote:
>>> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
>>> ---
>>>    arch/arm/boot/dts/Makefile        |   3 +-
>>>    arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>>>    arch/arm/boot/dts/at91-wb45n.dtsi | 169
>> ++++++++++++++++++++++++++++++++++++++
>>>    3 files changed, 237 insertions(+), 1 deletion(-)
>>>    create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>>>    create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index 7e24249..1ee94ee 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>>>    	at91sam9g25ek.dtb \
>>>    	at91sam9g35ek.dtb \
>>>    	at91sam9x25ek.dtb \
>>> -	at91sam9x35ek.dtb
>>> +	at91sam9x35ek.dtb \
>>> +	at91-wb45n.dtb
>>>    dtb-$(CONFIG_SOC_SAM_V7) += \
>>>    	at91-kizbox2.dtb \
>>>    	at91-nattis-2-natte-2.dtb \
>>> diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-
>> wb45n.dts
>>> new file mode 100644
>>> index 0000000..4e88815
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-wb45n.dts
>>> @@ -0,0 +1,66 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * at91-wb45n.dts - Device Tree file for WB45NBT board
>>> + *
>>> + *  Copyright (C) 2018 Laird
>>> + *
>>> +*/
>>> +/dts-v1/;
>>> +#include "at91-wb45n.dtsi"
>>> +
>>> +/ {
>>> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
>>> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
>> "atmel,at91sam9";
>>
>> "laird" prefix must be added to
>> Documentation/devicetree/bindings/vendor-prefixes.txt before using it:
>> you can do a little patch as a first patch of this series.
>> Otherwise it will trigger a warning message while running
>> scripts/checkpatch.pl on top of your patch.
>>
>>
>>> +
>>> +	ahb {
>>> +		apb {
>>> +			watchdog@fffffe40 {
>>> +				status = "okay";
>>> +			};
>>> +		};
>>> +	};
>>> +
>>> +	gpio_keys {
>>> +		compatible = "gpio-keys";
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +		irqbtn@pb18 {
>>
>> I'm not sure that the @pb18 can be used like this. This address
>> extension must be used in a "reg" property in the node. dtc used with
>> warning switch on might trigger an error for this.
>>
>>> +			label = "IRQBTN";
>>> +			linux,code = <99>;
>>> +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
>>> +			gpio-key,wakeup = <1>;
>>> +		};
>>> +	};
>>> +};
>>> +
>>> +&usb0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&mmc0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&spi0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&macb0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&dbgu {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&usart0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&usart3 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&i2c1 {
>>> +	status = "okay";
>>> +};
>>> diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-
>> wb45n.dtsi
>>> new file mode 100644
>>> index 0000000..2fa58e2
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
>>> @@ -0,0 +1,169 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
>>> + *
>>> + *  Copyright (C) 2018 Laird
>>> + *
>>> + */
>>> +
>>> +#include "at91sam9g25.dtsi"
>>> +
>>> +/ {
>>> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
>>> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
>> "atmel,at91sam9";
>>> +
>>> +	chosen {
>>> +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs
>> rw";
>>> +		stdout-path = "serial0:115200n8";
>>> +	};
>>> +
>>> +	memory {
>>> +		reg = <0x20000000 0x4000000>;
>>> +	};
>>> +
>>> +	ahb {
>>> +		apb {
>>> +			shdwc@fffffe10 {
>>
>> I would advice you to take exactly the node name:
>> "shutdown-controller@fffffe10"; Anyway, it will go away after you use
>> the label notation as advised by Alexandre.
>>
>>> +				atmel,wakeup-mode = "low";
>>> +			};
>>> +
>>> +			pinctrl@fffff400 {
>>> +				usb2 {
>>> +					pinctrl_board_usb2: usb2-board {
>>> +						atmel,pins =
>>> +							<AT91_PIOB 11
>> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio
>> vbus sense, deglitch */
>>> +					};
>>> +				};
>>> +			};
>>> +
>>> +			rstc@fffffe00 {
>>> +				compatible = "atmel,sama5d3-rstc";
>>> +			};
>>
>> I don't think this node is needed.
> 
> I dug through our old code reviews and found this message relating to testing
> reboot over several thousand times in our testbed:
> After the slow clock has been enabled on the reset controller via upstream
> changes, the dram disable access and power down code is causing the SAM9G25
> to hang occasionally on reboot.  Using the simple reset function provided
> for SAMA5D3 instead.
> 
> So it appears to be a workaround for a bug that existed ~2 years ago, may still be
> relevant as there haven't been many changes to the reset code in that time.

All right, I read too quickly and thought it was sama5d3... Your 
feedback is interesting anyway. I'll store this for future reference and 
investigation.

>>> +
>>> +		};
>>> +	};
>>> +
>>> +	atheros {
>>> +		compatible = "atheros,ath6kl";
>>> +		atheros,board-id = "SD32";
>>> +	};
>>> +};
>>> +
>>> +&slow_xtal {
>>> +	clock-frequency = <32768>;
>>> +};
>>> +
>>> +&main_xtal {
>>> +	clock-frequency = <12000000>;
>>> +};
>>> +
>>> +&ebi {
>>> +	status = "okay";
>>> +	nand_controller: nand-controller {
>>> +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb
>> &pinctrl_nand_oe_we>;
>>> +		pinctrl-names = "default";
>>> +		status = "okay";
>>> +
>>> +		nand@3 {
>>> +			reg = <0x3 0x0 0x800000>;
>>> +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
>>> +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
>>> +			nand-bus-width = <8>;
>>> +			nand-ecc-mode = "hw";
>>> +			nand-ecc-strength = <4>;
>>> +			nand-ecc-step-size = <512>;
>>> +			nand-on-flash-bbt;
>>> +			label = "atmel_nand";
>>> +
>>> +			partitions {
>>> +				compatible = "fixed-partitions";
>>> +				#address-cells = <1>;
>>> +				#size-cells = <1>;
>>> +
>>> +				at91bootstrap@0 {
>>> +					label = "at91bs";
>>> +					reg = <0x0 0x20000>;
>>> +				};
>>> +
>>> +				uboot@20000 {
>>> +					label = "u-boot";
>>> +					reg = <0x20000 0x80000>;
>>> +				};
>>> +
>>> +				ubootenv@a0000 {
>>> +					label = "u-boot-env";
>>> +					reg = <0xa0000 0x20000>;
>>> +				};
>>> +
>>> +				ubootenv@c0000 {
>>> +					label = "redund-env";
>>> +					reg = <0xc0000 0x20000>;
>>> +				};
>>> +
>>> +				kernel-a@e0000 {
>>> +					label = "kernel-a";
>>> +					reg = <0xe0000 0x280000>;
>>> +				};
>>> +
>>> +				kernel-b@360000 {
>>> +					label = "kernel-b";
>>> +					reg = <0x360000 0x280000>;
>>> +				};
>>> +
>>> +				rootfs-a@5e0000 {
>>> +					label = "rootfs-a";
>>> +					reg = <0x5e0000 0x2600000>;
>>> +				};
>>> +
>>> +				rootfs-b@2be0000 {
>>> +					label = "rootfs-b";
>>> +					reg = <0x2be0000 0x2600000>;
>>> +				};
>>> +
>>> +				user@51e0000 {
>>> +					label = "user";
>>> +					reg = <0x51e0000 0x2dc0000>;
>>> +				};
>>> +
>>> +				logs@7fa0000 {
>>> +					label = "logs";
>>> +					reg = <0x7fa0000 0x60000>;
>>> +				};
>>> +
>>> +			};
>>> +		};
>>> +	};
>>> +};
>>> +
>>> +&usb0 {
>>
>> This must be &usb1 label, isn't it?
>> Because you are referring to ohci binding I suspect (found by having a
>> look at: atmel,oc-gpio property...).
> 
> I believe usb0 is correct, as this is a at91sam9x5 part, the node in dtsi is -ohci.
> sama5d3 is usb1 for -ohci.

All right, like previous comment, I thought it was sama5d3: sorry for 
the noise.

Best regards,
   Nicolas
-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

* [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK
@ 2018-06-15 12:07       ` Nicolas Ferre
  0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Ferre @ 2018-06-15 12:07 UTC (permalink / raw)
  To: linux-arm-kernel

On 15/06/2018 at 12:01, Ben Whitten wrote:
>> On 14/06/2018 at 10:51, Ben Whitten wrote:
>>> Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
>>> ---
>>>    arch/arm/boot/dts/Makefile        |   3 +-
>>>    arch/arm/boot/dts/at91-wb45n.dts  |  66 +++++++++++++++
>>>    arch/arm/boot/dts/at91-wb45n.dtsi | 169
>> ++++++++++++++++++++++++++++++++++++++
>>>    3 files changed, 237 insertions(+), 1 deletion(-)
>>>    create mode 100644 arch/arm/boot/dts/at91-wb45n.dts
>>>    create mode 100644 arch/arm/boot/dts/at91-wb45n.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index 7e24249..1ee94ee 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -42,7 +42,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
>>>    	at91sam9g25ek.dtb \
>>>    	at91sam9g35ek.dtb \
>>>    	at91sam9x25ek.dtb \
>>> -	at91sam9x35ek.dtb
>>> +	at91sam9x35ek.dtb \
>>> +	at91-wb45n.dtb
>>>    dtb-$(CONFIG_SOC_SAM_V7) += \
>>>    	at91-kizbox2.dtb \
>>>    	at91-nattis-2-natte-2.dtb \
>>> diff --git a/arch/arm/boot/dts/at91-wb45n.dts b/arch/arm/boot/dts/at91-
>> wb45n.dts
>>> new file mode 100644
>>> index 0000000..4e88815
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-wb45n.dts
>>> @@ -0,0 +1,66 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * at91-wb45n.dts - Device Tree file for WB45NBT board
>>> + *
>>> + *  Copyright (C) 2018 Laird
>>> + *
>>> +*/
>>> +/dts-v1/;
>>> +#include "at91-wb45n.dtsi"
>>> +
>>> +/ {
>>> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
>>> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
>> "atmel,at91sam9";
>>
>> "laird" prefix must be added to
>> Documentation/devicetree/bindings/vendor-prefixes.txt before using it:
>> you can do a little patch as a first patch of this series.
>> Otherwise it will trigger a warning message while running
>> scripts/checkpatch.pl on top of your patch.
>>
>>
>>> +
>>> +	ahb {
>>> +		apb {
>>> +			watchdog at fffffe40 {
>>> +				status = "okay";
>>> +			};
>>> +		};
>>> +	};
>>> +
>>> +	gpio_keys {
>>> +		compatible = "gpio-keys";
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +		irqbtn at pb18 {
>>
>> I'm not sure that the @pb18 can be used like this. This address
>> extension must be used in a "reg" property in the node. dtc used with
>> warning switch on might trigger an error for this.
>>
>>> +			label = "IRQBTN";
>>> +			linux,code = <99>;
>>> +			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
>>> +			gpio-key,wakeup = <1>;
>>> +		};
>>> +	};
>>> +};
>>> +
>>> +&usb0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&mmc0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&spi0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&macb0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&dbgu {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&usart0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&usart3 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&i2c1 {
>>> +	status = "okay";
>>> +};
>>> diff --git a/arch/arm/boot/dts/at91-wb45n.dtsi b/arch/arm/boot/dts/at91-
>> wb45n.dtsi
>>> new file mode 100644
>>> index 0000000..2fa58e2
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91-wb45n.dtsi
>>> @@ -0,0 +1,169 @@
>>> +// SPDX-License-Identifier: GPL-2.0
>>> +/*
>>> + * at91-wb45n.dtsi - Device Tree file for WB45NBT board
>>> + *
>>> + *  Copyright (C) 2018 Laird
>>> + *
>>> + */
>>> +
>>> +#include "at91sam9g25.dtsi"
>>> +
>>> +/ {
>>> +	model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
>>> +	compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5",
>> "atmel,at91sam9";
>>> +
>>> +	chosen {
>>> +		bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs
>> rw";
>>> +		stdout-path = "serial0:115200n8";
>>> +	};
>>> +
>>> +	memory {
>>> +		reg = <0x20000000 0x4000000>;
>>> +	};
>>> +
>>> +	ahb {
>>> +		apb {
>>> +			shdwc at fffffe10 {
>>
>> I would advice you to take exactly the node name:
>> "shutdown-controller at fffffe10"; Anyway, it will go away after you use
>> the label notation as advised by Alexandre.
>>
>>> +				atmel,wakeup-mode = "low";
>>> +			};
>>> +
>>> +			pinctrl at fffff400 {
>>> +				usb2 {
>>> +					pinctrl_board_usb2: usb2-board {
>>> +						atmel,pins =
>>> +							<AT91_PIOB 11
>> AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;		/* PB11 gpio
>> vbus sense, deglitch */
>>> +					};
>>> +				};
>>> +			};
>>> +
>>> +			rstc at fffffe00 {
>>> +				compatible = "atmel,sama5d3-rstc";
>>> +			};
>>
>> I don't think this node is needed.
> 
> I dug through our old code reviews and found this message relating to testing
> reboot over several thousand times in our testbed:
> After the slow clock has been enabled on the reset controller via upstream
> changes, the dram disable access and power down code is causing the SAM9G25
> to hang occasionally on reboot.  Using the simple reset function provided
> for SAMA5D3 instead.
> 
> So it appears to be a workaround for a bug that existed ~2 years ago, may still be
> relevant as there haven't been many changes to the reset code in that time.

All right, I read too quickly and thought it was sama5d3... Your 
feedback is interesting anyway. I'll store this for future reference and 
investigation.

>>> +
>>> +		};
>>> +	};
>>> +
>>> +	atheros {
>>> +		compatible = "atheros,ath6kl";
>>> +		atheros,board-id = "SD32";
>>> +	};
>>> +};
>>> +
>>> +&slow_xtal {
>>> +	clock-frequency = <32768>;
>>> +};
>>> +
>>> +&main_xtal {
>>> +	clock-frequency = <12000000>;
>>> +};
>>> +
>>> +&ebi {
>>> +	status = "okay";
>>> +	nand_controller: nand-controller {
>>> +		pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb
>> &pinctrl_nand_oe_we>;
>>> +		pinctrl-names = "default";
>>> +		status = "okay";
>>> +
>>> +		nand at 3 {
>>> +			reg = <0x3 0x0 0x800000>;
>>> +			rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
>>> +			cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
>>> +			nand-bus-width = <8>;
>>> +			nand-ecc-mode = "hw";
>>> +			nand-ecc-strength = <4>;
>>> +			nand-ecc-step-size = <512>;
>>> +			nand-on-flash-bbt;
>>> +			label = "atmel_nand";
>>> +
>>> +			partitions {
>>> +				compatible = "fixed-partitions";
>>> +				#address-cells = <1>;
>>> +				#size-cells = <1>;
>>> +
>>> +				at91bootstrap at 0 {
>>> +					label = "at91bs";
>>> +					reg = <0x0 0x20000>;
>>> +				};
>>> +
>>> +				uboot at 20000 {
>>> +					label = "u-boot";
>>> +					reg = <0x20000 0x80000>;
>>> +				};
>>> +
>>> +				ubootenv at a0000 {
>>> +					label = "u-boot-env";
>>> +					reg = <0xa0000 0x20000>;
>>> +				};
>>> +
>>> +				ubootenv at c0000 {
>>> +					label = "redund-env";
>>> +					reg = <0xc0000 0x20000>;
>>> +				};
>>> +
>>> +				kernel-a at e0000 {
>>> +					label = "kernel-a";
>>> +					reg = <0xe0000 0x280000>;
>>> +				};
>>> +
>>> +				kernel-b at 360000 {
>>> +					label = "kernel-b";
>>> +					reg = <0x360000 0x280000>;
>>> +				};
>>> +
>>> +				rootfs-a at 5e0000 {
>>> +					label = "rootfs-a";
>>> +					reg = <0x5e0000 0x2600000>;
>>> +				};
>>> +
>>> +				rootfs-b at 2be0000 {
>>> +					label = "rootfs-b";
>>> +					reg = <0x2be0000 0x2600000>;
>>> +				};
>>> +
>>> +				user at 51e0000 {
>>> +					label = "user";
>>> +					reg = <0x51e0000 0x2dc0000>;
>>> +				};
>>> +
>>> +				logs at 7fa0000 {
>>> +					label = "logs";
>>> +					reg = <0x7fa0000 0x60000>;
>>> +				};
>>> +
>>> +			};
>>> +		};
>>> +	};
>>> +};
>>> +
>>> +&usb0 {
>>
>> This must be &usb1 label, isn't it?
>> Because you are referring to ohci binding I suspect (found by having a
>> look at: atmel,oc-gpio property...).
> 
> I believe usb0 is correct, as this is a at91sam9x5 part, the node in dtsi is -ohci.
> sama5d3 is usb1 for -ohci.

All right, like previous comment, I thought it was sama5d3: sorry for 
the noise.

Best regards,
   Nicolas
-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 34+ messages in thread

end of thread, other threads:[~2018-06-15 12:07 UTC | newest]

Thread overview: 34+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-14  8:51 [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK Ben Whitten
2018-06-14  8:51 ` Ben Whitten
2018-06-14  8:51 ` [PATCH 2/4] arm: dts: add support for Laird WB50N " Ben Whitten
2018-06-14  8:51   ` Ben Whitten
2018-06-14  9:50   ` Alexandre Belloni
2018-06-14  9:50     ` Alexandre Belloni
2018-06-14 11:47     ` Nicolas Ferre
2018-06-14 11:47       ` Nicolas Ferre
2018-06-14 11:47       ` Nicolas Ferre
2018-06-14  8:51 ` [PATCH 3/4] arm: dts: add support for Gatwick board based on WB50N Ben Whitten
2018-06-14  8:51   ` Ben Whitten
2018-06-14  8:51 ` [PATCH 4/4] arm: dts: add support for Laird SOM60 module and DVK boards Ben Whitten
2018-06-14  8:51   ` Ben Whitten
2018-06-14 13:14   ` Nicolas Ferre
2018-06-14 13:14     ` Nicolas Ferre
2018-06-14 13:14     ` Nicolas Ferre
2018-06-15  8:57     ` Ben Whitten
2018-06-15  8:57       ` Ben Whitten
2018-06-15  8:57       ` Ben Whitten
2018-06-14  9:07 ` [PATCH 1/4] arm: dts: add support for Laird WB45N cpu module and DVK Alexandre Belloni
2018-06-14  9:07   ` Alexandre Belloni
2018-06-14 11:24   ` Alexandre Belloni
2018-06-14 11:24     ` Alexandre Belloni
2018-06-14 12:52 ` Nicolas Ferre
2018-06-14 12:52   ` Nicolas Ferre
2018-06-14 12:52   ` Nicolas Ferre
2018-06-14 13:00   ` Alexandre Belloni
2018-06-14 13:00     ` Alexandre Belloni
2018-06-15 10:01   ` Ben Whitten
2018-06-15 10:01     ` Ben Whitten
2018-06-15 10:01     ` Ben Whitten
2018-06-15 12:07     ` Nicolas Ferre
2018-06-15 12:07       ` Nicolas Ferre
2018-06-15 12:07       ` Nicolas Ferre

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