* [PATCH 1/1] amdgpu: move asic id table to a separate file
@ 2017-05-10 20:56 Samuel Li
[not found] ` <1494449815-10162-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 19+ messages in thread
From: Samuel Li @ 2017-05-10 20:56 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Samuel Li, Xiaojie Yuan
From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
---
amdgpu/Makefile.am | 2 +
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------
amdgpu/amdgpu_device.c | 28 +++++--
amdgpu/amdgpu_internal.h | 10 +++
6 files changed, 232 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..ecf9e82 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 0000000..d50e21a
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok(buf, ",");
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok(NULL, ",");
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok(NULL, ",");
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = 256;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st line is file version */
+ if ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+ printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ } else {
+ goto free;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /*
+ * parse one line, its format looks like:
+ * 6617,C7,AMD Radeon R7 240 Series
+ */
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+
+ if (table_size >= table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ asic_id_table = realloc(asic_id_table, table_max_size *
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto free;
+ }
+ }
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size -1;
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736..0000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright © 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2d..9d08744 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++) {
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r)
+ fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",
+ __func__, r);
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a5..9d11bea 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1494449815-10162-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
@ 2017-05-10 21:10 ` Li, Samuel
[not found] ` <DM3PR1201MB10392013EC4407011C4F9B84F5EC0-BBcFnVpqZhVMmo+XJk11QmrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-11 10:51 ` Yuan, Xiaojie
1 sibling, 1 reply; 19+ messages in thread
From: Li, Samuel @ 2017-05-10 21:10 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Yuan, Xiaojie
[-- Attachment #1: Type: text/plain, Size: 17565 bytes --]
Also attach a sample ids file for reference. The names are from marketing, not related to source code and no reviews necessary here:) It can be put in directory /usr/share/libdrm.
Sam
-----Original Message-----
From: Li, Samuel
Sent: Wednesday, May 10, 2017 4:57 PM
To: amd-gfx@lists.freedesktop.org
Cc: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Li, Samuel <Samuel.Li@amd.com>
Subject: [PATCH 1/1] amdgpu: move asic id table to a separate file
From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
---
amdgpu/Makefile.am | 2 +
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------
amdgpu/amdgpu_device.c | 28 +++++--
amdgpu/amdgpu_internal.h | 10 +++
6 files changed, 232 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..ecf9e82 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 0000000..d50e21a
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok(buf, ",");
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok(NULL, ",");
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok(NULL, ",");
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = 256;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st line is file version */
+ if ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+ printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ } else {
+ goto free;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /*
+ * parse one line, its format looks like:
+ * 6617,C7,AMD Radeon R7 240 Series
+ */
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+
+ if (table_size >= table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ asic_id_table = realloc(asic_id_table, table_max_size *
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto free;
+ }
+ }
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size -1;
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736..0000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright © 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2d..9d08744 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++) {
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r)
+ fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",
+ __func__, r);
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a5..9d11bea 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
--
2.7.4
[-- Attachment #2: amdgpu.ids --]
[-- Type: application/octet-stream, Size: 4994 bytes --]
1.0.0
6600,0,AMD Radeon HD 8600/8700M
6600,81,AMD Radeon (TM) R7 M370
6601,0,AMD Radeon (TM) HD 8500M/8700M
6604,0,AMD Radeon R7 M265 Series
6604,81,AMD Radeon (TM) R7 M350
6605,0,AMD Radeon R7 M260 Series
6605,81,AMD Radeon (TM) R7 M340
6606,0,AMD Radeon HD 8790M
6607,0,AMD Radeon (TM) HD8530M
6608,0,AMD FirePro W2100
6610,0,AMD Radeon HD 8600 Series
6610,81,AMD Radeon (TM) R7 350
6610,83,AMD Radeon (TM) R5 340
6611,0,AMD Radeon HD 8500 Series
6613,0,AMD Radeon HD 8500 series
6617,C7,AMD Radeon R7 240 Series
6640,0,AMD Radeon HD 8950
6640,80,AMD Radeon (TM) R9 M380
6646,0,AMD Radeon R9 M280X
6646,80,AMD Radeon (TM) R9 M470X
6647,0,AMD Radeon R9 M270X
6647,80,AMD Radeon (TM) R9 M380
6649,0,AMD FirePro W5100
6658,0,AMD Radeon R7 200 Series
665C,0,AMD Radeon HD 7700 Series
665D,0,AMD Radeon R7 200 Series
665F,81,AMD Radeon (TM) R7 300 Series
6660,0,AMD Radeon HD 8600M Series
6660,81,AMD Radeon (TM) R5 M335
6660,83,AMD Radeon (TM) R5 M330
6663,0,AMD Radeon HD 8500M Series
6663,83,AMD Radeon (TM) R5 M320
6664,0,AMD Radeon R5 M200 Series
6665,0,AMD Radeon R5 M200 Series
6665,83,AMD Radeon (TM) R5 M320
6667,0,AMD Radeon R5 M200 Series
666F,0,AMD Radeon HD 8500M
6780,0,ATI FirePro V (FireGL V) Graphics Adapter
678A,0,ATI FirePro V (FireGL V) Graphics Adapter
6798,0,AMD Radeon HD 7900 Series
679A,0,AMD Radeon HD 7900 Series
679B,0,AMD Radeon HD 7900 Series
679E,0,AMD Radeon HD 7800 Series
67A0,0,AMD Radeon FirePro W9100
67A1,0,AMD Radeon FirePro W8100
67B0,0,AMD Radeon R9 200 Series
67B0,80,AMD Radeon (TM) R9 390 Series
67B1,0,AMD Radeon R9 200 Series
67B1,80,AMD Radeon (TM) R9 390 Series
67B9,0,AMD Radeon R9 200 Series
67DF,C1,Radeon RX 580 Series
67DF,C2,Radeon RX 570 Series
67DF,C3,Radeon RX 580 Series
67DF,C4,AMD Radeon (TM) RX 480 Graphics
67DF,C5,AMD Radeon (TM) RX 470 Graphics
67DF,C6,Radeon RX 570 Series
67DF,C7,AMD Radeon (TM) RX 480 Graphics
67DF,CF,AMD Radeon (TM) RX 470 Graphics
67DF,E3,Radeon RX Series
67DF,E7,Radeon RX 580 Series
67DF,EF,Radeon RX 570 Series
67C2,0,67C2:00
67C2,01,AMD Radeon (TM) Pro V7350x2
67C2,02,AMD Radeon (TM) Pro V7300X
67C4,00,AMD Radeon (TM) Pro WX 7100 Graphics
67C7,00,AMD Radeon (TM) Pro WX 5100 Graphics
67C0,00,AMD Radeon (TM) Pro WX 7100 Graphics
67D0,0,67D0:00
67D0,01,AMD Radeon (TM) Pro V7350x2
67D0,02,AMD Radeon (TM) Pro V7300X
67E0,00,AMD Radeon (TM) Pro WX Series
67E3,00,AMD Radeon (TM) Pro WX 4100
67E8,00,AMD Radeon (TM) Pro WX Series
67E8,01,AMD Radeon (TM) Pro WX Series
67E8,80,AMD Radeon (TM) E9260 Graphics
67EB,00,AMD Radeon (TM) Pro V5300X
67EF,C0,AMD Radeon (TM) RX Graphics
67EF,C1,AMD Radeon (TM) RX 460 Graphics
67EF,C3,Radeon RX Series
67EF,C5,AMD Radeon (TM) RX 460 Graphics
67EF,C7,AMD Radeon (TM) RX Graphics
67EF,CF,AMD Radeon (TM) RX 460 Graphics
67EF,E0,67EF:E0
67EF,E1,Radeon RX Series
67EF,E3,Radeon RX Series
67EF,E5,67EF:E5
67EF,E7,Radeon RX Series
67EF,EF,AMD Radeon (TM) RX Graphics
67EF,FF,Radeon RX Series
67FF,C0,AMD Radeon (TM) RX Graphics
67FF,C1,AMD Radeon (TM) RX Graphics
67FF,CF,67FF:CF
67FF,EF,67FF:EF
67FF,FF,Radeon RX 550 Series
6800,0,AMD Radeon HD 7970M
6801,0,AMD Radeon(TM) HD8970M
6808,0,ATI FirePro V(FireGL V) Graphics Adapter
6809,0,ATI FirePro V(FireGL V) Graphics Adapter
6810,0,AMD Radeon(TM) HD 8800 Series
6810,81,AMD Radeon (TM) R7 370 Series
6811,0,AMD Radeon(TM) HD8800 Series
6811,81,AMD Radeon (TM) R7 300 Series
6818,0,AMD Radeon HD 7800 Series
6819,0,AMD Radeon HD 7800 Series
6820,0,AMD Radeon HD 8800M Series
6820,81,AMD Radeon (TM) R9 M375
6820,83,AMD Radeon (TM) R9 M375X
6821,0,AMD Radeon HD 8800M Series
6821,87,AMD Radeon (TM) R7 M380
6821,83,AMD Radeon R9 (TM) M370X
6822,0,AMD Radeon E8860
6823,0,AMD Radeon HD 8800M Series
6825,0,AMD Radeon HD 7800M Series
6827,0,AMD Radeon HD 7800M Series
6828,0,ATI FirePro V(FireGL V) Graphics Adapter
682B,0,AMD Radeon HD 8800M Series
682B,87,AMD Radeon (TM) R9 M360
682C,0,AMD FirePro W4100
682D,0,AMD Radeon HD 7700M Series
682F,0,AMD Radeon HD 7700M Series
6835,0,AMD Radeon R7 Series / HD 9000 Series
6837,0,AMD Radeon HD7700 Series
683D,0,AMD Radeon HD 7700 Series
683F,0,AMD Radeon HD 7700 Series
6900,0,AMD Radeon R7 M260
6900,81,AMD Radeon (TM) R7 M360
6900,83,AMD Radeon (TM) R7 M340
6901,0,AMD Radeon R5 M255
6907,0,AMD Radeon R5 M255
6907,87,AMD Radeon (TM) R5 M315
6920,0,AMD RADEON R9 M395X
6920,1,AMD RADEON R9 M390X
6921,0,AMD Radeon R9 M295X
6929,0,AMD FirePro S7150
692B,0,AMD FirePro W7100
6938,0,AMD Radeon R9 200 Series
6938,F0,AMD Radeon R9 200 Series
6938,F1,AMD Radeon (TM) R9 380 Series
6939,F0,AMD Radeon R9 200 Series
6939,0,AMD Radeon R9 200 Series
6939,F1,AMD Radeon (TM) R9 380 Series
7300,C8,AMD Radeon (TM) R9 Fury Series
7300,C9,Radeon (TM) Pro Duo
7300,CB,AMD Radeon (TM) R9 Fury Series
7300,CA,AMD Radeon (TM) R9 Fury Series
9874,C4,AMD Radeon R7 Graphics
9874,C5,AMD Radeon R6 Graphics
9874,C6,AMD Radeon R6 Graphics
9874,C7,AMD Radeon R5 Graphics
9874,81,AMD Radeon R6 Graphics
9874,87,AMD Radeon R5 Graphics
9874,85,AMD Radeon R6 Graphics
9874,84,AMD Radeon R7 Graphics
[-- Attachment #3: Type: text/plain, Size: 154 bytes --]
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <DM3PR1201MB10392013EC4407011C4F9B84F5EC0-BBcFnVpqZhVMmo+XJk11QmrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
@ 2017-05-11 1:28 ` Zhang, Jerry (Junwei)
2017-05-11 2:24 ` Zhang, Jerry (Junwei)
2017-05-11 2:32 ` Michel Dänzer
2 siblings, 0 replies; 19+ messages in thread
From: Zhang, Jerry (Junwei) @ 2017-05-11 1:28 UTC (permalink / raw)
To: Li, Samuel, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Yuan, Xiaojie
looks fine to me, feel free to add my RB.
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
BTW, we also has 1 or 2 patch to improve the name parsing.
Please also take a look.
Jerry
On 05/11/2017 05:10 AM, Li, Samuel wrote:
> Also attach a sample ids file for reference. The names are from marketing, not related to source code and no reviews necessary here:) It can be put in directory /usr/share/libdrm.
>
> Sam
>
> -----Original Message-----
> From: Li, Samuel
> Sent: Wednesday, May 10, 2017 4:57 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Li, Samuel <Samuel.Li@amd.com>
> Subject: [PATCH 1/1] amdgpu: move asic id table to a separate file
>
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
> ---
> amdgpu/Makefile.am | 2 +
> amdgpu/Makefile.sources | 2 +-
> amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++
> amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------
> amdgpu/amdgpu_device.c | 28 +++++--
> amdgpu/amdgpu_internal.h | 10 +++
> 6 files changed, 232 insertions(+), 173 deletions(-)
> create mode 100644 amdgpu/amdgpu_asic_id.c
> delete mode 100644 amdgpu/amdgpu_asic_id.h
>
> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
> index cf7bc1b..ecf9e82 100644
> --- a/amdgpu/Makefile.am
> +++ b/amdgpu/Makefile.am
> @@ -30,6 +30,8 @@ AM_CFLAGS = \
> $(PTHREADSTUBS_CFLAGS) \
> -I$(top_srcdir)/include/drm
>
> +AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
> +
> libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
> libdrm_amdgpu_ladir = $(libdir)
> libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
> diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
> index 487b9e0..bc3abaa 100644
> --- a/amdgpu/Makefile.sources
> +++ b/amdgpu/Makefile.sources
> @@ -1,5 +1,5 @@
> LIBDRM_AMDGPU_FILES := \
> - amdgpu_asic_id.h \
> + amdgpu_asic_id.c \
> amdgpu_bo.c \
> amdgpu_cs.c \
> amdgpu_device.c \
> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
> new file mode 100644
> index 0000000..d50e21a
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> @@ -0,0 +1,198 @@
> +/*
> + * Copyright © 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifdef HAVE_CONFIG_H
> +#include "config.h"
> +#endif
> +
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include <errno.h>
> +
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + r = -EAGAIN;
> + goto out;
> + }
> +
> + /* device id */
> + s_did = strtok(buf, ",");
> + if (!s_did) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->did = strtol(s_did, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* revision id */
> + s_rid = strtok(NULL, ",");
> + if (!s_rid) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->rid = strtol(s_rid, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* marketing name */
> + s_name = strtok(NULL, ",");
> + if (!s_name) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->marketing_name = strdup(s_name);
> + if (id->marketing_name == NULL) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> +out:
> + free(buf);
> +
> + return r;
> +}
> +
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + struct amdgpu_asic_id *asic_id_table;
> + struct amdgpu_asic_id *id;
> + FILE *fp;
> + char *line = NULL;
> + size_t len;
> + ssize_t n;
> + int line_num = 1;
> + size_t table_size = 0;
> + size_t table_max_size = 256;
> + int r = 0;
> +
> + fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
> + if (!fp) {
> + fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
> + strerror(errno));
> + return -EINVAL;
> + }
> +
> + asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto close;
> + }
> +
> + /* 1st line is file version */
> + if ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> + printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + } else {
> + goto free;
> + }
> +
> + while ((n = getline(&line, &len, fp)) != -1) {
> + id = asic_id_table + table_size;
> +
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /*
> + * parse one line, its format looks like:
> + * 6617,C7,AMD Radeon R7 240 Series
> + */
> + r = parse_one_line(line, id);
> + if (r) {
> + if (r == -EAGAIN) {
> + line_num++;
> + continue;
> + }
> + fprintf(stderr, "Invalid format: %s: line %d: %s\n",
> + AMDGPU_ASIC_ID_TABLE, line_num, line);
> + goto free;
> + }
> +
> + line_num++;
> + table_size++;
> +
> + if (table_size >= table_max_size) {
> + /* double table size */
> + table_max_size *= 2;
> + asic_id_table = realloc(asic_id_table, table_max_size *
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto free;
> + }
> + }
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size -1;
> + if (id->marketing_name != NULL)
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
> + return r;
> +}
> diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
> deleted file mode 100644
> index 3e7d736..0000000
> --- a/amdgpu/amdgpu_asic_id.h
> +++ /dev/null
> @@ -1,165 +0,0 @@
> -/*
> - * Copyright © 2016 Advanced Micro Devices, Inc.
> - * All Rights Reserved.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - */
> -
> -#ifndef __AMDGPU_ASIC_ID_H__
> -#define __AMDGPU_ASIC_ID_H__
> -
> -static struct amdgpu_asic_id_table_t {
> - uint32_t did;
> - uint32_t rid;
> - const char *marketing_name;
> -} const amdgpu_asic_id_table [] = {
> - {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
> - {0x6600, 0x81, "AMD Radeon R7 M370"},
> - {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
> - {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
> - {0x6604, 0x81, "AMD Radeon R7 M350"},
> - {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
> - {0x6605, 0x81, "AMD Radeon R7 M340"},
> - {0x6606, 0x0, "AMD Radeon HD 8790M"},
> - {0x6607, 0x0, "AMD Radeon HD8530M"},
> - {0x6608, 0x0, "AMD FirePro W2100"},
> - {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
> - {0x6610, 0x81, "AMD Radeon R7 350"},
> - {0x6610, 0x83, "AMD Radeon R5 340"},
> - {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
> - {0x6613, 0x0, "AMD Radeon HD 8500 series"},
> - {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
> - {0x6640, 0x0, "AMD Radeon HD 8950"},
> - {0x6640, 0x80, "AMD Radeon R9 M380"},
> - {0x6646, 0x0, "AMD Radeon R9 M280X"},
> - {0x6646, 0x80, "AMD Radeon R9 M470X"},
> - {0x6647, 0x0, "AMD Radeon R9 M270X"},
> - {0x6647, 0x80, "AMD Radeon R9 M380"},
> - {0x6649, 0x0, "AMD FirePro W5100"},
> - {0x6658, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x665D, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665F, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
> - {0x6660, 0x81, "AMD Radeon R5 M335"},
> - {0x6660, 0x83, "AMD Radeon R5 M330"},
> - {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
> - {0x6663, 0x83, "AMD Radeon R5 M320"},
> - {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x83, "AMD Radeon R5 M320"},
> - {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x666F, 0x0, "AMD Radeon HD 8500M"},
> - {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
> - {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
> - {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
> - {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
> - {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
> - {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
> - {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
> - {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
> - {0x6800, 0x0, "AMD Radeon HD 7970M"},
> - {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
> - {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
> - {0x6810, 0x81, "AMD Radeon R7 370 Series"},
> - {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
> - {0x6811, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6820, 0x81, "AMD Radeon R9 M375"},
> - {0x6820, 0x83, "AMD Radeon R9 M375X"},
> - {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6821, 0x87, "AMD Radeon R7 M380"},
> - {0x6821, 0x83, "AMD Radeon R9 M370X"},
> - {0x6822, 0x0, "AMD Radeon E8860"},
> - {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x682B, 0x87, "AMD Radeon R9 M360"},
> - {0x682C, 0x0, "AMD FirePro W4100"},
> - {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
> - {0x6837, 0x0, "AMD Radeon HD7700 Series"},
> - {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x6900, 0x0, "AMD Radeon R7 M260"},
> - {0x6900, 0x81, "AMD Radeon R7 M360"},
> - {0x6900, 0x83, "AMD Radeon R7 M340"},
> - {0x6901, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x87, "AMD Radeon R5 M315"},
> - {0x6920, 0x0, "AMD Radeon R9 M395X"},
> - {0x6920, 0x1, "AMD Radeon R9 M390X"},
> - {0x6921, 0x0, "AMD Radeon R9 M295X"},
> - {0x6929, 0x0, "AMD FirePro S7150"},
> - {0x692B, 0x0, "AMD FirePro W7100"},
> - {0x6938, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
> - {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
> - {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x81, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x87, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x85, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x84, "AMD Radeon R7 Graphics"},
> -
> - {0x0000, 0x0, "\0"},
> -};
> -#endif
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
> index f473d2d..9d08744 100644
> --- a/amdgpu/amdgpu_device.c
> +++ b/amdgpu/amdgpu_device.c
> @@ -44,7 +44,6 @@
> #include "amdgpu_internal.h"
> #include "util_hash_table.h"
> #include "util_math.h"
> -#include "amdgpu_asic_id.h"
>
> #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
> #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
> @@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
>
> static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> {
> + const struct amdgpu_asic_id *id;
> amdgpu_vamgr_deinit(&dev->vamgr_32);
> amdgpu_vamgr_deinit(&dev->vamgr);
> util_hash_table_destroy(dev->bo_flink_names);
> @@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> close(dev->fd);
> if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
> close(dev->flink_fd);
> + if (dev->asic_ids) {
> + for (id = dev->asic_ids; id->did; id++) {
> + if (id->marketing_name != NULL)
> + free(id->marketing_name);
> + }
> + free(dev->asic_ids);
> + }
> free(dev);
> }
>
> @@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,
> amdgpu_vamgr_init(&dev->vamgr_32, start, max,
> dev->dev_info.virtual_address_alignment);
>
> + r = amdgpu_parse_asic_ids(&dev->asic_ids);
> + if (r)
> + fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",
> + __func__, r);
> +
> *major_version = dev->major_version;
> *minor_version = dev->minor_version;
> *device_handle = dev;
> @@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
>
> const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
> {
> - const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
> + const struct amdgpu_asic_id *id;
> +
> + if (!dev->asic_ids)
> + return NULL;
>
> - while (t->did) {
> - if ((t->did == dev->info.asic_id) &&
> - (t->rid == dev->info.pci_rev_id))
> - return t->marketing_name;
> - t++;
> + for (id = dev->asic_ids; id->did; id++) {
> + if ((id->did == dev->info.asic_id) &&
> + (id->rid == dev->info.pci_rev_id))
> + return id->marketing_name;
> }
>
> return NULL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index cf119a5..9d11bea 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -69,6 +69,12 @@ struct amdgpu_va {
> struct amdgpu_bo_va_mgr *vamgr;
> };
>
> +struct amdgpu_asic_id {
> + uint32_t did;
> + uint32_t rid;
> + char *marketing_name;
> +};
> +
> struct amdgpu_device {
> atomic_t refcount;
> int fd;
> @@ -76,6 +82,8 @@ struct amdgpu_device {
> unsigned major_version;
> unsigned minor_version;
>
> + /** Lookup table of asic device id, revision id and marketing name */
> + struct amdgpu_asic_id *asic_ids;
> /** List of buffer handles. Protected by bo_table_mutex. */
> struct util_hash_table *bo_handles;
> /** List of buffer GEM flink names. Protected by bo_table_mutex. */
> @@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
> drm_private void
> amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
>
> +drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
> +
> drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
>
> drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
>
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <DM3PR1201MB10392013EC4407011C4F9B84F5EC0-BBcFnVpqZhVMmo+XJk11QmrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-11 1:28 ` Zhang, Jerry (Junwei)
@ 2017-05-11 2:24 ` Zhang, Jerry (Junwei)
2017-05-11 2:32 ` Michel Dänzer
2 siblings, 0 replies; 19+ messages in thread
From: Zhang, Jerry (Junwei) @ 2017-05-11 2:24 UTC (permalink / raw)
To: Li, Samuel, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Yuan, Xiaojie
That's fine to me, please feel free to add my RB.
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
BTW, we also have some patches to improve it.
Please take a look if need.
Jerry
On 05/11/2017 05:10 AM, Li, Samuel wrote:
> Also attach a sample ids file for reference. The names are from marketing, not related to source code and no reviews necessary here:) It can be put in directory /usr/share/libdrm.
>
> Sam
>
> -----Original Message-----
> From: Li, Samuel
> Sent: Wednesday, May 10, 2017 4:57 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Li, Samuel <Samuel.Li@amd.com>
> Subject: [PATCH 1/1] amdgpu: move asic id table to a separate file
>
> From: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
>
> Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
> ---
> amdgpu/Makefile.am | 2 +
> amdgpu/Makefile.sources | 2 +-
> amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++
> amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------
> amdgpu/amdgpu_device.c | 28 +++++--
> amdgpu/amdgpu_internal.h | 10 +++
> 6 files changed, 232 insertions(+), 173 deletions(-)
> create mode 100644 amdgpu/amdgpu_asic_id.c
> delete mode 100644 amdgpu/amdgpu_asic_id.h
>
> diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
> index cf7bc1b..ecf9e82 100644
> --- a/amdgpu/Makefile.am
> +++ b/amdgpu/Makefile.am
> @@ -30,6 +30,8 @@ AM_CFLAGS = \
> $(PTHREADSTUBS_CFLAGS) \
> -I$(top_srcdir)/include/drm
>
> +AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
> +
> libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
> libdrm_amdgpu_ladir = $(libdir)
> libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
> diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
> index 487b9e0..bc3abaa 100644
> --- a/amdgpu/Makefile.sources
> +++ b/amdgpu/Makefile.sources
> @@ -1,5 +1,5 @@
> LIBDRM_AMDGPU_FILES := \
> - amdgpu_asic_id.h \
> + amdgpu_asic_id.c \
> amdgpu_bo.c \
> amdgpu_cs.c \
> amdgpu_device.c \
> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
> new file mode 100644
> index 0000000..d50e21a
> --- /dev/null
> +++ b/amdgpu/amdgpu_asic_id.c
> @@ -0,0 +1,198 @@
> +/*
> + * Copyright © 2017 Advanced Micro Devices, Inc.
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + */
> +
> +#ifdef HAVE_CONFIG_H
> +#include "config.h"
> +#endif
> +
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <stdint.h>
> +#include <string.h>
> +#include <unistd.h>
> +#include <errno.h>
> +
> +#include "amdgpu_drm.h"
> +#include "amdgpu_internal.h"
> +
> +static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
> +{
> + char *buf;
> + char *s_did;
> + char *s_rid;
> + char *s_name;
> + char *endptr;
> + int r = 0;
> +
> + buf = strdup(line);
> + if (!buf)
> + return -ENOMEM;
> +
> + /* ignore empty line and commented line */
> + if (strlen(line) == 0 || line[0] == '#') {
> + r = -EAGAIN;
> + goto out;
> + }
> +
> + /* device id */
> + s_did = strtok(buf, ",");
> + if (!s_did) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->did = strtol(s_did, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* revision id */
> + s_rid = strtok(NULL, ",");
> + if (!s_rid) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->rid = strtol(s_rid, &endptr, 16);
> + if (*endptr) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + /* marketing name */
> + s_name = strtok(NULL, ",");
> + if (!s_name) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> + id->marketing_name = strdup(s_name);
> + if (id->marketing_name == NULL) {
> + r = -EINVAL;
> + goto out;
> + }
> +
> +out:
> + free(buf);
> +
> + return r;
> +}
> +
> +int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
> +{
> + struct amdgpu_asic_id *asic_id_table;
> + struct amdgpu_asic_id *id;
> + FILE *fp;
> + char *line = NULL;
> + size_t len;
> + ssize_t n;
> + int line_num = 1;
> + size_t table_size = 0;
> + size_t table_max_size = 256;
> + int r = 0;
> +
> + fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
> + if (!fp) {
> + fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
> + strerror(errno));
> + return -EINVAL;
> + }
> +
> + asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto close;
> + }
> +
> + /* 1st line is file version */
> + if ((n = getline(&line, &len, fp)) != -1) {
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> + printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
> + } else {
> + goto free;
> + }
> +
> + while ((n = getline(&line, &len, fp)) != -1) {
> + id = asic_id_table + table_size;
> +
> + /* trim trailing newline */
> + if (line[n - 1] == '\n')
> + line[n - 1] = '\0';
> +
> + /*
> + * parse one line, its format looks like:
> + * 6617,C7,AMD Radeon R7 240 Series
> + */
> + r = parse_one_line(line, id);
> + if (r) {
> + if (r == -EAGAIN) {
> + line_num++;
> + continue;
> + }
> + fprintf(stderr, "Invalid format: %s: line %d: %s\n",
> + AMDGPU_ASIC_ID_TABLE, line_num, line);
> + goto free;
> + }
> +
> + line_num++;
> + table_size++;
> +
> + if (table_size >= table_max_size) {
> + /* double table size */
> + table_max_size *= 2;
> + asic_id_table = realloc(asic_id_table, table_max_size *
> + sizeof(struct amdgpu_asic_id));
> + if (!asic_id_table) {
> + r = -ENOMEM;
> + goto free;
> + }
> + }
> + }
> +
> + /* end of table */
> + id = asic_id_table + table_size;
> + memset(id, 0, sizeof(struct amdgpu_asic_id));
> +
> +free:
> + free(line);
> +
> + if (r && asic_id_table) {
> + while (table_size--) {
> + id = asic_id_table + table_size -1;
> + if (id->marketing_name != NULL)
> + free(id->marketing_name);
> + }
> + free(asic_id_table);
> + asic_id_table = NULL;
> + }
> +close:
> + fclose(fp);
> +
> + *p_asic_id_table = asic_id_table;
> +
> + return r;
> +}
> diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
> deleted file mode 100644
> index 3e7d736..0000000
> --- a/amdgpu/amdgpu_asic_id.h
> +++ /dev/null
> @@ -1,165 +0,0 @@
> -/*
> - * Copyright © 2016 Advanced Micro Devices, Inc.
> - * All Rights Reserved.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - *
> - */
> -
> -#ifndef __AMDGPU_ASIC_ID_H__
> -#define __AMDGPU_ASIC_ID_H__
> -
> -static struct amdgpu_asic_id_table_t {
> - uint32_t did;
> - uint32_t rid;
> - const char *marketing_name;
> -} const amdgpu_asic_id_table [] = {
> - {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
> - {0x6600, 0x81, "AMD Radeon R7 M370"},
> - {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
> - {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
> - {0x6604, 0x81, "AMD Radeon R7 M350"},
> - {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
> - {0x6605, 0x81, "AMD Radeon R7 M340"},
> - {0x6606, 0x0, "AMD Radeon HD 8790M"},
> - {0x6607, 0x0, "AMD Radeon HD8530M"},
> - {0x6608, 0x0, "AMD FirePro W2100"},
> - {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
> - {0x6610, 0x81, "AMD Radeon R7 350"},
> - {0x6610, 0x83, "AMD Radeon R5 340"},
> - {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
> - {0x6613, 0x0, "AMD Radeon HD 8500 series"},
> - {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
> - {0x6640, 0x0, "AMD Radeon HD 8950"},
> - {0x6640, 0x80, "AMD Radeon R9 M380"},
> - {0x6646, 0x0, "AMD Radeon R9 M280X"},
> - {0x6646, 0x80, "AMD Radeon R9 M470X"},
> - {0x6647, 0x0, "AMD Radeon R9 M270X"},
> - {0x6647, 0x80, "AMD Radeon R9 M380"},
> - {0x6649, 0x0, "AMD FirePro W5100"},
> - {0x6658, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x665D, 0x0, "AMD Radeon R7 200 Series"},
> - {0x665F, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
> - {0x6660, 0x81, "AMD Radeon R5 M335"},
> - {0x6660, 0x83, "AMD Radeon R5 M330"},
> - {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
> - {0x6663, 0x83, "AMD Radeon R5 M320"},
> - {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x6665, 0x83, "AMD Radeon R5 M320"},
> - {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
> - {0x666F, 0x0, "AMD Radeon HD 8500M"},
> - {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
> - {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
> - {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
> - {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
> - {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
> - {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
> - {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
> - {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
> - {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
> - {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
> - {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
> - {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
> - {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
> - {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
> - {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
> - {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
> - {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
> - {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
> - {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
> - {0x6800, 0x0, "AMD Radeon HD 7970M"},
> - {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
> - {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
> - {0x6810, 0x81, "AMD Radeon R7 370 Series"},
> - {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
> - {0x6811, 0x81, "AMD Radeon R7 300 Series"},
> - {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
> - {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6820, 0x81, "AMD Radeon R9 M375"},
> - {0x6820, 0x83, "AMD Radeon R9 M375X"},
> - {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6821, 0x87, "AMD Radeon R7 M380"},
> - {0x6821, 0x83, "AMD Radeon R9 M370X"},
> - {0x6822, 0x0, "AMD Radeon E8860"},
> - {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
> - {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
> - {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
> - {0x682B, 0x87, "AMD Radeon R9 M360"},
> - {0x682C, 0x0, "AMD FirePro W4100"},
> - {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
> - {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
> - {0x6837, 0x0, "AMD Radeon HD7700 Series"},
> - {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
> - {0x6900, 0x0, "AMD Radeon R7 M260"},
> - {0x6900, 0x81, "AMD Radeon R7 M360"},
> - {0x6900, 0x83, "AMD Radeon R7 M340"},
> - {0x6901, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x0, "AMD Radeon R5 M255"},
> - {0x6907, 0x87, "AMD Radeon R5 M315"},
> - {0x6920, 0x0, "AMD Radeon R9 M395X"},
> - {0x6920, 0x1, "AMD Radeon R9 M390X"},
> - {0x6921, 0x0, "AMD Radeon R9 M295X"},
> - {0x6929, 0x0, "AMD FirePro S7150"},
> - {0x692B, 0x0, "AMD FirePro W7100"},
> - {0x6938, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0x0, "AMD Radeon R9 200 Series"},
> - {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
> - {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
> - {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
> - {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
> - {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
> - {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x81, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x87, "AMD Radeon R5 Graphics"},
> - {0x9874, 0x85, "AMD Radeon R6 Graphics"},
> - {0x9874, 0x84, "AMD Radeon R7 Graphics"},
> -
> - {0x0000, 0x0, "\0"},
> -};
> -#endif
> diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
> index f473d2d..9d08744 100644
> --- a/amdgpu/amdgpu_device.c
> +++ b/amdgpu/amdgpu_device.c
> @@ -44,7 +44,6 @@
> #include "amdgpu_internal.h"
> #include "util_hash_table.h"
> #include "util_math.h"
> -#include "amdgpu_asic_id.h"
>
> #define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
> #define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
> @@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
>
> static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> {
> + const struct amdgpu_asic_id *id;
> amdgpu_vamgr_deinit(&dev->vamgr_32);
> amdgpu_vamgr_deinit(&dev->vamgr);
> util_hash_table_destroy(dev->bo_flink_names);
> @@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
> close(dev->fd);
> if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
> close(dev->flink_fd);
> + if (dev->asic_ids) {
> + for (id = dev->asic_ids; id->did; id++) {
> + if (id->marketing_name != NULL)
> + free(id->marketing_name);
> + }
> + free(dev->asic_ids);
> + }
> free(dev);
> }
>
> @@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,
> amdgpu_vamgr_init(&dev->vamgr_32, start, max,
> dev->dev_info.virtual_address_alignment);
>
> + r = amdgpu_parse_asic_ids(&dev->asic_ids);
> + if (r)
> + fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",
> + __func__, r);
> +
> *major_version = dev->major_version;
> *minor_version = dev->minor_version;
> *device_handle = dev;
> @@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
>
> const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
> {
> - const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
> + const struct amdgpu_asic_id *id;
> +
> + if (!dev->asic_ids)
> + return NULL;
>
> - while (t->did) {
> - if ((t->did == dev->info.asic_id) &&
> - (t->rid == dev->info.pci_rev_id))
> - return t->marketing_name;
> - t++;
> + for (id = dev->asic_ids; id->did; id++) {
> + if ((id->did == dev->info.asic_id) &&
> + (id->rid == dev->info.pci_rev_id))
> + return id->marketing_name;
> }
>
> return NULL;
> diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
> index cf119a5..9d11bea 100644
> --- a/amdgpu/amdgpu_internal.h
> +++ b/amdgpu/amdgpu_internal.h
> @@ -69,6 +69,12 @@ struct amdgpu_va {
> struct amdgpu_bo_va_mgr *vamgr;
> };
>
> +struct amdgpu_asic_id {
> + uint32_t did;
> + uint32_t rid;
> + char *marketing_name;
> +};
> +
> struct amdgpu_device {
> atomic_t refcount;
> int fd;
> @@ -76,6 +82,8 @@ struct amdgpu_device {
> unsigned major_version;
> unsigned minor_version;
>
> + /** Lookup table of asic device id, revision id and marketing name */
> + struct amdgpu_asic_id *asic_ids;
> /** List of buffer handles. Protected by bo_table_mutex. */
> struct util_hash_table *bo_handles;
> /** List of buffer GEM flink names. Protected by bo_table_mutex. */
> @@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
> drm_private void
> amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
>
> +drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
> +
> drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
>
> drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
>
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <DM3PR1201MB10392013EC4407011C4F9B84F5EC0-BBcFnVpqZhVMmo+XJk11QmrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-11 1:28 ` Zhang, Jerry (Junwei)
2017-05-11 2:24 ` Zhang, Jerry (Junwei)
@ 2017-05-11 2:32 ` Michel Dänzer
[not found] ` <fcbc7ab9-f5f7-c529-9526-d78772c0d830-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-05-11 21:15 ` Li, Samuel
2 siblings, 2 replies; 19+ messages in thread
From: Michel Dänzer @ 2017-05-11 2:32 UTC (permalink / raw)
To: Li, Samuel; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
On 11/05/17 06:10 AM, Li, Samuel wrote:
> Also attach a sample ids file for reference. The names are from marketing, not
> related to source code and no reviews necessary here:)
Just because it's not source code doesn't mean no review is necessary. :)
> It can be put in directory /usr/share/libdrm.
What is the canonical location where distros or users building upstream
libdrm can get this file from? There needs to be a good solution for
that before this can land.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1494449815-10162-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
2017-05-10 21:10 ` Li, Samuel
@ 2017-05-11 10:51 ` Yuan, Xiaojie
[not found] ` <BY2PR1201MB0968501917152E7FF9C1B19D89ED0-O28G1zQ8oGnHEywBZCNHpGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
1 sibling, 1 reply; 19+ messages in thread
From: Yuan, Xiaojie @ 2017-05-11 10:51 UTC (permalink / raw)
To: Li, Samuel, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 21603 bytes --]
Hi Samuel,
Here's an off-by-one error:
+ id = asic_id_table + table_size -1;
should be:
+ id = asic_id_table + table_size;
Regards,
Xiaojie
________________________________
From: Li, Samuel
Sent: Thursday, May 11, 2017 4:56:55 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Yuan, Xiaojie; Li, Samuel
Subject: [PATCH 1/1] amdgpu: move asic id table to a separate file
From: Xiaojie Yuan <Xiaojie.Yuan-5C7GfCeVMHo@public.gmane.org>
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Signed-off-by: Samuel Li <Samuel.Li-5C7GfCeVMHo@public.gmane.org>
---
amdgpu/Makefile.am | 2 +
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------
amdgpu/amdgpu_device.c | 28 +++++--
amdgpu/amdgpu_internal.h | 10 +++
6 files changed, 232 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..ecf9e82 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 0000000..d50e21a
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright © 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok(buf, ",");
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok(NULL, ",");
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok(NULL, ",");
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = 256;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st line is file version */
+ if ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+ printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ } else {
+ goto free;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /*
+ * parse one line, its format looks like:
+ * 6617,C7,AMD Radeon R7 240 Series
+ */
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+
+ if (table_size >= table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ asic_id_table = realloc(asic_id_table, table_max_size *
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto free;
+ }
+ }
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size -1;
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736..0000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright © 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2d..9d08744 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++) {
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r)
+ fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",
+ __func__, r);
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a5..9d11bea 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
--
2.7.4
[-- Attachment #1.2: Type: text/html, Size: 49544 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <BY2PR1201MB0968501917152E7FF9C1B19D89ED0-O28G1zQ8oGnHEywBZCNHpGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
@ 2017-05-11 16:03 ` Li, Samuel
0 siblings, 0 replies; 19+ messages in thread
From: Li, Samuel @ 2017-05-11 16:03 UTC (permalink / raw)
To: Yuan, Xiaojie, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
[-- Attachment #1.1: Type: text/plain, Size: 22047 bytes --]
Good catch!
Sam
From: Yuan, Xiaojie
Sent: Thursday, May 11, 2017 6:51 AM
To: Li, Samuel <Samuel.Li-5C7GfCeVMHo@public.gmane.org>; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
Hi Samuel,
Here's an off-by-one error:
+ id = asic_id_table + table_size -1;
should be:
+ id = asic_id_table + table_size;
Regards,
Xiaojie
________________________________
From: Li, Samuel
Sent: Thursday, May 11, 2017 4:56:55 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org<mailto:amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Cc: Yuan, Xiaojie; Li, Samuel
Subject: [PATCH 1/1] amdgpu: move asic id table to a separate file
From: Xiaojie Yuan <Xiaojie.Yuan-5C7GfCeVMHo@public.gmane.org<mailto:Xiaojie.Yuan-5C7GfCeVMHo@public.gmane.org>>
Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
Signed-off-by: Samuel Li <Samuel.Li-5C7GfCeVMHo@public.gmane.org<mailto:Samuel.Li-5C7GfCeVMHo@public.gmane.org>>
---
amdgpu/Makefile.am | 2 +
amdgpu/Makefile.sources | 2 +-
amdgpu/amdgpu_asic_id.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++
amdgpu/amdgpu_asic_id.h | 165 ---------------------------------------
amdgpu/amdgpu_device.c | 28 +++++--
amdgpu/amdgpu_internal.h | 10 +++
6 files changed, 232 insertions(+), 173 deletions(-)
create mode 100644 amdgpu/amdgpu_asic_id.c
delete mode 100644 amdgpu/amdgpu_asic_id.h
diff --git a/amdgpu/Makefile.am b/amdgpu/Makefile.am
index cf7bc1b..ecf9e82 100644
--- a/amdgpu/Makefile.am
+++ b/amdgpu/Makefile.am
@@ -30,6 +30,8 @@ AM_CFLAGS = \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
+AM_CPPFLAGS = -DAMDGPU_ASIC_ID_TABLE=\"${datadir}/libdrm/amdgpu.ids\"
+
libdrm_amdgpu_la_LTLIBRARIES = libdrm_amdgpu.la
libdrm_amdgpu_ladir = $(libdir)
libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index 487b9e0..bc3abaa 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -1,5 +1,5 @@
LIBDRM_AMDGPU_FILES := \
- amdgpu_asic_id.h \
+ amdgpu_asic_id.c \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
new file mode 100644
index 0000000..d50e21a
--- /dev/null
+++ b/amdgpu/amdgpu_asic_id.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2017 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include "amdgpu_drm.h"
+#include "amdgpu_internal.h"
+
+static int parse_one_line(const char *line, struct amdgpu_asic_id *id)
+{
+ char *buf;
+ char *s_did;
+ char *s_rid;
+ char *s_name;
+ char *endptr;
+ int r = 0;
+
+ buf = strdup(line);
+ if (!buf)
+ return -ENOMEM;
+
+ /* ignore empty line and commented line */
+ if (strlen(line) == 0 || line[0] == '#') {
+ r = -EAGAIN;
+ goto out;
+ }
+
+ /* device id */
+ s_did = strtok(buf, ",");
+ if (!s_did) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->did = strtol(s_did, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* revision id */
+ s_rid = strtok(NULL, ",");
+ if (!s_rid) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->rid = strtol(s_rid, &endptr, 16);
+ if (*endptr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ /* marketing name */
+ s_name = strtok(NULL, ",");
+ if (!s_name) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ id->marketing_name = strdup(s_name);
+ if (id->marketing_name == NULL) {
+ r = -EINVAL;
+ goto out;
+ }
+
+out:
+ free(buf);
+
+ return r;
+}
+
+int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
+{
+ struct amdgpu_asic_id *asic_id_table;
+ struct amdgpu_asic_id *id;
+ FILE *fp;
+ char *line = NULL;
+ size_t len;
+ ssize_t n;
+ int line_num = 1;
+ size_t table_size = 0;
+ size_t table_max_size = 256;
+ int r = 0;
+
+ fp = fopen(AMDGPU_ASIC_ID_TABLE, "r");
+ if (!fp) {
+ fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
+ strerror(errno));
+ return -EINVAL;
+ }
+
+ asic_id_table = calloc(table_max_size, sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto close;
+ }
+
+ /* 1st line is file version */
+ if ((n = getline(&line, &len, fp)) != -1) {
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+ printf("%s version: %s\n", AMDGPU_ASIC_ID_TABLE, line);
+ } else {
+ goto free;
+ }
+
+ while ((n = getline(&line, &len, fp)) != -1) {
+ id = asic_id_table + table_size;
+
+ /* trim trailing newline */
+ if (line[n - 1] == '\n')
+ line[n - 1] = '\0';
+
+ /*
+ * parse one line, its format looks like:
+ * 6617,C7,AMD Radeon R7 240 Series
+ */
+ r = parse_one_line(line, id);
+ if (r) {
+ if (r == -EAGAIN) {
+ line_num++;
+ continue;
+ }
+ fprintf(stderr, "Invalid format: %s: line %d: %s\n",
+ AMDGPU_ASIC_ID_TABLE, line_num, line);
+ goto free;
+ }
+
+ line_num++;
+ table_size++;
+
+ if (table_size >= table_max_size) {
+ /* double table size */
+ table_max_size *= 2;
+ asic_id_table = realloc(asic_id_table, table_max_size *
+ sizeof(struct amdgpu_asic_id));
+ if (!asic_id_table) {
+ r = -ENOMEM;
+ goto free;
+ }
+ }
+ }
+
+ /* end of table */
+ id = asic_id_table + table_size;
+ memset(id, 0, sizeof(struct amdgpu_asic_id));
+
+free:
+ free(line);
+
+ if (r && asic_id_table) {
+ while (table_size--) {
+ id = asic_id_table + table_size -1;
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(asic_id_table);
+ asic_id_table = NULL;
+ }
+close:
+ fclose(fp);
+
+ *p_asic_id_table = asic_id_table;
+
+ return r;
+}
diff --git a/amdgpu/amdgpu_asic_id.h b/amdgpu/amdgpu_asic_id.h
deleted file mode 100644
index 3e7d736..0000000
--- a/amdgpu/amdgpu_asic_id.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * Copyright (c) 2016 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef __AMDGPU_ASIC_ID_H__
-#define __AMDGPU_ASIC_ID_H__
-
-static struct amdgpu_asic_id_table_t {
- uint32_t did;
- uint32_t rid;
- const char *marketing_name;
-} const amdgpu_asic_id_table [] = {
- {0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
- {0x6600, 0x81, "AMD Radeon R7 M370"},
- {0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
- {0x6604, 0x0, "AMD Radeon R7 M265 Series"},
- {0x6604, 0x81, "AMD Radeon R7 M350"},
- {0x6605, 0x0, "AMD Radeon R7 M260 Series"},
- {0x6605, 0x81, "AMD Radeon R7 M340"},
- {0x6606, 0x0, "AMD Radeon HD 8790M"},
- {0x6607, 0x0, "AMD Radeon HD8530M"},
- {0x6608, 0x0, "AMD FirePro W2100"},
- {0x6610, 0x0, "AMD Radeon HD 8600 Series"},
- {0x6610, 0x81, "AMD Radeon R7 350"},
- {0x6610, 0x83, "AMD Radeon R5 340"},
- {0x6611, 0x0, "AMD Radeon HD 8500 Series"},
- {0x6613, 0x0, "AMD Radeon HD 8500 series"},
- {0x6617, 0xC7, "AMD Radeon R7 240 Series"},
- {0x6640, 0x0, "AMD Radeon HD 8950"},
- {0x6640, 0x80, "AMD Radeon R9 M380"},
- {0x6646, 0x0, "AMD Radeon R9 M280X"},
- {0x6646, 0x80, "AMD Radeon R9 M470X"},
- {0x6647, 0x0, "AMD Radeon R9 M270X"},
- {0x6647, 0x80, "AMD Radeon R9 M380"},
- {0x6649, 0x0, "AMD FirePro W5100"},
- {0x6658, 0x0, "AMD Radeon R7 200 Series"},
- {0x665C, 0x0, "AMD Radeon HD 7700 Series"},
- {0x665D, 0x0, "AMD Radeon R7 200 Series"},
- {0x665F, 0x81, "AMD Radeon R7 300 Series"},
- {0x6660, 0x0, "AMD Radeon HD 8600M Series"},
- {0x6660, 0x81, "AMD Radeon R5 M335"},
- {0x6660, 0x83, "AMD Radeon R5 M330"},
- {0x6663, 0x0, "AMD Radeon HD 8500M Series"},
- {0x6663, 0x83, "AMD Radeon R5 M320"},
- {0x6664, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x0, "AMD Radeon R5 M200 Series"},
- {0x6665, 0x83, "AMD Radeon R5 M320"},
- {0x6667, 0x0, "AMD Radeon R5 M200 Series"},
- {0x666F, 0x0, "AMD Radeon HD 8500M"},
- {0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
- {0x6798, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679A, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679B, 0x0, "AMD Radeon HD 7900 Series"},
- {0x679E, 0x0, "AMD Radeon HD 7800 Series"},
- {0x67A0, 0x0, "HAWAII XTGL (67A0)"},
- {0x67A1, 0x0, "HAWAII GL40 (67A1)"},
- {0x67B0, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B0, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B1, 0x0, "AMD Radeon R9 200 Series"},
- {0x67B1, 0x80, "AMD Radeon R9 390 Series"},
- {0x67B9, 0x0, "AMD Radeon R9 200 Series"},
- {0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
- {0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
- {0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
- {0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
- {0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
- {0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
- {0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
- {0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
- {0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
- {0x67EF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xC7, "AMD Radeon RX Graphics"},
- {0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
- {0x67EF, 0xEF, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC0, "AMD Radeon RX Graphics"},
- {0x67FF, 0xC1, "AMD Radeon RX Graphics"},
- {0x6800, 0x0, "AMD Radeon HD 7970M"},
- {0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
- {0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
- {0x6810, 0x81, "AMD Radeon R7 370 Series"},
- {0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
- {0x6811, 0x81, "AMD Radeon R7 300 Series"},
- {0x6818, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6819, 0x0, "AMD Radeon HD 7800 Series"},
- {0x6820, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6820, 0x81, "AMD Radeon R9 M375"},
- {0x6820, 0x83, "AMD Radeon R9 M375X"},
- {0x6821, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6821, 0x87, "AMD Radeon R7 M380"},
- {0x6821, 0x83, "AMD Radeon R9 M370X"},
- {0x6822, 0x0, "AMD Radeon E8860"},
- {0x6823, 0x0, "AMD Radeon HD 8800M Series"},
- {0x6825, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6827, 0x0, "AMD Radeon HD 7800M Series"},
- {0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
- {0x682B, 0x0, "AMD Radeon HD 8800M Series"},
- {0x682B, 0x87, "AMD Radeon R9 M360"},
- {0x682C, 0x0, "AMD FirePro W4100"},
- {0x682D, 0x0, "AMD Radeon HD 7700M Series"},
- {0x682F, 0x0, "AMD Radeon HD 7700M Series"},
- {0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
- {0x6837, 0x0, "AMD Radeon HD7700 Series"},
- {0x683D, 0x0, "AMD Radeon HD 7700 Series"},
- {0x683F, 0x0, "AMD Radeon HD 7700 Series"},
- {0x6900, 0x0, "AMD Radeon R7 M260"},
- {0x6900, 0x81, "AMD Radeon R7 M360"},
- {0x6900, 0x83, "AMD Radeon R7 M340"},
- {0x6901, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x0, "AMD Radeon R5 M255"},
- {0x6907, 0x87, "AMD Radeon R5 M315"},
- {0x6920, 0x0, "AMD Radeon R9 M395X"},
- {0x6920, 0x1, "AMD Radeon R9 M390X"},
- {0x6921, 0x0, "AMD Radeon R9 M295X"},
- {0x6929, 0x0, "AMD FirePro S7150"},
- {0x692B, 0x0, "AMD FirePro W7100"},
- {0x6938, 0x0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6938, 0xF1, "AMD Radeon R9 380 Series"},
- {0x6939, 0xF0, "AMD Radeon R9 200 Series"},
- {0x6939, 0x0, "AMD Radeon R9 200 Series"},
- {0x6939, 0xF1, "AMD Radeon R9 380 Series"},
- {0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
- {0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
- {0x9874, 0xC4, "AMD Radeon R7 Graphics"},
- {0x9874, 0xC5, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC6, "AMD Radeon R6 Graphics"},
- {0x9874, 0xC7, "AMD Radeon R5 Graphics"},
- {0x9874, 0x81, "AMD Radeon R6 Graphics"},
- {0x9874, 0x87, "AMD Radeon R5 Graphics"},
- {0x9874, 0x85, "AMD Radeon R6 Graphics"},
- {0x9874, 0x84, "AMD Radeon R7 Graphics"},
-
- {0x0000, 0x0, "\0"},
-};
-#endif
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index f473d2d..9d08744 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -44,7 +44,6 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
-#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@@ -131,6 +130,7 @@ static int amdgpu_get_auth(int fd, int *auth)
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
+ const struct amdgpu_asic_id *id;
amdgpu_vamgr_deinit(&dev->vamgr_32);
amdgpu_vamgr_deinit(&dev->vamgr);
util_hash_table_destroy(dev->bo_flink_names);
@@ -140,6 +140,13 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
+ if (dev->asic_ids) {
+ for (id = dev->asic_ids; id->did; id++) {
+ if (id->marketing_name != NULL)
+ free(id->marketing_name);
+ }
+ free(dev->asic_ids);
+ }
free(dev);
}
@@ -267,6 +274,11 @@ int amdgpu_device_initialize(int fd,
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
+ r = amdgpu_parse_asic_ids(&dev->asic_ids);
+ if (r)
+ fprintf(stderr, "%s: Can not parse asic ids, 0x%x.",
+ __func__, r);
+
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
@@ -297,13 +309,15 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
- const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
+ const struct amdgpu_asic_id *id;
+
+ if (!dev->asic_ids)
+ return NULL;
- while (t->did) {
- if ((t->did == dev->info.asic_id) &&
- (t->rid == dev->info.pci_rev_id))
- return t->marketing_name;
- t++;
+ for (id = dev->asic_ids; id->did; id++) {
+ if ((id->did == dev->info.asic_id) &&
+ (id->rid == dev->info.pci_rev_id))
+ return id->marketing_name;
}
return NULL;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index cf119a5..9d11bea 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -69,6 +69,12 @@ struct amdgpu_va {
struct amdgpu_bo_va_mgr *vamgr;
};
+struct amdgpu_asic_id {
+ uint32_t did;
+ uint32_t rid;
+ char *marketing_name;
+};
+
struct amdgpu_device {
atomic_t refcount;
int fd;
@@ -76,6 +82,8 @@ struct amdgpu_device {
unsigned major_version;
unsigned minor_version;
+ /** Lookup table of asic device id, revision id and marketing name */
+ struct amdgpu_asic_id *asic_ids;
/** List of buffer handles. Protected by bo_table_mutex. */
struct util_hash_table *bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
@@ -149,6 +157,8 @@ amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size);
+drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
+
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
--
2.7.4
[-- Attachment #1.2: Type: text/html, Size: 53380 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <fcbc7ab9-f5f7-c529-9526-d78772c0d830-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-05-11 21:13 ` Li, Samuel
[not found] ` <CY1PR1201MB1033C872BA2CF7916ED3A369F5ED0-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 19+ messages in thread
From: Li, Samuel @ 2017-05-11 21:13 UTC (permalink / raw)
To: Michel Dänzer
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
Submitted a request to create a new repo on freedesktop. Michel, do you have the privilege to create it?
https://bugs.freedesktop.org/show_bug.cgi?id=99589
Sam
-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net]
Sent: Wednesday, May 10, 2017 10:33 PM
To: Li, Samuel <Samuel.Li@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
On 11/05/17 06:10 AM, Li, Samuel wrote:
> Also attach a sample ids file for reference. The names are from
> marketing, not related to source code and no reviews necessary here:)
Just because it's not source code doesn't mean no review is necessary. :)
> It can be put in directory /usr/share/libdrm.
What is the canonical location where distros or users building upstream libdrm can get this file from? There needs to be a good solution for that before this can land.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
2017-05-11 2:32 ` Michel Dänzer
[not found] ` <fcbc7ab9-f5f7-c529-9526-d78772c0d830-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-05-11 21:15 ` Li, Samuel
1 sibling, 0 replies; 19+ messages in thread
From: Li, Samuel @ 2017-05-11 21:15 UTC (permalink / raw)
To: Michel Dänzer
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
The bugzilla id is actually here,
https://bugs.freedesktop.org/show_bug.cgi?id=101013
Sam
-----Original Message-----
From: Li, Samuel
Sent: Thursday, May 11, 2017 5:13 PM
To: 'Michel Dänzer' <michel@daenzer.net>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
Submitted a request to create a new repo on freedesktop. Michel, do you have the privilege to create it?
https://bugs.freedesktop.org/show_bug.cgi?id=99589
Sam
-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net]
Sent: Wednesday, May 10, 2017 10:33 PM
To: Li, Samuel <Samuel.Li@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
On 11/05/17 06:10 AM, Li, Samuel wrote:
> Also attach a sample ids file for reference. The names are from
> marketing, not related to source code and no reviews necessary here:)
Just because it's not source code doesn't mean no review is necessary. :)
> It can be put in directory /usr/share/libdrm.
What is the canonical location where distros or users building upstream libdrm can get this file from? There needs to be a good solution for that before this can land.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CY1PR1201MB1033C872BA2CF7916ED3A369F5ED0-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
@ 2017-05-12 0:49 ` Michel Dänzer
[not found] ` <1bdcfa4a-6840-796e-1623-2949358a0364-otUistvHUpPR7s880joybQ@public.gmane.org>
0 siblings, 1 reply; 19+ messages in thread
From: Michel Dänzer @ 2017-05-12 0:49 UTC (permalink / raw)
To: Li, Samuel; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
On 12/05/17 06:13 AM, Li, Samuel wrote:
> Submitted a request to create a new repo on freedesktop.
What's the point of having a separate repository upstream? Can't we just
keep it in the libdrm repository?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1bdcfa4a-6840-796e-1623-2949358a0364-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-05-12 15:21 ` Li, Samuel
[not found] ` <CY1PR1201MB103331794AEFCBCD27AB5FFCF5E20-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-23 12:11 ` Deucher, Alexander
1 sibling, 1 reply; 19+ messages in thread
From: Li, Samuel @ 2017-05-12 15:21 UTC (permalink / raw)
To: Michel Dänzer
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
My understanding is this is actually a data file. Similar to amdgpu firmware, which is also separate from the kernel source code.
Sam
-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net]
Sent: Thursday, May 11, 2017 8:50 PM
To: Li, Samuel <Samuel.Li@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
On 12/05/17 06:13 AM, Li, Samuel wrote:
> Submitted a request to create a new repo on freedesktop.
What's the point of having a separate repository upstream? Can't we just keep it in the libdrm repository?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CY1PR1201MB103331794AEFCBCD27AB5FFCF5E20-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
@ 2017-05-15 2:20 ` Michel Dänzer
[not found] ` <832d50ad-6dbb-fd6b-b052-664f9de08153-otUistvHUpPR7s880joybQ@public.gmane.org>
0 siblings, 1 reply; 19+ messages in thread
From: Michel Dänzer @ 2017-05-15 2:20 UTC (permalink / raw)
To: Li, Samuel; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
On 13/05/17 12:21 AM, Li, Samuel wrote:
> My understanding is this is actually a data file. Similar to amdgpu
> firmware, which is also separate from the kernel source code.
I don't think the reasons for the linux-firmware repository being
separate from linux apply to this file.
Please provide specific reasons why this file cannot be in the libdrm
repository upstream.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <832d50ad-6dbb-fd6b-b052-664f9de08153-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2017-05-15 20:43 ` Li, Samuel
[not found] ` <CY1PR1201MB10332061C42EE8988B8250F3F5E10-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 19+ messages in thread
From: Li, Samuel @ 2017-05-15 20:43 UTC (permalink / raw)
To: Michel Dänzer
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
> Please provide specific reasons why this file cannot be in the libdrm repository upstream.
A separate repo is preferred here,
1) Keep a clean separation between code and data.
2) Ideally, the commit of this data file should contain a Signed-Off-By: from someone authoritative on the licensing of Marketing names, i.e. from someone within the vendor (AMD).
It is very similar to linux-firmware repo in that it can be treated as a black box from the vendor (It could be a binary if requested, as it is on Catalyst Windows driver).
I am open to other suggestions, if you would like to bring up.
Regards,
Sam
-----Original Message-----
From: Michel Dänzer [mailto:michel@daenzer.net]
Sent: Sunday, May 14, 2017 10:21 PM
To: Li, Samuel <Samuel.Li@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
On 13/05/17 12:21 AM, Li, Samuel wrote:
> My understanding is this is actually a data file. Similar to amdgpu
> firmware, which is also separate from the kernel source code.
I don't think the reasons for the linux-firmware repository being separate from linux apply to this file.
Please provide specific reasons why this file cannot be in the libdrm repository upstream.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CY1PR1201MB10332061C42EE8988B8250F3F5E10-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
@ 2017-05-16 1:28 ` Michel Dänzer
2017-05-16 1:32 ` Zhang, Jerry
1 sibling, 0 replies; 19+ messages in thread
From: Michel Dänzer @ 2017-05-16 1:28 UTC (permalink / raw)
To: Li, Samuel; +Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
On 16/05/17 05:43 AM, Li, Samuel wrote:
>> Please provide specific reasons why this file cannot be in the libdrm repository upstream.
> A separate repo is preferred here,
> 1) Keep a clean separation between code and data.
Why do they need to be separate?
> 2) Ideally, the commit of this data file should contain a Signed-Off-By:
> from someone authoritative on the licensing of Marketing names, i.e.
> from someone within the vendor (AMD).
Does it matter for that which repository the file is located in? How so?
> It is very similar to linux-firmware repo in that it can be treated as
> a black box from the vendor (It could be a binary if requested, as it
> is on Catalyst Windows driver).
Right now it's just a simple text file.
> I am open to other suggestions, if you would like to bring up.
Let's put it in the libdrm repository, unless there's an actual
technical reason why it can't be there. Otherwise we're just creating
busywork for distro packagers and early community testers.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CY1PR1201MB10332061C42EE8988B8250F3F5E10-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-16 1:28 ` Michel Dänzer
@ 2017-05-16 1:32 ` Zhang, Jerry
[not found] ` <MWHPR12MB131257AB734A08B73015F1CAFFE60-Gy0DoCVfaSVTEcpIPqmgfAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
1 sibling, 1 reply; 19+ messages in thread
From: Zhang, Jerry @ 2017-05-16 1:32 UTC (permalink / raw)
To: Li, Samuel, Michel Dänzer
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
FYI.
In amdgpu-pro stack, it helps us that:
- flexible to maintain the release process. (Add/remove/porting among different release branches)
- libdrm git log will not be messed up with lots of updating commit
- also helpful to support customers for such kind of issues.
Regards,
Jerry (Junwei Zhang)
Linux Base Graphics
SRDC Software Development
_____________________________________
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of Li,
> Samuel
> Sent: Tuesday, May 16, 2017 4:43
> To: Michel Dänzer
> Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie
> Subject: RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
>
> > Please provide specific reasons why this file cannot be in the libdrm repository
> upstream.
> A separate repo is preferred here,
> 1) Keep a clean separation between code and data.
> 2) Ideally, the commit of this data file should contain a Signed-Off-By: from
> someone authoritative on the licensing of Marketing names, i.e. from someone
> within the vendor (AMD).
> It is very similar to linux-firmware repo in that it can be treated as a black box
> from the vendor (It could be a binary if requested, as it is on Catalyst Windows
> driver).
>
> I am open to other suggestions, if you would like to bring up.
>
> Regards,
> Sam
>
> -----Original Message-----
> From: Michel Dänzer [mailto:michel@daenzer.net]
> Sent: Sunday, May 14, 2017 10:21 PM
> To: Li, Samuel <Samuel.Li@amd.com>
> Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
> Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
>
> On 13/05/17 12:21 AM, Li, Samuel wrote:
> > My understanding is this is actually a data file. Similar to amdgpu
> > firmware, which is also separate from the kernel source code.
>
> I don't think the reasons for the linux-firmware repository being separate from
> linux apply to this file.
>
> Please provide specific reasons why this file cannot be in the libdrm repository
> upstream.
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <MWHPR12MB131257AB734A08B73015F1CAFFE60-Gy0DoCVfaSVTEcpIPqmgfAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2017-05-16 1:38 ` Michel Dänzer
0 siblings, 0 replies; 19+ messages in thread
From: Michel Dänzer @ 2017-05-16 1:38 UTC (permalink / raw)
To: Zhang, Jerry, Li, Samuel
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
On 16/05/17 10:32 AM, Zhang, Jerry wrote:
> FYI.
>
> In amdgpu-pro stack, it helps us that:
> - flexible to maintain the release process. (Add/remove/porting among different release branches)
> - libdrm git log will not be messed up with lots of updating commit
> - also helpful to support customers for such kind of issues.
Those are AMD internal issues which can be managed regardless of where
the file is located upstream, except possibly for the Git log. Is the
file expected to get updated that often?
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <1bdcfa4a-6840-796e-1623-2949358a0364-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-05-12 15:21 ` Li, Samuel
@ 2017-05-23 12:11 ` Deucher, Alexander
[not found] ` <BN6PR12MB1652CDB93556D5F485159606F7F90-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
1 sibling, 1 reply; 19+ messages in thread
From: Deucher, Alexander @ 2017-05-23 12:11 UTC (permalink / raw)
To: 'Michel Dänzer', Li, Samuel
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Thursday, May 11, 2017 8:50 PM
> To: Li, Samuel
> Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie
> Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
>
> On 12/05/17 06:13 AM, Li, Samuel wrote:
> > Submitted a request to create a new repo on freedesktop.
>
> What's the point of having a separate repository upstream? Can't we just
> keep it in the libdrm repository?
There's no need for a separate repo upstream. It's purely to aid internal packaging.
Alex
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <BN6PR12MB1652CDB93556D5F485159606F7F90-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2017-05-24 15:10 ` Li, Samuel
[not found] ` <CY1PR1201MB1033945340C5C5170756A4FAF5FE0-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
0 siblings, 1 reply; 19+ messages in thread
From: Li, Samuel @ 2017-05-24 15:10 UTC (permalink / raw)
To: Deucher, Alexander, 'Michel Dänzer'
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
>There's no need for a separate repo upstream. It's purely to aid internal packaging.
As a first step, we can put a snapshot in libdrm for now.
External packaging will face the same issue though ... the packagers need to put the ids in various versions of various distros. We also likely need to automate the upstream update to save sometime for ourselves.
Sam
-----Original Message-----
From: Deucher, Alexander
Sent: Tuesday, May 23, 2017 8:12 AM
To: 'Michel Dänzer' <michel@daenzer.net>; Li, Samuel <Samuel.Li@amd.com>
Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: RE: [PATCH 1/1] amdgpu: move asic id table to a separate file
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Thursday, May 11, 2017 8:50 PM
> To: Li, Samuel
> Cc: amd-gfx@lists.freedesktop.org; Yuan, Xiaojie
> Subject: Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
>
> On 12/05/17 06:13 AM, Li, Samuel wrote:
> > Submitted a request to create a new repo on freedesktop.
>
> What's the point of having a separate repository upstream? Can't we
> just keep it in the libdrm repository?
There's no need for a separate repo upstream. It's purely to aid internal packaging.
Alex
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 1/1] amdgpu: move asic id table to a separate file
[not found] ` <CY1PR1201MB1033945340C5C5170756A4FAF5FE0-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
@ 2017-05-25 3:23 ` Michel Dänzer
0 siblings, 0 replies; 19+ messages in thread
From: Michel Dänzer @ 2017-05-25 3:23 UTC (permalink / raw)
To: Li, Samuel, Deucher, Alexander
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Yuan, Xiaojie
On 25/05/17 12:10 AM, Li, Samuel wrote:
>> There's no need for a separate repo upstream. It's purely to aid
>> internal packaging.
> As a first step, we can put a snapshot in libdrm for now. External
> packaging will face the same issue though ... the packagers need to
> put the ids in various versions of various distros.
They can take a snapshot from the libdrm repository the same way they
could from a separate repository. I don't see any issue there.
> We also likely need to automate the upstream update to save sometime
> for ourselves.
I'm skeptical that it can be automated, we'll see. :)
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2017-05-25 3:23 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-05-10 20:56 [PATCH 1/1] amdgpu: move asic id table to a separate file Samuel Li
[not found] ` <1494449815-10162-1-git-send-email-Samuel.Li-5C7GfCeVMHo@public.gmane.org>
2017-05-10 21:10 ` Li, Samuel
[not found] ` <DM3PR1201MB10392013EC4407011C4F9B84F5EC0-BBcFnVpqZhVMmo+XJk11QmrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-11 1:28 ` Zhang, Jerry (Junwei)
2017-05-11 2:24 ` Zhang, Jerry (Junwei)
2017-05-11 2:32 ` Michel Dänzer
[not found] ` <fcbc7ab9-f5f7-c529-9526-d78772c0d830-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-05-11 21:13 ` Li, Samuel
[not found] ` <CY1PR1201MB1033C872BA2CF7916ED3A369F5ED0-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-12 0:49 ` Michel Dänzer
[not found] ` <1bdcfa4a-6840-796e-1623-2949358a0364-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-05-12 15:21 ` Li, Samuel
[not found] ` <CY1PR1201MB103331794AEFCBCD27AB5FFCF5E20-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-15 2:20 ` Michel Dänzer
[not found] ` <832d50ad-6dbb-fd6b-b052-664f9de08153-otUistvHUpPR7s880joybQ@public.gmane.org>
2017-05-15 20:43 ` Li, Samuel
[not found] ` <CY1PR1201MB10332061C42EE8988B8250F3F5E10-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-16 1:28 ` Michel Dänzer
2017-05-16 1:32 ` Zhang, Jerry
[not found] ` <MWHPR12MB131257AB734A08B73015F1CAFFE60-Gy0DoCVfaSVTEcpIPqmgfAdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-05-16 1:38 ` Michel Dänzer
2017-05-23 12:11 ` Deucher, Alexander
[not found] ` <BN6PR12MB1652CDB93556D5F485159606F7F90-/b2+HYfkarQqUD6E6FAiowdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-05-24 15:10 ` Li, Samuel
[not found] ` <CY1PR1201MB1033945340C5C5170756A4FAF5FE0-JBJ/M6OpXY+2VhmsawAdvGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-25 3:23 ` Michel Dänzer
2017-05-11 21:15 ` Li, Samuel
2017-05-11 10:51 ` Yuan, Xiaojie
[not found] ` <BY2PR1201MB0968501917152E7FF9C1B19D89ED0-O28G1zQ8oGnHEywBZCNHpGrFom/aUZj6nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-05-11 16:03 ` Li, Samuel
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