* [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
@ 2020-08-05 9:54 Chee Hong Ang
2020-08-05 10:02 ` Tan, Ley Foon
0 siblings, 1 reply; 4+ messages in thread
From: Chee Hong Ang @ 2020-08-05 9:54 UTC (permalink / raw)
To: u-boot
Enable sysreset support for Agilex platform.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
---
arch/arm/Kconfig | 2 +-
drivers/sysreset/Kconfig | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b8a32c38d..105b5f08a9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -991,7 +991,7 @@ config ARCH_SOCFPGA
select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select SYSRESET
select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
- select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
+ select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
imply CMD_DM
imply CMD_MTDPARTS
imply CRC32_VERIFY
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 6ebc90e1d3..d886d1c933 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -80,11 +80,11 @@ config SYSRESET_SOCFPGA
(Cyclone 5, Arria 5 and Arria 10).
config SYSRESET_SOCFPGA_S10
- bool "Enable support for Intel SOCFPGA Stratix 10"
- depends on ARCH_SOCFPGA && TARGET_SOCFPGA_STRATIX10
+ bool "Enable support for Intel SOCFPGA SoC64 family (Stratix10/Agilex)"
+ depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX)
help
This enables the system reset driver support for Intel SOCFPGA
- Stratix SoCs.
+ SoC64 SoCs.
config SYSRESET_TI_SCI
bool "TI System Control Interface (TI SCI) system reset driver"
--
2.19.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
2020-08-05 9:54 [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support Chee Hong Ang
@ 2020-08-05 10:02 ` Tan, Ley Foon
2020-08-05 10:07 ` Ang, Chee Hong
0 siblings, 1 reply; 4+ messages in thread
From: Tan, Ley Foon @ 2020-08-05 10:02 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang@intel.com>
> Sent: Wednesday, August 5, 2020 5:54 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>; See,
> Chin Liang <chin.liang.see@intel.com>; Tan, Ley Foon
> <ley.foon.tan@intel.com>; Ang, Chee Hong <chee.hong.ang@intel.com>;
> Chee, Tien Fong <tien.fong.chee@intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim@intel.com>
> Subject: [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
>
> Enable sysreset support for Agilex platform.
>
> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
> ---
> arch/arm/Kconfig | 2 +-
> drivers/sysreset/Kconfig | 6 +++---
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> 6b8a32c38d..105b5f08a9 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -991,7 +991,7 @@ config ARCH_SOCFPGA
> select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 ||
> TARGET_SOCFPGA_ARRIA10
> select SYSRESET
> select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 ||
> TARGET_SOCFPGA_ARRIA10
> - select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
> + select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10 ||
> +TARGET_SOCFPGA_AGILEX
> imply CMD_DM
> imply CMD_MTDPARTS
> imply CRC32_VERIFY
> diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index
> 6ebc90e1d3..d886d1c933 100644
> --- a/drivers/sysreset/Kconfig
> +++ b/drivers/sysreset/Kconfig
> @@ -80,11 +80,11 @@ config SYSRESET_SOCFPGA
> (Cyclone 5, Arria 5 and Arria 10).
>
> config SYSRESET_SOCFPGA_S10
This can change to _SOC64.
> - bool "Enable support for Intel SOCFPGA Stratix 10"
> - depends on ARCH_SOCFPGA && TARGET_SOCFPGA_STRATIX10
> + bool "Enable support for Intel SOCFPGA SoC64 family
> (Stratix10/Agilex)"
> + depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_STRATIX10 ||
> +TARGET_SOCFPGA_AGILEX)
Regards
Ley Foon
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
2020-08-05 10:02 ` Tan, Ley Foon
@ 2020-08-05 10:07 ` Ang, Chee Hong
2020-08-05 10:09 ` Tan, Ley Foon
0 siblings, 1 reply; 4+ messages in thread
From: Ang, Chee Hong @ 2020-08-05 10:07 UTC (permalink / raw)
To: u-boot
> > -----Original Message-----
> > From: Ang, Chee Hong <chee.hong.ang@intel.com>
> > Sent: Wednesday, August 5, 2020 5:54 PM
> > To: u-boot at lists.denx.de
> > Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt
> > <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>; See,
> > Chin Liang <chin.liang.see@intel.com>; Tan, Ley Foon
> > <ley.foon.tan@intel.com>; Ang, Chee Hong <chee.hong.ang@intel.com>;
> > Chee, Tien Fong <tien.fong.chee@intel.com>; Lim, Elly Siew Chin
> > <elly.siew.chin.lim@intel.com>
> > Subject: [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
> >
> > Enable sysreset support for Agilex platform.
> >
> > Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
> > ---
> > arch/arm/Kconfig | 2 +-
> > drivers/sysreset/Kconfig | 6 +++---
> > 2 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> > 6b8a32c38d..105b5f08a9 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -991,7 +991,7 @@ config ARCH_SOCFPGA
> > select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 ||
> > TARGET_SOCFPGA_ARRIA10
> > select SYSRESET
> > select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 ||
> > TARGET_SOCFPGA_ARRIA10
> > - select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
> > + select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10 ||
> > +TARGET_SOCFPGA_AGILEX
> > imply CMD_DM
> > imply CMD_MTDPARTS
> > imply CRC32_VERIFY
> > diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index
> > 6ebc90e1d3..d886d1c933 100644
> > --- a/drivers/sysreset/Kconfig
> > +++ b/drivers/sysreset/Kconfig
> > @@ -80,11 +80,11 @@ config SYSRESET_SOCFPGA
> > (Cyclone 5, Arria 5 and Arria 10).
> >
> > config SYSRESET_SOCFPGA_S10
>
> This can change to _SOC64.
Do I need to change the source file from drivers/sysreset/sysreset_socfpga_s10.c to drivers/sysreset/sysreset_socfpga_soc64.c as well ?
drivers/sysreset/makefile has this:
obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
>
>
> > - bool "Enable support for Intel SOCFPGA Stratix 10"
> > - depends on ARCH_SOCFPGA && TARGET_SOCFPGA_STRATIX10
> > + bool "Enable support for Intel SOCFPGA SoC64 family
> > (Stratix10/Agilex)"
> > + depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_STRATIX10 ||
> > +TARGET_SOCFPGA_AGILEX)
>
> Regards
> Ley Foon
>
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
2020-08-05 10:07 ` Ang, Chee Hong
@ 2020-08-05 10:09 ` Tan, Ley Foon
0 siblings, 0 replies; 4+ messages in thread
From: Tan, Ley Foon @ 2020-08-05 10:09 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Ang, Chee Hong <chee.hong.ang@intel.com>
> Sent: Wednesday, August 5, 2020 6:08 PM
> To: Tan, Ley Foon <ley.foon.tan@intel.com>; u-boot at lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>; See,
> Chin Liang <chin.liang.see@intel.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim@intel.com>
> Subject: RE: [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support
>
> > > -----Original Message-----
> > > From: Ang, Chee Hong <chee.hong.ang@intel.com>
> > > Sent: Wednesday, August 5, 2020 5:54 PM
> > > To: u-boot at lists.denx.de
> > > Cc: Marek Vasut <marex@denx.de>; Simon Goldschmidt
> > > <simon.k.r.goldschmidt@gmail.com>; Tom Rini <trini@konsulko.com>;
> > > See, Chin Liang <chin.liang.see@intel.com>; Tan, Ley Foon
> > > <ley.foon.tan@intel.com>; Ang, Chee Hong <chee.hong.ang@intel.com>;
> > > Chee, Tien Fong <tien.fong.chee@intel.com>; Lim, Elly Siew Chin
> > > <elly.siew.chin.lim@intel.com>
> > > Subject: [PATCH v1] sysreset: socfpga: agilex: Enable sysreset
> > > support
> > >
> > > Enable sysreset support for Agilex platform.
> > >
> > > Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
> > > ---
> > > arch/arm/Kconfig | 2 +-
> > > drivers/sysreset/Kconfig | 6 +++---
> > > 2 files changed, 4 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> > > 6b8a32c38d..105b5f08a9 100644
> > > --- a/arch/arm/Kconfig
> > > +++ b/arch/arm/Kconfig
> > > @@ -991,7 +991,7 @@ config ARCH_SOCFPGA
> > > select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 ||
> > > TARGET_SOCFPGA_ARRIA10
> > > select SYSRESET
> > > select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 ||
> > > TARGET_SOCFPGA_ARRIA10
> > > - select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
> > > + select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10 ||
> > > +TARGET_SOCFPGA_AGILEX
> > > imply CMD_DM
> > > imply CMD_MTDPARTS
> > > imply CRC32_VERIFY
> > > diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> > > index
> > > 6ebc90e1d3..d886d1c933 100644
> > > --- a/drivers/sysreset/Kconfig
> > > +++ b/drivers/sysreset/Kconfig
> > > @@ -80,11 +80,11 @@ config SYSRESET_SOCFPGA
> > > (Cyclone 5, Arria 5 and Arria 10).
> > >
> > > config SYSRESET_SOCFPGA_S10
> >
> > This can change to _SOC64.
> Do I need to change the source file from
> drivers/sysreset/sysreset_socfpga_s10.c to
> drivers/sysreset/sysreset_socfpga_soc64.c as well ?
> drivers/sysreset/makefile has this:
> obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
>
Yes, I think it is better. Rename first , then add Agilex support.
Regards
Ley Foon
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-08-05 10:09 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2020-08-05 9:54 [PATCH v1] sysreset: socfpga: agilex: Enable sysreset support Chee Hong Ang
2020-08-05 10:02 ` Tan, Ley Foon
2020-08-05 10:07 ` Ang, Chee Hong
2020-08-05 10:09 ` Tan, Ley Foon
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