[PATCH v2 00/37] baseband/acc100: changes for 22.11

[PATCH v2 00/37] baseband/acc100: changes for 22.11

[Hernan Vargas]

Upstreaming ACC100 changes for 22.11.
This patch series is dependant on series:
https://patches.dpdk.org/project/dpdk/patch/1657150110-69957

Hernan Vargas (37):
  baseband/acc100: add enqueue status
  baseband/acc100: update ring availability calculation
  baseband/acc100: add function to check AQ availability
  baseband/acc100: free SW ring mem for reconfiguration
  baseband/acc100: memory leak fix
  baseband/acc100: add default e value for FCW
  baseband/acc100: add LDPC encoder padding function
  baseband/acc100: add scatter-gather support
  baseband/acc100: add HARQ index helper function
  baseband/acc100: avoid mux for small inbound frames
  baseband/acc100: separate validation functions from debug
  baseband/acc100: add LDPC transport block support
  baseband/acc10x: limit cases for HARQ pruning
  baseband/acc100: update validate LDPC enc/dec
  baseband/acc100: add workaround for deRM corner cases
  baseband/acc100: add ring companion address
  baseband/acc100: configure PMON control registers
  baseband/acc100: implement configurable queue depth
  baseband/acc100: add queue stop operation
  baseband/acc100: check turbo dec/enc input
  baseband/acc100: check for unlikely operation vals
  baseband/acc100: enforce additional check on FCW
  baseband/acc100: update uplink CB input length
  baseband/acc100: rename ldpc encode function arg
  baseband/acc100: update log messages
  baseband/acc100: allocate ring/queue mem when NULL
  baseband/acc100: store FCW from first CB descriptor
  baseband/acc100: make desc optimization optional
  baseband/acc100: update device info
  baseband/acc100: reduce input length for CRC24B
  baseband/acc100: fix clearing PF IR outside handler
  baseband/acc100: fix debug print for LDPC FCW
  baseband/acc100: set device min alignment to 1
  baseband/acc100: update meson file sdk dependency
  baseband/acc100: add protection for NULL HARQ input
  baseband/acc100: make HARQ layout memory 4GB
  baseband/acc100: reset pointer after rte_free

 drivers/baseband/acc100/acc100_pf_enum.h |   52 +-
 drivers/baseband/acc100/acc100_pmd.h     |   41 +-
 drivers/baseband/acc100/acc100_vf_enum.h |    6 +
 drivers/baseband/acc100/meson.build      |   21 +
 drivers/baseband/acc100/rte_acc100_pmd.c | 1388 ++++++++++++++++++----
 5 files changed, 1254 insertions(+), 254 deletions(-)

-- 
2.37.1

[PATCH v2 01/37] baseband/acc100: add enqueue status

[Hernan Vargas]

Add enqueue status as part of rte_bbdev_queue_data.
This is a new feature to update queue status and indicate the reason why
a previous enqueue may or may not have consumed all requested operations.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 85 ++++++++++++++++++++----
 1 file changed, 71 insertions(+), 14 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index a68a9b0fd9..7f698ec3d2 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3436,6 +3436,35 @@ get_num_cbs_in_tb_ldpc_dec(struct rte_bbdev_op_ldpc_dec *ldpc_dec)
 	return cbs_in_tb;
 }
 
+static inline void
+acc100_enqueue_status(struct rte_bbdev_queue_data *q_data,
+		enum rte_bbdev_enqueue_status status)
+{
+	q_data->enqueue_status = status;
+	q_data->queue_stats.enqueue_status_count[status]++;
+	rte_bbdev_log(WARNING, "Enqueue Status: %d %#"PRIx64"",
+			status,
+			q_data->queue_stats.enqueue_status_count[status]);
+}
+
+static inline void
+acc100_enqueue_invalid(struct rte_bbdev_queue_data *q_data)
+{
+	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_INVALID_OP);
+}
+
+static inline void
+acc100_enqueue_ring_full(struct rte_bbdev_queue_data *q_data)
+{
+	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_RING_FULL);
+}
+
+static inline void
+acc100_enqueue_queue_full(struct rte_bbdev_queue_data *q_data)
+{
+	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_QUEUE_FULL);
+}
+
 /* Enqueue encode operations for ACC100 device in CB mode. */
 static uint16_t
 acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
@@ -3449,13 +3478,17 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
 
 	for (i = 0; i < num; ++i) {
 		/* Check if there are available space for further processing */
-		if (unlikely(avail - 1 < 0))
+		if (unlikely(avail - 1 < 0)) {
+			acc100_enqueue_ring_full(q_data);
 			break;
+		}
 		avail -= 1;
 
 		ret = enqueue_enc_one_op_cb(q, ops[i], i);
-		if (ret < 0)
+		if (ret < 0) {
+			acc100_enqueue_invalid(q_data);
 			break;
+		}
 	}
 
 	if (unlikely(i == 0))
@@ -3505,20 +3538,26 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
 	int16_t enq, left = num;
 
 	while (left > 0) {
-		if (unlikely(avail < 1))
+		if (unlikely(avail < 1)) {
+			acc100_enqueue_ring_full(q_data);
 			break;
+		}
 		avail--;
 		enq = RTE_MIN(left, ACC100_MUX_5GDL_DESC);
 		if (check_mux(&ops[i], enq)) {
 			ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i],
 					desc_idx, enq);
-			if (ret < 0)
+			if (ret < 0) {
+				acc100_enqueue_invalid(q_data);
 				break;
+			}
 			i += enq;
 		} else {
 			ret = enqueue_ldpc_enc_one_op_cb(q, ops[i], desc_idx);
-			if (ret < 0)
+			if (ret < 0) {
+				acc100_enqueue_invalid(q_data);
 				break;
+			}
 			i++;
 		}
 		desc_idx++;
@@ -3557,13 +3596,17 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
 	for (i = 0; i < num; ++i) {
 		cbs_in_tb = get_num_cbs_in_tb_enc(&ops[i]->turbo_enc);
 		/* Check if there are available space for further processing */
-		if (unlikely(avail - cbs_in_tb < 0))
+		if (unlikely(avail - cbs_in_tb < 0)) {
+			acc100_enqueue_ring_full(q_data);
 			break;
+		}
 		avail -= cbs_in_tb;
 
 		ret = enqueue_enc_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb);
-		if (ret < 0)
+		if (ret < 0) {
+			acc100_enqueue_invalid(q_data);
 			break;
+		}
 		enqueued_cbs += ret;
 	}
 	if (unlikely(enqueued_cbs == 0))
@@ -3618,13 +3661,17 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
 
 	for (i = 0; i < num; ++i) {
 		/* Check if there are available space for further processing */
-		if (unlikely(avail - 1 < 0))
+		if (unlikely(avail - 1 < 0)) {
+			acc100_enqueue_ring_full(q_data);
 			break;
+		}
 		avail -= 1;
 
 		ret = enqueue_dec_one_op_cb(q, ops[i], i);
-		if (ret < 0)
+		if (ret < 0) {
+			acc100_enqueue_invalid(q_data);
 			break;
+		}
 	}
 
 	if (unlikely(i == 0))
@@ -3678,8 +3725,10 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
 
 		ret = enqueue_ldpc_dec_one_op_tb(q, ops[i],
 				enqueued_cbs, cbs_in_tb);
-		if (ret < 0)
+		if (ret < 0) {
+			acc100_enqueue_invalid(q_data);
 			break;
+		}
 		enqueued_cbs += ret;
 	}
 
@@ -3704,8 +3753,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
 	bool same_op = false;
 	for (i = 0; i < num; ++i) {
 		/* Check if there are available space for further processing */
-		if (unlikely(avail < 1))
+		if (unlikely(avail < 1)) {
+			acc100_enqueue_ring_full(q_data);
 			break;
+		}
 		avail -= 1;
 
 		if (i > 0)
@@ -3718,8 +3769,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
 			ops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e,
 			same_op);
 		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
-		if (ret < 0)
+		if (ret < 0) {
+			acc100_enqueue_invalid(q_data);
 			break;
+		}
 	}
 
 	if (unlikely(i == 0))
@@ -3755,13 +3808,17 @@ acc100_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
 	for (i = 0; i < num; ++i) {
 		cbs_in_tb = get_num_cbs_in_tb_dec(&ops[i]->turbo_dec);
 		/* Check if there are available space for further processing */
-		if (unlikely(avail - cbs_in_tb < 0))
+		if (unlikely(avail - cbs_in_tb < 0)) {
+			acc100_enqueue_ring_full(q_data);
 			break;
+		}
 		avail -= cbs_in_tb;
 
 		ret = enqueue_dec_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb);
-		if (ret < 0)
+		if (ret < 0) {
+			acc100_enqueue_invalid(q_data);
 			break;
+		}
 		enqueued_cbs += ret;
 	}
 
-- 
2.37.1

[PATCH v2 02/37] baseband/acc100: update ring availability calculation

[Hernan Vargas]

Refactor of the queue availability computation to prevent the
application to dequeue more than what may have been enqueued.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 39 ++++++++++++++++--------
 1 file changed, 27 insertions(+), 12 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 7f698ec3d2..0598d33582 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3465,13 +3465,27 @@ acc100_enqueue_queue_full(struct rte_bbdev_queue_data *q_data)
 	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_QUEUE_FULL);
 }
 
+/* Number of available descriptor in ring to enqueue */
+static uint32_t
+acc100_ring_avail_enq(struct acc100_queue *q)
+{
+	return (q->sw_ring_depth - 1 + q->sw_ring_tail - q->sw_ring_head) % q->sw_ring_depth;
+}
+
+/* Number of available descriptor in ring to dequeue */
+static uint32_t
+acc100_ring_avail_deq(struct acc100_queue *q)
+{
+	return (q->sw_ring_depth + q->sw_ring_head - q->sw_ring_tail) % q->sw_ring_depth;
+}
+
 /* Enqueue encode operations for ACC100 device in CB mode. */
 static uint16_t
 acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i;
 	union acc100_dma_desc *desc;
 	int ret;
@@ -3531,7 +3545,7 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i = 0;
 	union acc100_dma_desc *desc;
 	int ret, desc_idx = 0;
@@ -3588,7 +3602,7 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i, enqueued_cbs = 0;
 	uint8_t cbs_in_tb;
 	int ret;
@@ -3654,7 +3668,7 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_dec_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i;
 	union acc100_dma_desc *desc;
 	int ret;
@@ -3711,7 +3725,7 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_dec_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i, enqueued_cbs = 0;
 	uint8_t cbs_in_tb;
 	int ret;
@@ -3746,7 +3760,7 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_dec_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i;
 	union acc100_dma_desc *desc;
 	int ret;
@@ -3800,7 +3814,7 @@ acc100_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_dec_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+	int32_t avail = acc100_ring_avail_enq(q);
 	uint16_t i, enqueued_cbs = 0;
 	uint8_t cbs_in_tb;
 	int ret;
@@ -4179,12 +4193,13 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
 {
 	struct acc100_queue *q = q_data->queue_private;
 	uint16_t dequeue_num;
-	uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+	uint32_t avail = acc100_ring_avail_deq(q);
 	uint32_t aq_dequeued = 0;
 	uint16_t i, dequeued_cbs = 0;
 	struct rte_bbdev_enc_op *op;
 	int ret;
-
+	if (avail == 0)
+		return 0;
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 	if (unlikely(ops == NULL || q == NULL)) {
 		rte_bbdev_log_debug("Unexpected undefined pointer");
@@ -4224,7 +4239,7 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+	uint32_t avail = acc100_ring_avail_deq(q);
 	uint32_t aq_dequeued = 0;
 	uint16_t dequeue_num, i, dequeued_cbs = 0, dequeued_descs = 0;
 	int ret;
@@ -4264,7 +4279,7 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
 {
 	struct acc100_queue *q = q_data->queue_private;
 	uint16_t dequeue_num;
-	uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+	uint32_t avail = acc100_ring_avail_deq(q);
 	uint32_t aq_dequeued = 0;
 	uint16_t i;
 	uint16_t dequeued_cbs = 0;
@@ -4309,7 +4324,7 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
 {
 	struct acc100_queue *q = q_data->queue_private;
 	uint16_t dequeue_num;
-	uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+	uint32_t avail = acc100_ring_avail_deq(q);
 	uint32_t aq_dequeued = 0;
 	uint16_t i;
 	uint16_t dequeued_cbs = 0;
-- 
2.37.1

[PATCH v2 03/37] baseband/acc100: add function to check AQ availability

[Hernan Vargas]

It is possible for some corner case to run more batch enqueue than
supported. A protection is required to avoid that corner case.
Enhance all ACC100 enqueue operations with check to see if there is room
in the atomic queue for enqueueing batches into the queue manager
Check room in AQ for the enqueues batches into Qmgr

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 30 +++++++++++++++++-------
 1 file changed, 22 insertions(+), 8 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 0598d33582..7349bb5bad 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3635,12 +3635,27 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
 	return i;
 }
 
+/* Check room in AQ for the enqueues batches into Qmgr */
+static int32_t
+acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
+{
+	struct acc100_queue *q = q_data->queue_private;
+	int32_t aq_avail = q->aq_depth -
+			((q->aq_enqueued - q->aq_dequeued +
+			ACC100_MAX_QUEUE_DEPTH) % ACC100_MAX_QUEUE_DEPTH)
+			- (num_ops >> 7);
+	if (aq_avail <= 0)
+		acc100_enqueue_queue_full(q_data);
+	return aq_avail;
+}
+
 /* Enqueue encode operations for ACC100 device. */
 static uint16_t
 acc100_enqueue_enc(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
-	if (unlikely(num == 0))
+	int32_t aq_avail = acc100_aq_avail(q_data, num);
+	if (unlikely((aq_avail <= 0) || (num == 0)))
 		return 0;
 	if (ops[0]->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
 		return acc100_enqueue_enc_tb(q_data, ops, num);
@@ -3653,7 +3668,8 @@ static uint16_t
 acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
-	if (unlikely(num == 0))
+	int32_t aq_avail = acc100_aq_avail(q_data, num);
+	if (unlikely((aq_avail <= 0) || (num == 0)))
 		return 0;
 	if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
 		return acc100_enqueue_enc_tb(q_data, ops, num);
@@ -3850,7 +3866,8 @@ static uint16_t
 acc100_enqueue_dec(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_dec_op **ops, uint16_t num)
 {
-	if (unlikely(num == 0))
+	int32_t aq_avail = acc100_aq_avail(q_data, num);
+	if (unlikely((aq_avail <= 0) || (num == 0)))
 		return 0;
 	if (ops[0]->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
 		return acc100_enqueue_dec_tb(q_data, ops, num);
@@ -3863,11 +3880,8 @@ static uint16_t
 acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_dec_op **ops, uint16_t num)
 {
-	struct acc100_queue *q = q_data->queue_private;
-	int32_t aq_avail = q->aq_depth +
-			(q->aq_dequeued - q->aq_enqueued) / 128;
-
-	if (unlikely((aq_avail == 0) || (num == 0)))
+	int32_t aq_avail = acc100_aq_avail(q_data, num);
+	if (unlikely((aq_avail <= 0) || (num == 0)))
 		return 0;
 
 	if (ops[0]->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
-- 
2.37.1

[PATCH v2 04/37] baseband/acc100: free SW ring mem for reconfiguration

[Hernan Vargas]

Free base address of unaligned memory for SW rings to manage the missed
corner case when there is a reconfiguration.

Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 7349bb5bad..349b8be5c1 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -340,6 +340,8 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc100_device *d,
 	int i = 0;
 	uint32_t q_sw_ring_size = ACC100_MAX_QUEUE_DEPTH * get_desc_len();
 	uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues;
+	/* Free first in case this is a reconfiguration */
+	rte_free(d->sw_rings_base);
 
 	/* Find an aligned block of memory to store sw rings */
 	while (i < ACC100_SW_RING_MEM_ALLOC_ATTEMPTS) {
@@ -768,6 +770,7 @@ acc100_dev_close(struct rte_bbdev *dev)
 		rte_free(d->tail_ptrs);
 		rte_free(d->info_ring);
 		rte_free(d->sw_rings_base);
+		rte_free(d->harq_layout);
 		d->sw_rings_base = NULL;
 	}
 	/* Ensure all in flight HW transactions are completed */
@@ -4665,7 +4668,8 @@ poweron_cleanup(struct rte_bbdev *bbdev, struct acc100_device *d,
 	}
 	printf("Number of 5GUL engines %d\n", numEngines);
 
-	rte_free(d->sw_rings_base);
+	if (d->sw_rings_base != NULL)
+		rte_free(d->sw_rings_base);
 	usleep(ACC100_LONG_WAIT);
 }
 
-- 
2.37.1

[PATCH v2 05/37] baseband/acc100: memory leak fix

[Hernan Vargas]

Move check for undefined device before allocating queue data structure.

Coverity issue: 375803, 375813, 375819, 375827, 375831
Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 349b8be5c1..586d06d1b3 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -828,6 +828,10 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 	struct acc100_queue *q;
 	int16_t q_idx;
 
+	if (d == NULL) {
+		rte_bbdev_log(ERR, "Undefined device");
+		return -ENODEV;
+	}
 	/* Allocate the queue data structure. */
 	q = rte_zmalloc_socket(dev->device->driver->name, sizeof(*q),
 			RTE_CACHE_LINE_SIZE, conf->socket);
@@ -835,10 +839,6 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 		rte_bbdev_log(ERR, "Failed to allocate queue memory");
 		return -ENOMEM;
 	}
-	if (d == NULL) {
-		rte_bbdev_log(ERR, "Undefined device");
-		return -ENODEV;
-	}
 
 	q->d = d;
 	q->ring_addr = RTE_PTR_ADD(d->sw_rings, (d->sw_ring_size * queue_id));
-- 
2.37.1

[PATCH v2 06/37] baseband/acc100: add default e value for FCW

[Hernan Vargas]

Refactor frame control word LDPC encoder fill function to take a default e
value as a parameter. No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 586d06d1b3..cc7d146e74 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1268,7 +1268,7 @@ get_k0(uint16_t n_cb, uint16_t z_c, uint8_t bg, uint8_t rv_index)
 /* Fill in a frame control word for LDPC encoding. */
 static inline void
 acc100_fcw_le_fill(const struct rte_bbdev_enc_op *op,
-		struct acc100_fcw_le *fcw, int num_cb)
+		struct acc100_fcw_le *fcw, int num_cb, uint32_t default_e)
 {
 	fcw->qm = op->ldpc_enc.q_m;
 	fcw->nfiller = op->ldpc_enc.n_filler;
@@ -1277,7 +1277,7 @@ acc100_fcw_le_fill(const struct rte_bbdev_enc_op *op,
 	fcw->ncb = op->ldpc_enc.n_cb;
 	fcw->k0 = get_k0(fcw->ncb, fcw->Zc, op->ldpc_enc.basegraph,
 			op->ldpc_enc.rv_index);
-	fcw->rm_e = op->ldpc_enc.cb_params.e;
+	fcw->rm_e = (default_e == 0) ? op->ldpc_enc.cb_params.e : default_e;
 	fcw->crc_select = check_bit(op->ldpc_enc.op_flags,
 			RTE_BBDEV_LDPC_CRC_24B_ATTACH);
 	fcw->bypass_intlv = check_bit(op->ldpc_enc.op_flags,
@@ -2525,7 +2525,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
 	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
 			& q->sw_ring_wrap_mask);
 	desc = q->ring_addr + desc_idx;
-	acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num);
+	acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num, 0);
 
 	/** This could be done at polling */
 	acc100_header_init(&desc->req);
@@ -2587,7 +2587,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
 			& q->sw_ring_wrap_mask);
 	desc = q->ring_addr + desc_idx;
-	acc100_fcw_le_fill(op, &desc->req.fcw_le, 1);
+	acc100_fcw_le_fill(op, &desc->req.fcw_le, 1, 0);
 
 	input = op->ldpc_enc.input.data;
 	output_head = output = op->ldpc_enc.output.data;
-- 
2.37.1

[PATCH v2 07/37] baseband/acc100: add LDPC encoder padding function

[Hernan Vargas]

LDPC Encoder input may need to be padded to avoid small beat for ACC100.
Padding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8.
Adding protection for corner case to avoid for 5GDL occurrence of last
beat within the ACC100 fabric with <= 8B which might trigger a fabric
corner case hang issue.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 28 ++++++++++++++----------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index cc7d146e74..4849d822d1 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1304,7 +1304,6 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw)
 			RTE_BBDEV_TURBO_HALF_ITERATION_EVEN);
 }
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
 
 static inline bool
 is_acc100(struct acc100_queue *q)
@@ -1317,7 +1316,6 @@ validate_op_required(struct acc100_queue *q)
 {
 	return is_acc100(q);
 }
-#endif
 
 /* Fill in a frame control word for LDPC decoding. */
 static inline void
@@ -1773,12 +1771,24 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
 	return 0;
 }
 
+/* May need to pad LDPC Encoder input to avoid small beat for ACC100 */
+static inline uint16_t
+pad_le_in(uint16_t blen, struct acc100_queue *q)
+{
+	if (!is_acc100(q))
+		return blen;
+	uint16_t last_beat = blen % 64;
+	if ((last_beat > 0) && (last_beat <= 8))
+		blen += 8;
+	return blen;
+}
+
 static inline int
 acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
 		struct acc100_dma_req_desc *desc, struct rte_mbuf **input,
 		struct rte_mbuf *output, uint32_t *in_offset,
 		uint32_t *out_offset, uint32_t *out_length,
-		uint32_t *mbuf_total_left, uint32_t *seg_total_left)
+		uint32_t *mbuf_total_left, uint32_t *seg_total_left, struct acc100_queue *q)
 {
 	int next_triplet = 1; /* FCW already done */
 	uint16_t K, in_length_in_bits, in_length_in_bytes;
@@ -1802,8 +1812,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
 	}
 
 	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
-			in_length_in_bytes,
-			seg_total_left, next_triplet);
+			pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet);
 	if (unlikely(next_triplet < 0)) {
 		rte_bbdev_log(ERR,
 				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -2531,7 +2540,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
 	acc100_header_init(&desc->req);
 	desc->req.numCBs = num;
 
-	in_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len;
+	in_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len, q);
 	out_length = (enc->cb_params.e + 7) >> 3;
 	desc->req.m2dlen = 1 + num;
 	desc->req.d2mlen = num;
@@ -2600,7 +2609,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 
 	ret = acc100_dma_desc_le_fill(op, &desc->req, &input, output,
 			&in_offset, &out_offset, &out_length, &mbuf_total_left,
-			&seg_total_left);
+			&seg_total_left, q);
 
 	if (unlikely(ret < 0))
 		return ret;
@@ -3921,9 +3930,6 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 
 	/* Clearing status, it will be set based on response */
 	op->status = 0;
-
-	op->status |= ((rsp.input_err)
-			? (1 << RTE_BBDEV_DATA_ERROR) : 0);
 	op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 	op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 
@@ -3994,8 +4000,6 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
 				rsp.val);
 
-		op->status |= ((rsp.input_err)
-				? (1 << RTE_BBDEV_DATA_ERROR) : 0);
 		op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 		op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 
-- 
2.37.1

[PATCH v2 08/37] baseband/acc100: add scatter-gather support

[Hernan Vargas]

Add flag to support scatter-gather for the mbuf

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 45 ++++++++++++++++--------
 1 file changed, 31 insertions(+), 14 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 4849d822d1..a7e0df96e8 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1585,6 +1585,8 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
  *   Store information about device capabilities
  * @param next_triplet
  *   Index for ACC100 DMA Descriptor triplet
+ * @param scattergather
+ *   Flag to support scatter-gather for the mbuf
  *
  * @return
  *   Returns index of next triplet on success, other value if lengths of
@@ -1594,12 +1596,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 static inline int
 acc100_dma_fill_blk_type_in(struct acc100_dma_req_desc *desc,
 		struct rte_mbuf **input, uint32_t *offset, uint32_t cb_len,
-		uint32_t *seg_total_left, int next_triplet)
+		uint32_t *seg_total_left, int next_triplet,
+		bool scattergather)
 {
 	uint32_t part_len;
 	struct rte_mbuf *m = *input;
 
-	part_len = (*seg_total_left < cb_len) ? *seg_total_left : cb_len;
+	if (scattergather)
+		part_len = (*seg_total_left < cb_len) ?
+				*seg_total_left : cb_len;
+	else
+		part_len = cb_len;
 	cb_len -= part_len;
 	*seg_total_left -= part_len;
 
@@ -1735,7 +1742,9 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
 	}
 
 	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
-			length, seg_total_left, next_triplet);
+			length, seg_total_left, next_triplet,
+			check_bit(op->turbo_enc.op_flags,
+			RTE_BBDEV_TURBO_ENC_SCATTER_GATHER));
 	if (unlikely(next_triplet < 0)) {
 		rte_bbdev_log(ERR,
 				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -1812,7 +1821,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
 	}
 
 	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
-			pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet);
+			pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet, false);
 	if (unlikely(next_triplet < 0)) {
 		rte_bbdev_log(ERR,
 				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -1900,7 +1909,9 @@ acc100_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
 	}
 
 	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, kw,
-			seg_total_left, next_triplet);
+			seg_total_left, next_triplet,
+			check_bit(op->turbo_dec.op_flags,
+			RTE_BBDEV_TURBO_DEC_SCATTER_GATHER));
 	if (unlikely(next_triplet < 0)) {
 		rte_bbdev_log(ERR,
 				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -2002,7 +2013,9 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
 
 	next_triplet = acc100_dma_fill_blk_type_in(desc, input,
 			in_offset, input_length,
-			seg_total_left, next_triplet);
+			seg_total_left, next_triplet,
+			check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_DEC_SCATTER_GATHER));
 
 	if (unlikely(next_triplet < 0)) {
 		rte_bbdev_log(ERR,
@@ -3142,8 +3155,9 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 		fcw = &desc->req.fcw_ld;
 		q->d->fcw_ld_fill(op, fcw, harq_layout);
 
-		/* Special handling when overusing mbuf */
-		if (fcw->rm_e < ACC100_MAX_E_MBUF)
+		/* Special handling when using mbuf or not */
+		if (check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))
 			seg_total_left = rte_pktmbuf_data_len(input)
 					- in_offset;
 		else
@@ -3219,9 +3233,12 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	r = op->ldpc_dec.tb_params.r;
 
 	while (mbuf_total_left > 0 && r < c) {
-
-		seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
-
+		if (check_bit(op->ldpc_dec.op_flags,
+				RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))
+			seg_total_left = rte_pktmbuf_data_len(input)
+					- in_offset;
+		else
+			seg_total_left = op->ldpc_dec.input.length;
 		/* Set up DMA descriptor */
 		desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs)
 				& q->sw_ring_wrap_mask);
@@ -3246,8 +3263,9 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 				sizeof(desc->req.fcw_td) - 8);
 		rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
 #endif
-
-		if (seg_total_left == 0) {
+		if (check_bit(op->ldpc_dec.op_flags,
+				RTE_BBDEV_LDPC_DEC_SCATTER_GATHER)
+				&& (seg_total_left == 0)) {
 			/* Go to the next mbuf */
 			input = input->next;
 			in_offset = 0;
@@ -3258,7 +3276,6 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 		current_enqueued_cbs++;
 		r++;
 	}
-
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 	if (check_mbuf_total_left(mbuf_total_left) != 0)
 		return -EINVAL;
-- 
2.37.1

[PATCH v2 09/37] baseband/acc100: add HARQ index helper function

[Hernan Vargas]

Refactor code to use the HARQ index helper function and make harq_idx
uint32.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 32 +++++++++++-------------
 1 file changed, 14 insertions(+), 18 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index a7e0df96e8..5d09908fd0 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1304,6 +1304,11 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw)
 			RTE_BBDEV_TURBO_HALF_ITERATION_EVEN);
 }
 
+/* Convert offset to harq index for harq_layout structure */
+static inline uint32_t hq_index(uint32_t offset)
+{
+	return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK;
+}
 
 static inline bool
 is_acc100(struct acc100_queue *q)
@@ -1323,7 +1328,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 		union acc100_harq_layout_data *harq_layout)
 {
 	uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
-	uint16_t harq_index;
+	uint32_t harq_index;
 	uint32_t l;
 	bool harq_prun = false;
 
@@ -1362,8 +1367,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 			RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION);
 	fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
 			RTE_BBDEV_LDPC_LLR_COMPRESSION);
-	harq_index = op->ldpc_dec.harq_combined_output.offset /
-			ACC100_HARQ_OFFSET;
+	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
 #ifdef ACC100_EXT_MEM
 	/* Limit cases when HARQ pruning is valid */
 	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
@@ -1443,12 +1447,6 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 	}
 }
 
-/* Convert offset to harq index for harq_layout structure */
-static inline uint32_t hq_index(uint32_t offset)
-{
-	return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK;
-}
-
 /* Fill in a frame control word for LDPC decoding for ACC101 */
 static inline void
 acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
@@ -2132,12 +2130,11 @@ acc100_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
 		struct rte_bbdev_dec_op *prev_op = desc->op_addr;
 		op->ldpc_dec.harq_combined_output.length =
 				prev_op->ldpc_dec.harq_combined_output.length;
-		int16_t hq_idx = op->ldpc_dec.harq_combined_output.offset /
-				ACC100_HARQ_OFFSET;
-		int16_t prev_hq_idx =
-				prev_op->ldpc_dec.harq_combined_output.offset
-				/ ACC100_HARQ_OFFSET;
-		harq_layout[hq_idx].val = harq_layout[prev_hq_idx].val;
+		uint32_t harq_idx = hq_index(
+				op->ldpc_dec.harq_combined_output.offset);
+		uint32_t prev_harq_idx = hq_index(
+				prev_op->ldpc_dec.harq_combined_output.offset);
+		harq_layout[harq_idx].val = harq_layout[prev_harq_idx].val;
 #ifndef ACC100_EXT_MEM
 		struct rte_bbdev_op_data ho =
 				op->ldpc_dec.harq_combined_output;
@@ -2969,10 +2966,9 @@ harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	bool ddr_mem_in = check_bit(op->ldpc_dec.op_flags,
 			RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE);
 	union acc100_harq_layout_data *harq_layout = q->d->harq_layout;
-	uint16_t harq_index = (ddr_mem_in ?
+	uint32_t harq_index = hq_index(ddr_mem_in ?
 			op->ldpc_dec.harq_combined_input.offset :
-			op->ldpc_dec.harq_combined_output.offset)
-			/ ACC100_HARQ_OFFSET;
+			op->ldpc_dec.harq_combined_output.offset);
 
 	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
 			& q->sw_ring_wrap_mask);
-- 
2.37.1

[PATCH v2 10/37] baseband/acc100: avoid mux for small inbound frames

[Hernan Vargas]

Update check_mux to avoid multiplexing small inbound frames.
Preventing to multiplex code blocks when K < 512B per specs.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/acc100_pmd.h     |  1 +
 drivers/baseband/acc100/rte_acc100_pmd.c | 16 +++++++++++-----
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
index 0c9810ca56..19a1f434bc 100644
--- a/drivers/baseband/acc100/acc100_pmd.h
+++ b/drivers/baseband/acc100/acc100_pmd.h
@@ -135,6 +135,7 @@
 #define ACC100_DEC_OFFSET     (80)
 #define ACC100_EXT_MEM /* Default option with memory external to CPU */
 #define ACC100_HARQ_OFFSET_THRESHOLD 1024
+#define ACC100_LIMIT_DL_MUX_BITS 534
 
 /* Constants from K0 computation from 3GPP 38.212 Table 5.4.2.1-2 */
 #define ACC100_N_ZC_1 66 /* N = 66 Zc for BG 1 */
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 5d09908fd0..71409e11a1 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3548,20 +3548,25 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
 }
 
 /* Check we can mux encode operations with common FCW */
-static inline bool
+static inline int16_t
 check_mux(struct rte_bbdev_enc_op **ops, uint16_t num) {
 	uint16_t i;
 	if (num <= 1)
-		return false;
+		return 1;
 	for (i = 1; i < num; ++i) {
 		/* Only mux compatible code blocks */
 		if (memcmp((uint8_t *)(&ops[i]->ldpc_enc) + ACC100_ENC_OFFSET,
 				(uint8_t *)(&ops[0]->ldpc_enc) +
 				ACC100_ENC_OFFSET,
 				ACC100_CMP_ENC_SIZE) != 0)
-			return false;
+			return i;
 	}
-	return true;
+	/* Avoid multiplexing small inbound size frames */
+	int Kp = (ops[0]->ldpc_enc.basegraph == 1 ? 22 : 10) *
+			ops[0]->ldpc_enc.z_c - ops[0]->ldpc_enc.n_filler;
+	if (Kp  <= ACC100_LIMIT_DL_MUX_BITS)
+		return 1;
+	return num;
 }
 
 /** Enqueue encode operations for ACC100 device in CB mode. */
@@ -3583,7 +3588,8 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
 		}
 		avail--;
 		enq = RTE_MIN(left, ACC100_MUX_5GDL_DESC);
-		if (check_mux(&ops[i], enq)) {
+		enq = check_mux(&ops[i], enq);
+		if (enq > 1) {
 			ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i],
 					desc_idx, enq);
 			if (ret < 0) {
-- 
2.37.1

[PATCH v2 11/37] baseband/acc100: separate validation functions from debug

[Hernan Vargas]

Use new flag RTE_LIBRTE_BBDEV_SKIP_VALIDATE enable/disable validation
functions. The validation API will be enabled by default.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 37 ++++++++++++------------
 1 file changed, 19 insertions(+), 18 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 71409e11a1..e42748e8cc 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2222,7 +2222,8 @@ acc100_dma_enqueue(struct acc100_queue *q, uint16_t n,
 
 }
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
+
 /* Validates turbo encoder parameters */
 static inline int
 validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
@@ -2479,10 +2480,10 @@ enqueue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 		seg_total_left;
 	struct rte_mbuf *input, *output_head, *output;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_enc_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "Turbo encoder validation failed");
+		rte_bbdev_log(ERR, "Turbo encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -2533,10 +2534,10 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
 	uint16_t  in_length_in_bytes;
 	struct rte_bbdev_op_ldpc_enc *enc = &ops[0]->ldpc_enc;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_ldpc_enc_op(ops[0], q) == -1) {
-		rte_bbdev_log(ERR, "LDPC encoder validation failed");
+		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -2595,10 +2596,10 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 		seg_total_left;
 	struct rte_mbuf *input, *output_head, *output;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
 	/* Validate op structure */
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	if (validate_ldpc_enc_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "LDPC encoder validation failed");
+		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -2652,10 +2653,10 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 	struct rte_mbuf *input, *output_head, *output;
 	uint16_t current_enqueued_cbs = 0;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_enc_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "Turbo encoder validation failed");
+		rte_bbdev_log(ERR, "Turbo encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -2724,7 +2725,7 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 	return current_enqueued_cbs;
 }
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 /* Validates turbo decoder parameters */
 static inline int
 validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
@@ -2875,10 +2876,10 @@ enqueue_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	struct rte_mbuf *input, *h_output_head, *h_output,
 		*s_output_head, *s_output;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_dec_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "Turbo decoder validation failed");
+		rte_bbdev_log(ERR, "Turbo decoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -3099,10 +3100,10 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 		return ret;
 	}
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_ldpc_dec_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "LDPC decoder validation failed");
+		rte_bbdev_log(ERR, "LDPC decoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -3204,10 +3205,10 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	struct rte_mbuf *input, *h_output_head, *h_output;
 	uint16_t current_enqueued_cbs = 0;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_ldpc_dec_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "LDPC decoder validation failed");
+		rte_bbdev_log(ERR, "LDPC decoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -3297,10 +3298,10 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 		*s_output_head, *s_output;
 	uint16_t current_enqueued_cbs = 0;
 
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	/* Validate op structure */
 	if (validate_dec_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "Turbo decoder validation failed");
+		rte_bbdev_log(ERR, "Turbo decoder validation rejected");
 		return -EINVAL;
 	}
 #endif
-- 
2.37.1

[PATCH v2 12/37] baseband/acc100: add LDPC transport block support

[Hernan Vargas]

Add LDPC enqueue functions to handle transport blocks.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 197 ++++++++++++++++++++++-
 1 file changed, 195 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index e42748e8cc..81bae4d695 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2585,6 +2585,61 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
 	return num;
 }
 
+/* Enqueue one encode operations for ACC100 device for a partial TB
+ * all codes blocks have same configuration multiplexed on the same descriptor
+ */
+static inline void
+enqueue_ldpc_enc_part_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
+		uint16_t total_enqueued_descs, int16_t num_cbs, uint32_t e,
+		uint16_t in_len_B, uint32_t out_len_B, uint32_t *in_offset,
+		uint32_t *out_offset)
+{
+
+	union acc100_dma_desc *desc = NULL;
+	struct rte_mbuf *output_head, *output;
+	int i, next_triplet;
+	struct rte_bbdev_op_ldpc_enc *enc = &op->ldpc_enc;
+
+
+	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs)
+			& q->sw_ring_wrap_mask);
+	desc = q->ring_addr + desc_idx;
+	acc100_fcw_le_fill(op, &desc->req.fcw_le, num_cbs, e);
+
+	/** This could be done at polling */
+	acc100_header_init(&desc->req);
+	desc->req.numCBs = num_cbs;
+
+	desc->req.m2dlen = 1 + num_cbs;
+	desc->req.d2mlen = num_cbs;
+	next_triplet = 1;
+
+	for (i = 0; i < num_cbs; i++) {
+		desc->req.data_ptrs[next_triplet].address =
+			rte_pktmbuf_iova_offset(enc->input.data,
+					*in_offset);
+		*in_offset += in_len_B;
+		desc->req.data_ptrs[next_triplet].blen = in_len_B;
+		next_triplet++;
+		desc->req.data_ptrs[next_triplet].address =
+				rte_pktmbuf_iova_offset(
+						enc->output.data, *out_offset);
+		*out_offset += out_len_B;
+		desc->req.data_ptrs[next_triplet].blen = out_len_B;
+		next_triplet++;
+		enc->output.length += out_len_B;
+		output_head = output = enc->output.data;
+		mbuf_append(output_head, output, out_len_B);
+	}
+
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
+	rte_memdump(stderr, "FCW", &desc->req.fcw_le,
+			sizeof(desc->req.fcw_le) - 8);
+	rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
+#endif
+
+}
+
 /* Enqueue one encode operations for ACC100 device in CB mode */
 static inline int
 enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
@@ -2725,6 +2780,76 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 	return current_enqueued_cbs;
 }
 
+/* Enqueue one encode operations for ACC100 device in TB mode.
+ * returns the number of descs used
+ */
+static inline int
+enqueue_ldpc_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
+		uint16_t enq_descs, uint8_t cbs_in_tb)
+{
+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
+	if (validate_ldpc_enc_op(op, q) == -1) {
+		rte_bbdev_log(ERR, "LDPC encoder validation failed");
+		return -EINVAL;
+	}
+#endif
+	uint8_t num_a, num_b;
+	uint16_t desc_idx;
+	uint8_t r = op->ldpc_enc.tb_params.r;
+	uint8_t cab =  op->ldpc_enc.tb_params.cab;
+	union acc100_dma_desc *desc;
+	uint16_t init_enq_descs = enq_descs;
+	uint16_t input_len_B = ((op->ldpc_enc.basegraph == 1 ? 22 : 10) *
+			op->ldpc_enc.z_c - op->ldpc_enc.n_filler) >> 3;
+	if (check_bit(op->ldpc_enc.op_flags, RTE_BBDEV_LDPC_CRC_24B_ATTACH))
+		input_len_B -= 3;
+
+	if (r < cab) {
+		num_a = cab - r;
+		num_b = cbs_in_tb - cab;
+	} else {
+		num_a = 0;
+		num_b = cbs_in_tb - r;
+	}
+	uint32_t in_offset = 0, out_offset = 0;
+
+	while (num_a > 0) {
+		uint32_t e = op->ldpc_enc.tb_params.ea;
+		uint32_t out_len_B = (e + 7) >> 3;
+		uint8_t enq = RTE_MIN(num_a, ACC100_MUX_5GDL_DESC);
+		num_a -= enq;
+		enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
+				out_len_B, &in_offset, &out_offset);
+		enq_descs++;
+	}
+	while (num_b > 0) {
+		uint32_t e = op->ldpc_enc.tb_params.eb;
+		uint32_t out_len_B = (e + 7) >> 3;
+		uint8_t enq = RTE_MIN(num_b, ACC100_MUX_5GDL_DESC);
+		num_b -= enq;
+		enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
+				out_len_B, &in_offset, &out_offset);
+		enq_descs++;
+	}
+
+	uint16_t return_descs = enq_descs - init_enq_descs;
+	/* Keep total number of CBs in first TB */
+	desc_idx = ((q->sw_ring_head + init_enq_descs)
+			& q->sw_ring_wrap_mask);
+	desc = q->ring_addr + desc_idx;
+	desc->req.cbs_in_tb = return_descs; /** Actual number of descriptors */
+	desc->req.op_addr = op;
+
+	/* Set SDone on last CB descriptor for TB mode. */
+	desc_idx = ((q->sw_ring_head + enq_descs - 1)
+			& q->sw_ring_wrap_mask);
+	desc = q->ring_addr + desc_idx;
+	desc->req.sdone_enable = 1;
+	desc->req.irq_enable = q->irq_enable;
+	desc->req.op_addr = op;
+	return return_descs;
+}
+
 #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 /* Validates turbo decoder parameters */
 static inline int
@@ -3299,7 +3424,10 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	uint16_t current_enqueued_cbs = 0;
 
 #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
-	/* Validate op structure */
+	if (cbs_in_tb == 0) {
+		rte_bbdev_log(ERR, "Turbo decoder invalid number of CBs");
+		return -EINVAL;
+	}
 	if (validate_dec_op(op, q) == -1) {
 		rte_bbdev_log(ERR, "Turbo decoder validation rejected");
 		return -EINVAL;
@@ -3386,6 +3514,32 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	return current_enqueued_cbs;
 }
 
+/* Calculates number of CBs in processed encoder TB based on 'r' and input
+ * length.
+ */
+static inline uint8_t
+get_num_cbs_in_tb_ldpc_enc(struct rte_bbdev_op_ldpc_enc *ldpc_enc)
+{
+	uint8_t c, r, crc24_bits = 0;
+	uint16_t k = (ldpc_enc->basegraph == 1 ? 22 : 10) * ldpc_enc->z_c
+		- ldpc_enc->n_filler;
+	uint8_t cbs_in_tb = 0;
+	int32_t length;
+
+	length = ldpc_enc->input.length;
+	r = ldpc_enc->tb_params.r;
+	c = ldpc_enc->tb_params.c;
+	crc24_bits = 0;
+	if (check_bit(ldpc_enc->op_flags, RTE_BBDEV_LDPC_CRC_24B_ATTACH))
+		crc24_bits = 24;
+	while (length > 0 && r < c) {
+		length -= (k - crc24_bits) >> 3;
+		r++;
+		cbs_in_tb++;
+	}
+	return cbs_in_tb;
+}
+
 /* Calculates number of CBs in processed encoder TB based on 'r' and input
  * length.
  */
@@ -3667,6 +3821,45 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
 	return i;
 }
 
+/* Enqueue LDPC encode operations for ACC100 device in TB mode. */
+static uint16_t
+acc100_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
+		struct rte_bbdev_enc_op **ops, uint16_t num)
+{
+	struct acc100_queue *q = q_data->queue_private;
+	int32_t avail = acc100_ring_avail_enq(q);
+	uint16_t i, enqueued_descs = 0;
+	uint8_t cbs_in_tb;
+	int descs_used;
+
+	for (i = 0; i < num; ++i) {
+		cbs_in_tb = get_num_cbs_in_tb_ldpc_enc(&ops[i]->ldpc_enc);
+		/* Check if there are available space for further processing */
+		if (unlikely(avail - cbs_in_tb < 0)) {
+			acc100_enqueue_ring_full(q_data);
+			break;
+		}
+		descs_used = enqueue_ldpc_enc_one_op_tb(q, ops[i],
+				enqueued_descs, cbs_in_tb);
+		if (descs_used < 0) {
+			acc100_enqueue_invalid(q_data);
+			break;
+		}
+		enqueued_descs += descs_used;
+		avail -= descs_used;
+	}
+	if (unlikely(enqueued_descs == 0))
+		return 0; /* Nothing to enqueue */
+
+	acc100_dma_enqueue(q, enqueued_descs, &q_data->queue_stats);
+
+	/* Update stats */
+	q_data->queue_stats.enqueued_count += i;
+	q_data->queue_stats.enqueue_err_count += num - i;
+
+	return i;
+}
+
 /* Check room in AQ for the enqueues batches into Qmgr */
 static int32_t
 acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
@@ -3704,7 +3897,7 @@ acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 	if (unlikely((aq_avail <= 0) || (num == 0)))
 		return 0;
 	if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
-		return acc100_enqueue_enc_tb(q_data, ops, num);
+		return acc100_enqueue_ldpc_enc_tb(q_data, ops, num);
 	else
 		return acc100_enqueue_ldpc_enc_cb(q_data, ops, num);
 }
-- 
2.37.1

[PATCH v2 13/37] baseband/acc10x: limit cases for HARQ pruning

[Hernan Vargas]

Add flag ACC101_HARQ_PRUNING_OPTIMIZATION to limit cases when HARQ
pruning is valid.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 52 +++++++++++++++++++-----
 1 file changed, 41 insertions(+), 11 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 81bae4d695..e47f7d68c2 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1370,17 +1370,23 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
 #ifdef ACC100_EXT_MEM
 	/* Limit cases when HARQ pruning is valid */
+#ifdef ACC100_HARQ_PRUNING_OPTIMIZATION
 	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
-			ACC100_HARQ_OFFSET) == 0) &&
-			(op->ldpc_dec.harq_combined_output.offset <= UINT16_MAX
-			* ACC100_HARQ_OFFSET);
+			ACC100_HARQ_OFFSET) == 0);
+#endif
 #endif
 	if (fcw->hcin_en > 0) {
 		harq_in_length = op->ldpc_dec.harq_combined_input.length;
 		if (fcw->hcin_decomp_mode > 0)
 			harq_in_length = harq_in_length * 8 / 6;
-		harq_in_length = RTE_ALIGN(harq_in_length, 64);
-		if ((harq_layout[harq_index].offset > 0) & harq_prun) {
+		harq_in_length = RTE_MIN(harq_in_length, op->ldpc_dec.n_cb
+				- op->ldpc_dec.n_filler);
+		/* Alignment on next 64B - Already enforced from HC output */
+		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
+		/* Stronger alignment requirement when in decompression mode */
+		if (fcw->hcin_decomp_mode > 0)
+			harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 256);
+		if ((harq_layout[harq_index].offset > 0) && harq_prun) {
 			rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
 			fcw->hcin_size0 = harq_layout[harq_index].size0;
 			fcw->hcin_offset = harq_layout[harq_index].offset;
@@ -1455,6 +1461,7 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 	uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
 	uint32_t harq_index;
 	uint32_t l;
+	bool harq_prun = false;
 
 	fcw->qm = op->ldpc_dec.q_m;
 	fcw->nfiller = op->ldpc_dec.n_filler;
@@ -1500,6 +1507,13 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 	fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
 			RTE_BBDEV_LDPC_LLR_COMPRESSION);
 	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
+	#ifdef ACC100_EXT_MEM
+	/* Limit cases when HARQ pruning is valid */
+#ifdef ACC101_HARQ_PRUNING_OPTIMIZATION
+	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
+			ACC101_HARQ_OFFSET) == 0);
+#endif
+#endif
 	if (fcw->hcin_en > 0) {
 		harq_in_length = op->ldpc_dec.harq_combined_input.length;
 		if (fcw->hcin_decomp_mode > 0)
@@ -1508,9 +1522,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 				- op->ldpc_dec.n_filler);
 		/* Alignment on next 64B - Already enforced from HC output */
 		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
-		fcw->hcin_size0 = harq_in_length;
-		fcw->hcin_offset = 0;
-		fcw->hcin_size1 = 0;
+		if ((harq_layout[harq_index].offset > 0) && harq_prun) {
+			rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
+			fcw->hcin_size0 = harq_layout[harq_index].size0;
+			fcw->hcin_offset = harq_layout[harq_index].offset;
+			fcw->hcin_size1 = harq_in_length -
+					harq_layout[harq_index].offset;
+		} else {
+			fcw->hcin_size0 = harq_in_length;
+			fcw->hcin_offset = 0;
+			fcw->hcin_size1 = 0;
+		}
 	} else {
 		fcw->hcin_size0 = 0;
 		fcw->hcin_offset = 0;
@@ -1551,9 +1573,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 		harq_out_length = RTE_MIN(harq_out_length, ncb_p);
 		/* Alignment on next 64B */
 		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
-		fcw->hcout_size0 = harq_out_length;
-		fcw->hcout_size1 = 0;
-		fcw->hcout_offset = 0;
+		if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) &&
+				harq_prun) {
+			fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
+			fcw->hcout_offset = k0_p & 0xFFC0;
+			fcw->hcout_size1 = harq_out_length - fcw->hcout_offset;
+		} else {
+			fcw->hcout_size0 = harq_out_length;
+			fcw->hcout_size1 = 0;
+			fcw->hcout_offset = 0;
+		}
+
 		harq_layout[harq_index].offset = fcw->hcout_offset;
 		harq_layout[harq_index].size0 = fcw->hcout_size0;
 	} else {
-- 
2.37.1

[PATCH v2 14/37] baseband/acc100: update validate LDPC enc/dec

[Hernan Vargas]

Update validate functions to check for valid LDPC parameters to avoid
any HW issues.
Adding protection for null corner case and for HARQ inbound size out
of range.
HARQ input size from application may be invalid and causing HW issue.
Add checks to ensure that if HARQ is invalid, set to some valid size to
ensure HW issues do not occur.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 297 +++++++++++++++++++++--
 1 file changed, 283 insertions(+), 14 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index e47f7d68c2..1504acfadd 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2404,10 +2404,6 @@ validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
 	if (!validate_op_required(q))
 		return 0;
 
-	if (op->mempool == NULL) {
-		rte_bbdev_log(ERR, "Invalid mempool pointer");
-		return -1;
-	}
 	if (ldpc_enc->input.data == NULL) {
 		rte_bbdev_log(ERR, "Invalid input pointer");
 		return -1;
@@ -2416,11 +2412,9 @@ validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
 		rte_bbdev_log(ERR, "Invalid output pointer");
 		return -1;
 	}
-	if (ldpc_enc->input.length >
-			RTE_BBDEV_LDPC_MAX_CB_SIZE >> 3) {
-		rte_bbdev_log(ERR, "CB size (%u) is too big, max: %d",
-				ldpc_enc->input.length,
-				RTE_BBDEV_LDPC_MAX_CB_SIZE);
+	if (ldpc_enc->input.length == 0) {
+		rte_bbdev_log(ERR, "CB size (%u) is null",
+				ldpc_enc->input.length);
 		return -1;
 	}
 	if ((ldpc_enc->basegraph > 2) || (ldpc_enc->basegraph == 0)) {
@@ -2441,13 +2435,107 @@ validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
 				ldpc_enc->code_block_mode);
 		return -1;
 	}
+	if (ldpc_enc->z_c > 384) {
+		rte_bbdev_log(ERR,
+				"Zc (%u) is out of range",
+				ldpc_enc->z_c);
+		return -1;
+	}
 	int K = (ldpc_enc->basegraph == 1 ? 22 : 10) * ldpc_enc->z_c;
-	if (ldpc_enc->n_filler >= K) {
+	int N = (ldpc_enc->basegraph == 1 ? ACC100_N_ZC_1 : ACC100_N_ZC_2)
+			* ldpc_enc->z_c;
+	int q_m = ldpc_enc->q_m;
+	int crc24 = 0;
+
+	if (check_bit(op->ldpc_enc.op_flags,
+			RTE_BBDEV_LDPC_CRC_24A_ATTACH) ||
+			check_bit(op->ldpc_enc.op_flags,
+			RTE_BBDEV_LDPC_CRC_24B_ATTACH))
+		crc24 = 24;
+	if ((K - ldpc_enc->n_filler) % 8 > 0) {
 		rte_bbdev_log(ERR,
-				"K and F are not compatible %u %u",
+				"K - F not byte aligned %u",
+				K - ldpc_enc->n_filler);
+		return -1;
+	}
+	if (ldpc_enc->n_filler > (K - 2 * ldpc_enc->z_c)) {
+		rte_bbdev_log(ERR,
+				"K - F invalid %u %u",
 				K, ldpc_enc->n_filler);
 		return -1;
 	}
+	if ((ldpc_enc->n_cb > N) || (ldpc_enc->n_cb <= K)) {
+		rte_bbdev_log(ERR,
+				"Ncb (%u) is out of range K  %d N %d",
+				ldpc_enc->n_cb, K, N);
+		return -1;
+	}
+	if (!check_bit(op->ldpc_enc.op_flags,
+			RTE_BBDEV_LDPC_INTERLEAVER_BYPASS) &&
+			((q_m == 0) || ((q_m > 2) && ((q_m % 2) == 1))
+			|| (q_m > 8))) {
+		rte_bbdev_log(ERR,
+				"Qm (%u) is out of range",
+				ldpc_enc->q_m);
+		return -1;
+	}
+	if (ldpc_enc->code_block_mode == RTE_BBDEV_CODE_BLOCK) {
+		if (ldpc_enc->cb_params.e == 0) {
+			rte_bbdev_log(ERR,
+					"E is null");
+			return -1;
+		}
+		if (q_m > 0) {
+			if (ldpc_enc->cb_params.e % q_m > 0) {
+				rte_bbdev_log(ERR,
+						"E not multiple of qm %d", q_m);
+				return -1;
+			}
+		}
+		if ((ldpc_enc->z_c <= 11) && (ldpc_enc->cb_params.e > 3456)) {
+			rte_bbdev_log(ERR,
+					"E too large for small block");
+			return -1;
+		}
+		if (ldpc_enc->input.length >
+			RTE_BBDEV_LDPC_MAX_CB_SIZE >> 3) {
+			rte_bbdev_log(ERR, "CB size (%u) is too big, max: %d",
+					ldpc_enc->input.length,
+					RTE_BBDEV_LDPC_MAX_CB_SIZE);
+		return -1;
+		}
+		if (K < (int) (ldpc_enc->input.length * 8
+				+ ldpc_enc->n_filler) + crc24) {
+			rte_bbdev_log(ERR,
+					"K and F not matching input size %u %u %u",
+					K, ldpc_enc->n_filler,
+					ldpc_enc->input.length);
+			return -1;
+		}
+	} else {
+		if ((ldpc_enc->tb_params.c == 0) ||
+				(ldpc_enc->tb_params.ea == 0) ||
+				(ldpc_enc->tb_params.eb == 0)) {
+			rte_bbdev_log(ERR,
+					"TB parameter is null");
+			return -1;
+		}
+		if (q_m > 0) {
+			if ((ldpc_enc->tb_params.ea % q_m > 0) ||
+					(ldpc_enc->tb_params.eb % q_m > 0)) {
+				rte_bbdev_log(ERR,
+						"E not multiple of qm %d",
+						q_m);
+				return -1;
+			}
+		}
+		if ((ldpc_enc->z_c <= 11) && (RTE_MAX(ldpc_enc->tb_params.ea,
+				ldpc_enc->tb_params.eb) > 3456)) {
+			rte_bbdev_log(ERR,
+					"E too large for small block");
+			return -1;
+		}
+	}
 	return 0;
 }
 
@@ -2460,8 +2548,16 @@ validate_ldpc_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
 	if (!validate_op_required(q))
 		return 0;
 
-	if (op->mempool == NULL) {
-		rte_bbdev_log(ERR, "Invalid mempool pointer");
+	if (ldpc_dec->input.data == NULL) {
+		rte_bbdev_log(ERR, "Invalid input pointer");
+		return -1;
+	}
+	if (ldpc_dec->hard_output.data == NULL) {
+		rte_bbdev_log(ERR, "Invalid output pointer");
+		return -1;
+	}
+	if (ldpc_dec->input.length == 0) {
+		rte_bbdev_log(ERR, "input is null");
 		return -1;
 	}
 	if ((ldpc_dec->basegraph > 2) || (ldpc_dec->basegraph == 0)) {
@@ -2488,13 +2584,186 @@ validate_ldpc_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
 				ldpc_dec->code_block_mode);
 		return -1;
 	}
+	/* Check Zc is valid value */
+	if ((ldpc_dec->z_c > 384) || (ldpc_dec->z_c < 2)) {
+		rte_bbdev_log(ERR,
+				"Zc (%u) is out of range",
+				ldpc_dec->z_c);
+		return -1;
+	}
+	if (ldpc_dec->z_c > 256) {
+		if ((ldpc_dec->z_c % 32) != 0) {
+			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
+			return -1;
+		}
+	} else if (ldpc_dec->z_c > 128) {
+		if ((ldpc_dec->z_c % 16) != 0) {
+			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
+			return -1;
+		}
+	} else if (ldpc_dec->z_c > 64) {
+		if ((ldpc_dec->z_c % 8) != 0) {
+			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
+			return -1;
+		}
+	} else if (ldpc_dec->z_c > 32) {
+		if ((ldpc_dec->z_c % 4) != 0) {
+			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
+			return -1;
+		}
+	} else if (ldpc_dec->z_c > 16) {
+		if ((ldpc_dec->z_c % 2) != 0) {
+			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
+			return -1;
+		}
+	}
 	int K = (ldpc_dec->basegraph == 1 ? 22 : 10) * ldpc_dec->z_c;
-	if (ldpc_dec->n_filler >= K) {
+	int N = (ldpc_dec->basegraph == 1 ? ACC100_N_ZC_1 : ACC100_N_ZC_2)
+			* ldpc_dec->z_c;
+	int q_m = ldpc_dec->q_m;
+	if (ldpc_dec->n_filler >= K - 2 * ldpc_dec->z_c) {
 		rte_bbdev_log(ERR,
 				"K and F are not compatible %u %u",
 				K, ldpc_dec->n_filler);
 		return -1;
 	}
+	if ((ldpc_dec->n_cb > N) || (ldpc_dec->n_cb <= K)) {
+		rte_bbdev_log(ERR,
+				"Ncb (%u) is out of range K  %d N %d",
+				ldpc_dec->n_cb, K, N);
+		return -1;
+	}
+
+	if (((q_m == 0) || ((q_m > 2) && ((q_m % 2) == 1))
+			|| (q_m > 8))) {
+		rte_bbdev_log(ERR,
+				"Qm (%u) is out of range",
+				ldpc_dec->q_m);
+		return -1;
+	}
+	if (ldpc_dec->code_block_mode == RTE_BBDEV_CODE_BLOCK) {
+		if (ldpc_dec->cb_params.e == 0) {
+			rte_bbdev_log(ERR,
+					"E is null");
+			return -1;
+		}
+		if (ldpc_dec->cb_params.e % q_m > 0) {
+			rte_bbdev_log(ERR,
+					"E not multiple of qm %d", q_m);
+			return -1;
+		}
+		if (ldpc_dec->cb_params.e > 512 * ldpc_dec->z_c) {
+			rte_bbdev_log(ERR,
+					"E too high");
+			return -1;
+		}
+	} else {
+		if ((ldpc_dec->tb_params.c == 0) ||
+				(ldpc_dec->tb_params.ea == 0) ||
+				(ldpc_dec->tb_params.eb == 0)) {
+			rte_bbdev_log(ERR,
+					"TB parameter is null");
+			return -1;
+		}
+		if ((ldpc_dec->tb_params.ea % q_m > 0) ||
+				(ldpc_dec->tb_params.eb % q_m > 0)) {
+			rte_bbdev_log(ERR,
+					"E not multiple of qm %d", q_m);
+			return -1;
+		}
+		if ((ldpc_dec->tb_params.ea > 512 * ldpc_dec->z_c) ||
+				(ldpc_dec->tb_params.eb > 512 * ldpc_dec->z_c)) {
+			rte_bbdev_log(ERR,
+					"E too high");
+			return -1;
+		}
+	}
+	if (check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_DECODE_BYPASS)) {
+		rte_bbdev_log(ERR, "Avoid LDPC Decode bypass");
+		return -1;
+	}
+
+	/* Avoid HARQ compression for small block size */
+	if ((check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION))
+			&& (K < 2048)) {
+		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION;
+	}
+	uint32_t min_harq_input = check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION) ? 256 : 64;
+	if (check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE) &&
+			ldpc_dec->harq_combined_input.length <
+			min_harq_input) {
+		rte_bbdev_log(ERR, "HARQ input size is too small %d < %d",
+			ldpc_dec->harq_combined_input.length,
+			min_harq_input);
+		return -1;
+	}
+
+	/* Enforce in-range HARQ input size */
+	if (check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {
+		uint32_t max_harq_input = RTE_ALIGN_CEIL(ldpc_dec->n_cb -
+				ldpc_dec->n_filler, 64);
+		if (check_bit(op->ldpc_dec.op_flags,
+				RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION))
+			max_harq_input = max_harq_input * 3 / 4;
+		if (ldpc_dec->harq_combined_input.length > max_harq_input) {
+			rte_bbdev_log(ERR,
+					"HARQ input size out of range %d > %d, Ncb %d F %d K %d N %d",
+					ldpc_dec->harq_combined_input.length,
+					max_harq_input, ldpc_dec->n_cb,
+					ldpc_dec->n_filler, K, N);
+			/* Fallback to flush HARQ combine */
+			ldpc_dec->harq_combined_input.length = 0;
+			if (check_bit(op->ldpc_dec.op_flags,
+					RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {
+				op->ldpc_dec.op_flags ^=
+					RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
+			}
+		}
+	}
+
+#ifdef ACC100_EXT_MEM
+	/* Enforce in-range HARQ offset */
+	if (check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {
+		if ((op->ldpc_dec.harq_combined_input.offset >> 10)
+				>= q->d->ddr_size) {
+			rte_bbdev_log(ERR,
+				"HARQin offset out of range %d > %d",
+				op->ldpc_dec.harq_combined_input.offset,
+				q->d->ddr_size);
+			return -1;
+		}
+		if ((op->ldpc_dec.harq_combined_input.offset & 0x3FF) > 0) {
+			rte_bbdev_log(ERR,
+				"HARQin offset not aligned on 1kB %d",
+				op->ldpc_dec.harq_combined_input.offset);
+			return -1;
+		}
+	}
+	if (check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) {
+		if ((op->ldpc_dec.harq_combined_output.offset >> 10)
+				>= q->d->ddr_size) {
+			rte_bbdev_log(ERR,
+				"HARQout offset out of range %d > %d",
+				op->ldpc_dec.harq_combined_output.offset,
+				q->d->ddr_size);
+			return -1;
+		}
+		if ((op->ldpc_dec.harq_combined_output.offset & 0x3FF) > 0) {
+			rte_bbdev_log(ERR,
+				"HARQout offset not aligned on 1kB %d",
+				op->ldpc_dec.harq_combined_output.offset);
+			return -1;
+		}
+	}
+#endif
+
 	return 0;
 }
 #endif
-- 
2.37.1

[PATCH v2 15/37] baseband/acc100: add workaround for deRM corner cases

[Hernan Vargas]

Add function to asses if de-ratematch pre-processing should be run
in SW for corner cases.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/acc100_pmd.h     |  13 +++
 drivers/baseband/acc100/rte_acc100_pmd.c | 103 ++++++++++++++++++++++-
 2 files changed, 114 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
index 19a1f434bc..c98a182be6 100644
--- a/drivers/baseband/acc100/acc100_pmd.h
+++ b/drivers/baseband/acc100/acc100_pmd.h
@@ -140,6 +140,8 @@
 /* Constants from K0 computation from 3GPP 38.212 Table 5.4.2.1-2 */
 #define ACC100_N_ZC_1 66 /* N = 66 Zc for BG 1 */
 #define ACC100_N_ZC_2 50 /* N = 50 Zc for BG 2 */
+#define ACC100_K_ZC_1 22 /* K = 22 Zc for BG 1 */
+#define ACC100_K_ZC_2 10 /* K = 10 Zc for BG 2 */
 #define ACC100_K0_1_1 17 /* K0 fraction numerator for rv 1 and BG 1 */
 #define ACC100_K0_1_2 13 /* K0 fraction numerator for rv 1 and BG 2 */
 #define ACC100_K0_2_1 33 /* K0 fraction numerator for rv 2 and BG 1 */
@@ -177,6 +179,16 @@
 #define ACC100_MS_IN_US         (1000)
 #define ACC100_DDR_TRAINING_MAX (5000)
 
+/* Code rate limitation when padding is required */
+#define ACC100_LIM_03 2  /* 0.03 */
+#define ACC100_LIM_09 6  /* 0.09 */
+#define ACC100_LIM_14 9  /* 0.14 */
+#define ACC100_LIM_21 14 /* 0.21 */
+#define ACC100_LIM_31 20 /* 0.31 */
+#define ACC100_MAX_E (128 * 1024 - 2)
+
+
+
 /* ACC100 DMA Descriptor triplet */
 struct acc100_dma_triplet {
 	uint64_t address;
@@ -572,6 +584,7 @@ struct __rte_cache_aligned acc100_queue {
 	uint8_t *lb_out;
 	rte_iova_t lb_in_addr_iova;
 	rte_iova_t lb_out_addr_iova;
+	int8_t *derm_buffer; /* interim buffer for de-rm in SDK */
 	struct acc100_device *d;
 };
 
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 1504acfadd..69c0714a37 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -24,6 +24,10 @@
 #include "acc100_pmd.h"
 #include "acc101_pmd.h"
 
+#ifdef RTE_BBDEV_SDK_AVX512
+#include <phy_rate_dematching_5gnr.h>
+#endif
+
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 RTE_LOG_REGISTER_DEFAULT(acc100_logtype, DEBUG);
 #else
@@ -898,6 +902,16 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 		rte_free(q);
 		return -ENOMEM;
 	}
+	q->derm_buffer = rte_zmalloc_socket(dev->device->driver->name,
+			RTE_BBDEV_TURBO_MAX_CB_SIZE * 10,
+			RTE_CACHE_LINE_SIZE, conf->socket);
+	if (q->derm_buffer == NULL) {
+		rte_bbdev_log(ERR, "Failed to allocate derm_buffer memory");
+		rte_free(q->lb_in);
+		rte_free(q->lb_out);
+		rte_free(q);
+		return -ENOMEM;
+	}
 	q->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);
 
 	/*
@@ -918,6 +932,7 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 
 	q_idx = acc100_find_free_queue_idx(dev, conf);
 	if (q_idx == -1) {
+		rte_free(q->derm_buffer);
 		rte_free(q->lb_in);
 		rte_free(q->lb_out);
 		rte_free(q);
@@ -955,6 +970,7 @@ acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)
 		/* Mark the Queue as un-assigned */
 		d->q_assigned_bit_map[q->qgrp_id] &= (0xFFFFFFFF -
 				(1 << q->aq_id));
+		rte_free(q->derm_buffer);
 		rte_free(q->lb_in);
 		rte_free(q->lb_out);
 		rte_free(q);
@@ -3512,10 +3528,42 @@ harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	return 1;
 }
 
+/** Assess whether a work around is required for the deRM corner cases */
+static inline bool
+derm_workaround_required(struct rte_bbdev_op_ldpc_dec *ldpc_dec, struct acc100_queue *q)
+{
+	if (!is_acc100(q))
+		return false;
+	int32_t e = ldpc_dec->cb_params.e;
+	int q_m = ldpc_dec->q_m;
+	int z_c = ldpc_dec->z_c;
+	int K = (ldpc_dec->basegraph == 1 ? ACC100_K_ZC_1 : ACC100_K_ZC_2)
+			* z_c;
+	bool required = false;
+	if (ldpc_dec->basegraph == 1) {
+		if ((q_m == 4) && (z_c >= 320) && (e * ACC100_LIM_31 > K * 64))
+			required = true;
+		else if ((e * ACC100_LIM_21 > K * 64))
+			required = true;
+	} else {
+		if (q_m <= 2) {
+			if ((z_c >= 208) && (e * ACC100_LIM_09 > K * 64))
+				required = true;
+			else if ((z_c < 208) && (e * ACC100_LIM_03 > K * 64))
+				required = true;
+		} else if (e * ACC100_LIM_14 > K * 64)
+			required = true;
+	}
+	if (required)
+		rte_bbdev_log(INFO, "Running deRM pre-processing in SW");
+	return required;
+}
+
 /** Enqueue one decode operations for ACC100 device in CB mode */
 static inline int
 enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
-		uint16_t total_enqueued_cbs, bool same_op)
+		uint16_t total_enqueued_cbs, bool same_op,
+		struct rte_bbdev_queue_data *q_data)
 {
 	int ret;
 	if (unlikely(check_bit(op->ldpc_dec.op_flags,
@@ -3571,6 +3619,57 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 				&in_offset, &h_out_offset,
 				&h_out_length, harq_layout);
 	} else {
+		if (derm_workaround_required(&op->ldpc_dec, q)) {
+			#ifdef RTE_BBDEV_SDK_AVX512
+			struct rte_bbdev_op_ldpc_dec *dec = &op->ldpc_dec;
+			/* Checking input size is matching with E */
+			if (dec->input.data->data_len < dec->cb_params.e) {
+				rte_bbdev_log(ERR,
+						"deRM: Input size mismatch");
+				return -EFAULT;
+			}
+			/* Run first deRM processing in SW */
+			struct bblib_rate_dematching_5gnr_request derm_req;
+			struct bblib_rate_dematching_5gnr_response derm_resp;
+			uint8_t *in = rte_pktmbuf_mtod_offset(dec->input.data,
+					uint8_t *, in_offset);
+			derm_req.p_in = (int8_t *) in;
+			derm_req.p_harq = (int8_t *) q->derm_buffer;
+			derm_req.base_graph = dec->basegraph;
+			derm_req.zc = dec->z_c;
+			derm_req.ncb = dec->n_cb;
+			derm_req.e = dec->cb_params.e;
+			if (derm_req.e > ACC100_MAX_E) {
+				rte_bbdev_log(WARNING,
+						"deRM: E %d > %d max",
+						derm_req.e, ACC100_MAX_E);
+				derm_req.e = ACC100_MAX_E;
+			}
+			derm_req.k0 = 0; /* Actual output from SDK */
+			derm_req.isretx = false;
+			derm_req.rvid = dec->rv_index;
+			derm_req.modulation_order = dec->q_m;
+			derm_req.start_null_index =
+					(dec->basegraph == 1 ? 22 : 10)
+					* dec->z_c - 2 * dec->z_c
+					- dec->n_filler;
+			derm_req.num_of_null = dec->n_filler;
+			bblib_rate_dematching_5gnr(&derm_req, &derm_resp);
+			/* Force back the HW DeRM */
+			dec->q_m = 1;
+			dec->cb_params.e = dec->n_cb - dec->n_filler;
+			dec->rv_index = 0;
+			rte_memcpy(in, q->derm_buffer, dec->cb_params.e);
+			/* Capture counter when pre-processing is used */
+			q_data->queue_stats.enqueue_warn_count++;
+			#else
+			RTE_SET_USED(q_data);
+			rte_bbdev_log(WARNING,
+				"Corner case may require deRM pre-processing in SDK"
+				);
+			#endif
+		}
+
 		struct acc100_fcw_ld *fcw;
 		uint32_t seg_total_left;
 		fcw = &desc->req.fcw_ld;
@@ -4322,7 +4421,7 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
 			ops[i]->ldpc_dec.n_cb, ops[i]->ldpc_dec.q_m,
 			ops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e,
 			same_op);
-		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
+		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op, q_data);
 		if (ret < 0) {
 			acc100_enqueue_invalid(q_data);
 			break;
-- 
2.37.1

[PATCH v2 16/37] baseband/acc100: add ring companion address

[Hernan Vargas]

Store the virtual address of companion ring as part of queue
information. Use this address to calculate the op address.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/acc100_pmd.h     |  12 ++
 drivers/baseband/acc100/rte_acc100_pmd.c | 143 ++++++++++++++---------
 2 files changed, 100 insertions(+), 55 deletions(-)

diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
index c98a182be6..20157e5886 100644
--- a/drivers/baseband/acc100/acc100_pmd.h
+++ b/drivers/baseband/acc100/acc100_pmd.h
@@ -126,6 +126,7 @@
 #define ACC100_5GUL_SIZE_0                16
 #define ACC100_5GUL_SIZE_1                40
 #define ACC100_5GUL_OFFSET_0              36
+#define ACC100_COMPANION_PTRS             8
 
 #define ACC100_FCW_VER         2
 #define ACC100_MUX_5GDL_DESC   6
@@ -375,6 +376,15 @@ struct __rte_packed acc100_fcw_le {
 	uint32_t res8;
 };
 
+struct __rte_packed acc100_pad_ptr {
+	void *op_addr;
+	uint64_t pad1;  /* pad to 64 bits */
+};
+
+struct __rte_packed acc100_ptrs {
+	struct acc100_pad_ptr ptr[ACC100_COMPANION_PTRS];
+};
+
 /* ACC100 DMA Request Descriptor */
 struct __rte_packed acc100_dma_req_desc {
 	union {
@@ -568,6 +578,8 @@ struct __rte_cache_aligned acc100_queue {
 	uint32_t sw_ring_depth;
 	/* mask used to wrap enqueued descriptors on the sw ring */
 	uint32_t sw_ring_wrap_mask;
+	/* Virtual address of companion ring */
+	struct acc100_ptrs *companion_ring_addr;
 	/* MMIO register used to enqueue descriptors */
 	void *mmio_reg_enqueue;
 	uint8_t vf_id;  /* VF ID (max = 63) */
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 69c0714a37..ea54152856 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -913,6 +913,17 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 		return -ENOMEM;
 	}
 	q->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);
+	q->companion_ring_addr = rte_zmalloc_socket(dev->device->driver->name,
+			d->sw_ring_max_depth * sizeof(*q->companion_ring_addr),
+			RTE_CACHE_LINE_SIZE, conf->socket);
+	if (q->companion_ring_addr == NULL) {
+		rte_bbdev_log(ERR, "Failed to allocate companion_ring memory");
+		rte_free(q->derm_buffer);
+		rte_free(q->lb_in);
+		rte_free(q->lb_out);
+		rte_free(q);
+		return -ENOMEM;
+	}
 
 	/*
 	 * Software queue ring wraps synchronously with the HW when it reaches
@@ -932,6 +943,7 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 
 	q_idx = acc100_find_free_queue_idx(dev, conf);
 	if (q_idx == -1) {
+		rte_free(q->companion_ring_addr);
 		rte_free(q->derm_buffer);
 		rte_free(q->lb_in);
 		rte_free(q->lb_out);
@@ -970,6 +982,7 @@ acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)
 		/* Mark the Queue as un-assigned */
 		d->q_assigned_bit_map[q->qgrp_id] &= (0xFFFFFFFF -
 				(1 << q->aq_id));
+		rte_free(q->companion_ring_addr);
 		rte_free(q->derm_buffer);
 		rte_free(q->lb_in);
 		rte_free(q->lb_out);
@@ -2889,6 +2902,10 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
 	}
 
 	desc->req.op_addr = ops[0];
+	/* Keep track of pointers even when multiplexed in single descriptor */
+	struct acc100_ptrs *context_ptrs = q->companion_ring_addr + desc_idx;
+	for (i = 0; i < num; i++)
+		context_ptrs->ptr[i].op_addr = ops[i];
 
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 	rte_memdump(stderr, "FCW", &desc->req.fcw_le,
@@ -4517,15 +4534,16 @@ acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
 /* Dequeue one encode operations from ACC100 device in CB mode */
 static inline int
 dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
-		uint16_t total_dequeued_cbs, uint32_t *aq_dequeued)
+		uint16_t *dequeued_ops, uint32_t *aq_dequeued,
+		uint16_t *dequeued_descs)
 {
 	union acc100_dma_desc *desc, atom_desc;
 	union acc100_dma_rsp_desc rsp;
 	struct rte_bbdev_enc_op *op;
 	int i;
-
-	desc = q->ring_addr + ((q->sw_ring_tail + total_dequeued_cbs)
+	int desc_idx = ((q->sw_ring_tail + *dequeued_descs)
 			& q->sw_ring_wrap_mask);
+	desc = q->ring_addr + desc_idx;
 	atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
 			__ATOMIC_RELAXED);
 
@@ -4534,7 +4552,8 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 		return -1;
 
 	rsp.val = atom_desc.rsp.val;
-	rte_bbdev_log_debug("Resp. desc %p: %x", desc, rsp.val);
+	rte_bbdev_log_debug("Resp. desc %p: %x num %d\n",
+			desc, rsp.val, desc->req.numCBs);
 
 	/* Dequeue */
 	op = desc->req.op_addr;
@@ -4552,27 +4571,32 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 	desc->rsp.add_info_0 = 0; /*Reserved bits */
 	desc->rsp.add_info_1 = 0; /*Reserved bits */
 
-	/* Flag that the muxing cause loss of opaque data */
-	op->opaque_data = (void *)-1;
-	for (i = 0 ; i < desc->req.numCBs; i++)
-		ref_op[i] = op;
+	ref_op[0] = op;
+	struct acc100_ptrs *context_ptrs = q->companion_ring_addr + desc_idx;
+	for (i = 1 ; i < desc->req.numCBs; i++)
+		ref_op[i] = context_ptrs->ptr[i].op_addr;
 
-	/* One CB (op) was successfully dequeued */
+	/* One op was successfully dequeued */
+	(*dequeued_descs)++;
+	*dequeued_ops += desc->req.numCBs;
 	return desc->req.numCBs;
 }
 
-/* Dequeue one encode operations from ACC100 device in TB mode */
+/* Dequeue one LDPC encode operations from ACC100 device in TB mode
+ * That operation may cover multiple descriptors
+ */
 static inline int
 dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
-		uint16_t total_dequeued_cbs, uint32_t *aq_dequeued)
+		uint16_t *dequeued_ops, uint32_t *aq_dequeued,
+		uint16_t *dequeued_descs)
 {
 	union acc100_dma_desc *desc, *last_desc, atom_desc;
 	union acc100_dma_rsp_desc rsp;
 	struct rte_bbdev_enc_op *op;
 	uint8_t i = 0;
-	uint16_t current_dequeued_cbs = 0, cbs_in_tb;
+	uint16_t current_dequeued_descs = 0, descs_in_tb;
 
-	desc = q->ring_addr + ((q->sw_ring_tail + total_dequeued_cbs)
+	desc = q->ring_addr + ((q->sw_ring_tail + *dequeued_descs)
 			& q->sw_ring_wrap_mask);
 	atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
 			__ATOMIC_RELAXED);
@@ -4582,10 +4606,10 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 		return -1;
 
 	/* Get number of CBs in dequeued TB */
-	cbs_in_tb = desc->req.cbs_in_tb;
+	descs_in_tb = desc->req.cbs_in_tb;
 	/* Get last CB */
 	last_desc = q->ring_addr + ((q->sw_ring_tail
-			+ total_dequeued_cbs + cbs_in_tb - 1)
+			+ *dequeued_descs + descs_in_tb - 1)
 			& q->sw_ring_wrap_mask);
 	/* Check if last CB in TB is ready to dequeue (and thus
 	 * the whole TB) - checking sdone bit. If not return.
@@ -4601,15 +4625,17 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 	/* Clearing status, it will be set based on response */
 	op->status = 0;
 
-	while (i < cbs_in_tb) {
+	while (i < descs_in_tb) {
 		desc = q->ring_addr + ((q->sw_ring_tail
-				+ total_dequeued_cbs)
+				+ *dequeued_descs)
 				& q->sw_ring_wrap_mask);
 		atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
 				__ATOMIC_RELAXED);
 		rsp.val = atom_desc.rsp.val;
-		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
-				rsp.val);
+		rte_bbdev_log_debug("Resp. desc %p: %x descs %d cbs %d\n",
+				desc,
+				rsp.val, descs_in_tb,
+				desc->req.numCBs);
 
 		op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
 		op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
@@ -4621,14 +4647,14 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
 		desc->rsp.val = ACC100_DMA_DESC_TYPE;
 		desc->rsp.add_info_0 = 0;
 		desc->rsp.add_info_1 = 0;
-		total_dequeued_cbs++;
-		current_dequeued_cbs++;
+		(*dequeued_descs)++;
+		current_dequeued_descs++;
 		i++;
 	}
 
 	*ref_op = op;
-
-	return current_dequeued_cbs;
+	(*dequeued_ops)++;
+	return current_dequeued_descs;
 }
 
 /* Dequeue one decode operation from ACC100 device in CB mode */
@@ -4824,12 +4850,11 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
 		struct rte_bbdev_enc_op **ops, uint16_t num)
 {
 	struct acc100_queue *q = q_data->queue_private;
-	uint16_t dequeue_num;
 	uint32_t avail = acc100_ring_avail_deq(q);
 	uint32_t aq_dequeued = 0;
-	uint16_t i, dequeued_cbs = 0;
-	struct rte_bbdev_enc_op *op;
+	uint16_t i, dequeued_ops = 0, dequeued_descs = 0;
 	int ret;
+	struct rte_bbdev_enc_op *op;
 	if (avail == 0)
 		return 0;
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
@@ -4838,31 +4863,34 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
 		return 0;
 	}
 #endif
+	op = (q->ring_addr + (q->sw_ring_tail &
+			q->sw_ring_wrap_mask))->req.op_addr;
+	if (unlikely(ops == NULL || op == NULL))
+		return 0;
 
-	dequeue_num = (avail < num) ? avail : num;
+	int cbm = op->turbo_enc.code_block_mode;
 
-	for (i = 0; i < dequeue_num; ++i) {
-		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
-			& q->sw_ring_wrap_mask))->req.op_addr;
-		if (op->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
-			ret = dequeue_enc_one_op_tb(q, &ops[i], dequeued_cbs,
-					&aq_dequeued);
+	for (i = 0; i < num; i++) {
+		if (cbm == RTE_BBDEV_TRANSPORT_BLOCK)
+			ret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
+					&dequeued_ops, &aq_dequeued,
+					&dequeued_descs);
 		else
-			ret = dequeue_enc_one_op_cb(q, &ops[i], dequeued_cbs,
-					&aq_dequeued);
-
+			ret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
+					&dequeued_ops, &aq_dequeued,
+					&dequeued_descs);
 		if (ret < 0)
 			break;
-		dequeued_cbs += ret;
+		if (dequeued_ops >= num)
+			break;
 	}
 
 	q->aq_dequeued += aq_dequeued;
-	q->sw_ring_tail += dequeued_cbs;
+	q->sw_ring_tail += dequeued_descs;
 
 	/* Update enqueue stats */
-	q_data->queue_stats.dequeued_count += i;
-
-	return i;
+	q_data->queue_stats.dequeued_count += dequeued_ops;
+	return dequeued_ops;
 }
 
 /* Dequeue LDPC encode operations from ACC100 device. */
@@ -4873,24 +4901,31 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 	struct acc100_queue *q = q_data->queue_private;
 	uint32_t avail = acc100_ring_avail_deq(q);
 	uint32_t aq_dequeued = 0;
-	uint16_t dequeue_num, i, dequeued_cbs = 0, dequeued_descs = 0;
+	uint16_t i, dequeued_ops = 0, dequeued_descs = 0;
 	int ret;
-
+	struct rte_bbdev_enc_op *op;
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 	if (unlikely(ops == 0 && q == NULL))
 		return 0;
 #endif
+	op = (q->ring_addr + (q->sw_ring_tail &
+			q->sw_ring_wrap_mask))->req.op_addr;
+	if (unlikely(ops == NULL || op == NULL))
+		return 0;
+	int cbm = op->ldpc_enc.code_block_mode;
 
-	dequeue_num = RTE_MIN(avail, num);
-
-	for (i = 0; i < dequeue_num; i++) {
-		ret = dequeue_enc_one_op_cb(q, &ops[dequeued_cbs],
-				dequeued_descs, &aq_dequeued);
+	for (i = 0; i < avail; i++) {
+		if (cbm == RTE_BBDEV_TRANSPORT_BLOCK)
+			ret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
+					&dequeued_ops, &aq_dequeued,
+					&dequeued_descs);
+		else
+			ret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
+					&dequeued_ops, &aq_dequeued,
+					&dequeued_descs);
 		if (ret < 0)
 			break;
-		dequeued_cbs += ret;
-		dequeued_descs++;
-		if (dequeued_cbs >= num)
+		if (dequeued_ops >= num)
 			break;
 	}
 
@@ -4898,12 +4933,10 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
 	q->sw_ring_tail += dequeued_descs;
 
 	/* Update enqueue stats */
-	q_data->queue_stats.dequeued_count += dequeued_cbs;
-
-	return dequeued_cbs;
+	q_data->queue_stats.dequeued_count += dequeued_ops;
+	return dequeued_ops;
 }
 
-
 /* Dequeue decode operations from ACC100 device. */
 static uint16_t
 acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
-- 
2.37.1

[PATCH v2 17/37] baseband/acc100: configure PMON control registers

[Hernan Vargas]

Adding back feature from ACC101.
Expose the device status and add protection for corner cases.
Enable performance monitor control registers.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/acc100_pf_enum.h | 52 +++++++++++++++++++++---
 drivers/baseband/acc100/acc100_pmd.h     |  9 +++-
 drivers/baseband/acc100/acc100_vf_enum.h |  6 +++
 drivers/baseband/acc100/rte_acc100_pmd.c | 13 ++++++
 4 files changed, 74 insertions(+), 6 deletions(-)

diff --git a/drivers/baseband/acc100/acc100_pf_enum.h b/drivers/baseband/acc100/acc100_pf_enum.h
index 2fba667627..d6a37a4147 100644
--- a/drivers/baseband/acc100/acc100_pf_enum.h
+++ b/drivers/baseband/acc100/acc100_pf_enum.h
@@ -14,6 +14,7 @@
 enum {
 	HWPfQmgrEgressQueuesTemplate          =  0x0007FE00,
 	HWPfQmgrIngressAq                     =  0x00080000,
+	HWPfAramStatus                        =  0x00810000,
 	HWPfQmgrArbQAvail                     =  0x00A00010,
 	HWPfQmgrArbQBlock                     =  0x00A00014,
 	HWPfQmgrAqueueDropNotifEn             =  0x00A00024,
@@ -127,6 +128,9 @@ enum {
 	HWPfDmaConfigUnexpComplDataEn         =  0x00B808A8,
 	HWPfDmaConfigUnexpComplDescrEn        =  0x00B808AC,
 	HWPfDmaConfigPtoutOutEn               =  0x00B808B0,
+	HWPfDmaClusterHangCtrl                =  0x00B80E00,
+	HWPfDmaClusterHangThld                =  0x00B80E04,
+	HWPfDmaStopAxiThreshold               =  0x00B80F3C,
 	HWPfDmaFec5GulDescBaseLoRegVf         =  0x00B88020,
 	HWPfDmaFec5GulDescBaseHiRegVf         =  0x00B88024,
 	HWPfDmaFec5GulRespPtrLoRegVf          =  0x00B88028,
@@ -328,11 +332,27 @@ enum {
 	HwPfFecUl5g8IbDebugReg                =  0x00BC8200,
 	HwPfFecUl5g8ObLlrDebugReg             =  0x00BC8204,
 	HwPfFecUl5g8ObHarqDebugReg            =  0x00BC8208,
-	HWPfFecDl5gCntrlReg                   =  0x00BCF000,
-	HWPfFecDl5gI2MThreshReg               =  0x00BCF004,
-	HWPfFecDl5gVersionReg                 =  0x00BCF100,
-	HWPfFecDl5gFcwStatusReg               =  0x00BCF104,
-	HWPfFecDl5gWarnReg                    =  0x00BCF108,
+	HwPfFecDl5g0CntrlReg                  =  0x00BCD000,
+	HwPfFecDl5g0I2MThreshReg              =  0x00BCD004,
+	HwPfFecDl5g0VersionReg                =  0x00BCD100,
+	HwPfFecDl5g0FcwStatusReg              =  0x00BCD104,
+	HwPfFecDl5g0WarnReg                   =  0x00BCD108,
+	HwPfFecDl5g0IbDebugReg                =  0x00BCD200,
+	HwPfFecDl5g0ObDebugReg                =  0x00BCD204,
+	HwPfFecDl5g1CntrlReg                  =  0x00BCE000,
+	HwPfFecDl5g1I2MThreshReg              =  0x00BCE004,
+	HwPfFecDl5g1VersionReg                =  0x00BCE100,
+	HwPfFecDl5g1FcwStatusReg              =  0x00BCE104,
+	HwPfFecDl5g1WarnReg                   =  0x00BCE108,
+	HwPfFecDl5g1IbDebugReg                =  0x00BCE200,
+	HwPfFecDl5g1ObDebugReg                =  0x00BCE204,
+	HwPfFecDl5g2CntrlReg                  =  0x00BCF000,
+	HwPfFecDl5g2I2MThreshReg              =  0x00BCF004,
+	HwPfFecDl5g2VersionReg                =  0x00BCF100,
+	HwPfFecDl5g2FcwStatusReg              =  0x00BCF104,
+	HwPfFecDl5g2WarnReg                   =  0x00BCF108,
+	HwPfFecDl5g2IbDebugReg                =  0x00BCF200,
+	HwPfFecDl5g2ObDebugReg                =  0x00BCF204,
 	HWPfFecUlVersionReg                   =  0x00BD0000,
 	HWPfFecUlControlReg                   =  0x00BD0004,
 	HWPfFecUlStatusReg                    =  0x00BD0008,
@@ -345,6 +365,12 @@ enum {
 	HWPfFecDlClusterStatusReg3            =  0x00BDF04C,
 	HWPfFecDlClusterStatusReg4            =  0x00BDF050,
 	HWPfFecDlClusterStatusReg5            =  0x00BDF054,
+	HwPfWbbThreshold                      =  0x00C20000,
+	HwPfWbbSpare                          =  0x00C20004,
+	HwPfWbbDebugCtl                       =  0x00C20010,
+	HwPfWbbDebug                          =  0x00C20014,
+	HwPfWbbError                          =  0x00C20020,
+	HwPfWbbErrorInjecti                   =  0x00C20024,
 	HWPfChaFabPllPllrst                   =  0x00C40000,
 	HWPfChaFabPllClk0                     =  0x00C40004,
 	HWPfChaFabPllClk1                     =  0x00C40008,
@@ -527,6 +553,10 @@ enum {
 	HWPfHiDebugMemSnoopMsiFifo            =  0x00C841F8,
 	HWPfHiDebugMemSnoopInputFifo          =  0x00C841FC,
 	HWPfHiMsixMappingConfig               =  0x00C84200,
+	HWPfHiErrInjectReg                    =  0x00C84204,
+	HWPfHiErrStatusReg                    =  0x00C84208,
+	HWPfHiErrMaskReg                      =  0x00C8420C,
+	HWPfHiErrFatalReg                     =  0x00C84210,
 	HWPfHiJunkReg                         =  0x00C8FF00,
 	HWPfDdrUmmcVer                        =  0x00D00000,
 	HWPfDdrUmmcCap                        =  0x00D00010,
@@ -545,6 +575,7 @@ enum {
 	HWPfDdrMpcPbw2                        =  0x00D00130,
 	HWPfDdrMpcPbw1                        =  0x00D00140,
 	HWPfDdrMpcPbw0                        =  0x00D00150,
+	HwPfDdrUmmcEccErrInj                  =  0x00D00190,
 	HWPfDdrMemoryInit                     =  0x00D00200,
 	HWPfDdrMemoryInitDone                 =  0x00D00210,
 	HWPfDdrMemInitPhyTrng0                =  0x00D00240,
@@ -876,6 +907,7 @@ enum {
 	HwPfPcieSupFence                      =  0x00D8086C,
 	HwPfPcieSupMtcs                       =  0x00D80870,
 	HwPfPcieSupStatsum                    =  0x00D809B8,
+	HwPfPcieRomVersion                    =  0x00D80B0C,
 	HwPfPciePcsDpStatus0                  =  0x00D81000,
 	HwPfPciePcsDpControl0                 =  0x00D81004,
 	HwPfPciePcsPmaStatusLane0             =  0x00D81008,
@@ -1081,6 +1113,16 @@ enum {
 	ACC100_PF_INT_QMGR_ERR = 13,
 	ACC100_PF_INT_INT_REQ_OVERFLOW = 14,
 	ACC100_PF_INT_APB_TIMEOUT = 15,
+	ACC100_PF_INT_CORE_HANG = 16,
+	ACC100_PF_INT_CLUSTER_HANG = 17,
+	ACC100_PF_INT_WBB_ERROR = 18,
+	ACC100_PF_INT_5G_EXTRAREAD = 24,
+	ACC100_PF_INT_5G_READ_TIMEOUT = 25,
+	ACC100_PF_INT_5G_ERROR = 26,
+	ACC100_PF_INT_PCIE_ERROR = 27,
+	ACC100_PF_INT_DDR_ERROR = 28,
+	ACC100_PF_INT_MISC_ERROR = 29,
+	ACC100_PF_INT_I2C = 30,
 };
 
 #endif /* ACC100_PF_ENUM_H */
diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
index 20157e5886..27801767b7 100644
--- a/drivers/baseband/acc100/acc100_pmd.h
+++ b/drivers/baseband/acc100/acc100_pmd.h
@@ -215,7 +215,8 @@ union acc100_dma_rsp_desc {
 			timestampEn:1,
 			iterCountFrac:8,
 			iter_cnt:8,
-			rsrvd3:6,
+			harq_failure:1,
+			rsrvd3:5,
 			sdone:1,
 			fdone:1;
 		uint32_t add_info_0;
@@ -508,6 +509,8 @@ struct acc100_registry_addr {
 	unsigned int depth_log1_offset;
 	unsigned int qman_group_func;
 	unsigned int ddr_range;
+	unsigned int pmon_ctrl_a;
+	unsigned int pmon_ctrl_b;
 };
 
 /* Structure holding registry addresses for PF */
@@ -537,6 +540,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
 	.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
 	.qman_group_func = HWPfQmgrGrpFunction0,
 	.ddr_range = HWPfDmaVfDdrBaseRw,
+	.pmon_ctrl_a = HWPfPermonACntrlRegVf,
+	.pmon_ctrl_b = HWPfPermonBCntrlRegVf,
 };
 
 /* Structure holding registry addresses for VF */
@@ -566,6 +571,8 @@ static const struct acc100_registry_addr vf_reg_addr = {
 	.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
 	.qman_group_func = HWVfQmgrGrpFunction0Vf,
 	.ddr_range = HWVfDmaDdrBaseRangeRoVf,
+	.pmon_ctrl_a = HWVfPmACntrlRegVf,
+	.pmon_ctrl_b = HWVfPmBCntrlRegVf,
 };
 
 /* Structure associated with each queue. */
diff --git a/drivers/baseband/acc100/acc100_vf_enum.h b/drivers/baseband/acc100/acc100_vf_enum.h
index b512af33fc..5807a9d0fd 100644
--- a/drivers/baseband/acc100/acc100_vf_enum.h
+++ b/drivers/baseband/acc100/acc100_vf_enum.h
@@ -70,4 +70,10 @@ enum {
 	ACC100_VF_INT_QMGR_AQ_OVERTHRESHOLD = 9,
 };
 
+/* TIP PF2VF Comms */
+enum {
+	ACC100_VF2PF_STATUS_REQUEST = 0,
+	ACC100_VF2PF_USING_VF = 1,
+};
+
 #endif /* ACC100_VF_ENUM_H */
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index ea54152856..9c15797503 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -292,6 +292,13 @@ fetch_acc100_config(struct rte_bbdev *dev)
 			acc100_conf->q_dl_5g.aq_depth_log2);
 }
 
+static inline void
+acc100_vf2pf(struct acc100_device *d, unsigned int payload)
+{
+	if (d->device_variant == ACC101_VARIANT)
+		acc100_reg_write(d, HWVfHiVfToPfDbellVf, payload);
+}
+
 static void
 free_base_addresses(void **base_addrs, int size)
 {
@@ -646,6 +653,11 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
 	/* Read the populated cfg from ACC100 registers */
 	fetch_acc100_config(dev);
 
+	for (value = 0; value <= 2; value++) {
+		acc100_reg_write(d, reg_addr->pmon_ctrl_a, value);
+		acc100_reg_write(d, reg_addr->pmon_ctrl_b, value);
+	}
+
 	/* Release AXI from PF */
 	if (d->pf_device)
 		acc100_reg_write(d, HWPfDmaAxiControl, 1);
@@ -712,6 +724,7 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
 
 	/* Mark as configured properly */
 	d->configured = true;
+	acc100_vf2pf(d, ACC100_VF2PF_USING_VF);
 
 	rte_bbdev_log_debug(
 			"ACC100 (%s) configured  sw_rings = %p, sw_rings_iova = %#"
-- 
2.37.1

[PATCH v2 18/37] baseband/acc100: implement configurable queue depth

[Hernan Vargas]

Implement new feature to make queue depth configurable based on decode
or encode mode.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 9c15797503..460233a499 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -967,9 +967,15 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 	q->qgrp_id = (q_idx >> ACC100_GRP_ID_SHIFT) & 0xF;
 	q->vf_id = (q_idx >> ACC100_VF_ID_SHIFT)  & 0x3F;
 	q->aq_id = q_idx & 0xF;
-	q->aq_depth = (conf->op_type ==  RTE_BBDEV_OP_TURBO_DEC) ?
-			(1 << d->acc100_conf.q_ul_4g.aq_depth_log2) :
-			(1 << d->acc100_conf.q_dl_4g.aq_depth_log2);
+	q->aq_depth = 0;
+	if (conf->op_type ==  RTE_BBDEV_OP_TURBO_DEC)
+		q->aq_depth = (1 << d->acc100_conf.q_ul_4g.aq_depth_log2);
+	else if (conf->op_type ==  RTE_BBDEV_OP_TURBO_ENC)
+		q->aq_depth = (1 << d->acc100_conf.q_dl_4g.aq_depth_log2);
+	else if (conf->op_type ==  RTE_BBDEV_OP_LDPC_DEC)
+		q->aq_depth = (1 << d->acc100_conf.q_ul_5g.aq_depth_log2);
+	else if (conf->op_type ==  RTE_BBDEV_OP_LDPC_ENC)
+		q->aq_depth = (1 << d->acc100_conf.q_dl_5g.aq_depth_log2);
 
 	q->mmio_reg_enqueue = RTE_PTR_ADD(d->mmio_base,
 			queue_offset(d->pf_device,
-- 
2.37.1

[PATCH v2 19/37] baseband/acc100: add queue stop operation

[Hernan Vargas]

Implement new feature queue stop operation.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 58 ++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 460233a499..deb2cb6d36 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -990,6 +990,63 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
 	return 0;
 }
 
+static inline void
+acc100_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,
+		uint16_t index)
+{
+	if (op == NULL)
+		return;
+	if (op_type == RTE_BBDEV_OP_LDPC_DEC)
+		rte_bbdev_log(INFO,
+			"  Op 5GUL %d %d %d %d %d %d %d %d %d %d %d %d",
+			index,
+			op->ldpc_dec.basegraph, op->ldpc_dec.z_c,
+			op->ldpc_dec.n_cb, op->ldpc_dec.q_m,
+			op->ldpc_dec.n_filler, op->ldpc_dec.cb_params.e,
+			op->ldpc_dec.op_flags, op->ldpc_dec.rv_index,
+			op->ldpc_dec.iter_max, op->ldpc_dec.iter_count,
+			op->ldpc_dec.harq_combined_input.length
+			);
+	else if (op_type == RTE_BBDEV_OP_LDPC_ENC) {
+		struct rte_bbdev_enc_op *op_dl = (struct rte_bbdev_enc_op *) op;
+		rte_bbdev_log(INFO,
+			"  Op 5GDL %d %d %d %d %d %d %d %d %d",
+			index,
+			op_dl->ldpc_enc.basegraph, op_dl->ldpc_enc.z_c,
+			op_dl->ldpc_enc.n_cb, op_dl->ldpc_enc.q_m,
+			op_dl->ldpc_enc.n_filler, op_dl->ldpc_enc.cb_params.e,
+			op_dl->ldpc_enc.op_flags, op_dl->ldpc_enc.rv_index
+			);
+	}
+}
+
+static int
+acc100_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
+{
+	struct acc100_queue *q;
+	struct rte_bbdev_dec_op *op;
+	uint16_t i;
+	q = dev->data->queues[queue_id].queue_private;
+	rte_bbdev_log(INFO, "Queue Stop %d H/T/D %d %d %x OpType %d",
+			queue_id, q->sw_ring_head, q->sw_ring_tail,
+			q->sw_ring_depth, q->op_type);
+	for (i = 0; i < q->sw_ring_depth; ++i) {
+		op = (q->ring_addr + i)->req.op_addr;
+		acc100_print_op(op, q->op_type, i);
+	}
+	/* ignore all operations in flight and clear counters */
+	q->sw_ring_tail = q->sw_ring_head;
+	q->aq_enqueued = 0;
+	q->aq_dequeued = 0;
+	dev->data->queues[queue_id].queue_stats.enqueued_count = 0;
+	dev->data->queues[queue_id].queue_stats.dequeued_count = 0;
+	dev->data->queues[queue_id].queue_stats.enqueue_err_count = 0;
+	dev->data->queues[queue_id].queue_stats.dequeue_err_count = 0;
+	dev->data->queues[queue_id].queue_stats.enqueue_warn_count = 0;
+	dev->data->queues[queue_id].queue_stats.dequeue_warn_count = 0;
+	return 0;
+}
+
 /* Release ACC100 queue */
 static int
 acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)
@@ -1184,6 +1241,7 @@ static const struct rte_bbdev_ops acc100_bbdev_ops = {
 	.info_get = acc100_dev_info_get,
 	.queue_setup = acc100_queue_setup,
 	.queue_release = acc100_queue_release,
+	.queue_stop = acc100_queue_stop,
 	.queue_intr_enable = acc100_queue_intr_enable,
 	.queue_intr_disable = acc100_queue_intr_disable
 };
-- 
2.37.1

[PATCH v2 20/37] baseband/acc100: check turbo dec/enc input

[Hernan Vargas]

Add NULL check for the turbo decoder and encoder input length.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index deb2cb6d36..70a29f92a1 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2398,6 +2398,11 @@ validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
 		return -1;
 	}
 
+	if (turbo_enc->input.length == 0) {
+		rte_bbdev_log(ERR, "input length null");
+		return -1;
+	}
+
 	if (turbo_enc->code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
 		tb = &turbo_enc->tb_params;
 		if ((tb->k_neg < RTE_BBDEV_TURBO_MIN_CB_SIZE
@@ -2417,11 +2422,12 @@ validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
 					RTE_BBDEV_TURBO_MAX_CB_SIZE);
 			return -1;
 		}
-		if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1))
+		if (tb->c_neg > 0) {
 			rte_bbdev_log(ERR,
-					"c_neg (%u) is out of range 0 <= value <= %u",
-					tb->c_neg,
-					RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1);
+					"c_neg (%u) expected to be null",
+					tb->c_neg);
+			return -1;
+		}
 		if (tb->c < 1 || tb->c > RTE_BBDEV_TURBO_MAX_CODE_BLOCKS) {
 			rte_bbdev_log(ERR,
 					"c (%u) is out of range 1 <= value <= %u",
@@ -3320,6 +3326,11 @@ validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
 		return -1;
 	}
 
+	if (turbo_dec->input.length == 0) {
+		rte_bbdev_log(ERR, "input length null");
+		return -1;
+	}
+
 	if (turbo_dec->code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
 		tb = &turbo_dec->tb_params;
 		if ((tb->k_neg < RTE_BBDEV_TURBO_MIN_CB_SIZE
@@ -3340,11 +3351,13 @@ validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
 					RTE_BBDEV_TURBO_MAX_CB_SIZE);
 			return -1;
 		}
-		if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1))
+		if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1)) {
 			rte_bbdev_log(ERR,
 					"c_neg (%u) is out of range 0 <= value <= %u",
 					tb->c_neg,
 					RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1);
+					return -1;
+		}
 		if (tb->c < 1 || tb->c > RTE_BBDEV_TURBO_MAX_CODE_BLOCKS) {
 			rte_bbdev_log(ERR,
 					"c (%u) is out of range 1 <= value <= %u",
-- 
2.37.1

[PATCH v2 21/37] baseband/acc100: check for unlikely operation vals

[Hernan Vargas]

Add unlikely checks for NULL operation values.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 70a29f92a1..ea850e2d7f 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3148,6 +3148,10 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 	r = op->turbo_enc.tb_params.r;
 
 	while (mbuf_total_left > 0 && r < c) {
+		if (unlikely(input == 0)) {
+			rte_bbdev_log(ERR, "Not enough input segment");
+			return -EINVAL;
+		}
 		seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
 		/* Set up DMA descriptor */
 		desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs)
@@ -4491,6 +4495,8 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
 		}
 		enqueued_cbs += ret;
 	}
+	if (unlikely(enqueued_cbs == 0))
+		return 0; /* Nothing to enqueue */
 
 	acc100_dma_enqueue(q, enqueued_cbs, &q_data->queue_stats);
 
@@ -5051,6 +5057,8 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
 	for (i = 0; i < dequeue_num; ++i) {
 		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
 			& q->sw_ring_wrap_mask))->req.op_addr;
+		if (unlikely(op == NULL))
+			break;
 		if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
 			ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
 					&aq_dequeued);
@@ -5096,6 +5104,8 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
 	for (i = 0; i < dequeue_num; ++i) {
 		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
 			& q->sw_ring_wrap_mask))->req.op_addr;
+		if (unlikely(op == NULL))
+			break;
 		if (op->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
 			ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
 					&aq_dequeued);
-- 
2.37.1

[PATCH v2 22/37] baseband/acc100: enforce additional check on FCW

[Hernan Vargas]

Enforce additional check on Frame Control Word validity and add stronger
alignment for decompression mode.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 40 ++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 3 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index ea850e2d7f..d67495ac52 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1508,6 +1508,20 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 		fcw->hcin_offset = 0;
 		fcw->hcin_size1 = 0;
 	}
+	/* Enforce additional check on FCW validity */
+	uint32_t max_hc_in = RTE_ALIGN_CEIL(fcw->ncb - fcw->nfiller, 64);
+	if ((fcw->hcin_size0 > max_hc_in) ||
+			(fcw->hcin_size1 + fcw->hcin_offset > max_hc_in) ||
+			((fcw->hcin_size0 > fcw->hcin_offset) &&
+			(fcw->hcin_size1 != 0))) {
+		rte_bbdev_log(ERR, " Invalid FCW : HCIn %d %d %d, Ncb %d F %d",
+				fcw->hcin_size0, fcw->hcin_size1,
+				fcw->hcin_offset,
+				fcw->ncb, fcw->nfiller);
+		/* Disable HARQ input in that case to carry forward */
+		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
+		fcw->hcin_en = 0;
+	}
 
 	fcw->itmax = op->ldpc_dec.iter_max;
 	fcw->itstop = check_bit(op->ldpc_dec.op_flags,
@@ -1536,10 +1550,19 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 		k0_p = (fcw->k0 > parity_offset) ?
 				fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
 		ncb_p = fcw->ncb - op->ldpc_dec.n_filler;
-		l = k0_p + fcw->rm_e;
+		l = RTE_MIN(k0_p + fcw->rm_e, INT16_MAX);
 		harq_out_length = (uint16_t) fcw->hcin_size0;
-		harq_out_length = RTE_MIN(RTE_MAX(harq_out_length, l), ncb_p);
-		harq_out_length = (harq_out_length + 0x3F) & 0xFFC0;
+		harq_out_length = RTE_MAX(harq_out_length, l);
+		/* Stronger alignment when in compression mode */
+		if (fcw->hcout_comp_mode > 0)
+			harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 256);
+		/* Cannot exceed the pruned Ncb circular buffer */
+		harq_out_length = RTE_MIN(harq_out_length, ncb_p);
+		/* Alignment on next 64B */
+		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
+		/* Stronger alignment when in compression mode enforced again */
+		if (fcw->hcout_comp_mode > 0)
+			harq_out_length = RTE_ALIGN_FLOOR(harq_out_length, 256);
 		if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) &&
 				harq_prun) {
 			fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
@@ -1550,6 +1573,13 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 			fcw->hcout_size1 = 0;
 			fcw->hcout_offset = 0;
 		}
+		if (fcw->hcout_size0 == 0) {
+			rte_bbdev_log(ERR, " Invalid FCW : HCout %d",
+				fcw->hcout_size0);
+			op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE;
+			fcw->hcout_en = 0;
+		}
+
 		harq_layout[harq_index].offset = fcw->hcout_offset;
 		harq_layout[harq_index].size0 = fcw->hcout_size0;
 	} else {
@@ -1591,6 +1621,10 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 		/* Disable HARQ input in that case to carry forward */
 		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
 	}
+	if (unlikely(fcw->rm_e == 0)) {
+		rte_bbdev_log(WARNING, "Null E input provided");
+		fcw->rm_e = 2;
+	}
 
 	fcw->hcin_en = check_bit(op->ldpc_dec.op_flags,
 			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);
-- 
2.37.1

[PATCH v2 23/37] baseband/acc100: update uplink CB input length

[Hernan Vargas]

Use the FCW E parameter for rate matching as the code block input
length.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index d67495ac52..0389768a6f 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2163,7 +2163,7 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
 		crc24_overlap = 24;
 
 	/* Compute some LDPC BG lengths */
-	input_length = dec->cb_params.e;
+	input_length = fcw->rm_e;
 	if (check_bit(op->ldpc_dec.op_flags,
 			RTE_BBDEV_LDPC_LLR_COMPRESSION))
 		input_length = (input_length * 3 + 3) / 4;
-- 
2.37.1

[PATCH v2 24/37] baseband/acc100: rename ldpc encode function arg

[Hernan Vargas]

Rename total_enqueued_cbs to total_enqueued_descs in the
enqueue_ldpc_enc_n_op_cb function. No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 0389768a6f..a302905c78 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2967,10 +2967,13 @@ enqueue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 	return 1;
 }
 
-/* Enqueue one encode operations for ACC100 device in CB mode */
+
+/* Enqueue one encode operations for ACC100 device in CB mode
+ * multiplexed on the same descriptor
+ */
 static inline int
 enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
-		uint16_t total_enqueued_cbs, int16_t num)
+		uint16_t total_enqueued_descs, int16_t num)
 {
 	union acc100_dma_desc *desc = NULL;
 	uint32_t out_length;
@@ -2980,14 +2983,13 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
 	struct rte_bbdev_op_ldpc_enc *enc = &ops[0]->ldpc_enc;
 
 #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
-	/* Validate op structure */
 	if (validate_ldpc_enc_op(ops[0], q) == -1) {
 		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
 
-	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
+	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs)
 			& q->sw_ring_wrap_mask);
 	desc = q->ring_addr + desc_idx;
 	acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num, 0);
-- 
2.37.1

[PATCH v2 25/37] baseband/acc100: update log messages

[Hernan Vargas]

Add extra values for some log messages. No functional impact.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index a302905c78..8898147239 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1170,6 +1170,7 @@ acc100_dev_info_get(struct rte_bbdev *dev,
 
 	/* Read and save the populated config from ACC100 registers */
 	fetch_acc100_config(dev);
+	/* Check the status of device */
 	dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;
 
 	/* Expose number of queues */
@@ -3244,7 +3245,7 @@ enqueue_ldpc_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
 {
 #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
 	if (validate_ldpc_enc_op(op, q) == -1) {
-		rte_bbdev_log(ERR, "LDPC encoder validation failed");
+		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
 		return -EINVAL;
 	}
 #endif
@@ -4167,8 +4168,9 @@ acc100_enqueue_status(struct rte_bbdev_queue_data *q_data,
 {
 	q_data->enqueue_status = status;
 	q_data->queue_stats.enqueue_status_count[status]++;
-	rte_bbdev_log(WARNING, "Enqueue Status: %d %#"PRIx64"",
-			status,
+
+	rte_bbdev_log(WARNING, "Enqueue Status: %s %#"PRIx64"",
+			rte_bbdev_enqueue_status_str(status),
 			q_data->queue_stats.enqueue_status_count[status]);
 }
 
@@ -4863,6 +4865,7 @@ dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
 		return -1;
 
 	rsp.val = atom_desc.rsp.val;
+	rte_bbdev_log_debug("Resp. desc %p: %x\n", desc, rsp.val);
 
 	/* Dequeue */
 	op = desc->req.op_addr;
@@ -4945,8 +4948,9 @@ dequeue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op **ref_op,
 		atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
 				__ATOMIC_RELAXED);
 		rsp.val = atom_desc.rsp.val;
-		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
-				rsp.val);
+		rte_bbdev_log_debug("Resp. desc %p: %x r %d c %d\n",
+				desc, rsp.val,
+				cb_idx, cbs_in_tb);
 
 		op->status |= ((rsp.input_err)
 				? (1 << RTE_BBDEV_DATA_ERROR) : 0);
-- 
2.37.1

[PATCH v2 26/37] baseband/acc100: allocate ring/queue mem when NULL

[Hernan Vargas]

Allocate info ring, tail pointers and HARQ layout memory for a device
only if it hasn't already been allocated.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 8898147239..36455d5338 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -582,7 +582,8 @@ allocate_info_ring(struct rte_bbdev *dev)
 	else
 		reg_addr = &vf_reg_addr;
 	/* Allocate InfoRing */
-	d->info_ring = rte_zmalloc_socket("Info Ring",
+	if (d->info_ring == NULL)
+		d->info_ring = rte_zmalloc_socket("Info Ring",
 			ACC100_INFO_RING_NUM_ENTRIES *
 			sizeof(*d->info_ring), RTE_CACHE_LINE_SIZE,
 			dev->data->socket_id);
@@ -679,7 +680,8 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
 	acc100_reg_write(d, reg_addr->ring_size, value);
 
 	/* Configure tail pointer for use when SDONE enabled */
-	d->tail_ptrs = rte_zmalloc_socket(
+	if (d->tail_ptrs == NULL)
+		d->tail_ptrs = rte_zmalloc_socket(
 			dev->device->driver->name,
 			ACC100_NUM_QGRPS * ACC100_NUM_AQS * sizeof(uint32_t),
 			RTE_CACHE_LINE_SIZE, socket_id);
@@ -711,7 +713,8 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
 		/* Continue */
 	}
 
-	d->harq_layout = rte_zmalloc_socket("HARQ Layout",
+	if (d->harq_layout == NULL)
+		d->harq_layout = rte_zmalloc_socket("HARQ Layout",
 			ACC100_HARQ_LAYOUT * sizeof(*d->harq_layout),
 			RTE_CACHE_LINE_SIZE, dev->data->socket_id);
 	if (d->harq_layout == NULL) {
-- 
2.37.1

[PATCH v2 27/37] baseband/acc100: store FCW from first CB descriptor

[Hernan Vargas]

Store the descriptor from the first code block from a transport block.
Copy the LDPC FCW from the first descriptor into the rest of the CBs in
that TB.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 36455d5338..69de204293 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3872,6 +3872,7 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 		uint16_t total_enqueued_cbs, uint8_t cbs_in_tb)
 {
 	union acc100_dma_desc *desc = NULL;
+	union acc100_dma_desc *desc_first = NULL;
 	int ret;
 	uint8_t r, c;
 	uint32_t in_offset, h_out_offset,
@@ -3890,6 +3891,7 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
 			& q->sw_ring_wrap_mask);
 	desc = q->ring_addr + desc_idx;
+	desc_first = desc;
 	uint64_t fcw_offset = (desc_idx << 8) + ACC100_DESC_FCW_OFFSET;
 	union acc100_harq_layout_data *harq_layout = q->d->harq_layout;
 	q->d->fcw_ld_fill(op, &desc->req.fcw_ld, harq_layout);
@@ -3915,6 +3917,8 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 				& q->sw_ring_wrap_mask);
 		desc->req.data_ptrs[0].address = q->ring_addr_iova + fcw_offset;
 		desc->req.data_ptrs[0].blen = ACC100_FCW_LD_BLEN;
+		rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld,
+				ACC100_FCW_LD_BLEN);
 		ret = acc100_dma_desc_ld_fill(op, &desc->req, &input,
 				h_output, &in_offset, &h_out_offset,
 				&h_out_length,
-- 
2.37.1

[PATCH v2 28/37] baseband/acc100: make desc optimization optional

[Hernan Vargas]

Add ACC100_DESC_OPTIMIZATION flag to enable muxing of encode operations
with common FCW.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 69de204293..7b23529ec3 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -4569,9 +4569,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
 			break;
 		}
 		avail -= 1;
-
+#ifdef ACC100_DESC_OPTIMIZATION
 		if (i > 0)
 			same_op = cmp_ldpc_dec_op(&ops[i-1]);
+#endif
 		rte_bbdev_log(INFO, "Op %d %d %d %d %d %d %d %d %d %d %d %d\n",
 			i, ops[i]->ldpc_dec.op_flags, ops[i]->ldpc_dec.rv_index,
 			ops[i]->ldpc_dec.iter_max, ops[i]->ldpc_dec.iter_count,
-- 
2.37.1

[PATCH v2 29/37] baseband/acc100: update device info

[Hernan Vargas]

Remove unused capabilities, use dummy operation as start count for
number of queues.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 7b23529ec3..4ce4c9d218 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1079,7 +1079,6 @@ acc100_dev_info_get(struct rte_bbdev *dev,
 {
 	struct acc100_device *d = dev->data->dev_private;
 	int i;
-
 	static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
 		{
 			.type = RTE_BBDEV_OP_TURBO_DEC,
@@ -1091,7 +1090,6 @@ acc100_dev_info_get(struct rte_bbdev *dev,
 					RTE_BBDEV_TURBO_EARLY_TERMINATION |
 					RTE_BBDEV_TURBO_DEC_INTERRUPTS |
 					RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |
-					RTE_BBDEV_TURBO_MAP_DEC |
 					RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP |
 					RTE_BBDEV_TURBO_DEC_CRC_24B_DROP |
 					RTE_BBDEV_TURBO_DEC_SCATTER_GATHER,
@@ -1186,12 +1184,13 @@ acc100_dev_info_get(struct rte_bbdev *dev,
 			d->acc100_conf.q_ul_5g.num_qgroups;
 	dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_aqs_per_groups *
 			d->acc100_conf.q_dl_5g.num_qgroups;
+	dev_info->num_queues[RTE_BBDEV_OP_FFT] = 0;
 	dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_qgroups;
 	dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_qgroups;
 	dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_qgroups;
 	dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_qgroups;
 	dev_info->max_num_queues = 0;
-	for (i = RTE_BBDEV_OP_TURBO_DEC; i < RTE_BBDEV_OP_LDPC_ENC; i++)
+	for (i = RTE_BBDEV_OP_NONE; i <= RTE_BBDEV_OP_LDPC_ENC; i++)
 		dev_info->max_num_queues += dev_info->num_queues[i];
 	dev_info->queue_size_lim = ACC100_MAX_QUEUE_DEPTH;
 	dev_info->hardware_accelerated = true;
-- 
2.37.1

[PATCH v2 30/37] baseband/acc100: reduce input length for CRC24B

[Hernan Vargas]

Input length should be reduced only for CRC24B.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 4ce4c9d218..72e46953ee 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1978,8 +1978,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
 
 	K = (enc->basegraph == 1 ? 22 : 10) * enc->z_c;
 	in_length_in_bits = K - enc->n_filler;
-	if ((enc->op_flags & RTE_BBDEV_LDPC_CRC_24A_ATTACH) ||
-			(enc->op_flags & RTE_BBDEV_LDPC_CRC_24B_ATTACH))
+	if (enc->op_flags & RTE_BBDEV_LDPC_CRC_24B_ATTACH)
 		in_length_in_bits -= 24;
 	in_length_in_bytes = in_length_in_bits >> 3;
 
-- 
2.37.1

[PATCH v2 31/37] baseband/acc100: fix clearing PF IR outside handler

[Hernan Vargas]

Clearing of PF info ring outside of handler may cause interrupt to be
missed.
A condition in the ACC100 PMD implementation may cause an interrupt
functional handler call to be missed due to related bit being cleared
when checking PF info ring status.

Fixes: 06531464151 ("baseband/acc100: support interrupt")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 72e46953ee..4596f5df42 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -437,11 +437,12 @@ acc100_check_ir(struct acc100_device *acc100_dev)
 	while (ring_data->valid) {
 		if ((ring_data->int_nb < ACC100_PF_INT_DMA_DL_DESC_IRQ) || (
 				ring_data->int_nb >
-				ACC100_PF_INT_DMA_DL5G_DESC_IRQ))
+				ACC100_PF_INT_DMA_DL5G_DESC_IRQ)) {
 			rte_bbdev_log(WARNING, "InfoRing: ITR:%d Info:0x%x",
 				ring_data->int_nb, ring_data->detailed_info);
-		/* Initialize Info Ring entry and move forward */
-		ring_data->val = 0;
+			/* Initialize Info Ring entry and move forward */
+			ring_data->val = 0;
+		}
 		info_ring_head++;
 		ring_data = acc100_dev->info_ring +
 				(info_ring_head & ACC100_INFO_RING_MASK);
-- 
2.37.1

[PATCH v2 32/37] baseband/acc100: fix debug print for LDPC FCW

[Hernan Vargas]

Print full size of FCW LDPC structure on debug messages.
This is just a cosmetic fix, no need to fix on previous code base.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 4596f5df42..0e72bc1f57 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3856,7 +3856,7 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
 
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 	rte_memdump(stderr, "FCW", &desc->req.fcw_ld,
-			sizeof(desc->req.fcw_ld) - 8);
+			sizeof(desc->req.fcw_ld));
 	rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
 #endif
 
-- 
2.37.1

[PATCH v2 33/37] baseband/acc100: set device min alignment to 1

[Hernan Vargas]

Historical mistakes, there should be no 64B alignment requirement for
the buffer being processed. Any 1B alignment is sufficient.

Fixes: 9200ffa5cd5 ("baseband/acc100: add info get function")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 0e72bc1f57..461ebe67cd 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1201,7 +1201,7 @@ acc100_dev_info_get(struct rte_bbdev *dev,
 			d->acc100_conf.q_ul_4g.num_qgroups - 1;
 	dev_info->default_queue_conf = default_queue_conf;
 	dev_info->cpu_flag_reqs = NULL;
-	dev_info->min_alignment = 64;
+	dev_info->min_alignment = 1;
 	dev_info->capabilities = bbdev_capabilities;
 #ifdef ACC100_EXT_MEM
 	dev_info->harq_buffer_size = d->ddr_size;
-- 
2.37.1

[PATCH v2 34/37] baseband/acc100: update meson file sdk dependency

[Hernan Vargas]

Update meson files with FlexRAN SDK dependency.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/meson.build | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/baseband/acc100/meson.build b/drivers/baseband/acc100/meson.build
index 9a1a3b8b07..3b934a25ca 100644
--- a/drivers/baseband/acc100/meson.build
+++ b/drivers/baseband/acc100/meson.build
@@ -1,6 +1,27 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2020 Intel Corporation
 
+# check for FlexRAN SDK libraries
+dep_dec5g = dependency('flexran_sdk_ldpc_decoder_5gnr', required: false)
+
+if dep_dec5g.found()
+    ext_deps += cc.find_library('libstdc++', required: true)
+    ext_deps += cc.find_library('libirc', required: true)
+    ext_deps += cc.find_library('libimf', required: true)
+    ext_deps += cc.find_library('libipps', required: true)
+    ext_deps += cc.find_library('libsvml', required: true)
+    ext_deps += dep_dec5g
+    ext_deps += dependency('flexran_sdk_ldpc_encoder_5gnr', required: true)
+    ext_deps += dependency('flexran_sdk_LDPC_ratematch_5gnr', required: true)
+    ext_deps += dependency('flexran_sdk_rate_dematching_5gnr', required: true)
+    ext_deps += dependency('flexran_sdk_turbo', required: true)
+    ext_deps += dependency('flexran_sdk_crc', required: true)
+    ext_deps += dependency('flexran_sdk_rate_matching', required: true)
+    ext_deps += dependency('flexran_sdk_common', required: true)
+    cflags += ['-DRTE_BBDEV_SDK_AVX2']
+    cflags += ['-DRTE_BBDEV_SDK_AVX512']
+endif
+
 deps += ['bbdev', 'bus_vdev', 'ring', 'pci', 'bus_pci']
 
 sources = files('rte_acc100_pmd.c')
-- 
2.37.1

[PATCH v2 35/37] baseband/acc100: add protection for NULL HARQ input

[Hernan Vargas]

It is possible to cause an invalid HW operation in case the user
provides the BBDEV API and HARQ operation with input enabled and zero
input. Adding protection for that case.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 461ebe67cd..be4c1d07ed 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1457,6 +1457,14 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
 						op->ldpc_dec.tb_params.ea :
 						op->ldpc_dec.tb_params.eb;
 
+	if (unlikely(check_bit(op->ldpc_dec.op_flags,
+			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE) &&
+			(op->ldpc_dec.harq_combined_input.length == 0))) {
+		rte_bbdev_log(WARNING, "Null HARQ input size provided");
+		/* Disable HARQ input in that case to carry forward */
+		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
+	}
+
 	fcw->hcin_en = check_bit(op->ldpc_dec.op_flags,
 			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);
 	fcw->hcout_en = check_bit(op->ldpc_dec.op_flags,
-- 
2.37.1

[PATCH v2 36/37] baseband/acc100: make HARQ layout memory 4GB

[Hernan Vargas]

HARQ layout memory should be 4GB instead of 2GB.

Fixes: 4cf90079797 ("baseband/acc100: add HW register definitions")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/acc100_pmd.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
index 27801767b7..f9ccb1ea8e 100644
--- a/drivers/baseband/acc100/acc100_pmd.h
+++ b/drivers/baseband/acc100/acc100_pmd.h
@@ -61,8 +61,10 @@
 #define ACC100_SIZE_64MBYTE            (64*1024*1024)
 /* Number of elements in an Info Ring */
 #define ACC100_INFO_RING_NUM_ENTRIES   1024
-/* Number of elements in HARQ layout memory */
-#define ACC100_HARQ_LAYOUT             (64*1024*1024)
+/* Number of elements in HARQ layout memory
+ * 128M x 32kB = 4GB addressable memory
+ */
+#define ACC100_HARQ_LAYOUT             (128*1024*1024)
 /* Assume offset for HARQ in memory */
 #define ACC100_HARQ_OFFSET             (32*1024)
 #define ACC100_HARQ_OFFSET_SHIFT       15
-- 
2.37.1

[PATCH v2 37/37] baseband/acc100: reset pointer after rte_free

[Hernan Vargas]

Set local pointer to NULL after rte_free.
This needs to be set explicitly since logic may check for null pointers.

Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
Cc: stable@dpdk.org

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
---
 drivers/baseband/acc100/rte_acc100_pmd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index be4c1d07ed..7755d6402f 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -793,6 +793,9 @@ acc100_dev_close(struct rte_bbdev *dev)
 		rte_free(d->sw_rings_base);
 		rte_free(d->harq_layout);
 		d->sw_rings_base = NULL;
+		d->tail_ptrs = NULL;
+		d->info_ring = NULL;
+		d->harq_layout = NULL;
 	}
 	/* Ensure all in flight HW transactions are completed */
 	usleep(ACC100_LONG_WAIT);
-- 
2.37.1

RE: [EXT] [PATCH v2 00/37] baseband/acc100: changes for 22.11

[Akhil Goyal]

Hi Hernan,

Can you specify the change log for v2?

> -----Original Message-----
> From: Hernan Vargas <hernan.vargas@intel.com>
> Sent: Saturday, August 20, 2022 8:01 AM
> To: dev@dpdk.org; Akhil Goyal <gakhil@marvell.com>; trix@redhat.com
> Cc: nicolas.chautru@intel.com; qi.z.zhang@intel.com; Hernan Vargas
> <hernan.vargas@intel.com>
> Subject: [EXT] [PATCH v2 00/37] baseband/acc100: changes for 22.11
> 
> External Email
> 
> ----------------------------------------------------------------------
> Upstreaming ACC100 changes for 22.11.
> This patch series is dependant on series:
> https://patches.dpdk.org/project/dpdk/patch/1657150110-69957/
The link is not accessible.

> 
> Hernan Vargas (37):
>   baseband/acc100: add enqueue status
>   baseband/acc100: update ring availability calculation
>   baseband/acc100: add function to check AQ availability
>   baseband/acc100: free SW ring mem for reconfiguration
>   baseband/acc100: memory leak fix
>   baseband/acc100: add default e value for FCW
>   baseband/acc100: add LDPC encoder padding function
>   baseband/acc100: add scatter-gather support
>   baseband/acc100: add HARQ index helper function
>   baseband/acc100: avoid mux for small inbound frames
>   baseband/acc100: separate validation functions from debug
>   baseband/acc100: add LDPC transport block support
>   baseband/acc10x: limit cases for HARQ pruning
>   baseband/acc100: update validate LDPC enc/dec
>   baseband/acc100: add workaround for deRM corner cases
>   baseband/acc100: add ring companion address
>   baseband/acc100: configure PMON control registers
>   baseband/acc100: implement configurable queue depth
>   baseband/acc100: add queue stop operation
>   baseband/acc100: check turbo dec/enc input
>   baseband/acc100: check for unlikely operation vals
>   baseband/acc100: enforce additional check on FCW
>   baseband/acc100: update uplink CB input length
>   baseband/acc100: rename ldpc encode function arg
>   baseband/acc100: update log messages
>   baseband/acc100: allocate ring/queue mem when NULL
>   baseband/acc100: store FCW from first CB descriptor
>   baseband/acc100: make desc optimization optional
>   baseband/acc100: update device info
>   baseband/acc100: reduce input length for CRC24B
>   baseband/acc100: fix clearing PF IR outside handler
>   baseband/acc100: fix debug print for LDPC FCW
>   baseband/acc100: set device min alignment to 1
>   baseband/acc100: update meson file sdk dependency
>   baseband/acc100: add protection for NULL HARQ input
>   baseband/acc100: make HARQ layout memory 4GB
>   baseband/acc100: reset pointer after rte_free
> 
>  drivers/baseband/acc100/acc100_pf_enum.h |   52 +-
>  drivers/baseband/acc100/acc100_pmd.h     |   41 +-
>  drivers/baseband/acc100/acc100_vf_enum.h |    6 +
>  drivers/baseband/acc100/meson.build      |   21 +
>  drivers/baseband/acc100/rte_acc100_pmd.c | 1388 ++++++++++++++++++----
>  5 files changed, 1254 insertions(+), 254 deletions(-)
> 
> --
> 2.37.1

RE: [EXT] [PATCH v2 00/37] baseband/acc100: changes for 22.11

[Chautru, Nicolas]

Thanks for the feedback Akhil. Hernan is out for a bit but I can cover from him. 
There was no actual code change in v2, only change in commit messages so that to be more explicit and detailed. In case there is a v3, the change log would be amended to capture this. 
Thanks
Nic

> -----Original Message-----
> From: Akhil Goyal <gakhil@marvell.com>
> Sent: Tuesday, August 23, 2022 9:00 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>; dev@dpdk.org;
> trix@redhat.com
> Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Subject: RE: [EXT] [PATCH v2 00/37] baseband/acc100: changes for 22.11
> 
> Hi Hernan,
> 
> Can you specify the change log for v2?
> 
> > -----Original Message-----
> > From: Hernan Vargas <hernan.vargas@intel.com>
> > Sent: Saturday, August 20, 2022 8:01 AM
> > To: dev@dpdk.org; Akhil Goyal <gakhil@marvell.com>; trix@redhat.com
> > Cc: nicolas.chautru@intel.com; qi.z.zhang@intel.com; Hernan Vargas
> > <hernan.vargas@intel.com>
> > Subject: [EXT] [PATCH v2 00/37] baseband/acc100: changes for 22.11
> >
> > External Email
> >
> > ----------------------------------------------------------------------
> > Upstreaming ACC100 changes for 22.11.
> > This patch series is dependant on series:
> > https://patches.dpdk.org/project/dpdk/patch/1657150110-69957/
> The link is not accessible.
> 
> >
> > Hernan Vargas (37):
> >   baseband/acc100: add enqueue status
> >   baseband/acc100: update ring availability calculation
> >   baseband/acc100: add function to check AQ availability
> >   baseband/acc100: free SW ring mem for reconfiguration
> >   baseband/acc100: memory leak fix
> >   baseband/acc100: add default e value for FCW
> >   baseband/acc100: add LDPC encoder padding function
> >   baseband/acc100: add scatter-gather support
> >   baseband/acc100: add HARQ index helper function
> >   baseband/acc100: avoid mux for small inbound frames
> >   baseband/acc100: separate validation functions from debug
> >   baseband/acc100: add LDPC transport block support
> >   baseband/acc10x: limit cases for HARQ pruning
> >   baseband/acc100: update validate LDPC enc/dec
> >   baseband/acc100: add workaround for deRM corner cases
> >   baseband/acc100: add ring companion address
> >   baseband/acc100: configure PMON control registers
> >   baseband/acc100: implement configurable queue depth
> >   baseband/acc100: add queue stop operation
> >   baseband/acc100: check turbo dec/enc input
> >   baseband/acc100: check for unlikely operation vals
> >   baseband/acc100: enforce additional check on FCW
> >   baseband/acc100: update uplink CB input length
> >   baseband/acc100: rename ldpc encode function arg
> >   baseband/acc100: update log messages
> >   baseband/acc100: allocate ring/queue mem when NULL
> >   baseband/acc100: store FCW from first CB descriptor
> >   baseband/acc100: make desc optimization optional
> >   baseband/acc100: update device info
> >   baseband/acc100: reduce input length for CRC24B
> >   baseband/acc100: fix clearing PF IR outside handler
> >   baseband/acc100: fix debug print for LDPC FCW
> >   baseband/acc100: set device min alignment to 1
> >   baseband/acc100: update meson file sdk dependency
> >   baseband/acc100: add protection for NULL HARQ input
> >   baseband/acc100: make HARQ layout memory 4GB
> >   baseband/acc100: reset pointer after rte_free
> >
> >  drivers/baseband/acc100/acc100_pf_enum.h |   52 +-
> >  drivers/baseband/acc100/acc100_pmd.h     |   41 +-
> >  drivers/baseband/acc100/acc100_vf_enum.h |    6 +
> >  drivers/baseband/acc100/meson.build      |   21 +
> >  drivers/baseband/acc100/rte_acc100_pmd.c | 1388
> > ++++++++++++++++++----
> >  5 files changed, 1254 insertions(+), 254 deletions(-)
> >
> > --
> > 2.37.1

RE: [PATCH v2 00/37] baseband/acc100: changes for 22.11

[Chautru, Nicolas]

Hi Tom, Maxime, Hermant, 
Can we get a few reviews/or and acks for the patches in that serie please?
Much appreciated, 
Nic

> -----Original Message-----
> From: Vargas, Hernan <hernan.vargas@intel.com>
> Sent: Friday, August 19, 2022 7:31 PM
> To: dev@dpdk.org; gakhil@marvell.com; trix@redhat.com
> Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>; Vargas, Hernan <hernan.vargas@intel.com>
> Subject: [PATCH v2 00/37] baseband/acc100: changes for 22.11
> 
> Upstreaming ACC100 changes for 22.11.
> This patch series is dependant on series:
> https://patches.dpdk.org/project/dpdk/patch/1657150110-69957
> 
> Hernan Vargas (37):
>   baseband/acc100: add enqueue status
>   baseband/acc100: update ring availability calculation
>   baseband/acc100: add function to check AQ availability
>   baseband/acc100: free SW ring mem for reconfiguration
>   baseband/acc100: memory leak fix
>   baseband/acc100: add default e value for FCW
>   baseband/acc100: add LDPC encoder padding function
>   baseband/acc100: add scatter-gather support
>   baseband/acc100: add HARQ index helper function
>   baseband/acc100: avoid mux for small inbound frames
>   baseband/acc100: separate validation functions from debug
>   baseband/acc100: add LDPC transport block support
>   baseband/acc10x: limit cases for HARQ pruning
>   baseband/acc100: update validate LDPC enc/dec
>   baseband/acc100: add workaround for deRM corner cases
>   baseband/acc100: add ring companion address
>   baseband/acc100: configure PMON control registers
>   baseband/acc100: implement configurable queue depth
>   baseband/acc100: add queue stop operation
>   baseband/acc100: check turbo dec/enc input
>   baseband/acc100: check for unlikely operation vals
>   baseband/acc100: enforce additional check on FCW
>   baseband/acc100: update uplink CB input length
>   baseband/acc100: rename ldpc encode function arg
>   baseband/acc100: update log messages
>   baseband/acc100: allocate ring/queue mem when NULL
>   baseband/acc100: store FCW from first CB descriptor
>   baseband/acc100: make desc optimization optional
>   baseband/acc100: update device info
>   baseband/acc100: reduce input length for CRC24B
>   baseband/acc100: fix clearing PF IR outside handler
>   baseband/acc100: fix debug print for LDPC FCW
>   baseband/acc100: set device min alignment to 1
>   baseband/acc100: update meson file sdk dependency
>   baseband/acc100: add protection for NULL HARQ input
>   baseband/acc100: make HARQ layout memory 4GB
>   baseband/acc100: reset pointer after rte_free
> 
>  drivers/baseband/acc100/acc100_pf_enum.h |   52 +-
>  drivers/baseband/acc100/acc100_pmd.h     |   41 +-
>  drivers/baseband/acc100/acc100_vf_enum.h |    6 +
>  drivers/baseband/acc100/meson.build      |   21 +
>  drivers/baseband/acc100/rte_acc100_pmd.c | 1388 ++++++++++++++++++----
>  5 files changed, 1254 insertions(+), 254 deletions(-)
> 
> --
> 2.37.1

Re: [PATCH v2 05/37] baseband/acc100: memory leak fix

[Maxime Coquelin]

Hi Hernan,

On 8/20/22 04:31, Hernan Vargas wrote:
> Move check for undefined device before allocating queue data structure.
> 
> Coverity issue: 375803, 375813, 375819, 375827, 375831
> Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
> Cc: stable@dpdk.org

Please add fixes at the beginning of the series to ease back-porting by
LTS maintainers.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 349b8be5c1..586d06d1b3 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -828,6 +828,10 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   	struct acc100_queue *q;
>   	int16_t q_idx;
>   
> +	if (d == NULL) {
> +		rte_bbdev_log(ERR, "Undefined device");
> +		return -ENODEV;
> +	}
>   	/* Allocate the queue data structure. */
>   	q = rte_zmalloc_socket(dev->device->driver->name, sizeof(*q),
>   			RTE_CACHE_LINE_SIZE, conf->socket);
> @@ -835,10 +839,6 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   		rte_bbdev_log(ERR, "Failed to allocate queue memory");
>   		return -ENOMEM;
>   	}
> -	if (d == NULL) {
> -		rte_bbdev_log(ERR, "Undefined device");
> -		return -ENODEV;
> -	}
>   
>   	q->d = d;
>   	q->ring_addr = RTE_PTR_ADD(d->sw_rings, (d->sw_ring_size * queue_id));

With patch reordering done:
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 01/37] baseband/acc100: add enqueue status

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add enqueue status as part of rte_bbdev_queue_data.
> This is a new feature to update queue status and indicate the reason why
> a previous enqueue may or may not have consumed all requested operations.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 85 ++++++++++++++++++++----
>   1 file changed, 71 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index a68a9b0fd9..7f698ec3d2 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3436,6 +3436,35 @@ get_num_cbs_in_tb_ldpc_dec(struct rte_bbdev_op_ldpc_dec *ldpc_dec)
>   	return cbs_in_tb;
>   }
>   
> +static inline void
> +acc100_enqueue_status(struct rte_bbdev_queue_data *q_data,
> +		enum rte_bbdev_enqueue_status status)
> +{
> +	q_data->enqueue_status = status;
> +	q_data->queue_stats.enqueue_status_count[status]++;
> +	rte_bbdev_log(WARNING, "Enqueue Status: %d %#"PRIx64"",
> +			status,
> +			q_data->queue_stats.enqueue_status_count[status]);
> +}
> +
> +static inline void
> +acc100_enqueue_invalid(struct rte_bbdev_queue_data *q_data)
> +{
> +	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_INVALID_OP);
> +}
> +
> +static inline void
> +acc100_enqueue_ring_full(struct rte_bbdev_queue_data *q_data)
> +{
> +	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_RING_FULL);
> +}
> +
> +static inline void
> +acc100_enqueue_queue_full(struct rte_bbdev_queue_data *q_data)
> +{
> +	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_QUEUE_FULL);
> +}

This one is not used in this patch, is that expected?

> +
>   /* Enqueue encode operations for ACC100 device in CB mode. */
>   static uint16_t
>   acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
> @@ -3449,13 +3478,17 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
>   
>   	for (i = 0; i < num; ++i) {
>   		/* Check if there are available space for further processing */
> -		if (unlikely(avail - 1 < 0))
> +		if (unlikely(avail - 1 < 0)) {
> +			acc100_enqueue_ring_full(q_data);
>   			break;
> +		}
>   		avail -= 1;
>   
>   		ret = enqueue_enc_one_op_cb(q, ops[i], i);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			acc100_enqueue_invalid(q_data);
>   			break;
> +		}
>   	}
>   
>   	if (unlikely(i == 0))
> @@ -3505,20 +3538,26 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
>   	int16_t enq, left = num;
>   
>   	while (left > 0) {
> -		if (unlikely(avail < 1))
> +		if (unlikely(avail < 1)) {
> +			acc100_enqueue_ring_full(q_data);
>   			break;
> +		}
>   		avail--;
>   		enq = RTE_MIN(left, ACC100_MUX_5GDL_DESC);
>   		if (check_mux(&ops[i], enq)) {
>   			ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i],
>   					desc_idx, enq);
> -			if (ret < 0)
> +			if (ret < 0) {
> +				acc100_enqueue_invalid(q_data);
>   				break;
> +			}
>   			i += enq;
>   		} else {
>   			ret = enqueue_ldpc_enc_one_op_cb(q, ops[i], desc_idx);
> -			if (ret < 0)
> +			if (ret < 0) {
> +				acc100_enqueue_invalid(q_data);
>   				break;
> +			}
>   			i++;
>   		}
>   		desc_idx++;
> @@ -3557,13 +3596,17 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
>   	for (i = 0; i < num; ++i) {
>   		cbs_in_tb = get_num_cbs_in_tb_enc(&ops[i]->turbo_enc);
>   		/* Check if there are available space for further processing */
> -		if (unlikely(avail - cbs_in_tb < 0))
> +		if (unlikely(avail - cbs_in_tb < 0)) {
> +			acc100_enqueue_ring_full(q_data);
>   			break;
> +		}
>   		avail -= cbs_in_tb;
>   
>   		ret = enqueue_enc_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			acc100_enqueue_invalid(q_data);
>   			break;
> +		}
>   		enqueued_cbs += ret;
>   	}
>   	if (unlikely(enqueued_cbs == 0))
> @@ -3618,13 +3661,17 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
>   
>   	for (i = 0; i < num; ++i) {
>   		/* Check if there are available space for further processing */
> -		if (unlikely(avail - 1 < 0))
> +		if (unlikely(avail - 1 < 0)) {
> +			acc100_enqueue_ring_full(q_data);
>   			break;
> +		}
>   		avail -= 1;
>   
>   		ret = enqueue_dec_one_op_cb(q, ops[i], i);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			acc100_enqueue_invalid(q_data);
>   			break;
> +		}
>   	}
>   
>   	if (unlikely(i == 0))
> @@ -3678,8 +3725,10 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
>   
>   		ret = enqueue_ldpc_dec_one_op_tb(q, ops[i],
>   				enqueued_cbs, cbs_in_tb);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			acc100_enqueue_invalid(q_data);
>   			break;
> +		}
>   		enqueued_cbs += ret;
>   	}
>   
> @@ -3704,8 +3753,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
>   	bool same_op = false;
>   	for (i = 0; i < num; ++i) {
>   		/* Check if there are available space for further processing */
> -		if (unlikely(avail < 1))
> +		if (unlikely(avail < 1)) {
> +			acc100_enqueue_ring_full(q_data);
>   			break;
> +		}
>   		avail -= 1;
>   
>   		if (i > 0)
> @@ -3718,8 +3769,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
>   			ops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e,
>   			same_op);
>   		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			acc100_enqueue_invalid(q_data);
>   			break;
> +		}
>   	}
>   
>   	if (unlikely(i == 0))
> @@ -3755,13 +3808,17 @@ acc100_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
>   	for (i = 0; i < num; ++i) {
>   		cbs_in_tb = get_num_cbs_in_tb_dec(&ops[i]->turbo_dec);
>   		/* Check if there are available space for further processing */
> -		if (unlikely(avail - cbs_in_tb < 0))
> +		if (unlikely(avail - cbs_in_tb < 0)) {
> +			acc100_enqueue_ring_full(q_data);
>   			break;
> +		}
>   		avail -= cbs_in_tb;
>   
>   		ret = enqueue_dec_one_op_tb(q, ops[i], enqueued_cbs, cbs_in_tb);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			acc100_enqueue_invalid(q_data);
>   			break;
> +		}
>   		enqueued_cbs += ret;
>   	}
>   


Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 02/37] baseband/acc100: update ring availability calculation

[Maxime Coquelin]

Hi,

On 8/20/22 04:31, Hernan Vargas wrote:
> Refactor of the queue availability computation to prevent the
> application to dequeue more than what may have been enqueued.
> 

That sounds like a fix, is it?

If so, it should have the Fixes tag, so that existing application can
get the fix without having to upgrade to a newer DPDK version that may
have introduced API/ABI changes.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 39 ++++++++++++++++--------
>   1 file changed, 27 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 7f698ec3d2..0598d33582 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3465,13 +3465,27 @@ acc100_enqueue_queue_full(struct rte_bbdev_queue_data *q_data)
>   	acc100_enqueue_status(q_data, RTE_BBDEV_ENQ_STATUS_QUEUE_FULL);
>   }
>   
> +/* Number of available descriptor in ring to enqueue */

s/descriptor/descriptors/

> +static uint32_t
> +acc100_ring_avail_enq(struct acc100_queue *q)
> +{
> +	return (q->sw_ring_depth - 1 + q->sw_ring_tail - q->sw_ring_head) % q->sw_ring_depth;
> +}
> +
> +/* Number of available descriptor in ring to dequeue */

s/descriptor/descriptors/

> +static uint32_t
> +acc100_ring_avail_deq(struct acc100_queue *q)
> +{
> +	return (q->sw_ring_depth + q->sw_ring_head - q->sw_ring_tail) % q->sw_ring_depth;
> +}
> +
>   /* Enqueue encode operations for ACC100 device in CB mode. */
>   static uint16_t
>   acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_enc_op **ops, uint16_t num)
>   {
>   	struct acc100_queue *q = q_data->queue_private;
> -	int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
> +	int32_t avail = acc100_ring_avail_enq(q);

acc100_ring_avail_enq returns an uint32_t, but avail is an int32_t.

I think avail should be a uint32_t and underflow check should be changed to:

	if (unlikely(avail == 0)) {

Same comment applies in other places.

Maxime

Re: [PATCH v2 03/37] baseband/acc100: add function to check AQ availability

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> It is possible for some corner case to run more batch enqueue than
> supported. A protection is required to avoid that corner case.
> Enhance all ACC100 enqueue operations with check to see if there is room
> in the atomic queue for enqueueing batches into the queue manager
> Check room in AQ for the enqueues batches into Qmgr

Same as on patch 2. Reading the commit message, it sounds like a fix.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 30 +++++++++++++++++-------
>   1 file changed, 22 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 0598d33582..7349bb5bad 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3635,12 +3635,27 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
>   	return i;
>   }
>   
> +/* Check room in AQ for the enqueues batches into Qmgr */
> +static int32_t
> +acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
> +{
> +	struct acc100_queue *q = q_data->queue_private;
> +	int32_t aq_avail = q->aq_depth -
> +			((q->aq_enqueued - q->aq_dequeued +
> +			ACC100_MAX_QUEUE_DEPTH) % ACC100_MAX_QUEUE_DEPTH)
> +			- (num_ops >> 7);
> +	if (aq_avail <= 0)
> +		acc100_enqueue_queue_full(q_data);
Ok, forget my comment on patch 1, acc100_enqueue_queue_full() being used
here.

> +	return aq_avail;
> +}
> +
>   /* Enqueue encode operations for ACC100 device. */
>   static uint16_t
>   acc100_enqueue_enc(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_enc_op **ops, uint16_t num)
>   {
> -	if (unlikely(num == 0))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);
> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   	if (ops[0]->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   		return acc100_enqueue_enc_tb(q_data, ops, num);
> @@ -3653,7 +3668,8 @@ static uint16_t
>   acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_enc_op **ops, uint16_t num)
>   {
> -	if (unlikely(num == 0))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);
> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   	if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   		return acc100_enqueue_enc_tb(q_data, ops, num);
> @@ -3850,7 +3866,8 @@ static uint16_t
>   acc100_enqueue_dec(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_dec_op **ops, uint16_t num)
>   {
> -	if (unlikely(num == 0))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);
> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   	if (ops[0]->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   		return acc100_enqueue_dec_tb(q_data, ops, num);
> @@ -3863,11 +3880,8 @@ static uint16_t
>   acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_dec_op **ops, uint16_t num)
>   {
> -	struct acc100_queue *q = q_data->queue_private;
> -	int32_t aq_avail = q->aq_depth +
> -			(q->aq_dequeued - q->aq_enqueued) / 128;
> -
> -	if (unlikely((aq_avail == 0) || (num == 0)))
> +	int32_t aq_avail = acc100_aq_avail(q_data, num);
> +	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   
>   	if (ops[0]->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)

Re: [PATCH v2 04/37] baseband/acc100: free SW ring mem for reconfiguration

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Free base address of unaligned memory for SW rings to manage the missed
> corner case when there is a reconfiguration.
> 
> Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 7349bb5bad..349b8be5c1 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -340,6 +340,8 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc100_device *d,
>   	int i = 0;
>   	uint32_t q_sw_ring_size = ACC100_MAX_QUEUE_DEPTH * get_desc_len();
>   	uint32_t dev_sw_ring_size = q_sw_ring_size * num_queues;
> +	/* Free first in case this is a reconfiguration */
> +	rte_free(d->sw_rings_base);
>   
>   	/* Find an aligned block of memory to store sw rings */
>   	while (i < ACC100_SW_RING_MEM_ALLOC_ATTEMPTS) {
> @@ -768,6 +770,7 @@ acc100_dev_close(struct rte_bbdev *dev)
>   		rte_free(d->tail_ptrs);
>   		rte_free(d->info_ring);
>   		rte_free(d->sw_rings_base);
> +		rte_free(d->harq_layout);
>   		d->sw_rings_base = NULL;
>   	}
>   	/* Ensure all in flight HW transactions are completed */
> @@ -4665,7 +4668,8 @@ poweron_cleanup(struct rte_bbdev *bbdev, struct acc100_device *d,
>   	}
>   	printf("Number of 5GUL engines %d\n", numEngines);
>   
> -	rte_free(d->sw_rings_base);
> +	if (d->sw_rings_base != NULL)
> +		rte_free(d->sw_rings_base);

No need to check it is not NULL, rte_free() takes care of it.

>   	usleep(ACC100_LONG_WAIT);
>   }
>   

Re: [PATCH v2 06/37] baseband/acc100: add default e value for FCW

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Refactor frame control word LDPC encoder fill function to take a default e
> value as a parameter. No functional impact.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 586d06d1b3..cc7d146e74 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1268,7 +1268,7 @@ get_k0(uint16_t n_cb, uint16_t z_c, uint8_t bg, uint8_t rv_index)
>   /* Fill in a frame control word for LDPC encoding. */
>   static inline void
>   acc100_fcw_le_fill(const struct rte_bbdev_enc_op *op,
> -		struct acc100_fcw_le *fcw, int num_cb)
> +		struct acc100_fcw_le *fcw, int num_cb, uint32_t default_e)
>   {
>   	fcw->qm = op->ldpc_enc.q_m;
>   	fcw->nfiller = op->ldpc_enc.n_filler;
> @@ -1277,7 +1277,7 @@ acc100_fcw_le_fill(const struct rte_bbdev_enc_op *op,
>   	fcw->ncb = op->ldpc_enc.n_cb;
>   	fcw->k0 = get_k0(fcw->ncb, fcw->Zc, op->ldpc_enc.basegraph,
>   			op->ldpc_enc.rv_index);
> -	fcw->rm_e = op->ldpc_enc.cb_params.e;
> +	fcw->rm_e = (default_e == 0) ? op->ldpc_enc.cb_params.e : default_e;
>   	fcw->crc_select = check_bit(op->ldpc_enc.op_flags,
>   			RTE_BBDEV_LDPC_CRC_24B_ATTACH);
>   	fcw->bypass_intlv = check_bit(op->ldpc_enc.op_flags,
> @@ -2525,7 +2525,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
>   	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
>   			& q->sw_ring_wrap_mask);
>   	desc = q->ring_addr + desc_idx;
> -	acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num);
> +	acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num, 0);
>   
>   	/** This could be done at polling */
>   	acc100_header_init(&desc->req);
> @@ -2587,7 +2587,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
>   			& q->sw_ring_wrap_mask);
>   	desc = q->ring_addr + desc_idx;
> -	acc100_fcw_le_fill(op, &desc->req.fcw_le, 1);
> +	acc100_fcw_le_fill(op, &desc->req.fcw_le, 1, 0);
>   
>   	input = op->ldpc_enc.input.data;
>   	output_head = output = op->ldpc_enc.output.data;

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 07/37] baseband/acc100: add LDPC encoder padding function

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> LDPC Encoder input may need to be padded to avoid small beat for ACC100.
> Padding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8.
> Adding protection for corner case to avoid for 5GDL occurrence of last
> beat within the ACC100 fabric with <= 8B which might trigger a fabric
> corner case hang issue.

Again, it looks like a bug fix.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 28 ++++++++++++++----------
>   1 file changed, 16 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index cc7d146e74..4849d822d1 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1304,7 +1304,6 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw)
>   			RTE_BBDEV_TURBO_HALF_ITERATION_EVEN);
>   }
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
>   
>   static inline bool
>   is_acc100(struct acc100_queue *q)
> @@ -1317,7 +1316,6 @@ validate_op_required(struct acc100_queue *q)
>   {
>   	return is_acc100(q);
>   }
> -#endif
>   
>   /* Fill in a frame control word for LDPC decoding. */
>   static inline void
> @@ -1773,12 +1771,24 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
>   	return 0;
>   }
>   
> +/* May need to pad LDPC Encoder input to avoid small beat for ACC100 */
> +static inline uint16_t
> +pad_le_in(uint16_t blen, struct acc100_queue *q)
> +{
> +	if (!is_acc100(q))
> +		return blen;
> +	uint16_t last_beat = blen % 64;

Do not mix variables declaration & code.

> +	if ((last_beat > 0) && (last_beat <= 8))
> +		blen += 8;
> +	return blen;
> +}
> +
>   static inline int
>   acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
>   		struct acc100_dma_req_desc *desc, struct rte_mbuf **input,
>   		struct rte_mbuf *output, uint32_t *in_offset,
>   		uint32_t *out_offset, uint32_t *out_length,
> -		uint32_t *mbuf_total_left, uint32_t *seg_total_left)
> +		uint32_t *mbuf_total_left, uint32_t *seg_total_left, struct acc100_queue *q)
>   {
>   	int next_triplet = 1; /* FCW already done */
>   	uint16_t K, in_length_in_bits, in_length_in_bytes;
> @@ -1802,8 +1812,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
>   	}
>   
>   	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
> -			in_length_in_bytes,
> -			seg_total_left, next_triplet);
> +			pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet);
>   	if (unlikely(next_triplet < 0)) {
>   		rte_bbdev_log(ERR,
>   				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
> @@ -2531,7 +2540,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
>   	acc100_header_init(&desc->req);
>   	desc->req.numCBs = num;
>   
> -	in_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len;
> +	in_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len, q);
>   	out_length = (enc->cb_params.e + 7) >> 3;
>   	desc->req.m2dlen = 1 + num;
>   	desc->req.d2mlen = num;
> @@ -2600,7 +2609,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   
>   	ret = acc100_dma_desc_le_fill(op, &desc->req, &input, output,
>   			&in_offset, &out_offset, &out_length, &mbuf_total_left,
> -			&seg_total_left);
> +			&seg_total_left, q);
>   
>   	if (unlikely(ret < 0))
>   		return ret;
> @@ -3921,9 +3930,6 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   
>   	/* Clearing status, it will be set based on response */
>   	op->status = 0;
> -
> -	op->status |= ((rsp.input_err)
> -			? (1 << RTE_BBDEV_DATA_ERROR) : 0);

Is this really related to the purpose of the patch?

>   	op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
>   	op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
>   
> @@ -3994,8 +4000,6 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
>   				rsp.val);
>   
> -		op->status |= ((rsp.input_err)
> -				? (1 << RTE_BBDEV_DATA_ERROR) : 0);

Ditto.

>   		op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
>   		op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
>   

Re: [PATCH v2 08/37] baseband/acc100: add scatter-gather support

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add flag to support scatter-gather for the mbuf
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 45 ++++++++++++++++--------
>   1 file changed, 31 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 4849d822d1..a7e0df96e8 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1585,6 +1585,8 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>    *   Store information about device capabilities
>    * @param next_triplet
>    *   Index for ACC100 DMA Descriptor triplet
> + * @param scattergather
> + *   Flag to support scatter-gather for the mbuf
>    *
>    * @return
>    *   Returns index of next triplet on success, other value if lengths of
> @@ -1594,12 +1596,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   static inline int
>   acc100_dma_fill_blk_type_in(struct acc100_dma_req_desc *desc,
>   		struct rte_mbuf **input, uint32_t *offset, uint32_t cb_len,
> -		uint32_t *seg_total_left, int next_triplet)
> +		uint32_t *seg_total_left, int next_triplet,
> +		bool scattergather)
>   {
>   	uint32_t part_len;
>   	struct rte_mbuf *m = *input;
>   
> -	part_len = (*seg_total_left < cb_len) ? *seg_total_left : cb_len;
> +	if (scattergather)
> +		part_len = (*seg_total_left < cb_len) ?
> +				*seg_total_left : cb_len;
> +	else
> +		part_len = cb_len;
>   	cb_len -= part_len;
>   	*seg_total_left -= part_len;
>   
> @@ -1735,7 +1742,9 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
>   	}
>   
>   	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
> -			length, seg_total_left, next_triplet);
> +			length, seg_total_left, next_triplet,
> +			check_bit(op->turbo_enc.op_flags,
> +			RTE_BBDEV_TURBO_ENC_SCATTER_GATHER));
>   	if (unlikely(next_triplet < 0)) {
>   		rte_bbdev_log(ERR,
>   				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
> @@ -1812,7 +1821,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
>   	}
>   
>   	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
> -			pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet);
> +			pad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet, false);
>   	if (unlikely(next_triplet < 0)) {
>   		rte_bbdev_log(ERR,
>   				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
> @@ -1900,7 +1909,9 @@ acc100_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
>   	}
>   
>   	next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, kw,
> -			seg_total_left, next_triplet);
> +			seg_total_left, next_triplet,
> +			check_bit(op->turbo_dec.op_flags,
> +			RTE_BBDEV_TURBO_DEC_SCATTER_GATHER));
>   	if (unlikely(next_triplet < 0)) {
>   		rte_bbdev_log(ERR,
>   				"Mismatch between data to process and mbuf data length in bbdev_op: %p",
> @@ -2002,7 +2013,9 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
>   
>   	next_triplet = acc100_dma_fill_blk_type_in(desc, input,
>   			in_offset, input_length,
> -			seg_total_left, next_triplet);
> +			seg_total_left, next_triplet,
> +			check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_DEC_SCATTER_GATHER));
>   
>   	if (unlikely(next_triplet < 0)) {
>   		rte_bbdev_log(ERR,
> @@ -3142,8 +3155,9 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   		fcw = &desc->req.fcw_ld;
>   		q->d->fcw_ld_fill(op, fcw, harq_layout);
>   
> -		/* Special handling when overusing mbuf */
> -		if (fcw->rm_e < ACC100_MAX_E_MBUF)
> +		/* Special handling when using mbuf or not */
> +		if (check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))
>   			seg_total_left = rte_pktmbuf_data_len(input)
>   					- in_offset;
>   		else
> @@ -3219,9 +3233,12 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	r = op->ldpc_dec.tb_params.r;
>   
>   	while (mbuf_total_left > 0 && r < c) {
> -
> -		seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
> -
> +		if (check_bit(op->ldpc_dec.op_flags,
> +				RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))
> +			seg_total_left = rte_pktmbuf_data_len(input)
> +					- in_offset;
> +		else
> +			seg_total_left = op->ldpc_dec.input.length;
>   		/* Set up DMA descriptor */
>   		desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs)
>   				& q->sw_ring_wrap_mask);
> @@ -3246,8 +3263,9 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   				sizeof(desc->req.fcw_td) - 8);
>   		rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
>   #endif
> -
> -		if (seg_total_left == 0) {
> +		if (check_bit(op->ldpc_dec.op_flags,
> +				RTE_BBDEV_LDPC_DEC_SCATTER_GATHER)
> +				&& (seg_total_left == 0)) {
>   			/* Go to the next mbuf */
>   			input = input->next;
>   			in_offset = 0;
> @@ -3258,7 +3276,6 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   		current_enqueued_cbs++;
>   		r++;
>   	}
> -

Keep this new line.

>   #ifdef RTE_LIBRTE_BBDEV_DEBUG
>   	if (check_mbuf_total_left(mbuf_total_left) != 0)
>   		return -EINVAL;

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 09/37] baseband/acc100: add HARQ index helper function

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Refactor code to use the HARQ index helper function and make harq_idx
> uint32.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 32 +++++++++++-------------
>   1 file changed, 14 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index a7e0df96e8..5d09908fd0 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1304,6 +1304,11 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw)
>   			RTE_BBDEV_TURBO_HALF_ITERATION_EVEN);
>   }
>   
> +/* Convert offset to harq index for harq_layout structure */
> +static inline uint32_t hq_index(uint32_t offset)
> +{
> +	return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK;
> +}
>   
>   static inline bool
>   is_acc100(struct acc100_queue *q)
> @@ -1323,7 +1328,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   		union acc100_harq_layout_data *harq_layout)
>   {
>   	uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
> -	uint16_t harq_index;
> +	uint32_t harq_index;
>   	uint32_t l;
>   	bool harq_prun = false;
>   
> @@ -1362,8 +1367,7 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   			RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION);
>   	fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
>   			RTE_BBDEV_LDPC_LLR_COMPRESSION);
> -	harq_index = op->ldpc_dec.harq_combined_output.offset /
> -			ACC100_HARQ_OFFSET;
> +	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
>   #ifdef ACC100_EXT_MEM
>   	/* Limit cases when HARQ pruning is valid */
>   	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
> @@ -1443,12 +1447,6 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   	}
>   }
>   
> -/* Convert offset to harq index for harq_layout structure */
> -static inline uint32_t hq_index(uint32_t offset)
> -{
> -	return (offset >> ACC100_HARQ_OFFSET_SHIFT) & ACC100_HARQ_OFFSET_MASK;
> -}
> -
>   /* Fill in a frame control word for LDPC decoding for ACC101 */
>   static inline void
>   acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
> @@ -2132,12 +2130,11 @@ acc100_dma_desc_ld_update(struct rte_bbdev_dec_op *op,
>   		struct rte_bbdev_dec_op *prev_op = desc->op_addr;
>   		op->ldpc_dec.harq_combined_output.length =
>   				prev_op->ldpc_dec.harq_combined_output.length;
> -		int16_t hq_idx = op->ldpc_dec.harq_combined_output.offset /
> -				ACC100_HARQ_OFFSET;
> -		int16_t prev_hq_idx =
> -				prev_op->ldpc_dec.harq_combined_output.offset
> -				/ ACC100_HARQ_OFFSET;
> -		harq_layout[hq_idx].val = harq_layout[prev_hq_idx].val;
> +		uint32_t harq_idx = hq_index(
> +				op->ldpc_dec.harq_combined_output.offset);
> +		uint32_t prev_harq_idx = hq_index(
> +				prev_op->ldpc_dec.harq_combined_output.offset);
> +		harq_layout[harq_idx].val = harq_layout[prev_harq_idx].val;

Don't mix declarations & code.
Also, the coding rules has been updated some time ago, it is possible to
go up to 100 characters [0] if it improves readability.

>   #ifndef ACC100_EXT_MEM
>   		struct rte_bbdev_op_data ho =
>   				op->ldpc_dec.harq_combined_output;
> @@ -2969,10 +2966,9 @@ harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	bool ddr_mem_in = check_bit(op->ldpc_dec.op_flags,
>   			RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE);
>   	union acc100_harq_layout_data *harq_layout = q->d->harq_layout;
> -	uint16_t harq_index = (ddr_mem_in ?
> +	uint32_t harq_index = hq_index(ddr_mem_in ?
>   			op->ldpc_dec.harq_combined_input.offset :
> -			op->ldpc_dec.harq_combined_output.offset)
> -			/ ACC100_HARQ_OFFSET;
> +			op->ldpc_dec.harq_combined_output.offset);
>   
>   	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
>   			& q->sw_ring_wrap_mask);

With above minor issues fixed:

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

[0]: 
https://git.dpdk.org/dpdk/tree/doc/guides/contributing/coding_style.rst#n30

Re: [PATCH v2 10/37] baseband/acc100: avoid mux for small inbound frames

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Update check_mux to avoid multiplexing small inbound frames.
> Preventing to multiplex code blocks when K < 512B per specs.

It looks like a fix, and so should Fixes tag be added an stable cc'ed.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/acc100_pmd.h     |  1 +
>   drivers/baseband/acc100/rte_acc100_pmd.c | 16 +++++++++++-----
>   2 files changed, 12 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
> index 0c9810ca56..19a1f434bc 100644
> --- a/drivers/baseband/acc100/acc100_pmd.h
> +++ b/drivers/baseband/acc100/acc100_pmd.h
> @@ -135,6 +135,7 @@
>   #define ACC100_DEC_OFFSET     (80)
>   #define ACC100_EXT_MEM /* Default option with memory external to CPU */
>   #define ACC100_HARQ_OFFSET_THRESHOLD 1024
> +#define ACC100_LIMIT_DL_MUX_BITS 534
>   
>   /* Constants from K0 computation from 3GPP 38.212 Table 5.4.2.1-2 */
>   #define ACC100_N_ZC_1 66 /* N = 66 Zc for BG 1 */
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 5d09908fd0..71409e11a1 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3548,20 +3548,25 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
>   }
>   
>   /* Check we can mux encode operations with common FCW */
> -static inline bool
> +static inline int16_t
>   check_mux(struct rte_bbdev_enc_op **ops, uint16_t num) {
>   	uint16_t i;
>   	if (num <= 1)
> -		return false;
> +		return 1;
>   	for (i = 1; i < num; ++i) {
>   		/* Only mux compatible code blocks */
>   		if (memcmp((uint8_t *)(&ops[i]->ldpc_enc) + ACC100_ENC_OFFSET,
>   				(uint8_t *)(&ops[0]->ldpc_enc) +
>   				ACC100_ENC_OFFSET,
>   				ACC100_CMP_ENC_SIZE) != 0)
> -			return false;
> +			return i;
>   	}
> -	return true;
> +	/* Avoid multiplexing small inbound size frames */
> +	int Kp = (ops[0]->ldpc_enc.basegraph == 1 ? 22 : 10) *
> +			ops[0]->ldpc_enc.z_c - ops[0]->ldpc_enc.n_filler;
> +	if (Kp  <= ACC100_LIMIT_DL_MUX_BITS)
> +		return 1;
> +	return num;
>   }
>   
>   /** Enqueue encode operations for ACC100 device in CB mode. */
> @@ -3583,7 +3588,8 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
>   		}
>   		avail--;
>   		enq = RTE_MIN(left, ACC100_MUX_5GDL_DESC);
> -		if (check_mux(&ops[i], enq)) {
> +		enq = check_mux(&ops[i], enq);
> +		if (enq > 1) {
>   			ret = enqueue_ldpc_enc_n_op_cb(q, &ops[i],
>   					desc_idx, enq);
>   			if (ret < 0) {

Re: [PATCH v2 11/37] baseband/acc100: separate validation functions from debug

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Use new flag RTE_LIBRTE_BBDEV_SKIP_VALIDATE enable/disable validation
> functions. The validation API will be enabled by default.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 37 ++++++++++++------------
>   1 file changed, 19 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 71409e11a1..e42748e8cc 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -2222,7 +2222,8 @@ acc100_dma_enqueue(struct acc100_queue *q, uint16_t n,
>   
>   }
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
> +
>   /* Validates turbo encoder parameters */
>   static inline int
>   validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
> @@ -2479,10 +2480,10 @@ enqueue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   		seg_total_left;
>   	struct rte_mbuf *input, *output_head, *output;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_enc_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "Turbo encoder validation failed");
> +		rte_bbdev_log(ERR, "Turbo encoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -2533,10 +2534,10 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
>   	uint16_t  in_length_in_bytes;
>   	struct rte_bbdev_op_ldpc_enc *enc = &ops[0]->ldpc_enc;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_ldpc_enc_op(ops[0], q) == -1) {
> -		rte_bbdev_log(ERR, "LDPC encoder validation failed");
> +		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -2595,10 +2596,10 @@ enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   		seg_total_left;
>   	struct rte_mbuf *input, *output_head, *output;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
>   	/* Validate op structure */
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	if (validate_ldpc_enc_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "LDPC encoder validation failed");
> +		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -2652,10 +2653,10 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   	struct rte_mbuf *input, *output_head, *output;
>   	uint16_t current_enqueued_cbs = 0;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_enc_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "Turbo encoder validation failed");
> +		rte_bbdev_log(ERR, "Turbo encoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -2724,7 +2725,7 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   	return current_enqueued_cbs;
>   }
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   /* Validates turbo decoder parameters */
>   static inline int
>   validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
> @@ -2875,10 +2876,10 @@ enqueue_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	struct rte_mbuf *input, *h_output_head, *h_output,
>   		*s_output_head, *s_output;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_dec_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "Turbo decoder validation failed");
> +		rte_bbdev_log(ERR, "Turbo decoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -3099,10 +3100,10 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   		return ret;
>   	}
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_ldpc_dec_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "LDPC decoder validation failed");
> +		rte_bbdev_log(ERR, "LDPC decoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -3204,10 +3205,10 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	struct rte_mbuf *input, *h_output_head, *h_output;
>   	uint16_t current_enqueued_cbs = 0;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_ldpc_dec_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "LDPC decoder validation failed");
> +		rte_bbdev_log(ERR, "LDPC decoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -3297,10 +3298,10 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   		*s_output_head, *s_output;
>   	uint16_t current_enqueued_cbs = 0;
>   
> -#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	/* Validate op structure */
>   	if (validate_dec_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "Turbo decoder validation failed");
> +		rte_bbdev_log(ERR, "Turbo decoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif


Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 12/37] baseband/acc100: add LDPC transport block support

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add LDPC enqueue functions to handle transport blocks.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 197 ++++++++++++++++++++++-
>   1 file changed, 195 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index e42748e8cc..81bae4d695 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -2585,6 +2585,61 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
>   	return num;
>   }
>   
> +/* Enqueue one encode operations for ACC100 device for a partial TB
> + * all codes blocks have same configuration multiplexed on the same descriptor
> + */
> +static inline void
> +enqueue_ldpc_enc_part_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
> +		uint16_t total_enqueued_descs, int16_t num_cbs, uint32_t e,
> +		uint16_t in_len_B, uint32_t out_len_B, uint32_t *in_offset,

Do not mix lower & upper cases in variable names.

> +		uint32_t *out_offset)
> +{
> +
> +	union acc100_dma_desc *desc = NULL;
> +	struct rte_mbuf *output_head, *output;
> +	int i, next_triplet;
> +	struct rte_bbdev_op_ldpc_enc *enc = &op->ldpc_enc;
> +
> +

Remove one new line.

> +	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs)
> +			& q->sw_ring_wrap_mask);
> +	desc = q->ring_addr + desc_idx;
> +	acc100_fcw_le_fill(op, &desc->req.fcw_le, num_cbs, e);
> +
> +	/** This could be done at polling */

Single * at the opening of the comment for consitency with the rest of
the code.

> +	acc100_header_init(&desc->req);
> +	desc->req.numCBs = num_cbs;
> +
> +	desc->req.m2dlen = 1 + num_cbs;
> +	desc->req.d2mlen = num_cbs;
> +	next_triplet = 1;
> +
> +	for (i = 0; i < num_cbs; i++) {
> +		desc->req.data_ptrs[next_triplet].address =
> +			rte_pktmbuf_iova_offset(enc->input.data,
> +					*in_offset);
> +		*in_offset += in_len_B;
> +		desc->req.data_ptrs[next_triplet].blen = in_len_B;
> +		next_triplet++;
> +		desc->req.data_ptrs[next_triplet].address =
> +				rte_pktmbuf_iova_offset(
> +						enc->output.data, *out_offset);
> +		*out_offset += out_len_B;
> +		desc->req.data_ptrs[next_triplet].blen = out_len_B;
> +		next_triplet++;
> +		enc->output.length += out_len_B;
> +		output_head = output = enc->output.data;
> +		mbuf_append(output_head, output, out_len_B);
> +	}
> +
> +#ifdef RTE_LIBRTE_BBDEV_DEBUG
> +	rte_memdump(stderr, "FCW", &desc->req.fcw_le,
> +			sizeof(desc->req.fcw_le) - 8);
> +	rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
> +#endif
> +
> +}
> +
>   /* Enqueue one encode operations for ACC100 device in CB mode */
>   static inline int
>   enqueue_ldpc_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
> @@ -2725,6 +2780,76 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   	return current_enqueued_cbs;
>   }
>   
> +/* Enqueue one encode operations for ACC100 device in TB mode.
> + * returns the number of descs used
> + */
> +static inline int
> +enqueue_ldpc_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
> +		uint16_t enq_descs, uint8_t cbs_in_tb)
> +{
> +#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
> +	if (validate_ldpc_enc_op(op, q) == -1) {
> +		rte_bbdev_log(ERR, "LDPC encoder validation failed");
> +		return -EINVAL;
> +	}
> +#endif
> +	uint8_t num_a, num_b;
> +	uint16_t desc_idx;
> +	uint8_t r = op->ldpc_enc.tb_params.r;
> +	uint8_t cab =  op->ldpc_enc.tb_params.cab;
> +	union acc100_dma_desc *desc;
> +	uint16_t init_enq_descs = enq_descs;
> +	uint16_t input_len_B = ((op->ldpc_enc.basegraph == 1 ? 22 : 10) *
> +			op->ldpc_enc.z_c - op->ldpc_enc.n_filler) >> 3;
> +	if (check_bit(op->ldpc_enc.op_flags, RTE_BBDEV_LDPC_CRC_24B_ATTACH))
> +		input_len_B -= 3;
> +
> +	if (r < cab) {
> +		num_a = cab - r;
> +		num_b = cbs_in_tb - cab;
> +	} else {
> +		num_a = 0;
> +		num_b = cbs_in_tb - r;
> +	}
> +	uint32_t in_offset = 0, out_offset = 0;
> +
> +	while (num_a > 0) {
> +		uint32_t e = op->ldpc_enc.tb_params.ea;
> +		uint32_t out_len_B = (e + 7) >> 3;
> +		uint8_t enq = RTE_MIN(num_a, ACC100_MUX_5GDL_DESC);
> +		num_a -= enq;
> +		enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
> +				out_len_B, &in_offset, &out_offset);
> +		enq_descs++;
> +	}
> +	while (num_b > 0) {
> +		uint32_t e = op->ldpc_enc.tb_params.eb;
> +		uint32_t out_len_B = (e + 7) >> 3;
> +		uint8_t enq = RTE_MIN(num_b, ACC100_MUX_5GDL_DESC);
> +		num_b -= enq;
> +		enqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,
> +				out_len_B, &in_offset, &out_offset);
> +		enq_descs++;
> +	}
> +
> +	uint16_t return_descs = enq_descs - init_enq_descs;
> +	/* Keep total number of CBs in first TB */
> +	desc_idx = ((q->sw_ring_head + init_enq_descs)
> +			& q->sw_ring_wrap_mask);
> +	desc = q->ring_addr + desc_idx;
> +	desc->req.cbs_in_tb = return_descs; /** Actual number of descriptors */
> +	desc->req.op_addr = op;
> +
> +	/* Set SDone on last CB descriptor for TB mode. */
> +	desc_idx = ((q->sw_ring_head + enq_descs - 1)
> +			& q->sw_ring_wrap_mask);
> +	desc = q->ring_addr + desc_idx;
> +	desc->req.sdone_enable = 1;
> +	desc->req.irq_enable = q->irq_enable;
> +	desc->req.op_addr = op;
> +	return return_descs;
> +}
> +
>   #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   /* Validates turbo decoder parameters */
>   static inline int
> @@ -3299,7 +3424,10 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	uint16_t current_enqueued_cbs = 0;
>   
>   #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
> -	/* Validate op structure */
> +	if (cbs_in_tb == 0) {
> +		rte_bbdev_log(ERR, "Turbo decoder invalid number of CBs");
> +		return -EINVAL;
> +	}
>   	if (validate_dec_op(op, q) == -1) {
>   		rte_bbdev_log(ERR, "Turbo decoder validation rejected");
>   		return -EINVAL;
> @@ -3386,6 +3514,32 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	return current_enqueued_cbs;
>   }
>   
> +/* Calculates number of CBs in processed encoder TB based on 'r' and input
> + * length.
> + */
> +static inline uint8_t
> +get_num_cbs_in_tb_ldpc_enc(struct rte_bbdev_op_ldpc_enc *ldpc_enc)
> +{
> +	uint8_t c, r, crc24_bits = 0;
> +	uint16_t k = (ldpc_enc->basegraph == 1 ? 22 : 10) * ldpc_enc->z_c
> +		- ldpc_enc->n_filler;
> +	uint8_t cbs_in_tb = 0;
> +	int32_t length;
> +
> +	length = ldpc_enc->input.length;
> +	r = ldpc_enc->tb_params.r;
> +	c = ldpc_enc->tb_params.c;
> +	crc24_bits = 0;
> +	if (check_bit(ldpc_enc->op_flags, RTE_BBDEV_LDPC_CRC_24B_ATTACH))
> +		crc24_bits = 24;
> +	while (length > 0 && r < c) {
> +		length -= (k - crc24_bits) >> 3;
> +		r++;
> +		cbs_in_tb++;
> +	}
> +	return cbs_in_tb;
> +}
> +
>   /* Calculates number of CBs in processed encoder TB based on 'r' and input
>    * length.
>    */
> @@ -3667,6 +3821,45 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
>   	return i;
>   }
>   
> +/* Enqueue LDPC encode operations for ACC100 device in TB mode. */
> +static uint16_t
> +acc100_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,
> +		struct rte_bbdev_enc_op **ops, uint16_t num)
> +{
> +	struct acc100_queue *q = q_data->queue_private;
> +	int32_t avail = acc100_ring_avail_enq(q);
> +	uint16_t i, enqueued_descs = 0;
> +	uint8_t cbs_in_tb;
> +	int descs_used;
> +
> +	for (i = 0; i < num; ++i) {
> +		cbs_in_tb = get_num_cbs_in_tb_ldpc_enc(&ops[i]->ldpc_enc);
> +		/* Check if there are available space for further processing */
> +		if (unlikely(avail - cbs_in_tb < 0)) {
> +			acc100_enqueue_ring_full(q_data);
> +			break;
> +		}
> +		descs_used = enqueue_ldpc_enc_one_op_tb(q, ops[i],
> +				enqueued_descs, cbs_in_tb);
> +		if (descs_used < 0) {
> +			acc100_enqueue_invalid(q_data);
> +			break;
> +		}
> +		enqueued_descs += descs_used;
> +		avail -= descs_used;
> +	}
> +	if (unlikely(enqueued_descs == 0))
> +		return 0; /* Nothing to enqueue */
> +
> +	acc100_dma_enqueue(q, enqueued_descs, &q_data->queue_stats);
> +
> +	/* Update stats */
> +	q_data->queue_stats.enqueued_count += i;
> +	q_data->queue_stats.enqueue_err_count += num - i;
> +
> +	return i;
> +}
> +
>   /* Check room in AQ for the enqueues batches into Qmgr */
>   static int32_t
>   acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
> @@ -3704,7 +3897,7 @@ acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
>   	if (unlikely((aq_avail <= 0) || (num == 0)))
>   		return 0;
>   	if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
> -		return acc100_enqueue_enc_tb(q_data, ops, num);
> +		return acc100_enqueue_ldpc_enc_tb(q_data, ops, num);
>   	else
>   		return acc100_enqueue_ldpc_enc_cb(q_data, ops, num);
>   }


With minor comments taken into account:

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 13/37] baseband/acc10x: limit cases for HARQ pruning

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add flag ACC101_HARQ_PRUNING_OPTIMIZATION to limit cases when HARQ
> pruning is valid.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 52 +++++++++++++++++++-----
>   1 file changed, 41 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 81bae4d695..e47f7d68c2 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1370,17 +1370,23 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
>   #ifdef ACC100_EXT_MEM
>   	/* Limit cases when HARQ pruning is valid */
> +#ifdef ACC100_HARQ_PRUNING_OPTIMIZATION
>   	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
> -			ACC100_HARQ_OFFSET) == 0) &&
> -			(op->ldpc_dec.harq_combined_output.offset <= UINT16_MAX
> -			* ACC100_HARQ_OFFSET);
> +			ACC100_HARQ_OFFSET) == 0);
> +#endif

Optimizations should not be put under #ifdefs, it will become a testing
hell otherwise. CI will have to run as many builds as there are possible 
combinations, which is not sustainable.

Even if not part of this patch, the "#ifdef ACC100_EXT_MEM" should also
be removed.

>   #endif
>   	if (fcw->hcin_en > 0) {
>   		harq_in_length = op->ldpc_dec.harq_combined_input.length;
>   		if (fcw->hcin_decomp_mode > 0)
>   			harq_in_length = harq_in_length * 8 / 6;
> -		harq_in_length = RTE_ALIGN(harq_in_length, 64);
> -		if ((harq_layout[harq_index].offset > 0) & harq_prun) {
> +		harq_in_length = RTE_MIN(harq_in_length, op->ldpc_dec.n_cb
> +				- op->ldpc_dec.n_filler);
> +		/* Alignment on next 64B - Already enforced from HC output */
> +		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
> +		/* Stronger alignment requirement when in decompression mode */
> +		if (fcw->hcin_decomp_mode > 0)
> +			harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 256);
> +		if ((harq_layout[harq_index].offset > 0) && harq_prun) {
>   			rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
>   			fcw->hcin_size0 = harq_layout[harq_index].size0;
>   			fcw->hcin_offset = harq_layout[harq_index].offset;
> @@ -1455,6 +1461,7 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   	uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
>   	uint32_t harq_index;
>   	uint32_t l;
> +	bool harq_prun = false;
>   
>   	fcw->qm = op->ldpc_dec.q_m;
>   	fcw->nfiller = op->ldpc_dec.n_filler;
> @@ -1500,6 +1507,13 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   	fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
>   			RTE_BBDEV_LDPC_LLR_COMPRESSION);
>   	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
> +	#ifdef ACC100_EXT_MEM
> +	/* Limit cases when HARQ pruning is valid */
> +#ifdef ACC101_HARQ_PRUNING_OPTIMIZATION
> +	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
> +			ACC101_HARQ_OFFSET) == 0);
> +#endif
> +#endif
>   	if (fcw->hcin_en > 0) {
>   		harq_in_length = op->ldpc_dec.harq_combined_input.length;
>   		if (fcw->hcin_decomp_mode > 0)
> @@ -1508,9 +1522,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   				- op->ldpc_dec.n_filler);
>   		/* Alignment on next 64B - Already enforced from HC output */
>   		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
> -		fcw->hcin_size0 = harq_in_length;
> -		fcw->hcin_offset = 0;
> -		fcw->hcin_size1 = 0;
> +		if ((harq_layout[harq_index].offset > 0) && harq_prun) {
> +			rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
> +			fcw->hcin_size0 = harq_layout[harq_index].size0;
> +			fcw->hcin_offset = harq_layout[harq_index].offset;
> +			fcw->hcin_size1 = harq_in_length -
> +					harq_layout[harq_index].offset;
> +		} else {
> +			fcw->hcin_size0 = harq_in_length;
> +			fcw->hcin_offset = 0;
> +			fcw->hcin_size1 = 0;
> +		}
>   	} else {
>   		fcw->hcin_size0 = 0;
>   		fcw->hcin_offset = 0;
> @@ -1551,9 +1573,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   		harq_out_length = RTE_MIN(harq_out_length, ncb_p);
>   		/* Alignment on next 64B */
>   		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
> -		fcw->hcout_size0 = harq_out_length;
> -		fcw->hcout_size1 = 0;
> -		fcw->hcout_offset = 0;
> +		if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) &&
> +				harq_prun) {
> +			fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
> +			fcw->hcout_offset = k0_p & 0xFFC0;
> +			fcw->hcout_size1 = harq_out_length - fcw->hcout_offset;
> +		} else {
> +			fcw->hcout_size0 = harq_out_length;
> +			fcw->hcout_size1 = 0;
> +			fcw->hcout_offset = 0;
> +		}
> +
>   		harq_layout[harq_index].offset = fcw->hcout_offset;
>   		harq_layout[harq_index].size0 = fcw->hcout_size0;
>   	} else {

Re: [PATCH v2 14/37] baseband/acc100: update validate LDPC enc/dec

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Update validate functions to check for valid LDPC parameters to avoid
> any HW issues.
> Adding protection for null corner case and for HARQ inbound size out
> of range.
> HARQ input size from application may be invalid and causing HW issue.
> Add checks to ensure that if HARQ is invalid, set to some valid size to
> ensure HW issues do not occur.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 297 +++++++++++++++++++++--
>   1 file changed, 283 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index e47f7d68c2..1504acfadd 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -2404,10 +2404,6 @@ validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
>   	if (!validate_op_required(q))
>   		return 0;
>   
> -	if (op->mempool == NULL) {
> -		rte_bbdev_log(ERR, "Invalid mempool pointer");
> -		return -1;
> -	}
>   	if (ldpc_enc->input.data == NULL) {
>   		rte_bbdev_log(ERR, "Invalid input pointer");
>   		return -1;
> @@ -2416,11 +2412,9 @@ validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
>   		rte_bbdev_log(ERR, "Invalid output pointer");
>   		return -1;
>   	}
> -	if (ldpc_enc->input.length >
> -			RTE_BBDEV_LDPC_MAX_CB_SIZE >> 3) {
> -		rte_bbdev_log(ERR, "CB size (%u) is too big, max: %d",
> -				ldpc_enc->input.length,
> -				RTE_BBDEV_LDPC_MAX_CB_SIZE);
> +	if (ldpc_enc->input.length == 0) {
> +		rte_bbdev_log(ERR, "CB size (%u) is null",
> +				ldpc_enc->input.length);
>   		return -1;
>   	}
>   	if ((ldpc_enc->basegraph > 2) || (ldpc_enc->basegraph == 0)) {
> @@ -2441,13 +2435,107 @@ validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
>   				ldpc_enc->code_block_mode);
>   		return -1;
>   	}
> +	if (ldpc_enc->z_c > 384) {

Please use defines instead of raw values here and elsewhere in the
patch.

> +		rte_bbdev_log(ERR,
> +				"Zc (%u) is out of range",
> +				ldpc_enc->z_c);
> +		return -1;
> +	}
>   	int K = (ldpc_enc->basegraph == 1 ? 22 : 10) * ldpc_enc->z_c;
> -	if (ldpc_enc->n_filler >= K) {
> +	int N = (ldpc_enc->basegraph == 1 ? ACC100_N_ZC_1 : ACC100_N_ZC_2)
> +			* ldpc_enc->z_c;
> +	int q_m = ldpc_enc->q_m;
> +	int crc24 = 0;
> +
> +	if (check_bit(op->ldpc_enc.op_flags,
> +			RTE_BBDEV_LDPC_CRC_24A_ATTACH) ||
> +			check_bit(op->ldpc_enc.op_flags,
> +			RTE_BBDEV_LDPC_CRC_24B_ATTACH))
> +		crc24 = 24;
> +	if ((K - ldpc_enc->n_filler) % 8 > 0) {
>   		rte_bbdev_log(ERR,
> -				"K and F are not compatible %u %u",
> +				"K - F not byte aligned %u",
> +				K - ldpc_enc->n_filler);
> +		return -1;
> +	}
> +	if (ldpc_enc->n_filler > (K - 2 * ldpc_enc->z_c)) {
> +		rte_bbdev_log(ERR,
> +				"K - F invalid %u %u",
>   				K, ldpc_enc->n_filler);
>   		return -1;
>   	}
> +	if ((ldpc_enc->n_cb > N) || (ldpc_enc->n_cb <= K)) {
> +		rte_bbdev_log(ERR,
> +				"Ncb (%u) is out of range K  %d N %d",
> +				ldpc_enc->n_cb, K, N);
> +		return -1;
> +	}
> +	if (!check_bit(op->ldpc_enc.op_flags,
> +			RTE_BBDEV_LDPC_INTERLEAVER_BYPASS) &&
> +			((q_m == 0) || ((q_m > 2) && ((q_m % 2) == 1))
> +			|| (q_m > 8))) {
> +		rte_bbdev_log(ERR,
> +				"Qm (%u) is out of range",
> +				ldpc_enc->q_m);
> +		return -1;
> +	}
> +	if (ldpc_enc->code_block_mode == RTE_BBDEV_CODE_BLOCK) {
> +		if (ldpc_enc->cb_params.e == 0) {
> +			rte_bbdev_log(ERR,
> +					"E is null");
> +			return -1;
> +		}
> +		if (q_m > 0) {
> +			if (ldpc_enc->cb_params.e % q_m > 0) {
> +				rte_bbdev_log(ERR,
> +						"E not multiple of qm %d", q_m);
> +				return -1;
> +			}
> +		}
> +		if ((ldpc_enc->z_c <= 11) && (ldpc_enc->cb_params.e > 3456)) {
> +			rte_bbdev_log(ERR,
> +					"E too large for small block");
> +			return -1;
> +		}
> +		if (ldpc_enc->input.length >
> +			RTE_BBDEV_LDPC_MAX_CB_SIZE >> 3) {
> +			rte_bbdev_log(ERR, "CB size (%u) is too big, max: %d",
> +					ldpc_enc->input.length,
> +					RTE_BBDEV_LDPC_MAX_CB_SIZE);
> +		return -1;
> +		}
> +		if (K < (int) (ldpc_enc->input.length * 8
> +				+ ldpc_enc->n_filler) + crc24) {
> +			rte_bbdev_log(ERR,
> +					"K and F not matching input size %u %u %u",
> +					K, ldpc_enc->n_filler,
> +					ldpc_enc->input.length);
> +			return -1;
> +		}
> +	} else {
> +		if ((ldpc_enc->tb_params.c == 0) ||
> +				(ldpc_enc->tb_params.ea == 0) ||
> +				(ldpc_enc->tb_params.eb == 0)) {
> +			rte_bbdev_log(ERR,
> +					"TB parameter is null");
> +			return -1;
> +		}
> +		if (q_m > 0) {
> +			if ((ldpc_enc->tb_params.ea % q_m > 0) ||
> +					(ldpc_enc->tb_params.eb % q_m > 0)) {
> +				rte_bbdev_log(ERR,
> +						"E not multiple of qm %d",
> +						q_m);
> +				return -1;
> +			}
> +		}
> +		if ((ldpc_enc->z_c <= 11) && (RTE_MAX(ldpc_enc->tb_params.ea,
> +				ldpc_enc->tb_params.eb) > 3456)) {
> +			rte_bbdev_log(ERR,
> +					"E too large for small block");
> +			return -1;
> +		}
> +	}
>   	return 0;
>   }
>   
> @@ -2460,8 +2548,16 @@ validate_ldpc_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
>   	if (!validate_op_required(q))
>   		return 0;
>   
> -	if (op->mempool == NULL) {
> -		rte_bbdev_log(ERR, "Invalid mempool pointer");
> +	if (ldpc_dec->input.data == NULL) {
> +		rte_bbdev_log(ERR, "Invalid input pointer");
> +		return -1;
> +	}
> +	if (ldpc_dec->hard_output.data == NULL) {
> +		rte_bbdev_log(ERR, "Invalid output pointer");
> +		return -1;
> +	}
> +	if (ldpc_dec->input.length == 0) {
> +		rte_bbdev_log(ERR, "input is null");
>   		return -1;
>   	}
>   	if ((ldpc_dec->basegraph > 2) || (ldpc_dec->basegraph == 0)) {
> @@ -2488,13 +2584,186 @@ validate_ldpc_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
>   				ldpc_dec->code_block_mode);
>   		return -1;
>   	}
> +	/* Check Zc is valid value */
> +	if ((ldpc_dec->z_c > 384) || (ldpc_dec->z_c < 2)) {
> +		rte_bbdev_log(ERR,
> +				"Zc (%u) is out of range",
> +				ldpc_dec->z_c);
> +		return -1;
> +	}
> +	if (ldpc_dec->z_c > 256) {
> +		if ((ldpc_dec->z_c % 32) != 0) {
> +			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
> +			return -1;
> +		}
> +	} else if (ldpc_dec->z_c > 128) {
> +		if ((ldpc_dec->z_c % 16) != 0) {
> +			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
> +			return -1;
> +		}
> +	} else if (ldpc_dec->z_c > 64) {
> +		if ((ldpc_dec->z_c % 8) != 0) {
> +			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
> +			return -1;
> +		}
> +	} else if (ldpc_dec->z_c > 32) {
> +		if ((ldpc_dec->z_c % 4) != 0) {
> +			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
> +			return -1;
> +		}
> +	} else if (ldpc_dec->z_c > 16) {
> +		if ((ldpc_dec->z_c % 2) != 0) {
> +			rte_bbdev_log(ERR, "Invalid Zc %d", ldpc_dec->z_c);
> +			return -1;
> +		}
> +	}
>   	int K = (ldpc_dec->basegraph == 1 ? 22 : 10) * ldpc_dec->z_c;
> -	if (ldpc_dec->n_filler >= K) {
> +	int N = (ldpc_dec->basegraph == 1 ? ACC100_N_ZC_1 : ACC100_N_ZC_2)
> +			* ldpc_dec->z_c;
> +	int q_m = ldpc_dec->q_m;
> +	if (ldpc_dec->n_filler >= K - 2 * ldpc_dec->z_c) {
>   		rte_bbdev_log(ERR,
>   				"K and F are not compatible %u %u",
>   				K, ldpc_dec->n_filler);
>   		return -1;
>   	}
> +	if ((ldpc_dec->n_cb > N) || (ldpc_dec->n_cb <= K)) {
> +		rte_bbdev_log(ERR,
> +				"Ncb (%u) is out of range K  %d N %d",
> +				ldpc_dec->n_cb, K, N);
> +		return -1;
> +	}
> +
> +	if (((q_m == 0) || ((q_m > 2) && ((q_m % 2) == 1))
> +			|| (q_m > 8))) {
> +		rte_bbdev_log(ERR,
> +				"Qm (%u) is out of range",
> +				ldpc_dec->q_m);
> +		return -1;
> +	}
> +	if (ldpc_dec->code_block_mode == RTE_BBDEV_CODE_BLOCK) {
> +		if (ldpc_dec->cb_params.e == 0) {
> +			rte_bbdev_log(ERR,
> +					"E is null");
> +			return -1;
> +		}
> +		if (ldpc_dec->cb_params.e % q_m > 0) {
> +			rte_bbdev_log(ERR,
> +					"E not multiple of qm %d", q_m);
> +			return -1;
> +		}
> +		if (ldpc_dec->cb_params.e > 512 * ldpc_dec->z_c) {
> +			rte_bbdev_log(ERR,
> +					"E too high");
> +			return -1;
> +		}
> +	} else {
> +		if ((ldpc_dec->tb_params.c == 0) ||
> +				(ldpc_dec->tb_params.ea == 0) ||
> +				(ldpc_dec->tb_params.eb == 0)) {
> +			rte_bbdev_log(ERR,
> +					"TB parameter is null");
> +			return -1;
> +		}
> +		if ((ldpc_dec->tb_params.ea % q_m > 0) ||
> +				(ldpc_dec->tb_params.eb % q_m > 0)) {
> +			rte_bbdev_log(ERR,
> +					"E not multiple of qm %d", q_m);
> +			return -1;
> +		}
> +		if ((ldpc_dec->tb_params.ea > 512 * ldpc_dec->z_c) ||
> +				(ldpc_dec->tb_params.eb > 512 * ldpc_dec->z_c)) {
> +			rte_bbdev_log(ERR,
> +					"E too high");
> +			return -1;
> +		}
> +	}
> +	if (check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_DECODE_BYPASS)) {
> +		rte_bbdev_log(ERR, "Avoid LDPC Decode bypass");
> +		return -1;
> +	}
> +
> +	/* Avoid HARQ compression for small block size */
> +	if ((check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION))
> +			&& (K < 2048)) {
> +		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION;
> +	}
> +	uint32_t min_harq_input = check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION) ? 256 : 64;
> +	if (check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE) &&
> +			ldpc_dec->harq_combined_input.length <
> +			min_harq_input) {
> +		rte_bbdev_log(ERR, "HARQ input size is too small %d < %d",
> +			ldpc_dec->harq_combined_input.length,
> +			min_harq_input);
> +		return -1;
> +	}
> +
> +	/* Enforce in-range HARQ input size */
> +	if (check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {
> +		uint32_t max_harq_input = RTE_ALIGN_CEIL(ldpc_dec->n_cb -
> +				ldpc_dec->n_filler, 64);
> +		if (check_bit(op->ldpc_dec.op_flags,
> +				RTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION))
> +			max_harq_input = max_harq_input * 3 / 4;
> +		if (ldpc_dec->harq_combined_input.length > max_harq_input) {
> +			rte_bbdev_log(ERR,
> +					"HARQ input size out of range %d > %d, Ncb %d F %d K %d N %d",
> +					ldpc_dec->harq_combined_input.length,
> +					max_harq_input, ldpc_dec->n_cb,
> +					ldpc_dec->n_filler, K, N);
> +			/* Fallback to flush HARQ combine */
> +			ldpc_dec->harq_combined_input.length = 0;
> +			if (check_bit(op->ldpc_dec.op_flags,
> +					RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {
> +				op->ldpc_dec.op_flags ^=
> +					RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
> +			}
> +		}
> +	}
> +
> +#ifdef ACC100_EXT_MEM
> +	/* Enforce in-range HARQ offset */
> +	if (check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE)) {
> +		if ((op->ldpc_dec.harq_combined_input.offset >> 10)
> +				>= q->d->ddr_size) {
> +			rte_bbdev_log(ERR,
> +				"HARQin offset out of range %d > %d",
> +				op->ldpc_dec.harq_combined_input.offset,
> +				q->d->ddr_size);
> +			return -1;
> +		}
> +		if ((op->ldpc_dec.harq_combined_input.offset & 0x3FF) > 0) {
> +			rte_bbdev_log(ERR,
> +				"HARQin offset not aligned on 1kB %d",
> +				op->ldpc_dec.harq_combined_input.offset);
> +			return -1;
> +		}
> +	}
> +	if (check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) {
> +		if ((op->ldpc_dec.harq_combined_output.offset >> 10)
> +				>= q->d->ddr_size) {
> +			rte_bbdev_log(ERR,
> +				"HARQout offset out of range %d > %d",
> +				op->ldpc_dec.harq_combined_output.offset,
> +				q->d->ddr_size);
> +			return -1;
> +		}
> +		if ((op->ldpc_dec.harq_combined_output.offset & 0x3FF) > 0) {
> +			rte_bbdev_log(ERR,
> +				"HARQout offset not aligned on 1kB %d",
> +				op->ldpc_dec.harq_combined_output.offset);
> +			return -1;
> +		}
> +	}
> +#endif
> +
>   	return 0;
>   }
>   #endif

Re: [PATCH v2 15/37] baseband/acc100: add workaround for deRM corner cases

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add function to asses if de-ratematch pre-processing should be run
> in SW for corner cases.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/acc100_pmd.h     |  13 +++
>   drivers/baseband/acc100/rte_acc100_pmd.c | 103 ++++++++++++++++++++++-
>   2 files changed, 114 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
> index 19a1f434bc..c98a182be6 100644
> --- a/drivers/baseband/acc100/acc100_pmd.h
> +++ b/drivers/baseband/acc100/acc100_pmd.h
> @@ -140,6 +140,8 @@
>   /* Constants from K0 computation from 3GPP 38.212 Table 5.4.2.1-2 */
>   #define ACC100_N_ZC_1 66 /* N = 66 Zc for BG 1 */
>   #define ACC100_N_ZC_2 50 /* N = 50 Zc for BG 2 */
> +#define ACC100_K_ZC_1 22 /* K = 22 Zc for BG 1 */
> +#define ACC100_K_ZC_2 10 /* K = 10 Zc for BG 2 */
>   #define ACC100_K0_1_1 17 /* K0 fraction numerator for rv 1 and BG 1 */
>   #define ACC100_K0_1_2 13 /* K0 fraction numerator for rv 1 and BG 2 */
>   #define ACC100_K0_2_1 33 /* K0 fraction numerator for rv 2 and BG 1 */
> @@ -177,6 +179,16 @@
>   #define ACC100_MS_IN_US         (1000)
>   #define ACC100_DDR_TRAINING_MAX (5000)
>   
> +/* Code rate limitation when padding is required */
> +#define ACC100_LIM_03 2  /* 0.03 */
> +#define ACC100_LIM_09 6  /* 0.09 */
> +#define ACC100_LIM_14 9  /* 0.14 */
> +#define ACC100_LIM_21 14 /* 0.21 */
> +#define ACC100_LIM_31 20 /* 0.31 */
> +#define ACC100_MAX_E (128 * 1024 - 2)
> +
> +
> +
>   /* ACC100 DMA Descriptor triplet */
>   struct acc100_dma_triplet {
>   	uint64_t address;
> @@ -572,6 +584,7 @@ struct __rte_cache_aligned acc100_queue {
>   	uint8_t *lb_out;
>   	rte_iova_t lb_in_addr_iova;
>   	rte_iova_t lb_out_addr_iova;
> +	int8_t *derm_buffer; /* interim buffer for de-rm in SDK */
>   	struct acc100_device *d;
>   };
>   
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 1504acfadd..69c0714a37 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -24,6 +24,10 @@
>   #include "acc100_pmd.h"
>   #include "acc101_pmd.h"
>   
> +#ifdef RTE_BBDEV_SDK_AVX512
> +#include <phy_rate_dematching_5gnr.h>
> +#endif
> +
>   #ifdef RTE_LIBRTE_BBDEV_DEBUG
>   RTE_LOG_REGISTER_DEFAULT(acc100_logtype, DEBUG);
>   #else
> @@ -898,6 +902,16 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   		rte_free(q);
>   		return -ENOMEM;
>   	}
> +	q->derm_buffer = rte_zmalloc_socket(dev->device->driver->name,
> +			RTE_BBDEV_TURBO_MAX_CB_SIZE * 10,
> +			RTE_CACHE_LINE_SIZE, conf->socket);
> +	if (q->derm_buffer == NULL) {
> +		rte_bbdev_log(ERR, "Failed to allocate derm_buffer memory");
> +		rte_free(q->lb_in);
> +		rte_free(q->lb_out);
> +		rte_free(q);
> +		return -ENOMEM;
> +	}

It may make sense to have a common error path to avoid duplication and
so risk introducing memory leaks when changes will be made.

>   	q->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);
>   
>   	/*
> @@ -918,6 +932,7 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   
>   	q_idx = acc100_find_free_queue_idx(dev, conf);
>   	if (q_idx == -1) {
> +		rte_free(q->derm_buffer);
>   		rte_free(q->lb_in);
>   		rte_free(q->lb_out);
>   		rte_free(q);
> @@ -955,6 +970,7 @@ acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)
>   		/* Mark the Queue as un-assigned */
>   		d->q_assigned_bit_map[q->qgrp_id] &= (0xFFFFFFFF -
>   				(1 << q->aq_id));
> +		rte_free(q->derm_buffer);
>   		rte_free(q->lb_in);
>   		rte_free(q->lb_out);
>   		rte_free(q);
> @@ -3512,10 +3528,42 @@ harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	return 1;
>   }
>   
> +/** Assess whether a work around is required for the deRM corner cases */
> +static inline bool
> +derm_workaround_required(struct rte_bbdev_op_ldpc_dec *ldpc_dec, struct acc100_queue *q)
> +{
> +	if (!is_acc100(q))
> +		return false;
> +	int32_t e = ldpc_dec->cb_params.e;
> +	int q_m = ldpc_dec->q_m;
> +	int z_c = ldpc_dec->z_c;
> +	int K = (ldpc_dec->basegraph == 1 ? ACC100_K_ZC_1 : ACC100_K_ZC_2)
> +			* z_c;
> +	bool required = false;

Add new line.

> +	if (ldpc_dec->basegraph == 1) {
> +		if ((q_m == 4) && (z_c >= 320) && (e * ACC100_LIM_31 > K * 64))
> +			required = true;
> +		else if ((e * ACC100_LIM_21 > K * 64))
> +			required = true;
> +	} else {
> +		if (q_m <= 2) {
> +			if ((z_c >= 208) && (e * ACC100_LIM_09 > K * 64))
> +				required = true;
> +			else if ((z_c < 208) && (e * ACC100_LIM_03 > K * 64))
> +				required = true;
> +		} else if (e * ACC100_LIM_14 > K * 64)
> +			required = true;
> +	}
> +	if (required)
> +		rte_bbdev_log(INFO, "Running deRM pre-processing in SW");

Add new line.

> +	return required;
> +}
> +
>   /** Enqueue one decode operations for ACC100 device in CB mode */
>   static inline int
>   enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
> -		uint16_t total_enqueued_cbs, bool same_op)
> +		uint16_t total_enqueued_cbs, bool same_op,
> +		struct rte_bbdev_queue_data *q_data)
>   {
>   	int ret;
>   	if (unlikely(check_bit(op->ldpc_dec.op_flags,
> @@ -3571,6 +3619,57 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   				&in_offset, &h_out_offset,
>   				&h_out_length, harq_layout);
>   	} else {
> +		if (derm_workaround_required(&op->ldpc_dec, q)) {
> +			#ifdef RTE_BBDEV_SDK_AVX512

First, the indentation is not good here.

Also, my understanding is that this code will get built only if Flexran
SDK is available. Flexran SDK is proprietary, and so it is not possible
to have this code exercised by the upstream CI.

Code under RTE_BBDEV_SDK_AVX512 should be dropped IMO.

> +			struct rte_bbdev_op_ldpc_dec *dec = &op->ldpc_dec;
> +			/* Checking input size is matching with E */
> +			if (dec->input.data->data_len < dec->cb_params.e) {
> +				rte_bbdev_log(ERR,
> +						"deRM: Input size mismatch");
> +				return -EFAULT;
> +			}
> +			/* Run first deRM processing in SW */
> +			struct bblib_rate_dematching_5gnr_request derm_req;
> +			struct bblib_rate_dematching_5gnr_response derm_resp;
> +			uint8_t *in = rte_pktmbuf_mtod_offset(dec->input.data,
> +					uint8_t *, in_offset);

Don't mix declarations & code.

> +			derm_req.p_in = (int8_t *) in;
> +			derm_req.p_harq = (int8_t *) q->derm_buffer;
> +			derm_req.base_graph = dec->basegraph;
> +			derm_req.zc = dec->z_c;
> +			derm_req.ncb = dec->n_cb;
> +			derm_req.e = dec->cb_params.e;
> +			if (derm_req.e > ACC100_MAX_E) {
> +				rte_bbdev_log(WARNING,
> +						"deRM: E %d > %d max",
> +						derm_req.e, ACC100_MAX_E);
> +				derm_req.e = ACC100_MAX_E;
> +			}
> +			derm_req.k0 = 0; /* Actual output from SDK */
> +			derm_req.isretx = false;
> +			derm_req.rvid = dec->rv_index;
> +			derm_req.modulation_order = dec->q_m;
> +			derm_req.start_null_index =
> +					(dec->basegraph == 1 ? 22 : 10)
> +					* dec->z_c - 2 * dec->z_c
> +					- dec->n_filler;
> +			derm_req.num_of_null = dec->n_filler;
> +			bblib_rate_dematching_5gnr(&derm_req, &derm_resp);
> +			/* Force back the HW DeRM */
> +			dec->q_m = 1;
> +			dec->cb_params.e = dec->n_cb - dec->n_filler;
> +			dec->rv_index = 0;
> +			rte_memcpy(in, q->derm_buffer, dec->cb_params.e);
> +			/* Capture counter when pre-processing is used */
> +			q_data->queue_stats.enqueue_warn_count++;
> +			#else
> +			RTE_SET_USED(q_data);
> +			rte_bbdev_log(WARNING,
> +				"Corner case may require deRM pre-processing in SDK"
> +				);
> +			#endif
> +		}
> +
>   		struct acc100_fcw_ld *fcw;
>   		uint32_t seg_total_left;

Don't mix declarations & code.

>   		fcw = &desc->req.fcw_ld;
> @@ -4322,7 +4421,7 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
>   			ops[i]->ldpc_dec.n_cb, ops[i]->ldpc_dec.q_m,
>   			ops[i]->ldpc_dec.n_filler, ops[i]->ldpc_dec.cb_params.e,
>   			same_op);
> -		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
> +		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op, q_data);
>   		if (ret < 0) {
>   			acc100_enqueue_invalid(q_data);
>   			break;

Re: [PATCH v2 16/37] baseband/acc100: add ring companion address

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Store the virtual address of companion ring as part of queue
> information. Use this address to calculate the op address.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/acc100_pmd.h     |  12 ++
>   drivers/baseband/acc100/rte_acc100_pmd.c | 143 ++++++++++++++---------
>   2 files changed, 100 insertions(+), 55 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
> index c98a182be6..20157e5886 100644
> --- a/drivers/baseband/acc100/acc100_pmd.h
> +++ b/drivers/baseband/acc100/acc100_pmd.h
> @@ -126,6 +126,7 @@
>   #define ACC100_5GUL_SIZE_0                16
>   #define ACC100_5GUL_SIZE_1                40
>   #define ACC100_5GUL_OFFSET_0              36
> +#define ACC100_COMPANION_PTRS             8
>   
>   #define ACC100_FCW_VER         2
>   #define ACC100_MUX_5GDL_DESC   6
> @@ -375,6 +376,15 @@ struct __rte_packed acc100_fcw_le {
>   	uint32_t res8;
>   };
>   
> +struct __rte_packed acc100_pad_ptr {
> +	void *op_addr;
> +	uint64_t pad1;  /* pad to 64 bits */

A comment would help to understand why padding is necessary.

> +};
> +
> +struct __rte_packed acc100_ptrs {
> +	struct acc100_pad_ptr ptr[ACC100_COMPANION_PTRS];
> +};
> +
>   /* ACC100 DMA Request Descriptor */
>   struct __rte_packed acc100_dma_req_desc {
>   	union {
> @@ -568,6 +578,8 @@ struct __rte_cache_aligned acc100_queue {
>   	uint32_t sw_ring_depth;
>   	/* mask used to wrap enqueued descriptors on the sw ring */
>   	uint32_t sw_ring_wrap_mask;
> +	/* Virtual address of companion ring */
> +	struct acc100_ptrs *companion_ring_addr;
>   	/* MMIO register used to enqueue descriptors */
>   	void *mmio_reg_enqueue;
>   	uint8_t vf_id;  /* VF ID (max = 63) */
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 69c0714a37..ea54152856 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -913,6 +913,17 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   		return -ENOMEM;
>   	}
>   	q->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);
> +	q->companion_ring_addr = rte_zmalloc_socket(dev->device->driver->name,
> +			d->sw_ring_max_depth * sizeof(*q->companion_ring_addr),
> +			RTE_CACHE_LINE_SIZE, conf->socket);
> +	if (q->companion_ring_addr == NULL) {
> +		rte_bbdev_log(ERR, "Failed to allocate companion_ring memory");
> +		rte_free(q->derm_buffer);
> +		rte_free(q->lb_in);
> +		rte_free(q->lb_out);
> +		rte_free(q);
> +		return -ENOMEM;
> +	}

Same comment as on previous patch, better to have a proper error path
than duplicating the free operations.

>   	/*
>   	 * Software queue ring wraps synchronously with the HW when it reaches
> @@ -932,6 +943,7 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   
>   	q_idx = acc100_find_free_queue_idx(dev, conf);
>   	if (q_idx == -1) {
> +		rte_free(q->companion_ring_addr);
>   		rte_free(q->derm_buffer);
>   		rte_free(q->lb_in);
>   		rte_free(q->lb_out);
> @@ -970,6 +982,7 @@ acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)
>   		/* Mark the Queue as un-assigned */
>   		d->q_assigned_bit_map[q->qgrp_id] &= (0xFFFFFFFF -
>   				(1 << q->aq_id));
> +		rte_free(q->companion_ring_addr);
>   		rte_free(q->derm_buffer);
>   		rte_free(q->lb_in);
>   		rte_free(q->lb_out);
> @@ -2889,6 +2902,10 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
>   	}
>   
>   	desc->req.op_addr = ops[0];
> +	/* Keep track of pointers even when multiplexed in single descriptor */
> +	struct acc100_ptrs *context_ptrs = q->companion_ring_addr + desc_idx;

Don't mix declarations & code.

> +	for (i = 0; i < num; i++)
> +		context_ptrs->ptr[i].op_addr = ops[i];
>   
>   #ifdef RTE_LIBRTE_BBDEV_DEBUG
>   	rte_memdump(stderr, "FCW", &desc->req.fcw_le,
> @@ -4517,15 +4534,16 @@ acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
>   /* Dequeue one encode operations from ACC100 device in CB mode */
>   static inline int
>   dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
> -		uint16_t total_dequeued_cbs, uint32_t *aq_dequeued)
> +		uint16_t *dequeued_ops, uint32_t *aq_dequeued,
> +		uint16_t *dequeued_descs)
>   {
>   	union acc100_dma_desc *desc, atom_desc;
>   	union acc100_dma_rsp_desc rsp;
>   	struct rte_bbdev_enc_op *op;
>   	int i;
> -
> -	desc = q->ring_addr + ((q->sw_ring_tail + total_dequeued_cbs)
> +	int desc_idx = ((q->sw_ring_tail + *dequeued_descs)
>   			& q->sw_ring_wrap_mask);

Please add new line.

> +	desc = q->ring_addr + desc_idx;
>   	atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
>   			__ATOMIC_RELAXED);
>   
> @@ -4534,7 +4552,8 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   		return -1;
>   
>   	rsp.val = atom_desc.rsp.val;
> -	rte_bbdev_log_debug("Resp. desc %p: %x", desc, rsp.val);
> +	rte_bbdev_log_debug("Resp. desc %p: %x num %d\n",
> +			desc, rsp.val, desc->req.numCBs);
>   
>   	/* Dequeue */
>   	op = desc->req.op_addr;
> @@ -4552,27 +4571,32 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   	desc->rsp.add_info_0 = 0; /*Reserved bits */
>   	desc->rsp.add_info_1 = 0; /*Reserved bits */
>   
> -	/* Flag that the muxing cause loss of opaque data */
> -	op->opaque_data = (void *)-1;
> -	for (i = 0 ; i < desc->req.numCBs; i++)
> -		ref_op[i] = op;
> +	ref_op[0] = op;
> +	struct acc100_ptrs *context_ptrs = q->companion_ring_addr + desc_idx;

Don't mix declarations & code.

> +	for (i = 1 ; i < desc->req.numCBs; i++)
> +		ref_op[i] = context_ptrs->ptr[i].op_addr;
>   
> -	/* One CB (op) was successfully dequeued */
> +	/* One op was successfully dequeued */
> +	(*dequeued_descs)++;
> +	*dequeued_ops += desc->req.numCBs;
>   	return desc->req.numCBs;
>   }
>   
> -/* Dequeue one encode operations from ACC100 device in TB mode */
> +/* Dequeue one LDPC encode operations from ACC100 device in TB mode
> + * That operation may cover multiple descriptors
> + */
>   static inline int
>   dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
> -		uint16_t total_dequeued_cbs, uint32_t *aq_dequeued)
> +		uint16_t *dequeued_ops, uint32_t *aq_dequeued,
> +		uint16_t *dequeued_descs)
>   {
>   	union acc100_dma_desc *desc, *last_desc, atom_desc;
>   	union acc100_dma_rsp_desc rsp;
>   	struct rte_bbdev_enc_op *op;
>   	uint8_t i = 0;
> -	uint16_t current_dequeued_cbs = 0, cbs_in_tb;
> +	uint16_t current_dequeued_descs = 0, descs_in_tb;
>   
> -	desc = q->ring_addr + ((q->sw_ring_tail + total_dequeued_cbs)
> +	desc = q->ring_addr + ((q->sw_ring_tail + *dequeued_descs)
>   			& q->sw_ring_wrap_mask);
>   	atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
>   			__ATOMIC_RELAXED);
> @@ -4582,10 +4606,10 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   		return -1;
>   
>   	/* Get number of CBs in dequeued TB */
> -	cbs_in_tb = desc->req.cbs_in_tb;
> +	descs_in_tb = desc->req.cbs_in_tb;
>   	/* Get last CB */
>   	last_desc = q->ring_addr + ((q->sw_ring_tail
> -			+ total_dequeued_cbs + cbs_in_tb - 1)
> +			+ *dequeued_descs + descs_in_tb - 1)
>   			& q->sw_ring_wrap_mask);
>   	/* Check if last CB in TB is ready to dequeue (and thus
>   	 * the whole TB) - checking sdone bit. If not return.
> @@ -4601,15 +4625,17 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   	/* Clearing status, it will be set based on response */
>   	op->status = 0;
>   
> -	while (i < cbs_in_tb) {
> +	while (i < descs_in_tb) {
>   		desc = q->ring_addr + ((q->sw_ring_tail
> -				+ total_dequeued_cbs)
> +				+ *dequeued_descs)
>   				& q->sw_ring_wrap_mask);
>   		atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
>   				__ATOMIC_RELAXED);
>   		rsp.val = atom_desc.rsp.val;
> -		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
> -				rsp.val);
> +		rte_bbdev_log_debug("Resp. desc %p: %x descs %d cbs %d\n",
> +				desc,
> +				rsp.val, descs_in_tb,
> +				desc->req.numCBs);
>   
>   		op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
>   		op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
> @@ -4621,14 +4647,14 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
>   		desc->rsp.val = ACC100_DMA_DESC_TYPE;
>   		desc->rsp.add_info_0 = 0;
>   		desc->rsp.add_info_1 = 0;
> -		total_dequeued_cbs++;
> -		current_dequeued_cbs++;
> +		(*dequeued_descs)++;
> +		current_dequeued_descs++;
>   		i++;
>   	}
>   
>   	*ref_op = op;
> -
> -	return current_dequeued_cbs;
> +	(*dequeued_ops)++;

Please keep the new line.

> +	return current_dequeued_descs;
>   }
>   
>   /* Dequeue one decode operation from ACC100 device in CB mode */
> @@ -4824,12 +4850,11 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
>   		struct rte_bbdev_enc_op **ops, uint16_t num)
>   {
>   	struct acc100_queue *q = q_data->queue_private;
> -	uint16_t dequeue_num;
>   	uint32_t avail = acc100_ring_avail_deq(q);
>   	uint32_t aq_dequeued = 0;
> -	uint16_t i, dequeued_cbs = 0;
> -	struct rte_bbdev_enc_op *op;
> +	uint16_t i, dequeued_ops = 0, dequeued_descs = 0;
>   	int ret;
> +	struct rte_bbdev_enc_op *op;
>   	if (avail == 0)
>   		return 0;
>   #ifdef RTE_LIBRTE_BBDEV_DEBUG
> @@ -4838,31 +4863,34 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
>   		return 0;
>   	}
>   #endif
> +	op = (q->ring_addr + (q->sw_ring_tail &
> +			q->sw_ring_wrap_mask))->req.op_addr;
> +	if (unlikely(ops == NULL || op == NULL))
> +		return 0;
>   
> -	dequeue_num = (avail < num) ? avail : num;
> +	int cbm = op->turbo_enc.code_block_mode;
>   
> -	for (i = 0; i < dequeue_num; ++i) {
> -		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
> -			& q->sw_ring_wrap_mask))->req.op_addr;
> -		if (op->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
> -			ret = dequeue_enc_one_op_tb(q, &ops[i], dequeued_cbs,
> -					&aq_dequeued);
> +	for (i = 0; i < num; i++) {
> +		if (cbm == RTE_BBDEV_TRANSPORT_BLOCK)
> +			ret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
> +					&dequeued_ops, &aq_dequeued,
> +					&dequeued_descs);
>   		else
> -			ret = dequeue_enc_one_op_cb(q, &ops[i], dequeued_cbs,
> -					&aq_dequeued);
> -
> +			ret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
> +					&dequeued_ops, &aq_dequeued,
> +					&dequeued_descs);
>   		if (ret < 0)
>   			break;
> -		dequeued_cbs += ret;
> +		if (dequeued_ops >= num)
> +			break;
>   	}
>   
>   	q->aq_dequeued += aq_dequeued;
> -	q->sw_ring_tail += dequeued_cbs;
> +	q->sw_ring_tail += dequeued_descs;
>   
>   	/* Update enqueue stats */
> -	q_data->queue_stats.dequeued_count += i;
> -
> -	return i;
> +	q_data->queue_stats.dequeued_count += dequeued_ops;

Please keep the new line.

> +	return dequeued_ops;
>   }
>   
>   /* Dequeue LDPC encode operations from ACC100 device. */
> @@ -4873,24 +4901,31 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
>   	struct acc100_queue *q = q_data->queue_private;
>   	uint32_t avail = acc100_ring_avail_deq(q);
>   	uint32_t aq_dequeued = 0;
> -	uint16_t dequeue_num, i, dequeued_cbs = 0, dequeued_descs = 0;
> +	uint16_t i, dequeued_ops = 0, dequeued_descs = 0;
>   	int ret;
> -
> +	struct rte_bbdev_enc_op *op;
>   #ifdef RTE_LIBRTE_BBDEV_DEBUG
>   	if (unlikely(ops == 0 && q == NULL))

The check for q being non-NULL should be moved out of the #ifdef debug,
as it is dereferenced afterwards.

More generally, sanity checks like these one preventing crashes should

>   		return 0;
>   #endif
> +	op = (q->ring_addr + (q->sw_ring_tail &
> +			q->sw_ring_wrap_mask))->req.op_addr;

Splitting this in two would provide clarity, and give the possiblity
to check the desc address is valid before dereferencing.

> +	if (unlikely(ops == NULL || op == NULL))
> +		return 0;
> +	int cbm = op->ldpc_enc.code_block_mode;
>   
> -	dequeue_num = RTE_MIN(avail, num);
> -
> -	for (i = 0; i < dequeue_num; i++) {
> -		ret = dequeue_enc_one_op_cb(q, &ops[dequeued_cbs],
> -				dequeued_descs, &aq_dequeued);
> +	for (i = 0; i < avail; i++) {
> +		if (cbm == RTE_BBDEV_TRANSPORT_BLOCK)
> +			ret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],
> +					&dequeued_ops, &aq_dequeued,
> +					&dequeued_descs);
> +		else
> +			ret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],
> +					&dequeued_ops, &aq_dequeued,
> +					&dequeued_descs);
>   		if (ret < 0)
>   			break;
> -		dequeued_cbs += ret;
> -		dequeued_descs++;
> -		if (dequeued_cbs >= num)
> +		if (dequeued_ops >= num)
>   			break;
>   	}
>   
> @@ -4898,12 +4933,10 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
>   	q->sw_ring_tail += dequeued_descs;
>   
>   	/* Update enqueue stats */
> -	q_data->queue_stats.dequeued_count += dequeued_cbs;
> -
> -	return dequeued_cbs;
> +	q_data->queue_stats.dequeued_count += dequeued_ops;

Please keep the new line.

> +	return dequeued_ops;
>   }
>   
> -
>   /* Dequeue decode operations from ACC100 device. */
>   static uint16_t
>   acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,

Re: [PATCH v2 17/37] baseband/acc100: configure PMON control registers

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Adding back feature from ACC101.
> Expose the device status and add protection for corner cases.
> Enable performance monitor control registers.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/acc100_pf_enum.h | 52 +++++++++++++++++++++---
>   drivers/baseband/acc100/acc100_pmd.h     |  9 +++-
>   drivers/baseband/acc100/acc100_vf_enum.h |  6 +++
>   drivers/baseband/acc100/rte_acc100_pmd.c | 13 ++++++
>   4 files changed, 74 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/acc100_pf_enum.h b/drivers/baseband/acc100/acc100_pf_enum.h
> index 2fba667627..d6a37a4147 100644
> --- a/drivers/baseband/acc100/acc100_pf_enum.h
> +++ b/drivers/baseband/acc100/acc100_pf_enum.h
> @@ -14,6 +14,7 @@
>   enum {
>   	HWPfQmgrEgressQueuesTemplate          =  0x0007FE00,
>   	HWPfQmgrIngressAq                     =  0x00080000,
> +	HWPfAramStatus                        =  0x00810000,
>   	HWPfQmgrArbQAvail                     =  0x00A00010,
>   	HWPfQmgrArbQBlock                     =  0x00A00014,
>   	HWPfQmgrAqueueDropNotifEn             =  0x00A00024,
> @@ -127,6 +128,9 @@ enum {
>   	HWPfDmaConfigUnexpComplDataEn         =  0x00B808A8,
>   	HWPfDmaConfigUnexpComplDescrEn        =  0x00B808AC,
>   	HWPfDmaConfigPtoutOutEn               =  0x00B808B0,
> +	HWPfDmaClusterHangCtrl                =  0x00B80E00,
> +	HWPfDmaClusterHangThld                =  0x00B80E04,
> +	HWPfDmaStopAxiThreshold               =  0x00B80F3C,
>   	HWPfDmaFec5GulDescBaseLoRegVf         =  0x00B88020,
>   	HWPfDmaFec5GulDescBaseHiRegVf         =  0x00B88024,
>   	HWPfDmaFec5GulRespPtrLoRegVf          =  0x00B88028,
> @@ -328,11 +332,27 @@ enum {
>   	HwPfFecUl5g8IbDebugReg                =  0x00BC8200,
>   	HwPfFecUl5g8ObLlrDebugReg             =  0x00BC8204,
>   	HwPfFecUl5g8ObHarqDebugReg            =  0x00BC8208,
> -	HWPfFecDl5gCntrlReg                   =  0x00BCF000,
> -	HWPfFecDl5gI2MThreshReg               =  0x00BCF004,
> -	HWPfFecDl5gVersionReg                 =  0x00BCF100,
> -	HWPfFecDl5gFcwStatusReg               =  0x00BCF104,
> -	HWPfFecDl5gWarnReg                    =  0x00BCF108,
> +	HwPfFecDl5g0CntrlReg                  =  0x00BCD000,
> +	HwPfFecDl5g0I2MThreshReg              =  0x00BCD004,
> +	HwPfFecDl5g0VersionReg                =  0x00BCD100,
> +	HwPfFecDl5g0FcwStatusReg              =  0x00BCD104,
> +	HwPfFecDl5g0WarnReg                   =  0x00BCD108,
> +	HwPfFecDl5g0IbDebugReg                =  0x00BCD200,
> +	HwPfFecDl5g0ObDebugReg                =  0x00BCD204,
> +	HwPfFecDl5g1CntrlReg                  =  0x00BCE000,
> +	HwPfFecDl5g1I2MThreshReg              =  0x00BCE004,
> +	HwPfFecDl5g1VersionReg                =  0x00BCE100,
> +	HwPfFecDl5g1FcwStatusReg              =  0x00BCE104,
> +	HwPfFecDl5g1WarnReg                   =  0x00BCE108,
> +	HwPfFecDl5g1IbDebugReg                =  0x00BCE200,
> +	HwPfFecDl5g1ObDebugReg                =  0x00BCE204,
> +	HwPfFecDl5g2CntrlReg                  =  0x00BCF000,
> +	HwPfFecDl5g2I2MThreshReg              =  0x00BCF004,
> +	HwPfFecDl5g2VersionReg                =  0x00BCF100,
> +	HwPfFecDl5g2FcwStatusReg              =  0x00BCF104,
> +	HwPfFecDl5g2WarnReg                   =  0x00BCF108,
> +	HwPfFecDl5g2IbDebugReg                =  0x00BCF200,
> +	HwPfFecDl5g2ObDebugReg                =  0x00BCF204,
>   	HWPfFecUlVersionReg                   =  0x00BD0000,
>   	HWPfFecUlControlReg                   =  0x00BD0004,
>   	HWPfFecUlStatusReg                    =  0x00BD0008,
> @@ -345,6 +365,12 @@ enum {
>   	HWPfFecDlClusterStatusReg3            =  0x00BDF04C,
>   	HWPfFecDlClusterStatusReg4            =  0x00BDF050,
>   	HWPfFecDlClusterStatusReg5            =  0x00BDF054,
> +	HwPfWbbThreshold                      =  0x00C20000,
> +	HwPfWbbSpare                          =  0x00C20004,
> +	HwPfWbbDebugCtl                       =  0x00C20010,
> +	HwPfWbbDebug                          =  0x00C20014,
> +	HwPfWbbError                          =  0x00C20020,
> +	HwPfWbbErrorInjecti                   =  0x00C20024,
>   	HWPfChaFabPllPllrst                   =  0x00C40000,
>   	HWPfChaFabPllClk0                     =  0x00C40004,
>   	HWPfChaFabPllClk1                     =  0x00C40008,
> @@ -527,6 +553,10 @@ enum {
>   	HWPfHiDebugMemSnoopMsiFifo            =  0x00C841F8,
>   	HWPfHiDebugMemSnoopInputFifo          =  0x00C841FC,
>   	HWPfHiMsixMappingConfig               =  0x00C84200,
> +	HWPfHiErrInjectReg                    =  0x00C84204,
> +	HWPfHiErrStatusReg                    =  0x00C84208,
> +	HWPfHiErrMaskReg                      =  0x00C8420C,
> +	HWPfHiErrFatalReg                     =  0x00C84210,
>   	HWPfHiJunkReg                         =  0x00C8FF00,
>   	HWPfDdrUmmcVer                        =  0x00D00000,
>   	HWPfDdrUmmcCap                        =  0x00D00010,
> @@ -545,6 +575,7 @@ enum {
>   	HWPfDdrMpcPbw2                        =  0x00D00130,
>   	HWPfDdrMpcPbw1                        =  0x00D00140,
>   	HWPfDdrMpcPbw0                        =  0x00D00150,
> +	HwPfDdrUmmcEccErrInj                  =  0x00D00190,
>   	HWPfDdrMemoryInit                     =  0x00D00200,
>   	HWPfDdrMemoryInitDone                 =  0x00D00210,
>   	HWPfDdrMemInitPhyTrng0                =  0x00D00240,
> @@ -876,6 +907,7 @@ enum {
>   	HwPfPcieSupFence                      =  0x00D8086C,
>   	HwPfPcieSupMtcs                       =  0x00D80870,
>   	HwPfPcieSupStatsum                    =  0x00D809B8,
> +	HwPfPcieRomVersion                    =  0x00D80B0C,
>   	HwPfPciePcsDpStatus0                  =  0x00D81000,
>   	HwPfPciePcsDpControl0                 =  0x00D81004,
>   	HwPfPciePcsPmaStatusLane0             =  0x00D81008,
> @@ -1081,6 +1113,16 @@ enum {
>   	ACC100_PF_INT_QMGR_ERR = 13,
>   	ACC100_PF_INT_INT_REQ_OVERFLOW = 14,
>   	ACC100_PF_INT_APB_TIMEOUT = 15,
> +	ACC100_PF_INT_CORE_HANG = 16,
> +	ACC100_PF_INT_CLUSTER_HANG = 17,
> +	ACC100_PF_INT_WBB_ERROR = 18,
> +	ACC100_PF_INT_5G_EXTRAREAD = 24,
> +	ACC100_PF_INT_5G_READ_TIMEOUT = 25,
> +	ACC100_PF_INT_5G_ERROR = 26,
> +	ACC100_PF_INT_PCIE_ERROR = 27,
> +	ACC100_PF_INT_DDR_ERROR = 28,
> +	ACC100_PF_INT_MISC_ERROR = 29,
> +	ACC100_PF_INT_I2C = 30,
>   };
>   
>   #endif /* ACC100_PF_ENUM_H */
> diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
> index 20157e5886..27801767b7 100644
> --- a/drivers/baseband/acc100/acc100_pmd.h
> +++ b/drivers/baseband/acc100/acc100_pmd.h
> @@ -215,7 +215,8 @@ union acc100_dma_rsp_desc {
>   			timestampEn:1,
>   			iterCountFrac:8,
>   			iter_cnt:8,
> -			rsrvd3:6,
> +			harq_failure:1,
> +			rsrvd3:5,
>   			sdone:1,
>   			fdone:1;
>   		uint32_t add_info_0;
> @@ -508,6 +509,8 @@ struct acc100_registry_addr {
>   	unsigned int depth_log1_offset;
>   	unsigned int qman_group_func;
>   	unsigned int ddr_range;
> +	unsigned int pmon_ctrl_a;
> +	unsigned int pmon_ctrl_b;
>   };
>   
>   /* Structure holding registry addresses for PF */
> @@ -537,6 +540,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
>   	.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
>   	.qman_group_func = HWPfQmgrGrpFunction0,
>   	.ddr_range = HWPfDmaVfDdrBaseRw,
> +	.pmon_ctrl_a = HWPfPermonACntrlRegVf,
> +	.pmon_ctrl_b = HWPfPermonBCntrlRegVf,
>   };
>   
>   /* Structure holding registry addresses for VF */
> @@ -566,6 +571,8 @@ static const struct acc100_registry_addr vf_reg_addr = {
>   	.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
>   	.qman_group_func = HWVfQmgrGrpFunction0Vf,
>   	.ddr_range = HWVfDmaDdrBaseRangeRoVf,
> +	.pmon_ctrl_a = HWVfPmACntrlRegVf,
> +	.pmon_ctrl_b = HWVfPmBCntrlRegVf,
>   };
>   
>   /* Structure associated with each queue. */
> diff --git a/drivers/baseband/acc100/acc100_vf_enum.h b/drivers/baseband/acc100/acc100_vf_enum.h
> index b512af33fc..5807a9d0fd 100644
> --- a/drivers/baseband/acc100/acc100_vf_enum.h
> +++ b/drivers/baseband/acc100/acc100_vf_enum.h
> @@ -70,4 +70,10 @@ enum {
>   	ACC100_VF_INT_QMGR_AQ_OVERTHRESHOLD = 9,
>   };
>   
> +/* TIP PF2VF Comms */
> +enum {
> +	ACC100_VF2PF_STATUS_REQUEST = 0,
> +	ACC100_VF2PF_USING_VF = 1,
> +};
> +
>   #endif /* ACC100_VF_ENUM_H */
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index ea54152856..9c15797503 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -292,6 +292,13 @@ fetch_acc100_config(struct rte_bbdev *dev)
>   			acc100_conf->q_dl_5g.aq_depth_log2);
>   }
>   
> +static inline void
> +acc100_vf2pf(struct acc100_device *d, unsigned int payload)
> +{
> +	if (d->device_variant == ACC101_VARIANT)
> +		acc100_reg_write(d, HWVfHiVfToPfDbellVf, payload);
> +}
> +
>   static void
>   free_base_addresses(void **base_addrs, int size)
>   {
> @@ -646,6 +653,11 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
>   	/* Read the populated cfg from ACC100 registers */
>   	fetch_acc100_config(dev);
>   
> +	for (value = 0; value <= 2; value++) {
> +		acc100_reg_write(d, reg_addr->pmon_ctrl_a, value);
> +		acc100_reg_write(d, reg_addr->pmon_ctrl_b, value);
> +	}
> +
>   	/* Release AXI from PF */
>   	if (d->pf_device)
>   		acc100_reg_write(d, HWPfDmaAxiControl, 1);
> @@ -712,6 +724,7 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
>   
>   	/* Mark as configured properly */
>   	d->configured = true;
> +	acc100_vf2pf(d, ACC100_VF2PF_USING_VF);
>   
>   	rte_bbdev_log_debug(
>   			"ACC100 (%s) configured  sw_rings = %p, sw_rings_iova = %#"

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 18/37] baseband/acc100: implement configurable queue depth

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Implement new feature to make queue depth configurable based on decode
> or encode mode.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 12 +++++++++---
>   1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 9c15797503..460233a499 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -967,9 +967,15 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   	q->qgrp_id = (q_idx >> ACC100_GRP_ID_SHIFT) & 0xF;
>   	q->vf_id = (q_idx >> ACC100_VF_ID_SHIFT)  & 0x3F;
>   	q->aq_id = q_idx & 0xF;
> -	q->aq_depth = (conf->op_type ==  RTE_BBDEV_OP_TURBO_DEC) ?
> -			(1 << d->acc100_conf.q_ul_4g.aq_depth_log2) :
> -			(1 << d->acc100_conf.q_dl_4g.aq_depth_log2);
> +	q->aq_depth = 0;
> +	if (conf->op_type ==  RTE_BBDEV_OP_TURBO_DEC)
> +		q->aq_depth = (1 << d->acc100_conf.q_ul_4g.aq_depth_log2);
> +	else if (conf->op_type ==  RTE_BBDEV_OP_TURBO_ENC)
> +		q->aq_depth = (1 << d->acc100_conf.q_dl_4g.aq_depth_log2);
> +	else if (conf->op_type ==  RTE_BBDEV_OP_LDPC_DEC)
> +		q->aq_depth = (1 << d->acc100_conf.q_ul_5g.aq_depth_log2);
> +	else if (conf->op_type ==  RTE_BBDEV_OP_LDPC_ENC)
> +		q->aq_depth = (1 << d->acc100_conf.q_dl_5g.aq_depth_log2);
>   
>   	q->mmio_reg_enqueue = RTE_PTR_ADD(d->mmio_base,
>   			queue_offset(d->pf_device,

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 19/37] baseband/acc100: add queue stop operation

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Implement new feature queue stop operation.

Implement new feature to stop queue operation?

> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 58 ++++++++++++++++++++++++
>   1 file changed, 58 insertions(+)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 460233a499..deb2cb6d36 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -990,6 +990,63 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,
>   	return 0;
>   }
>   
> +static inline void
> +acc100_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,
> +		uint16_t index)
> +{
> +	if (op == NULL)
> +		return;
> +	if (op_type == RTE_BBDEV_OP_LDPC_DEC)
> +		rte_bbdev_log(INFO,

Info level might be a bit too much, maybe put this as debug log?

> +			"  Op 5GUL %d %d %d %d %d %d %d %d %d %d %d %d",
> +			index,
> +			op->ldpc_dec.basegraph, op->ldpc_dec.z_c,
> +			op->ldpc_dec.n_cb, op->ldpc_dec.q_m,
> +			op->ldpc_dec.n_filler, op->ldpc_dec.cb_params.e,
> +			op->ldpc_dec.op_flags, op->ldpc_dec.rv_index,
> +			op->ldpc_dec.iter_max, op->ldpc_dec.iter_count,
> +			op->ldpc_dec.harq_combined_input.length
> +			);
> +	else if (op_type == RTE_BBDEV_OP_LDPC_ENC) {
> +		struct rte_bbdev_enc_op *op_dl = (struct rte_bbdev_enc_op *) op;
> +		rte_bbdev_log(INFO,
> +			"  Op 5GDL %d %d %d %d %d %d %d %d %d",
> +			index,
> +			op_dl->ldpc_enc.basegraph, op_dl->ldpc_enc.z_c,
> +			op_dl->ldpc_enc.n_cb, op_dl->ldpc_enc.q_m,
> +			op_dl->ldpc_enc.n_filler, op_dl->ldpc_enc.cb_params.e,
> +			op_dl->ldpc_enc.op_flags, op_dl->ldpc_enc.rv_index
> +			);
> +	}
> +}
> +
> +static int
> +acc100_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
> +{
> +	struct acc100_queue *q;
> +	struct rte_bbdev_dec_op *op;
> +	uint16_t i;

New line here.

> +	q = dev->data->queues[queue_id].queue_private;
> +	rte_bbdev_log(INFO, "Queue Stop %d H/T/D %d %d %x OpType %d",
> +			queue_id, q->sw_ring_head, q->sw_ring_tail,
> +			q->sw_ring_depth, q->op_type);
> +	for (i = 0; i < q->sw_ring_depth; ++i) {
> +		op = (q->ring_addr + i)->req.op_addr;
> +		acc100_print_op(op, q->op_type, i);
> +	}
> +	/* ignore all operations in flight and clear counters */
> +	q->sw_ring_tail = q->sw_ring_head;
> +	q->aq_enqueued = 0;
> +	q->aq_dequeued = 0;
> +	dev->data->queues[queue_id].queue_stats.enqueued_count = 0;
> +	dev->data->queues[queue_id].queue_stats.dequeued_count = 0;
> +	dev->data->queues[queue_id].queue_stats.enqueue_err_count = 0;
> +	dev->data->queues[queue_id].queue_stats.dequeue_err_count = 0;
> +	dev->data->queues[queue_id].queue_stats.enqueue_warn_count = 0;
> +	dev->data->queues[queue_id].queue_stats.dequeue_warn_count = 0;

New line here.

> +	return 0;
> +}
> +
>   /* Release ACC100 queue */
>   static int
>   acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)
> @@ -1184,6 +1241,7 @@ static const struct rte_bbdev_ops acc100_bbdev_ops = {
>   	.info_get = acc100_dev_info_get,
>   	.queue_setup = acc100_queue_setup,
>   	.queue_release = acc100_queue_release,
> +	.queue_stop = acc100_queue_stop,
>   	.queue_intr_enable = acc100_queue_intr_enable,
>   	.queue_intr_disable = acc100_queue_intr_disable
>   };

With minor comments fixed:
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 20/37] baseband/acc100: check turbo dec/enc input

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add NULL check for the turbo decoder and encoder input length.
> 

Looks like a fix, please add Fixes tag and cc stable.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 23 ++++++++++++++++++-----
>   1 file changed, 18 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index deb2cb6d36..70a29f92a1 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -2398,6 +2398,11 @@ validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
>   		return -1;
>   	}
>   
> +	if (turbo_enc->input.length == 0) {
> +		rte_bbdev_log(ERR, "input length null");
> +		return -1;
> +	}
> +
>   	if (turbo_enc->code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
>   		tb = &turbo_enc->tb_params;
>   		if ((tb->k_neg < RTE_BBDEV_TURBO_MIN_CB_SIZE
> @@ -2417,11 +2422,12 @@ validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q)
>   					RTE_BBDEV_TURBO_MAX_CB_SIZE);
>   			return -1;
>   		}
> -		if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1))
> +		if (tb->c_neg > 0) {
>   			rte_bbdev_log(ERR,
> -					"c_neg (%u) is out of range 0 <= value <= %u",
> -					tb->c_neg,
> -					RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1);
> +					"c_neg (%u) expected to be null",
> +					tb->c_neg);
> +			return -1;
> +		}
>   		if (tb->c < 1 || tb->c > RTE_BBDEV_TURBO_MAX_CODE_BLOCKS) {
>   			rte_bbdev_log(ERR,
>   					"c (%u) is out of range 1 <= value <= %u",
> @@ -3320,6 +3326,11 @@ validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
>   		return -1;
>   	}
>   
> +	if (turbo_dec->input.length == 0) {
> +		rte_bbdev_log(ERR, "input length null");
> +		return -1;
> +	}
> +
>   	if (turbo_dec->code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {
>   		tb = &turbo_dec->tb_params;
>   		if ((tb->k_neg < RTE_BBDEV_TURBO_MIN_CB_SIZE
> @@ -3340,11 +3351,13 @@ validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q)
>   					RTE_BBDEV_TURBO_MAX_CB_SIZE);
>   			return -1;
>   		}
> -		if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1))
> +		if (tb->c_neg > (RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1)) {
>   			rte_bbdev_log(ERR,
>   					"c_neg (%u) is out of range 0 <= value <= %u",
>   					tb->c_neg,
>   					RTE_BBDEV_TURBO_MAX_CODE_BLOCKS - 1);
> +					return -1;
> +		}
>   		if (tb->c < 1 || tb->c > RTE_BBDEV_TURBO_MAX_CODE_BLOCKS) {
>   			rte_bbdev_log(ERR,
>   					"c (%u) is out of range 1 <= value <= %u",

With Fixes tag:
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 21/37] baseband/acc100: check for unlikely operation vals

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add unlikely checks for NULL operation values.

Same as for patch 20, this is a fix.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 70a29f92a1..ea850e2d7f 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3148,6 +3148,10 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   	r = op->turbo_enc.tb_params.r;
>   
>   	while (mbuf_total_left > 0 && r < c) {
> +		if (unlikely(input == 0)) {
> +			rte_bbdev_log(ERR, "Not enough input segment");
> +			return -EINVAL;
> +		}
>   		seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
>   		/* Set up DMA descriptor */
>   		desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs)
> @@ -4491,6 +4495,8 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
>   		}
>   		enqueued_cbs += ret;
>   	}
> +	if (unlikely(enqueued_cbs == 0))
> +		return 0; /* Nothing to enqueue */
>   
>   	acc100_dma_enqueue(q, enqueued_cbs, &q_data->queue_stats);
>   
> @@ -5051,6 +5057,8 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
>   	for (i = 0; i < dequeue_num; ++i) {
>   		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
>   			& q->sw_ring_wrap_mask))->req.op_addr;
> +		if (unlikely(op == NULL))
> +			break;
>   		if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   			ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
>   					&aq_dequeued);
> @@ -5096,6 +5104,8 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
>   	for (i = 0; i < dequeue_num; ++i) {
>   		op = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)
>   			& q->sw_ring_wrap_mask))->req.op_addr;
> +		if (unlikely(op == NULL))
> +			break;
>   		if (op->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
>   			ret = dequeue_dec_one_op_tb(q, &ops[i], dequeued_cbs,
>   					&aq_dequeued);

With commit message ammended:
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 22/37] baseband/acc100: enforce additional check on FCW

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Enforce additional check on Frame Control Word validity and add stronger
> alignment for decompression mode.

As on previous patches, it is a fix and so should be marked
appropriately and moved at the beginning of the series.

> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 40 ++++++++++++++++++++++--
>   1 file changed, 37 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index ea850e2d7f..d67495ac52 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1508,6 +1508,20 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   		fcw->hcin_offset = 0;
>   		fcw->hcin_size1 = 0;
>   	}
> +	/* Enforce additional check on FCW validity */
> +	uint32_t max_hc_in = RTE_ALIGN_CEIL(fcw->ncb - fcw->nfiller, 64);

Don't mix declaration and code.

> +	if ((fcw->hcin_size0 > max_hc_in) ||
> +			(fcw->hcin_size1 + fcw->hcin_offset > max_hc_in) ||
> +			((fcw->hcin_size0 > fcw->hcin_offset) &&
> +			(fcw->hcin_size1 != 0))) {
> +		rte_bbdev_log(ERR, " Invalid FCW : HCIn %d %d %d, Ncb %d F %d",
> +				fcw->hcin_size0, fcw->hcin_size1,
> +				fcw->hcin_offset,
> +				fcw->ncb, fcw->nfiller);
> +		/* Disable HARQ input in that case to carry forward */
> +		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
> +		fcw->hcin_en = 0;
> +	}
>   
>   	fcw->itmax = op->ldpc_dec.iter_max;
>   	fcw->itstop = check_bit(op->ldpc_dec.op_flags,
> @@ -1536,10 +1550,19 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   		k0_p = (fcw->k0 > parity_offset) ?
>   				fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
>   		ncb_p = fcw->ncb - op->ldpc_dec.n_filler;
> -		l = k0_p + fcw->rm_e;
> +		l = RTE_MIN(k0_p + fcw->rm_e, INT16_MAX);
>   		harq_out_length = (uint16_t) fcw->hcin_size0;
> -		harq_out_length = RTE_MIN(RTE_MAX(harq_out_length, l), ncb_p);
> -		harq_out_length = (harq_out_length + 0x3F) & 0xFFC0;
> +		harq_out_length = RTE_MAX(harq_out_length, l);
> +		/* Stronger alignment when in compression mode */
> +		if (fcw->hcout_comp_mode > 0)
> +			harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 256);

A define would make sense instead of raw value

> +		/* Cannot exceed the pruned Ncb circular buffer */
> +		harq_out_length = RTE_MIN(harq_out_length, ncb_p);
> +		/* Alignment on next 64B */
> +		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
> +		/* Stronger alignment when in compression mode enforced again */
> +		if (fcw->hcout_comp_mode > 0)
> +			harq_out_length = RTE_ALIGN_FLOOR(harq_out_length, 256);
>   		if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) &&
>   				harq_prun) {
>   			fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
> @@ -1550,6 +1573,13 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   			fcw->hcout_size1 = 0;
>   			fcw->hcout_offset = 0;
>   		}
> +		if (fcw->hcout_size0 == 0) {
> +			rte_bbdev_log(ERR, " Invalid FCW : HCout %d",
> +				fcw->hcout_size0);
> +			op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE;
> +			fcw->hcout_en = 0;
> +		}
> +
>   		harq_layout[harq_index].offset = fcw->hcout_offset;
>   		harq_layout[harq_index].size0 = fcw->hcout_size0;
>   	} else {
> @@ -1591,6 +1621,10 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   		/* Disable HARQ input in that case to carry forward */
>   		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
>   	}
> +	if (unlikely(fcw->rm_e == 0)) {
> +		rte_bbdev_log(WARNING, "Null E input provided");
> +		fcw->rm_e = 2;
> +	}
>   
>   	fcw->hcin_en = check_bit(op->ldpc_dec.op_flags,
>   			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);

Re: [PATCH v2 23/37] baseband/acc100: update uplink CB input length

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Use the FCW E parameter for rate matching as the code block input
> length.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index d67495ac52..0389768a6f 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -2163,7 +2163,7 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
>   		crc24_overlap = 24;
>   
>   	/* Compute some LDPC BG lengths */
> -	input_length = dec->cb_params.e;
> +	input_length = fcw->rm_e;
>   	if (check_bit(op->ldpc_dec.op_flags,
>   			RTE_BBDEV_LDPC_LLR_COMPRESSION))
>   		input_length = (input_length * 3 + 3) / 4;

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 24/37] baseband/acc100: rename ldpc encode function arg

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Rename total_enqueued_cbs to total_enqueued_descs in the
> enqueue_ldpc_enc_n_op_cb function. No functional impact.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 10 ++++++----
>   1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 0389768a6f..a302905c78 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -2967,10 +2967,13 @@ enqueue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   	return 1;
>   }
>   
> -/* Enqueue one encode operations for ACC100 device in CB mode */
> +
> +/* Enqueue one encode operations for ACC100 device in CB mode
> + * multiplexed on the same descriptor
> + */
>   static inline int
>   enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
> -		uint16_t total_enqueued_cbs, int16_t num)
> +		uint16_t total_enqueued_descs, int16_t num)
>   {
>   	union acc100_dma_desc *desc = NULL;
>   	uint32_t out_length;
> @@ -2980,14 +2983,13 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
>   	struct rte_bbdev_op_ldpc_enc *enc = &ops[0]->ldpc_enc;
>   
>   #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
> -	/* Validate op structure */
>   	if (validate_ldpc_enc_op(ops[0], q) == -1) {
>   		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
>   
> -	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
> +	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs)

Take the opportunity to move the declaration before the code.

>   			& q->sw_ring_wrap_mask);
>   	desc = q->ring_addr + desc_idx;
>   	acc100_fcw_le_fill(ops[0], &desc->req.fcw_le, num, 0);

With this small change handled:

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 25/37] baseband/acc100: update log messages

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add extra values for some log messages. No functional impact.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 14 +++++++++-----
>   1 file changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index a302905c78..8898147239 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1170,6 +1170,7 @@ acc100_dev_info_get(struct rte_bbdev *dev,
>   
>   	/* Read and save the populated config from ACC100 registers */
>   	fetch_acc100_config(dev);
> +	/* Check the status of device */
>   	dev_info->device_status = RTE_BBDEV_DEV_NOT_SUPPORTED;
>   
>   	/* Expose number of queues */
> @@ -3244,7 +3245,7 @@ enqueue_ldpc_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
>   {
>   #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE
>   	if (validate_ldpc_enc_op(op, q) == -1) {
> -		rte_bbdev_log(ERR, "LDPC encoder validation failed");
> +		rte_bbdev_log(ERR, "LDPC encoder validation rejected");
>   		return -EINVAL;
>   	}
>   #endif
> @@ -4167,8 +4168,9 @@ acc100_enqueue_status(struct rte_bbdev_queue_data *q_data,
>   {
>   	q_data->enqueue_status = status;
>   	q_data->queue_stats.enqueue_status_count[status]++;
> -	rte_bbdev_log(WARNING, "Enqueue Status: %d %#"PRIx64"",
> -			status,
> +
> +	rte_bbdev_log(WARNING, "Enqueue Status: %s %#"PRIx64"",
> +			rte_bbdev_enqueue_status_str(status),
>   			q_data->queue_stats.enqueue_status_count[status]);
>   }
>   
> @@ -4863,6 +4865,7 @@ dequeue_ldpc_dec_one_op_cb(struct rte_bbdev_queue_data *q_data,
>   		return -1;
>   
>   	rsp.val = atom_desc.rsp.val;
> +	rte_bbdev_log_debug("Resp. desc %p: %x\n", desc, rsp.val);
>   
>   	/* Dequeue */
>   	op = desc->req.op_addr;
> @@ -4945,8 +4948,9 @@ dequeue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op **ref_op,
>   		atom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,
>   				__ATOMIC_RELAXED);
>   		rsp.val = atom_desc.rsp.val;
> -		rte_bbdev_log_debug("Resp. desc %p: %x", desc,
> -				rsp.val);
> +		rte_bbdev_log_debug("Resp. desc %p: %x r %d c %d\n",
> +				desc, rsp.val,
> +				cb_idx, cbs_in_tb);
>   
>   		op->status |= ((rsp.input_err)
>   				? (1 << RTE_BBDEV_DATA_ERROR) : 0);

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 26/37] baseband/acc100: allocate ring/queue mem when NULL

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Allocate info ring, tail pointers and HARQ layout memory for a device
> only if it hasn't already been allocated.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 8898147239..36455d5338 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -582,7 +582,8 @@ allocate_info_ring(struct rte_bbdev *dev)
>   	else
>   		reg_addr = &vf_reg_addr;
>   	/* Allocate InfoRing */
> -	d->info_ring = rte_zmalloc_socket("Info Ring",
> +	if (d->info_ring == NULL)
> +		d->info_ring = rte_zmalloc_socket("Info Ring",
>   			ACC100_INFO_RING_NUM_ENTRIES *
>   			sizeof(*d->info_ring), RTE_CACHE_LINE_SIZE,
>   			dev->data->socket_id);
> @@ -679,7 +680,8 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
>   	acc100_reg_write(d, reg_addr->ring_size, value);
>   
>   	/* Configure tail pointer for use when SDONE enabled */
> -	d->tail_ptrs = rte_zmalloc_socket(
> +	if (d->tail_ptrs == NULL)
> +		d->tail_ptrs = rte_zmalloc_socket(
>   			dev->device->driver->name,
>   			ACC100_NUM_QGRPS * ACC100_NUM_AQS * sizeof(uint32_t),
>   			RTE_CACHE_LINE_SIZE, socket_id);
> @@ -711,7 +713,8 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
>   		/* Continue */
>   	}
>   
> -	d->harq_layout = rte_zmalloc_socket("HARQ Layout",
> +	if (d->harq_layout == NULL)
> +		d->harq_layout = rte_zmalloc_socket("HARQ Layout",
>   			ACC100_HARQ_LAYOUT * sizeof(*d->harq_layout),
>   			RTE_CACHE_LINE_SIZE, dev->data->socket_id);
>   	if (d->harq_layout == NULL) {

It looks like a fix (memory leak without this patch).
Please mark it as so.

Re: [PATCH v2 27/37] baseband/acc100: store FCW from first CB descriptor

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Store the descriptor from the first code block from a transport block.
> Copy the LDPC FCW from the first descriptor into the rest of the CBs in
> that TB.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 36455d5338..69de204293 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3872,6 +3872,7 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   		uint16_t total_enqueued_cbs, uint8_t cbs_in_tb)
>   {
>   	union acc100_dma_desc *desc = NULL;
> +	union acc100_dma_desc *desc_first = NULL;

Minor nit, but NULL assignment looks unncessary.

>   	int ret;
>   	uint8_t r, c;
>   	uint32_t in_offset, h_out_offset,
> @@ -3890,6 +3891,7 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   	uint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)
>   			& q->sw_ring_wrap_mask);
>   	desc = q->ring_addr + desc_idx;
> +	desc_first = desc;
>   	uint64_t fcw_offset = (desc_idx << 8) + ACC100_DESC_FCW_OFFSET;
>   	union acc100_harq_layout_data *harq_layout = q->d->harq_layout;
>   	q->d->fcw_ld_fill(op, &desc->req.fcw_ld, harq_layout);
> @@ -3915,6 +3917,8 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   				& q->sw_ring_wrap_mask);
>   		desc->req.data_ptrs[0].address = q->ring_addr_iova + fcw_offset;
>   		desc->req.data_ptrs[0].blen = ACC100_FCW_LD_BLEN;
> +		rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld,
> +				ACC100_FCW_LD_BLEN);
>   		ret = acc100_dma_desc_ld_fill(op, &desc->req, &input,
>   				h_output, &in_offset, &h_out_offset,
>   				&h_out_length,

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 28/37] baseband/acc100: make desc optimization optional

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Add ACC100_DESC_OPTIMIZATION flag to enable muxing of encode operations
> with common FCW.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 69de204293..7b23529ec3 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -4569,9 +4569,10 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
>   			break;
>   		}
>   		avail -= 1;
> -
> +#ifdef ACC100_DESC_OPTIMIZATION
>   		if (i > 0)
>   			same_op = cmp_ldpc_dec_op(&ops[i-1]);
> +#endif

Nack, don't put optimizations under #ifdefs as I explained on an earlier
patch.

>   		rte_bbdev_log(INFO, "Op %d %d %d %d %d %d %d %d %d %d %d %d\n",
>   			i, ops[i]->ldpc_dec.op_flags, ops[i]->ldpc_dec.rv_index,
>   			ops[i]->ldpc_dec.iter_max, ops[i]->ldpc_dec.iter_count,

Re: [PATCH v2 29/37] baseband/acc100: update device info

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Remove unused capabilities, use dummy operation as start count for
> number of queues.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 5 ++---
>   1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 7b23529ec3..4ce4c9d218 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1079,7 +1079,6 @@ acc100_dev_info_get(struct rte_bbdev *dev,
>   {
>   	struct acc100_device *d = dev->data->dev_private;
>   	int i;
> -
>   	static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
>   		{
>   			.type = RTE_BBDEV_OP_TURBO_DEC,
> @@ -1091,7 +1090,6 @@ acc100_dev_info_get(struct rte_bbdev *dev,
>   					RTE_BBDEV_TURBO_EARLY_TERMINATION |
>   					RTE_BBDEV_TURBO_DEC_INTERRUPTS |
>   					RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |
> -					RTE_BBDEV_TURBO_MAP_DEC |
>   					RTE_BBDEV_TURBO_DEC_TB_CRC_24B_KEEP |
>   					RTE_BBDEV_TURBO_DEC_CRC_24B_DROP |
>   					RTE_BBDEV_TURBO_DEC_SCATTER_GATHER,
> @@ -1186,12 +1184,13 @@ acc100_dev_info_get(struct rte_bbdev *dev,
>   			d->acc100_conf.q_ul_5g.num_qgroups;
>   	dev_info->num_queues[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_aqs_per_groups *
>   			d->acc100_conf.q_dl_5g.num_qgroups;
> +	dev_info->num_queues[RTE_BBDEV_OP_FFT] = 0;
>   	dev_info->queue_priority[RTE_BBDEV_OP_TURBO_DEC] = d->acc100_conf.q_ul_4g.num_qgroups;
>   	dev_info->queue_priority[RTE_BBDEV_OP_TURBO_ENC] = d->acc100_conf.q_dl_4g.num_qgroups;
>   	dev_info->queue_priority[RTE_BBDEV_OP_LDPC_DEC] = d->acc100_conf.q_ul_5g.num_qgroups;
>   	dev_info->queue_priority[RTE_BBDEV_OP_LDPC_ENC] = d->acc100_conf.q_dl_5g.num_qgroups;
>   	dev_info->max_num_queues = 0;
> -	for (i = RTE_BBDEV_OP_TURBO_DEC; i < RTE_BBDEV_OP_LDPC_ENC; i++)
> +	for (i = RTE_BBDEV_OP_NONE; i <= RTE_BBDEV_OP_LDPC_ENC; i++)
>   		dev_info->max_num_queues += dev_info->num_queues[i];
>   	dev_info->queue_size_lim = ACC100_MAX_QUEUE_DEPTH;
>   	dev_info->hardware_accelerated = true;

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 30/37] baseband/acc100: reduce input length for CRC24B

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Input length should be reduced only for CRC24B.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 4ce4c9d218..72e46953ee 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1978,8 +1978,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
>   
>   	K = (enc->basegraph == 1 ? 22 : 10) * enc->z_c;
>   	in_length_in_bits = K - enc->n_filler;
> -	if ((enc->op_flags & RTE_BBDEV_LDPC_CRC_24A_ATTACH) ||
> -			(enc->op_flags & RTE_BBDEV_LDPC_CRC_24B_ATTACH))
> +	if (enc->op_flags & RTE_BBDEV_LDPC_CRC_24B_ATTACH)
>   		in_length_in_bits -= 24;
>   	in_length_in_bytes = in_length_in_bits >> 3;
>   

It looks like a fix, if so should be tagged as one.

Re: [PATCH v2 31/37] baseband/acc100: fix clearing PF IR outside handler

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Clearing of PF info ring outside of handler may cause interrupt to be
> missed.
> A condition in the ACC100 PMD implementation may cause an interrupt
> functional handler call to be missed due to related bit being cleared
> when checking PF info ring status.
> 
> Fixes: 06531464151 ("baseband/acc100: support interrupt")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 7 ++++---
>   1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 72e46953ee..4596f5df42 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -437,11 +437,12 @@ acc100_check_ir(struct acc100_device *acc100_dev)
>   	while (ring_data->valid) {
>   		if ((ring_data->int_nb < ACC100_PF_INT_DMA_DL_DESC_IRQ) || (
>   				ring_data->int_nb >
> -				ACC100_PF_INT_DMA_DL5G_DESC_IRQ))
> +				ACC100_PF_INT_DMA_DL5G_DESC_IRQ)) {
>   			rte_bbdev_log(WARNING, "InfoRing: ITR:%d Info:0x%x",
>   				ring_data->int_nb, ring_data->detailed_info);
> -		/* Initialize Info Ring entry and move forward */
> -		ring_data->val = 0;
> +			/* Initialize Info Ring entry and move forward */
> +			ring_data->val = 0;
> +		}
>   		info_ring_head++;
>   		ring_data = acc100_dev->info_ring +
>   				(info_ring_head & ACC100_INFO_RING_MASK);

Please moved it at the beginning of the series.

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 32/37] baseband/acc100: fix debug print for LDPC FCW

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Print full size of FCW LDPC structure on debug messages.
> This is just a cosmetic fix, no need to fix on previous code base.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 4596f5df42..0e72bc1f57 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -3856,7 +3856,7 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
>   
>   #ifdef RTE_LIBRTE_BBDEV_DEBUG
>   	rte_memdump(stderr, "FCW", &desc->req.fcw_ld,
> -			sizeof(desc->req.fcw_ld) - 8);
> +			sizeof(desc->req.fcw_ld));
>   	rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
>   #endif
>   

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 33/37] baseband/acc100: set device min alignment to 1

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Historical mistakes, there should be no 64B alignment requirement for
> the buffer being processed. Any 1B alignment is sufficient.
> 
> Fixes: 9200ffa5cd5 ("baseband/acc100: add info get function")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 0e72bc1f57..461ebe67cd 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1201,7 +1201,7 @@ acc100_dev_info_get(struct rte_bbdev *dev,
>   			d->acc100_conf.q_ul_4g.num_qgroups - 1;
>   	dev_info->default_queue_conf = default_queue_conf;
>   	dev_info->cpu_flag_reqs = NULL;
> -	dev_info->min_alignment = 64;
> +	dev_info->min_alignment = 1;
>   	dev_info->capabilities = bbdev_capabilities;
>   #ifdef ACC100_EXT_MEM
>   	dev_info->harq_buffer_size = d->ddr_size;

Move it at the beginning of the series.

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 34/37] baseband/acc100: update meson file sdk dependency

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Update meson files with FlexRAN SDK dependency.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/meson.build | 21 +++++++++++++++++++++
>   1 file changed, 21 insertions(+)
> 
> diff --git a/drivers/baseband/acc100/meson.build b/drivers/baseband/acc100/meson.build
> index 9a1a3b8b07..3b934a25ca 100644
> --- a/drivers/baseband/acc100/meson.build
> +++ b/drivers/baseband/acc100/meson.build
> @@ -1,6 +1,27 @@
>   # SPDX-License-Identifier: BSD-3-Clause
>   # Copyright(c) 2020 Intel Corporation
>   
> +# check for FlexRAN SDK libraries
> +dep_dec5g = dependency('flexran_sdk_ldpc_decoder_5gnr', required: false)
> +
> +if dep_dec5g.found()
> +    ext_deps += cc.find_library('libstdc++', required: true)
> +    ext_deps += cc.find_library('libirc', required: true)
> +    ext_deps += cc.find_library('libimf', required: true)
> +    ext_deps += cc.find_library('libipps', required: true)
> +    ext_deps += cc.find_library('libsvml', required: true)
> +    ext_deps += dep_dec5g
> +    ext_deps += dependency('flexran_sdk_ldpc_encoder_5gnr', required: true)
> +    ext_deps += dependency('flexran_sdk_LDPC_ratematch_5gnr', required: true)
> +    ext_deps += dependency('flexran_sdk_rate_dematching_5gnr', required: true)
> +    ext_deps += dependency('flexran_sdk_turbo', required: true)
> +    ext_deps += dependency('flexran_sdk_crc', required: true)
> +    ext_deps += dependency('flexran_sdk_rate_matching', required: true)
> +    ext_deps += dependency('flexran_sdk_common', required: true)
> +    cflags += ['-DRTE_BBDEV_SDK_AVX2']
> +    cflags += ['-DRTE_BBDEV_SDK_AVX512']
> +endif
> +
>   deps += ['bbdev', 'bus_vdev', 'ring', 'pci', 'bus_pci']
>   
>   sources = files('rte_acc100_pmd.c')

I think we should improve build coverage with stubs.

For example, we could stub bblib_rate_dematching_5gnr(), and so all the
code under RTE_BBDEV_SDK_AVX512 ifdef in enqueue_ldpc_dec_one_op_cb()
would be built.

It would even open the possibility to have open-source implementations
of these libraries if community feel the need.

What do you think?

Thanks,
Maxime

Re: [PATCH v2 34/37] baseband/acc100: update meson file sdk dependency

[Thomas Monjalon]

15/09/2022 12:31, Maxime Coquelin:
> 
> On 8/20/22 04:31, Hernan Vargas wrote:
> > Update meson files with FlexRAN SDK dependency.

There is no reason for this commit.
If the reason is that you need these dependencies for some features,
it is better to introduce the dependency when you use it.
Patches should be split per features, not per file.

> > Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> > ---
> >   drivers/baseband/acc100/meson.build | 21 +++++++++++++++++++++
> >   1 file changed, 21 insertions(+)
> > 
> > diff --git a/drivers/baseband/acc100/meson.build b/drivers/baseband/acc100/meson.build
> > index 9a1a3b8b07..3b934a25ca 100644
> > --- a/drivers/baseband/acc100/meson.build
> > +++ b/drivers/baseband/acc100/meson.build
> > @@ -1,6 +1,27 @@
> >   # SPDX-License-Identifier: BSD-3-Clause
> >   # Copyright(c) 2020 Intel Corporation
> >   
> > +# check for FlexRAN SDK libraries
> > +dep_dec5g = dependency('flexran_sdk_ldpc_decoder_5gnr', required: false)
> > +
> > +if dep_dec5g.found()
> > +    ext_deps += cc.find_library('libstdc++', required: true)
> > +    ext_deps += cc.find_library('libirc', required: true)
> > +    ext_deps += cc.find_library('libimf', required: true)
> > +    ext_deps += cc.find_library('libipps', required: true)
> > +    ext_deps += cc.find_library('libsvml', required: true)
> > +    ext_deps += dep_dec5g
> > +    ext_deps += dependency('flexran_sdk_ldpc_encoder_5gnr', required: true)
> > +    ext_deps += dependency('flexran_sdk_LDPC_ratematch_5gnr', required: true)
> > +    ext_deps += dependency('flexran_sdk_rate_dematching_5gnr', required: true)
> > +    ext_deps += dependency('flexran_sdk_turbo', required: true)
> > +    ext_deps += dependency('flexran_sdk_crc', required: true)
> > +    ext_deps += dependency('flexran_sdk_rate_matching', required: true)
> > +    ext_deps += dependency('flexran_sdk_common', required: true)
> > +    cflags += ['-DRTE_BBDEV_SDK_AVX2']
> > +    cflags += ['-DRTE_BBDEV_SDK_AVX512']
> > +endif
> > +
> >   deps += ['bbdev', 'bus_vdev', 'ring', 'pci', 'bus_pci']
> >   
> >   sources = files('rte_acc100_pmd.c')
> 
> I think we should improve build coverage with stubs.
> 
> For example, we could stub bblib_rate_dematching_5gnr(), and so all the
> code under RTE_BBDEV_SDK_AVX512 ifdef in enqueue_ldpc_dec_one_op_cb()
> would be built.

Yes, having code built even when the proprietary dependency is missing,
would help to track some issues.

> It would even open the possibility to have open-source implementations
> of these libraries if community feel the need.
> 
> What do you think?
> 
> Thanks,
> Maxime

Re: [PATCH v2 06/37] baseband/acc100: add default e value for FCW

[Thomas Monjalon]

20/08/2022 04:31, Hernan Vargas:
> Refactor frame control word LDPC encoder fill function to take a default e
> value as a parameter. No functional impact.

Excuse my ignorance, what is "e"?
Is there a way to describe or name it differently?

Re: [PATCH v2 35/37] baseband/acc100: add protection for NULL HARQ input

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> It is possible to cause an invalid HW operation in case the user
> provides the BBDEV API and HARQ operation with input enabled and zero

Not sure, but s/and/a/?

This is again a fix, and should be tagged appropriately.

> input. Adding protection for that case.
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index 461ebe67cd..be4c1d07ed 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -1457,6 +1457,14 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
>   						op->ldpc_dec.tb_params.ea :
>   						op->ldpc_dec.tb_params.eb;
>   
> +	if (unlikely(check_bit(op->ldpc_dec.op_flags,
> +			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE) &&
> +			(op->ldpc_dec.harq_combined_input.length == 0))) {
> +		rte_bbdev_log(WARNING, "Null HARQ input size provided");
> +		/* Disable HARQ input in that case to carry forward */
> +		op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
> +	}
> +
>   	fcw->hcin_en = check_bit(op->ldpc_dec.op_flags,
>   			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);
>   	fcw->hcout_en = check_bit(op->ldpc_dec.op_flags,

Re: [PATCH v2 36/37] baseband/acc100: make HARQ layout memory 4GB

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> HARQ layout memory should be 4GB instead of 2GB.
> 
> Fixes: 4cf90079797 ("baseband/acc100: add HW register definitions")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/acc100_pmd.h | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/baseband/acc100/acc100_pmd.h b/drivers/baseband/acc100/acc100_pmd.h
> index 27801767b7..f9ccb1ea8e 100644
> --- a/drivers/baseband/acc100/acc100_pmd.h
> +++ b/drivers/baseband/acc100/acc100_pmd.h
> @@ -61,8 +61,10 @@
>   #define ACC100_SIZE_64MBYTE            (64*1024*1024)
>   /* Number of elements in an Info Ring */
>   #define ACC100_INFO_RING_NUM_ENTRIES   1024
> -/* Number of elements in HARQ layout memory */
> -#define ACC100_HARQ_LAYOUT             (64*1024*1024)
> +/* Number of elements in HARQ layout memory
> + * 128M x 32kB = 4GB addressable memory
> + */
> +#define ACC100_HARQ_LAYOUT             (128*1024*1024)
>   /* Assume offset for HARQ in memory */
>   #define ACC100_HARQ_OFFSET             (32*1024)
>   #define ACC100_HARQ_OFFSET_SHIFT       15

Please move it to the top of the series for next revision.

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

Re: [PATCH v2 37/37] baseband/acc100: reset pointer after rte_free

[Maxime Coquelin]

On 8/20/22 04:31, Hernan Vargas wrote:
> Set local pointer to NULL after rte_free.
> This needs to be set explicitly since logic may check for null pointers.
> 
> Fixes: 060e7672930 ("baseband/acc100: add queue configuration")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> ---
>   drivers/baseband/acc100/rte_acc100_pmd.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
> index be4c1d07ed..7755d6402f 100644
> --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> @@ -793,6 +793,9 @@ acc100_dev_close(struct rte_bbdev *dev)
>   		rte_free(d->sw_rings_base);
>   		rte_free(d->harq_layout);
>   		d->sw_rings_base = NULL;
> +		d->tail_ptrs = NULL;
> +		d->info_ring = NULL;
> +		d->harq_layout = NULL;
>   	}
>   	/* Ensure all in flight HW transactions are completed */
>   	usleep(ACC100_LONG_WAIT);

Please move it to the top of the series as this is a fix.

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime

RE: [PATCH v2 13/37] baseband/acc10x: limit cases for HARQ pruning

[Chautru, Nicolas]

Hi Maxime, 

> -----Original Message-----
> From: Maxime Coquelin <maxime.coquelin@redhat.com>
> Sent: Thursday, September 15, 2022 12:37 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>; dev@dpdk.org;
> gakhil@marvell.com; trix@redhat.com
> Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Subject: Re: [PATCH v2 13/37] baseband/acc10x: limit cases for HARQ
> pruning
> 
> 
> 
> On 8/20/22 04:31, Hernan Vargas wrote:
> > Add flag ACC101_HARQ_PRUNING_OPTIMIZATION to limit cases when
> HARQ
> > pruning is valid.
> >
> > Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> > ---
> >   drivers/baseband/acc100/rte_acc100_pmd.c | 52
> +++++++++++++++++++-----
> >   1 file changed, 41 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
> > b/drivers/baseband/acc100/rte_acc100_pmd.c
> > index 81bae4d695..e47f7d68c2 100644
> > --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> > +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> > @@ -1370,17 +1370,23 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op
> *op, struct acc100_fcw_ld *fcw,
> >   	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
> >   #ifdef ACC100_EXT_MEM
> >   	/* Limit cases when HARQ pruning is valid */
> > +#ifdef ACC100_HARQ_PRUNING_OPTIMIZATION
> >   	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
> > -			ACC100_HARQ_OFFSET) == 0) &&
> > -			(op->ldpc_dec.harq_combined_output.offset <=
> UINT16_MAX
> > -			* ACC100_HARQ_OFFSET);
> > +			ACC100_HARQ_OFFSET) == 0);
> > +#endif
> 
> Optimizations should not be put under #ifdefs, it will become a testing hell
> otherwise. CI will have to run as many builds as there are possible
> combinations, which is not sustainable.
> 
> Even if not part of this patch, the "#ifdef ACC100_EXT_MEM" should also be
> removed.

With regards to the ACC100_EXT_MEM, this compilation switch is to be able to use the device using standard memory (not the dedicated one on the card).
I believe there is value notably for debug purpose for user to be able to rebuild with different capability (more like a DEBUG purpose). I understand that only the default value is being built by default. 
As you pointed out this is not related to that patchset. 


> 
> >   #endif
> >   	if (fcw->hcin_en > 0) {
> >   		harq_in_length = op->ldpc_dec.harq_combined_input.length;
> >   		if (fcw->hcin_decomp_mode > 0)
> >   			harq_in_length = harq_in_length * 8 / 6;
> > -		harq_in_length = RTE_ALIGN(harq_in_length, 64);
> > -		if ((harq_layout[harq_index].offset > 0) & harq_prun) {
> > +		harq_in_length = RTE_MIN(harq_in_length, op-
> >ldpc_dec.n_cb
> > +				- op->ldpc_dec.n_filler);
> > +		/* Alignment on next 64B - Already enforced from HC output
> */
> > +		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
> > +		/* Stronger alignment requirement when in decompression
> mode */
> > +		if (fcw->hcin_decomp_mode > 0)
> > +			harq_in_length = RTE_ALIGN_FLOOR(harq_in_length,
> 256);
> > +		if ((harq_layout[harq_index].offset > 0) && harq_prun) {
> >   			rte_bbdev_log_debug("HARQ IN offset unexpected
> for now\n");
> >   			fcw->hcin_size0 = harq_layout[harq_index].size0;
> >   			fcw->hcin_offset = harq_layout[harq_index].offset;
> @@ -1455,6
> > +1461,7 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct
> acc100_fcw_ld *fcw,
> >   	uint16_t harq_out_length, harq_in_length, ncb_p, k0_p,
> parity_offset;
> >   	uint32_t harq_index;
> >   	uint32_t l;
> > +	bool harq_prun = false;
> >
> >   	fcw->qm = op->ldpc_dec.q_m;
> >   	fcw->nfiller = op->ldpc_dec.n_filler; @@ -1500,6 +1507,13 @@
> > acc101_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld
> *fcw,
> >   	fcw->llr_pack_mode = check_bit(op->ldpc_dec.op_flags,
> >   			RTE_BBDEV_LDPC_LLR_COMPRESSION);
> >   	harq_index = hq_index(op->ldpc_dec.harq_combined_output.offset);
> > +	#ifdef ACC100_EXT_MEM
> > +	/* Limit cases when HARQ pruning is valid */ #ifdef
> > +ACC101_HARQ_PRUNING_OPTIMIZATION
> > +	harq_prun = ((op->ldpc_dec.harq_combined_output.offset %
> > +			ACC101_HARQ_OFFSET) == 0);
> > +#endif
> > +#endif
> >   	if (fcw->hcin_en > 0) {
> >   		harq_in_length = op->ldpc_dec.harq_combined_input.length;
> >   		if (fcw->hcin_decomp_mode > 0)
> > @@ -1508,9 +1522,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op
> *op, struct acc100_fcw_ld *fcw,
> >   				- op->ldpc_dec.n_filler);
> >   		/* Alignment on next 64B - Already enforced from HC output
> */
> >   		harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, 64);
> > -		fcw->hcin_size0 = harq_in_length;
> > -		fcw->hcin_offset = 0;
> > -		fcw->hcin_size1 = 0;
> > +		if ((harq_layout[harq_index].offset > 0) && harq_prun) {
> > +			rte_bbdev_log_debug("HARQ IN offset unexpected
> for now\n");
> > +			fcw->hcin_size0 = harq_layout[harq_index].size0;
> > +			fcw->hcin_offset = harq_layout[harq_index].offset;
> > +			fcw->hcin_size1 = harq_in_length -
> > +					harq_layout[harq_index].offset;
> > +		} else {
> > +			fcw->hcin_size0 = harq_in_length;
> > +			fcw->hcin_offset = 0;
> > +			fcw->hcin_size1 = 0;
> > +		}
> >   	} else {
> >   		fcw->hcin_size0 = 0;
> >   		fcw->hcin_offset = 0;
> > @@ -1551,9 +1573,17 @@ acc101_fcw_ld_fill(struct rte_bbdev_dec_op
> *op, struct acc100_fcw_ld *fcw,
> >   		harq_out_length = RTE_MIN(harq_out_length, ncb_p);
> >   		/* Alignment on next 64B */
> >   		harq_out_length = RTE_ALIGN_CEIL(harq_out_length, 64);
> > -		fcw->hcout_size0 = harq_out_length;
> > -		fcw->hcout_size1 = 0;
> > -		fcw->hcout_offset = 0;
> > +		if ((k0_p > fcw->hcin_size0 +
> ACC100_HARQ_OFFSET_THRESHOLD) &&
> > +				harq_prun) {
> > +			fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
> > +			fcw->hcout_offset = k0_p & 0xFFC0;
> > +			fcw->hcout_size1 = harq_out_length - fcw-
> >hcout_offset;
> > +		} else {
> > +			fcw->hcout_size0 = harq_out_length;
> > +			fcw->hcout_size1 = 0;
> > +			fcw->hcout_offset = 0;
> > +		}
> > +
> >   		harq_layout[harq_index].offset = fcw->hcout_offset;
> >   		harq_layout[harq_index].size0 = fcw->hcout_size0;
> >   	} else {

RE: [PATCH v2 34/37] baseband/acc100: update meson file sdk dependency

[Chautru, Nicolas]

Hi Thomas, 

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Thursday, September 15, 2022 3:58 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>
> Cc: dev@dpdk.org; gakhil@marvell.com; trix@redhat.com; Chautru, Nicolas
> <nicolas.chautru@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Maxime
> Coquelin <maxime.coquelin@redhat.com>
> Subject: Re: [PATCH v2 34/37] baseband/acc100: update meson file sdk
> dependency
> 
> 15/09/2022 12:31, Maxime Coquelin:
> >
> > On 8/20/22 04:31, Hernan Vargas wrote:
> > > Update meson files with FlexRAN SDK dependency.
> 
> There is no reason for this commit.
> If the reason is that you need these dependencies for some features, it is
> better to introduce the dependency when you use it.
> Patches should be split per features, not per file.

Agreed this is a mistake and this change is actually required by patch 15 in that serie. 

> 
> > > Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> > > ---
> > >   drivers/baseband/acc100/meson.build | 21 +++++++++++++++++++++
> > >   1 file changed, 21 insertions(+)
> > >
> > > diff --git a/drivers/baseband/acc100/meson.build
> > > b/drivers/baseband/acc100/meson.build
> > > index 9a1a3b8b07..3b934a25ca 100644
> > > --- a/drivers/baseband/acc100/meson.build
> > > +++ b/drivers/baseband/acc100/meson.build
> > > @@ -1,6 +1,27 @@
> > >   # SPDX-License-Identifier: BSD-3-Clause
> > >   # Copyright(c) 2020 Intel Corporation
> > >
> > > +# check for FlexRAN SDK libraries
> > > +dep_dec5g = dependency('flexran_sdk_ldpc_decoder_5gnr', required:
> > > +false)
> > > +
> > > +if dep_dec5g.found()
> > > +    ext_deps += cc.find_library('libstdc++', required: true)
> > > +    ext_deps += cc.find_library('libirc', required: true)
> > > +    ext_deps += cc.find_library('libimf', required: true)
> > > +    ext_deps += cc.find_library('libipps', required: true)
> > > +    ext_deps += cc.find_library('libsvml', required: true)
> > > +    ext_deps += dep_dec5g
> > > +    ext_deps += dependency('flexran_sdk_ldpc_encoder_5gnr', required:
> true)
> > > +    ext_deps += dependency('flexran_sdk_LDPC_ratematch_5gnr',
> required: true)
> > > +    ext_deps += dependency('flexran_sdk_rate_dematching_5gnr',
> required: true)
> > > +    ext_deps += dependency('flexran_sdk_turbo', required: true)
> > > +    ext_deps += dependency('flexran_sdk_crc', required: true)
> > > +    ext_deps += dependency('flexran_sdk_rate_matching', required: true)
> > > +    ext_deps += dependency('flexran_sdk_common', required: true)
> > > +    cflags += ['-DRTE_BBDEV_SDK_AVX2']
> > > +    cflags += ['-DRTE_BBDEV_SDK_AVX512'] endif
> > > +
> > >   deps += ['bbdev', 'bus_vdev', 'ring', 'pci', 'bus_pci']
> > >
> > >   sources = files('rte_acc100_pmd.c')
> >
> > I think we should improve build coverage with stubs.
> >
> > For example, we could stub bblib_rate_dematching_5gnr(), and so all
> > the code under RTE_BBDEV_SDK_AVX512 ifdef in
> > enqueue_ldpc_dec_one_op_cb() would be built.
> 
> Yes, having code built even when the proprietary dependency is missing,
> would help to track some issues.
> 
> > It would even open the possibility to have open-source implementations
> > of these libraries if community feel the need.
> >
> > What do you think?

We need to assess at compile time whether the SDK is present or not, as the processing would be different (or in the case of the turbo_sw PMD using the same dependency to talk out some dependency).
So I don't think the stub is an option except if I miss the meaning of your suggestion. 
Note that other libraries could be used instead of the Intel ones as long as the same prototype is used (this is notably used by 3rd party company to provide their own implementation of these modules).


> >
> > Thanks,
> > Maxime
> 
> 

RE: [PATCH v2 06/37] baseband/acc100: add default e value for FCW

[Chautru, Nicolas]

Hi Thomas, 

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Thursday, September 15, 2022 4:00 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>
> Cc: dev@dpdk.org; gakhil@marvell.com; trix@redhat.com; Chautru, Nicolas
> <nicolas.chautru@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>;
> maxime.coquelin@redhat.com
> Subject: Re: [PATCH v2 06/37] baseband/acc100: add default e value for
> FCW
> 
> 20/08/2022 04:31, Hernan Vargas:
> > Refactor frame control word LDPC encoder fill function to take a
> > default e value as a parameter. No functional impact.
> 
> Excuse my ignorance, what is "e"?
> Is there a way to describe or name it differently?
> 
Sure commit message can be rephrased as 
"Refactor frame control word LDPC encoder fill function to take a default rate-matching value E as a parameter."
E is the formal name in 3GPP specs for the rate-matching size. 

RE: [PATCH v2 15/37] baseband/acc100: add workaround for deRM corner cases

[Chautru, Nicolas]

Hi Maxime, 

> -----Original Message-----
> From: Maxime Coquelin <maxime.coquelin@redhat.com>
> Sent: Thursday, September 15, 2022 1:15 AM
> To: Vargas, Hernan <hernan.vargas@intel.com>; dev@dpdk.org;
> gakhil@marvell.com; trix@redhat.com
> Cc: Chautru, Nicolas <nicolas.chautru@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Subject: Re: [PATCH v2 15/37] baseband/acc100: add workaround for deRM
> corner cases
> 
> 
> 
> On 8/20/22 04:31, Hernan Vargas wrote:
> > Add function to asses if de-ratematch pre-processing should be run in
> > SW for corner cases.
> >
> > Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
> > ---
> >   drivers/baseband/acc100/acc100_pmd.h     |  13 +++
> >   drivers/baseband/acc100/rte_acc100_pmd.c | 103
> ++++++++++++++++++++++-
> >   2 files changed, 114 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/baseband/acc100/acc100_pmd.h
> > b/drivers/baseband/acc100/acc100_pmd.h
> > index 19a1f434bc..c98a182be6 100644
> > --- a/drivers/baseband/acc100/acc100_pmd.h
> > +++ b/drivers/baseband/acc100/acc100_pmd.h
> > @@ -140,6 +140,8 @@
> >   /* Constants from K0 computation from 3GPP 38.212 Table 5.4.2.1-2 */
> >   #define ACC100_N_ZC_1 66 /* N = 66 Zc for BG 1 */
> >   #define ACC100_N_ZC_2 50 /* N = 50 Zc for BG 2 */
> > +#define ACC100_K_ZC_1 22 /* K = 22 Zc for BG 1 */ #define
> > +ACC100_K_ZC_2 10 /* K = 10 Zc for BG 2 */
> >   #define ACC100_K0_1_1 17 /* K0 fraction numerator for rv 1 and BG 1 */
> >   #define ACC100_K0_1_2 13 /* K0 fraction numerator for rv 1 and BG 2 */
> >   #define ACC100_K0_2_1 33 /* K0 fraction numerator for rv 2 and BG 1
> > */ @@ -177,6 +179,16 @@
> >   #define ACC100_MS_IN_US         (1000)
> >   #define ACC100_DDR_TRAINING_MAX (5000)
> >
> > +/* Code rate limitation when padding is required */ #define
> > +ACC100_LIM_03 2  /* 0.03 */ #define ACC100_LIM_09 6  /* 0.09 */
> > +#define ACC100_LIM_14 9  /* 0.14 */ #define ACC100_LIM_21 14 /* 0.21
> > +*/ #define ACC100_LIM_31 20 /* 0.31 */ #define ACC100_MAX_E (128 *
> > +1024 - 2)
> > +
> > +
> > +
> >   /* ACC100 DMA Descriptor triplet */
> >   struct acc100_dma_triplet {
> >   	uint64_t address;
> > @@ -572,6 +584,7 @@ struct __rte_cache_aligned acc100_queue {
> >   	uint8_t *lb_out;
> >   	rte_iova_t lb_in_addr_iova;
> >   	rte_iova_t lb_out_addr_iova;
> > +	int8_t *derm_buffer; /* interim buffer for de-rm in SDK */
> >   	struct acc100_device *d;
> >   };
> >
> > diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c
> > b/drivers/baseband/acc100/rte_acc100_pmd.c
> > index 1504acfadd..69c0714a37 100644
> > --- a/drivers/baseband/acc100/rte_acc100_pmd.c
> > +++ b/drivers/baseband/acc100/rte_acc100_pmd.c
> > @@ -24,6 +24,10 @@
> >   #include "acc100_pmd.h"
> >   #include "acc101_pmd.h"
> >
> > +#ifdef RTE_BBDEV_SDK_AVX512
> > +#include <phy_rate_dematching_5gnr.h> #endif
> > +
> >   #ifdef RTE_LIBRTE_BBDEV_DEBUG
> >   RTE_LOG_REGISTER_DEFAULT(acc100_logtype, DEBUG);
> >   #else
> > @@ -898,6 +902,16 @@ acc100_queue_setup(struct rte_bbdev *dev,
> uint16_t queue_id,
> >   		rte_free(q);
> >   		return -ENOMEM;
> >   	}
> > +	q->derm_buffer = rte_zmalloc_socket(dev->device->driver->name,
> > +			RTE_BBDEV_TURBO_MAX_CB_SIZE * 10,
> > +			RTE_CACHE_LINE_SIZE, conf->socket);
> > +	if (q->derm_buffer == NULL) {
> > +		rte_bbdev_log(ERR, "Failed to allocate derm_buffer
> memory");
> > +		rte_free(q->lb_in);
> > +		rte_free(q->lb_out);
> > +		rte_free(q);
> > +		return -ENOMEM;
> > +	}
> 
> It may make sense to have a common error path to avoid duplication and so
> risk introducing memory leaks when changes will be made.
> 
> >   	q->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);
> >
> >   	/*
> > @@ -918,6 +932,7 @@ acc100_queue_setup(struct rte_bbdev *dev,
> uint16_t
> > queue_id,
> >
> >   	q_idx = acc100_find_free_queue_idx(dev, conf);
> >   	if (q_idx == -1) {
> > +		rte_free(q->derm_buffer);
> >   		rte_free(q->lb_in);
> >   		rte_free(q->lb_out);
> >   		rte_free(q);
> > @@ -955,6 +970,7 @@ acc100_queue_release(struct rte_bbdev *dev,
> uint16_t q_id)
> >   		/* Mark the Queue as un-assigned */
> >   		d->q_assigned_bit_map[q->qgrp_id] &= (0xFFFFFFFF -
> >   				(1 << q->aq_id));
> > +		rte_free(q->derm_buffer);
> >   		rte_free(q->lb_in);
> >   		rte_free(q->lb_out);
> >   		rte_free(q);
> > @@ -3512,10 +3528,42 @@ harq_loopback(struct acc100_queue *q,
> struct rte_bbdev_dec_op *op,
> >   	return 1;
> >   }
> >
> > +/** Assess whether a work around is required for the deRM corner
> > +cases */ static inline bool derm_workaround_required(struct
> > +rte_bbdev_op_ldpc_dec *ldpc_dec, struct acc100_queue *q) {
> > +	if (!is_acc100(q))
> > +		return false;
> > +	int32_t e = ldpc_dec->cb_params.e;
> > +	int q_m = ldpc_dec->q_m;
> > +	int z_c = ldpc_dec->z_c;
> > +	int K = (ldpc_dec->basegraph == 1 ? ACC100_K_ZC_1 :
> ACC100_K_ZC_2)
> > +			* z_c;
> > +	bool required = false;
> 
> Add new line.
> 
> > +	if (ldpc_dec->basegraph == 1) {
> > +		if ((q_m == 4) && (z_c >= 320) && (e * ACC100_LIM_31 > K *
> 64))
> > +			required = true;
> > +		else if ((e * ACC100_LIM_21 > K * 64))
> > +			required = true;
> > +	} else {
> > +		if (q_m <= 2) {
> > +			if ((z_c >= 208) && (e * ACC100_LIM_09 > K * 64))
> > +				required = true;
> > +			else if ((z_c < 208) && (e * ACC100_LIM_03 > K * 64))
> > +				required = true;
> > +		} else if (e * ACC100_LIM_14 > K * 64)
> > +			required = true;
> > +	}
> > +	if (required)
> > +		rte_bbdev_log(INFO, "Running deRM pre-processing in SW");
> 
> Add new line.
> 
> > +	return required;
> > +}
> > +
> >   /** Enqueue one decode operations for ACC100 device in CB mode */
> >   static inline int
> >   enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct
> rte_bbdev_dec_op *op,
> > -		uint16_t total_enqueued_cbs, bool same_op)
> > +		uint16_t total_enqueued_cbs, bool same_op,
> > +		struct rte_bbdev_queue_data *q_data)
> >   {
> >   	int ret;
> >   	if (unlikely(check_bit(op->ldpc_dec.op_flags,
> > @@ -3571,6 +3619,57 @@ enqueue_ldpc_dec_one_op_cb(struct
> acc100_queue *q, struct rte_bbdev_dec_op *op,
> >   				&in_offset, &h_out_offset,
> >   				&h_out_length, harq_layout);
> >   	} else {
> > +		if (derm_workaround_required(&op->ldpc_dec, q)) {
> > +			#ifdef RTE_BBDEV_SDK_AVX512
> 
> First, the indentation is not good here.
> 
> Also, my understanding is that this code will get built only if Flexran SDK is
> available. Flexran SDK is proprietary, and so it is not possible to have this
> code exercised by the upstream CI.
> 
> Code under RTE_BBDEV_SDK_AVX512 should be dropped IMO.

We provide a subset of the intel SDKs to the community. More generally these functions could be replaced with other versions (including from other companies).

> 
> > +			struct rte_bbdev_op_ldpc_dec *dec = &op-
> >ldpc_dec;
> > +			/* Checking input size is matching with E */
> > +			if (dec->input.data->data_len < dec->cb_params.e) {
> > +				rte_bbdev_log(ERR,
> > +						"deRM: Input size
> mismatch");
> > +				return -EFAULT;
> > +			}
> > +			/* Run first deRM processing in SW */
> > +			struct bblib_rate_dematching_5gnr_request
> derm_req;
> > +			struct bblib_rate_dematching_5gnr_response
> derm_resp;
> > +			uint8_t *in = rte_pktmbuf_mtod_offset(dec-
> >input.data,
> > +					uint8_t *, in_offset);
> 
> Don't mix declarations & code.
> 
> > +			derm_req.p_in = (int8_t *) in;
> > +			derm_req.p_harq = (int8_t *) q->derm_buffer;
> > +			derm_req.base_graph = dec->basegraph;
> > +			derm_req.zc = dec->z_c;
> > +			derm_req.ncb = dec->n_cb;
> > +			derm_req.e = dec->cb_params.e;
> > +			if (derm_req.e > ACC100_MAX_E) {
> > +				rte_bbdev_log(WARNING,
> > +						"deRM: E %d > %d max",
> > +						derm_req.e,
> ACC100_MAX_E);
> > +				derm_req.e = ACC100_MAX_E;
> > +			}
> > +			derm_req.k0 = 0; /* Actual output from SDK */
> > +			derm_req.isretx = false;
> > +			derm_req.rvid = dec->rv_index;
> > +			derm_req.modulation_order = dec->q_m;
> > +			derm_req.start_null_index =
> > +					(dec->basegraph == 1 ? 22 : 10)
> > +					* dec->z_c - 2 * dec->z_c
> > +					- dec->n_filler;
> > +			derm_req.num_of_null = dec->n_filler;
> > +			bblib_rate_dematching_5gnr(&derm_req,
> &derm_resp);
> > +			/* Force back the HW DeRM */
> > +			dec->q_m = 1;
> > +			dec->cb_params.e = dec->n_cb - dec->n_filler;
> > +			dec->rv_index = 0;
> > +			rte_memcpy(in, q->derm_buffer, dec->cb_params.e);
> > +			/* Capture counter when pre-processing is used */
> > +			q_data->queue_stats.enqueue_warn_count++;
> > +			#else
> > +			RTE_SET_USED(q_data);
> > +			rte_bbdev_log(WARNING,
> > +				"Corner case may require deRM pre-
> processing in SDK"
> > +				);
> > +			#endif
> > +		}
> > +
> >   		struct acc100_fcw_ld *fcw;
> >   		uint32_t seg_total_left;
> 
> Don't mix declarations & code.
> 
> >   		fcw = &desc->req.fcw_ld;
> > @@ -4322,7 +4421,7 @@ acc100_enqueue_ldpc_dec_cb(struct
> rte_bbdev_queue_data *q_data,
> >   			ops[i]->ldpc_dec.n_cb, ops[i]->ldpc_dec.q_m,
> >   			ops[i]->ldpc_dec.n_filler, ops[i]-
> >ldpc_dec.cb_params.e,
> >   			same_op);
> > -		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op);
> > +		ret = enqueue_ldpc_dec_one_op_cb(q, ops[i], i, same_op,
> q_data);
> >   		if (ret < 0) {
> >   			acc100_enqueue_invalid(q_data);
> >   			break;

Re: [PATCH v2 06/37] baseband/acc100: add default e value for FCW

[Thomas Monjalon]

16/09/2022 03:12, Chautru, Nicolas:
> Hi Thomas, 
> 
> > -----Original Message-----
> > From: Thomas Monjalon <thomas@monjalon.net>
> > Sent: Thursday, September 15, 2022 4:00 AM
> > To: Vargas, Hernan <hernan.vargas@intel.com>
> > Cc: dev@dpdk.org; gakhil@marvell.com; trix@redhat.com; Chautru, Nicolas
> > <nicolas.chautru@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>;
> > maxime.coquelin@redhat.com
> > Subject: Re: [PATCH v2 06/37] baseband/acc100: add default e value for
> > FCW
> > 
> > 20/08/2022 04:31, Hernan Vargas:
> > > Refactor frame control word LDPC encoder fill function to take a
> > > default e value as a parameter. No functional impact.
> > 
> > Excuse my ignorance, what is "e"?
> > Is there a way to describe or name it differently?
> > 
> Sure commit message can be rephrased as 
> "Refactor frame control word LDPC encoder fill function to take a default rate-matching value E as a parameter."
> E is the formal name in 3GPP specs for the rate-matching size. 

OK thank you, I guessed it was something standard.