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From: "Potthuri, Sai Krishna" <sai.krishna.potthuri@amd.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Borislav Petkov <bp@alien8.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Tony Luck <tony.luck@intel.com>,
	James Morse <james.morse@arm.com>,
	Robert Richter <rric@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"saikrishna12468@gmail.com" <saikrishna12468@gmail.com>,
	"git (AMD-Xilinx)" <git@amd.com>,
	Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Subject: RE: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM
Date: Tue, 16 Aug 2022 12:43:22 +0000	[thread overview]
Message-ID: <BY5PR12MB4258CAD5AA8BEFAAB444E4E3DB6B9@BY5PR12MB4258.namprd12.prod.outlook.com> (raw)
In-Reply-To: <c7146f96-fec6-5371-7137-9829e635ea20@linaro.org>

Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Tuesday, August 16, 2022 1:29 PM
> To: Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>; Rob Herring
> <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Michal Simek
> <michal.simek@xilinx.com>; Borislav Petkov <bp@alien8.de>; Mauro
> Carvalho Chehab <mchehab@kernel.org>; Tony Luck <tony.luck@intel.com>;
> James Morse <james.morse@arm.com>; Robert Richter <rric@kernel.org>
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; linux-edac@vger.kernel.org;
> saikrishna12468@gmail.com; git (AMD-Xilinx) <git@amd.com>; Shubhrajyoti
> Datta <shubhrajyoti.datta@xilinx.com>
> Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP
> OCM
> 
> On 16/08/2022 10:32, Sai Krishna Potthuri wrote:
> > From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> >
> > Add bindings for Xilinx ZynqMP OCM controller.
> >
> > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > ---
> >  .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > new file mode 100644
> > index 000000000000..9bcecaccade2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > @@ -0,0 +1,41 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Xilinx Zynqmp OCM EDAC driver
> 
> s/EDAC driver//
> Is it a memory controller?
This driver is about Error Detection and Correction feature for OCM (On Chip
Memory) controller which supports ECC functionality.
> 
> > +
> > +maintainers:
> > +  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> > +  - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > +
> > +description: |
> > +  Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single
> > +bit errors
> 
> The same. Describe the hardware, not the Linux driver or its subsystem.
I will fix in v2.
> 
> > +  that are corrected and double bit ecc errors that are detected by
> > + the OCM
> 
> s/ecc/ECC/
I will fix in v2.
> 
> > +  ECC controller.
> > +
> > +properties:
> > +  compatible:
> > +    const: xlnx,zynqmp-ocmc-1.0
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > +  - |
> > +    memory-controller@ff960000 {
> > +      compatible = "xlnx,zynqmp-ocmc-1.0";
> > +      reg = <0xff960000 0x1000>;
> > +      interrupts = <0 10 4>;
> 
> Isn't the interrupt using common flags? If so, use proper defines.
I will fix in v2.

Regards
Sai Krishna
> 
> > +    };
> 
> 
> Best regards,
> Krzysztof

WARNING: multiple messages have this Message-ID (diff)
From: "Potthuri, Sai Krishna" <sai.krishna.potthuri@amd.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Borislav Petkov <bp@alien8.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Tony Luck <tony.luck@intel.com>,
	James Morse <james.morse@arm.com>,
	Robert Richter <rric@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	"saikrishna12468@gmail.com" <saikrishna12468@gmail.com>,
	"git (AMD-Xilinx)" <git@amd.com>,
	Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Subject: RE: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM
Date: Tue, 16 Aug 2022 12:43:22 +0000	[thread overview]
Message-ID: <BY5PR12MB4258CAD5AA8BEFAAB444E4E3DB6B9@BY5PR12MB4258.namprd12.prod.outlook.com> (raw)
In-Reply-To: <c7146f96-fec6-5371-7137-9829e635ea20@linaro.org>

Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Tuesday, August 16, 2022 1:29 PM
> To: Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>; Rob Herring
> <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Michal Simek
> <michal.simek@xilinx.com>; Borislav Petkov <bp@alien8.de>; Mauro
> Carvalho Chehab <mchehab@kernel.org>; Tony Luck <tony.luck@intel.com>;
> James Morse <james.morse@arm.com>; Robert Richter <rric@kernel.org>
> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; linux-edac@vger.kernel.org;
> saikrishna12468@gmail.com; git (AMD-Xilinx) <git@amd.com>; Shubhrajyoti
> Datta <shubhrajyoti.datta@xilinx.com>
> Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP
> OCM
> 
> On 16/08/2022 10:32, Sai Krishna Potthuri wrote:
> > From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> >
> > Add bindings for Xilinx ZynqMP OCM controller.
> >
> > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > ---
> >  .../bindings/edac/xlnx,zynqmp-ocmc.yaml       | 41 +++++++++++++++++++
> >  1 file changed, 41 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > new file mode 100644
> > index 000000000000..9bcecaccade2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml
> > @@ -0,0 +1,41 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Xilinx Zynqmp OCM EDAC driver
> 
> s/EDAC driver//
> Is it a memory controller?
This driver is about Error Detection and Correction feature for OCM (On Chip
Memory) controller which supports ECC functionality.
> 
> > +
> > +maintainers:
> > +  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> > +  - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > +
> > +description: |
> > +  Xilinx ZynqMP OCM EDAC driver, it does reports the OCM ECC single
> > +bit errors
> 
> The same. Describe the hardware, not the Linux driver or its subsystem.
I will fix in v2.
> 
> > +  that are corrected and double bit ecc errors that are detected by
> > + the OCM
> 
> s/ecc/ECC/
I will fix in v2.
> 
> > +  ECC controller.
> > +
> > +properties:
> > +  compatible:
> > +    const: xlnx,zynqmp-ocmc-1.0
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > +  - |
> > +    memory-controller@ff960000 {
> > +      compatible = "xlnx,zynqmp-ocmc-1.0";
> > +      reg = <0xff960000 0x1000>;
> > +      interrupts = <0 10 4>;
> 
> Isn't the interrupt using common flags? If so, use proper defines.
I will fix in v2.

Regards
Sai Krishna
> 
> > +    };
> 
> 
> Best regards,
> Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-08-16 12:43 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-16  7:32 [PATCH 0/2] edac: Add support for Xilinx ZynqMP OCM EDAC Sai Krishna Potthuri
2022-08-16  7:32 ` Sai Krishna Potthuri
2022-08-16  7:32 ` [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM Sai Krishna Potthuri
2022-08-16  7:32   ` Sai Krishna Potthuri
2022-08-16  7:59   ` Krzysztof Kozlowski
2022-08-16  7:59     ` Krzysztof Kozlowski
2022-08-16 12:43     ` Potthuri, Sai Krishna [this message]
2022-08-16 12:43       ` Potthuri, Sai Krishna
2022-08-16 13:23       ` Krzysztof Kozlowski
2022-08-16 13:23         ` Krzysztof Kozlowski
2022-08-16  7:32 ` [PATCH 2/2] edac: zynqmp_ocm: Add EDAC support for " Sai Krishna Potthuri
2022-08-16  7:32   ` Sai Krishna Potthuri
2022-08-16  8:06   ` Krzysztof Kozlowski
2022-08-16  8:06     ` Krzysztof Kozlowski
2022-08-16 12:39     ` Potthuri, Sai Krishna
2022-08-16 12:39       ` Potthuri, Sai Krishna

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