* [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: andi.shyti, trix, intel-gfx, llvm, ndesaulniers, patches,
dri-devel, Nathan Chancellor, fei.yang
Hi all,
This series fixes a few clang kernel Control Flow Integrity (kCFI)
violations that appear after commit 9275277d5324 ("drm/i915: use
pat_index instead of cache_level"). They were found between run time
testing on real hardware and compile time testing with
-Wincompatible-function-pointer-types-strict (which is not yet enabled
for the kernel but I build with it locally to catch new instances).
If there are any problems or questions, please let me know.
---
Nathan Chancellor (2):
drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
2 files changed, 17 insertions(+), 17 deletions(-)
---
base-commit: 08264f85c5c05ecc38d409c84d48cfb00ccd3bc4
change-id: 20230530-i915-gt-cache_level-wincompatible-function-pointer-types-strict-32a5c65249a5
Best regards,
--
Nathan Chancellor <nathan@kernel.org>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: trix, intel-gfx, llvm, ndesaulniers, patches, dri-devel,
Nathan Chancellor
Hi all,
This series fixes a few clang kernel Control Flow Integrity (kCFI)
violations that appear after commit 9275277d5324 ("drm/i915: use
pat_index instead of cache_level"). They were found between run time
testing on real hardware and compile time testing with
-Wincompatible-function-pointer-types-strict (which is not yet enabled
for the kernel but I build with it locally to catch new instances).
If there are any problems or questions, please let me know.
---
Nathan Chancellor (2):
drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
2 files changed, 17 insertions(+), 17 deletions(-)
---
base-commit: 08264f85c5c05ecc38d409c84d48cfb00ccd3bc4
change-id: 20230530-i915-gt-cache_level-wincompatible-function-pointer-types-strict-32a5c65249a5
Best regards,
--
Nathan Chancellor <nathan@kernel.org>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: ndesaulniers, trix, andi.shyti, fei.yang, intel-gfx, dri-devel,
llvm, patches, Nathan Chancellor
Hi all,
This series fixes a few clang kernel Control Flow Integrity (kCFI)
violations that appear after commit 9275277d5324 ("drm/i915: use
pat_index instead of cache_level"). They were found between run time
testing on real hardware and compile time testing with
-Wincompatible-function-pointer-types-strict (which is not yet enabled
for the kernel but I build with it locally to catch new instances).
If there are any problems or questions, please let me know.
---
Nathan Chancellor (2):
drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
2 files changed, 17 insertions(+), 17 deletions(-)
---
base-commit: 08264f85c5c05ecc38d409c84d48cfb00ccd3bc4
change-id: 20230530-i915-gt-cache_level-wincompatible-function-pointer-types-strict-32a5c65249a5
Best regards,
--
Nathan Chancellor <nathan@kernel.org>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
(?)
@ 2023-05-30 18:24 ` Nathan Chancellor
-1 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: andi.shyti, trix, intel-gfx, llvm, ndesaulniers, patches,
dri-devel, Nathan Chancellor, fei.yang
When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a
CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode()
via an indirect call:
[ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
With kCFI, indirect calls are validated against their expected type
versus actual type and failures occur when the two types do not match.
clang's -Wincompatible-function-pointer-types-strict can catch this at
compile time but it is not enabled for the kernel yet:
drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = iris_pte_encode;
^ ~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = hsw_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = byt_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = ivb_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = snb_pte_encode;
^ ~~~~~~~~~~~~~~
5 errors generated.
In this case, the pre-gen8 pte_encode functions have a second parameter
type of 'enum i915_cache_level' whereas the function pointer prototype
in 'struct i915_address_space' expects a second parameter type of
'unsigned int'.
Update the second parameter of the callbacks and the comment above them
noting that these statements are still valid, which matches other
functions and files, to clear up the kCFI failures at run time.
Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 2a7942fac798..122197737ef2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1015,16 +1015,16 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
/*
* For pre-gen8 platforms pat_index is the same as enum i915_cache_level,
- * so these PTE encode functions are left with using cache_level.
+ * so the switch-case statements in these PTE encode functions are still valid.
* See translation table LEGACY_CACHELEVEL.
*/
static u64 snb_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_L3_LLC:
case I915_CACHE_LLC:
pte |= GEN6_PTE_CACHE_LLC;
@@ -1033,19 +1033,19 @@ static u64 snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- MISSING_CASE(level);
+ MISSING_CASE(pat_index);
}
return pte;
}
static u64 ivb_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_L3_LLC:
pte |= GEN7_PTE_CACHE_L3_LLC;
break;
@@ -1056,14 +1056,14 @@ static u64 ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- MISSING_CASE(level);
+ MISSING_CASE(pat_index);
}
return pte;
}
static u64 byt_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
@@ -1071,31 +1071,31 @@ static u64 byt_pte_encode(dma_addr_t addr,
if (!(flags & PTE_READ_ONLY))
pte |= BYT_PTE_WRITEABLE;
- if (level != I915_CACHE_NONE)
+ if (pat_index != I915_CACHE_NONE)
pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
return pte;
}
static u64 hsw_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- if (level != I915_CACHE_NONE)
+ if (pat_index != I915_CACHE_NONE)
pte |= HSW_WB_LLC_AGE3;
return pte;
}
static u64 iris_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_NONE:
break;
case I915_CACHE_WT:
--
2.40.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: trix, intel-gfx, llvm, ndesaulniers, patches, dri-devel,
Nathan Chancellor
When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a
CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode()
via an indirect call:
[ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
With kCFI, indirect calls are validated against their expected type
versus actual type and failures occur when the two types do not match.
clang's -Wincompatible-function-pointer-types-strict can catch this at
compile time but it is not enabled for the kernel yet:
drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = iris_pte_encode;
^ ~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = hsw_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = byt_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = ivb_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = snb_pte_encode;
^ ~~~~~~~~~~~~~~
5 errors generated.
In this case, the pre-gen8 pte_encode functions have a second parameter
type of 'enum i915_cache_level' whereas the function pointer prototype
in 'struct i915_address_space' expects a second parameter type of
'unsigned int'.
Update the second parameter of the callbacks and the comment above them
noting that these statements are still valid, which matches other
functions and files, to clear up the kCFI failures at run time.
Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 2a7942fac798..122197737ef2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1015,16 +1015,16 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
/*
* For pre-gen8 platforms pat_index is the same as enum i915_cache_level,
- * so these PTE encode functions are left with using cache_level.
+ * so the switch-case statements in these PTE encode functions are still valid.
* See translation table LEGACY_CACHELEVEL.
*/
static u64 snb_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_L3_LLC:
case I915_CACHE_LLC:
pte |= GEN6_PTE_CACHE_LLC;
@@ -1033,19 +1033,19 @@ static u64 snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- MISSING_CASE(level);
+ MISSING_CASE(pat_index);
}
return pte;
}
static u64 ivb_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_L3_LLC:
pte |= GEN7_PTE_CACHE_L3_LLC;
break;
@@ -1056,14 +1056,14 @@ static u64 ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- MISSING_CASE(level);
+ MISSING_CASE(pat_index);
}
return pte;
}
static u64 byt_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
@@ -1071,31 +1071,31 @@ static u64 byt_pte_encode(dma_addr_t addr,
if (!(flags & PTE_READ_ONLY))
pte |= BYT_PTE_WRITEABLE;
- if (level != I915_CACHE_NONE)
+ if (pat_index != I915_CACHE_NONE)
pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
return pte;
}
static u64 hsw_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- if (level != I915_CACHE_NONE)
+ if (pat_index != I915_CACHE_NONE)
pte |= HSW_WB_LLC_AGE3;
return pte;
}
static u64 iris_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_NONE:
break;
case I915_CACHE_WT:
--
2.40.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: ndesaulniers, trix, andi.shyti, fei.yang, intel-gfx, dri-devel,
llvm, patches, Nathan Chancellor
When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a
CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode()
via an indirect call:
[ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
With kCFI, indirect calls are validated against their expected type
versus actual type and failures occur when the two types do not match.
clang's -Wincompatible-function-pointer-types-strict can catch this at
compile time but it is not enabled for the kernel yet:
drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = iris_pte_encode;
^ ~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = hsw_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = byt_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = ivb_pte_encode;
^ ~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.pte_encode = snb_pte_encode;
^ ~~~~~~~~~~~~~~
5 errors generated.
In this case, the pre-gen8 pte_encode functions have a second parameter
type of 'enum i915_cache_level' whereas the function pointer prototype
in 'struct i915_address_space' expects a second parameter type of
'unsigned int'.
Update the second parameter of the callbacks and the comment above them
noting that these statements are still valid, which matches other
functions and files, to clear up the kCFI failures at run time.
Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 2a7942fac798..122197737ef2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1015,16 +1015,16 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
/*
* For pre-gen8 platforms pat_index is the same as enum i915_cache_level,
- * so these PTE encode functions are left with using cache_level.
+ * so the switch-case statements in these PTE encode functions are still valid.
* See translation table LEGACY_CACHELEVEL.
*/
static u64 snb_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_L3_LLC:
case I915_CACHE_LLC:
pte |= GEN6_PTE_CACHE_LLC;
@@ -1033,19 +1033,19 @@ static u64 snb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- MISSING_CASE(level);
+ MISSING_CASE(pat_index);
}
return pte;
}
static u64 ivb_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_L3_LLC:
pte |= GEN7_PTE_CACHE_L3_LLC;
break;
@@ -1056,14 +1056,14 @@ static u64 ivb_pte_encode(dma_addr_t addr,
pte |= GEN6_PTE_UNCACHED;
break;
default:
- MISSING_CASE(level);
+ MISSING_CASE(pat_index);
}
return pte;
}
static u64 byt_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
@@ -1071,31 +1071,31 @@ static u64 byt_pte_encode(dma_addr_t addr,
if (!(flags & PTE_READ_ONLY))
pte |= BYT_PTE_WRITEABLE;
- if (level != I915_CACHE_NONE)
+ if (pat_index != I915_CACHE_NONE)
pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
return pte;
}
static u64 hsw_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- if (level != I915_CACHE_NONE)
+ if (pat_index != I915_CACHE_NONE)
pte |= HSW_WB_LLC_AGE3;
return pte;
}
static u64 iris_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
+ unsigned int pat_index,
u32 flags)
{
gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
- switch (level) {
+ switch (pat_index) {
case I915_CACHE_NONE:
break;
case I915_CACHE_WT:
--
2.40.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
(?)
@ 2023-05-30 18:24 ` Nathan Chancellor
-1 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: andi.shyti, trix, intel-gfx, llvm, ndesaulniers, patches,
dri-devel, Nathan Chancellor, fei.yang
When building with clang's -Wincompatible-function-pointer-types-strict,
the following warnings occur:
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.insert_page = gmch_ggtt_insert_page;
^ ~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
^ ~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.
The warning is pointing out that while 'enum i915_cache_level' and
'unsigned int' are ABI compatible, these indirect calls will fail
clang's kernel Control Flow Integrity (kCFI) checks, as the callback's
signature does not exactly match the prototype's signature.
To fix this, replace the cache_level parameter with pat_index, as was
done in other places within i915 where there is no difference between
cache_level and pat_index on certain generations.
Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
index d6a74ae2527b..866c416afb73 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
@@ -18,10 +18,10 @@
static void gmch_ggtt_insert_page(struct i915_address_space *vm,
dma_addr_t addr,
u64 offset,
- enum i915_cache_level cache_level,
+ unsigned int pat_index,
u32 unused)
{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
+ unsigned int flags = (pat_index == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags);
@@ -29,10 +29,10 @@ static void gmch_ggtt_insert_page(struct i915_address_space *vm,
static void gmch_ggtt_insert_entries(struct i915_address_space *vm,
struct i915_vma_resource *vma_res,
- enum i915_cache_level cache_level,
+ unsigned int pat_index,
u32 unused)
{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
+ unsigned int flags = (pat_index == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gmch_gtt_insert_sg_entries(vma_res->bi.pages, vma_res->start >> PAGE_SHIFT,
--
2.40.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}()
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: trix, intel-gfx, llvm, ndesaulniers, patches, dri-devel,
Nathan Chancellor
When building with clang's -Wincompatible-function-pointer-types-strict,
the following warnings occur:
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.insert_page = gmch_ggtt_insert_page;
^ ~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
^ ~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.
The warning is pointing out that while 'enum i915_cache_level' and
'unsigned int' are ABI compatible, these indirect calls will fail
clang's kernel Control Flow Integrity (kCFI) checks, as the callback's
signature does not exactly match the prototype's signature.
To fix this, replace the cache_level parameter with pat_index, as was
done in other places within i915 where there is no difference between
cache_level and pat_index on certain generations.
Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
index d6a74ae2527b..866c416afb73 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
@@ -18,10 +18,10 @@
static void gmch_ggtt_insert_page(struct i915_address_space *vm,
dma_addr_t addr,
u64 offset,
- enum i915_cache_level cache_level,
+ unsigned int pat_index,
u32 unused)
{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
+ unsigned int flags = (pat_index == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags);
@@ -29,10 +29,10 @@ static void gmch_ggtt_insert_page(struct i915_address_space *vm,
static void gmch_ggtt_insert_entries(struct i915_address_space *vm,
struct i915_vma_resource *vma_res,
- enum i915_cache_level cache_level,
+ unsigned int pat_index,
u32 unused)
{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
+ unsigned int flags = (pat_index == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gmch_gtt_insert_sg_entries(vma_res->bi.pages, vma_res->start >> PAGE_SHIFT,
--
2.40.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
@ 2023-05-30 18:24 ` Nathan Chancellor
0 siblings, 0 replies; 28+ messages in thread
From: Nathan Chancellor @ 2023-05-30 18:24 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin
Cc: ndesaulniers, trix, andi.shyti, fei.yang, intel-gfx, dri-devel,
llvm, patches, Nathan Chancellor
When building with clang's -Wincompatible-function-pointer-types-strict,
the following warnings occur:
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
ggtt->vm.insert_page = gmch_ggtt_insert_page;
^ ~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
^ ~~~~~~~~~~~~~~~~~~~~~~~~
2 errors generated.
The warning is pointing out that while 'enum i915_cache_level' and
'unsigned int' are ABI compatible, these indirect calls will fail
clang's kernel Control Flow Integrity (kCFI) checks, as the callback's
signature does not exactly match the prototype's signature.
To fix this, replace the cache_level parameter with pat_index, as was
done in other places within i915 where there is no difference between
cache_level and pat_index on certain generations.
Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
index d6a74ae2527b..866c416afb73 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
@@ -18,10 +18,10 @@
static void gmch_ggtt_insert_page(struct i915_address_space *vm,
dma_addr_t addr,
u64 offset,
- enum i915_cache_level cache_level,
+ unsigned int pat_index,
u32 unused)
{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
+ unsigned int flags = (pat_index == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags);
@@ -29,10 +29,10 @@ static void gmch_ggtt_insert_page(struct i915_address_space *vm,
static void gmch_ggtt_insert_entries(struct i915_address_space *vm,
struct i915_vma_resource *vma_res,
- enum i915_cache_level cache_level,
+ unsigned int pat_index,
u32 unused)
{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
+ unsigned int flags = (pat_index == I915_CACHE_NONE) ?
AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
intel_gmch_gtt_insert_sg_entries(vma_res->bi.pages, vma_res->start >> PAGE_SHIFT,
--
2.40.1
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
(?)
@ 2023-05-30 18:54 ` Andi Shyti
-1 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-05-30 18:54 UTC (permalink / raw)
To: Nathan Chancellor
Cc: tvrtko.ursulin, llvm, fei.yang, trix, intel-gfx, ndesaulniers,
patches, dri-devel, andi.shyti, rodrigo.vivi
Hi Nathan,
On Tue, May 30, 2023 at 11:24:38AM -0700, Nathan Chancellor wrote:
> When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a
> CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode()
> via an indirect call:
>
> [ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
>
> With kCFI, indirect calls are validated against their expected type
> versus actual type and failures occur when the two types do not match.
>
> clang's -Wincompatible-function-pointer-types-strict can catch this at
> compile time but it is not enabled for the kernel yet:
>
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = iris_pte_encode;
> ^ ~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = hsw_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = byt_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = ivb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = snb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> 5 errors generated.
>
> In this case, the pre-gen8 pte_encode functions have a second parameter
> type of 'enum i915_cache_level' whereas the function pointer prototype
> in 'struct i915_address_space' expects a second parameter type of
> 'unsigned int'.
>
> Update the second parameter of the callbacks and the comment above them
> noting that these statements are still valid, which matches other
> functions and files, to clear up the kCFI failures at run time.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
That's correct!
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
@ 2023-05-30 18:54 ` Andi Shyti
0 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-05-30 18:54 UTC (permalink / raw)
To: Nathan Chancellor
Cc: llvm, trix, intel-gfx, ndesaulniers, patches, dri-devel, rodrigo.vivi
Hi Nathan,
On Tue, May 30, 2023 at 11:24:38AM -0700, Nathan Chancellor wrote:
> When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a
> CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode()
> via an indirect call:
>
> [ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
>
> With kCFI, indirect calls are validated against their expected type
> versus actual type and failures occur when the two types do not match.
>
> clang's -Wincompatible-function-pointer-types-strict can catch this at
> compile time but it is not enabled for the kernel yet:
>
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = iris_pte_encode;
> ^ ~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = hsw_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = byt_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = ivb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = snb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> 5 errors generated.
>
> In this case, the pre-gen8 pte_encode functions have a second parameter
> type of 'enum i915_cache_level' whereas the function pointer prototype
> in 'struct i915_address_space' expects a second parameter type of
> 'unsigned int'.
>
> Update the second parameter of the callbacks and the comment above them
> noting that these statements are still valid, which matches other
> functions and files, to clear up the kCFI failures at run time.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
That's correct!
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
@ 2023-05-30 18:54 ` Andi Shyti
0 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-05-30 18:54 UTC (permalink / raw)
To: Nathan Chancellor
Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin,
ndesaulniers, trix, andi.shyti, fei.yang, intel-gfx, dri-devel,
llvm, patches
Hi Nathan,
On Tue, May 30, 2023 at 11:24:38AM -0700, Nathan Chancellor wrote:
> When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a
> CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode()
> via an indirect call:
>
> [ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
>
> With kCFI, indirect calls are validated against their expected type
> versus actual type and failures occur when the two types do not match.
>
> clang's -Wincompatible-function-pointer-types-strict can catch this at
> compile time but it is not enabled for the kernel yet:
>
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = iris_pte_encode;
> ^ ~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = hsw_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = byt_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = ivb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = snb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> 5 errors generated.
>
> In this case, the pre-gen8 pte_encode functions have a second parameter
> type of 'enum i915_cache_level' whereas the function pointer prototype
> in 'struct i915_address_space' expects a second parameter type of
> 'unsigned int'.
>
> Update the second parameter of the callbacks and the comment above them
> noting that these statements are still valid, which matches other
> functions and files, to clear up the kCFI failures at run time.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
That's correct!
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
2023-05-30 18:24 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}() Nathan Chancellor
(?)
@ 2023-05-30 18:55 ` Andi Shyti
-1 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-05-30 18:55 UTC (permalink / raw)
To: Nathan Chancellor
Cc: tvrtko.ursulin, llvm, fei.yang, trix, intel-gfx, ndesaulniers,
patches, dri-devel, andi.shyti, rodrigo.vivi
Hi Nathan,
On Tue, May 30, 2023 at 11:24:39AM -0700, Nathan Chancellor wrote:
> When building with clang's -Wincompatible-function-pointer-types-strict,
> the following warnings occur:
>
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_page = gmch_ggtt_insert_page;
> ^ ~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
> ^ ~~~~~~~~~~~~~~~~~~~~~~~~
> 2 errors generated.
>
> The warning is pointing out that while 'enum i915_cache_level' and
> 'unsigned int' are ABI compatible, these indirect calls will fail
> clang's kernel Control Flow Integrity (kCFI) checks, as the callback's
> signature does not exactly match the prototype's signature.
>
> To fix this, replace the cache_level parameter with pat_index, as was
> done in other places within i915 where there is no difference between
> cache_level and pat_index on certain generations.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
same clang issue as before, I'm OK with this patch, from my side:
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}()
@ 2023-05-30 18:55 ` Andi Shyti
0 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-05-30 18:55 UTC (permalink / raw)
To: Nathan Chancellor
Cc: llvm, trix, intel-gfx, ndesaulniers, patches, dri-devel, rodrigo.vivi
Hi Nathan,
On Tue, May 30, 2023 at 11:24:39AM -0700, Nathan Chancellor wrote:
> When building with clang's -Wincompatible-function-pointer-types-strict,
> the following warnings occur:
>
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_page = gmch_ggtt_insert_page;
> ^ ~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
> ^ ~~~~~~~~~~~~~~~~~~~~~~~~
> 2 errors generated.
>
> The warning is pointing out that while 'enum i915_cache_level' and
> 'unsigned int' are ABI compatible, these indirect calls will fail
> clang's kernel Control Flow Integrity (kCFI) checks, as the callback's
> signature does not exactly match the prototype's signature.
>
> To fix this, replace the cache_level parameter with pat_index, as was
> done in other places within i915 where there is no difference between
> cache_level and pat_index on certain generations.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
same clang issue as before, I'm OK with this patch, from my side:
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
@ 2023-05-30 18:55 ` Andi Shyti
0 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-05-30 18:55 UTC (permalink / raw)
To: Nathan Chancellor
Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin,
ndesaulniers, trix, andi.shyti, fei.yang, intel-gfx, dri-devel,
llvm, patches
Hi Nathan,
On Tue, May 30, 2023 at 11:24:39AM -0700, Nathan Chancellor wrote:
> When building with clang's -Wincompatible-function-pointer-types-strict,
> the following warnings occur:
>
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_page = gmch_ggtt_insert_page;
> ^ ~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
> ^ ~~~~~~~~~~~~~~~~~~~~~~~~
> 2 errors generated.
>
> The warning is pointing out that while 'enum i915_cache_level' and
> 'unsigned int' are ABI compatible, these indirect calls will fail
> clang's kernel Control Flow Integrity (kCFI) checks, as the callback's
> signature does not exactly match the prototype's signature.
>
> To fix this, replace the cache_level parameter with pat_index, as was
> done in other places within i915 where there is no difference between
> cache_level and pat_index on certain generations.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
same clang issue as before, I'm OK with this patch, from my side:
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Thanks,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
(?)
@ 2023-05-30 19:05 ` Yang, Fei
-1 siblings, 0 replies; 28+ messages in thread
From: Yang, Fei @ 2023-05-30 19:05 UTC (permalink / raw)
To: Nathan Chancellor, jani.nikula, joonas.lahtinen, Vivi, Rodrigo,
tvrtko.ursulin
Cc: ndesaulniers, Rix, Tom, andi.shyti, intel-gfx, dri-devel, llvm, patches
> Subject: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
>
> When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode() via an indirect call:
>
> [ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
>
> With kCFI, indirect calls are validated against their expected type versus actual type and failures occur when the two types do not match.
>
> clang's -Wincompatible-function-pointer-types-strict can catch this at compile time but it is not enabled for the kernel yet:
>
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = iris_pte_encode;
> ^ ~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = hsw_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = byt_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = ivb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = snb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> 5 errors generated.
>
> In this case, the pre-gen8 pte_encode functions have a second parameter type of 'enum i915_cache_level' whereas the function pointer prototype in 'struct i915_address_space' expects a second parameter type of 'unsigned int'.
>
> Update the second parameter of the callbacks and the comment above them noting that these statements are still valid, which matches other functions and files, to clear up the kCFI failures at run time.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 2a7942fac798..122197737ef2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -1015,16 +1015,16 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>
> /*
> * For pre-gen8 platforms pat_index is the same as enum i915_cache_level,
> - * so these PTE encode functions are left with using cache_level.
> + * so the switch-case statements in these PTE encode functions are still valid.
> * See translation table LEGACY_CACHELEVEL.
> */
> static u64 snb_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_L3_LLC:
> case I915_CACHE_LLC:
> pte |= GEN6_PTE_CACHE_LLC;
> @@ -1033,19 +1033,19 @@ static u64 snb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - MISSING_CASE(level);
> + MISSING_CASE(pat_index);
> }
>
> return pte;
> }
>
> static u64 ivb_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_L3_LLC:
> pte |= GEN7_PTE_CACHE_L3_LLC;
> break;
> @@ -1056,14 +1056,14 @@ static u64 ivb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - MISSING_CASE(level);
> + MISSING_CASE(pat_index);
> }
>
> return pte;
> }
>
> static u64 byt_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID; @@ -1071,31 +1071,31 @@ static u64 byt_pte_encode(dma_addr_t addr,
> if (!(flags & PTE_READ_ONLY))
> pte |= BYT_PTE_WRITEABLE;
>
> - if (level != I915_CACHE_NONE)
> + if (pat_index != I915_CACHE_NONE)
> pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
>
> return pte;
> }
>
> static u64 hsw_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - if (level != I915_CACHE_NONE)
> + if (pat_index != I915_CACHE_NONE)
> pte |= HSW_WB_LLC_AGE3;
>
> return pte;
> }
>
> static u64 iris_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_NONE:
> break;
> case I915_CACHE_WT:
>
> --
> 2.40.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
@ 2023-05-30 19:05 ` Yang, Fei
0 siblings, 0 replies; 28+ messages in thread
From: Yang, Fei @ 2023-05-30 19:05 UTC (permalink / raw)
To: Nathan Chancellor, jani.nikula, joonas.lahtinen, Vivi, Rodrigo,
tvrtko.ursulin
Cc: Rix, Tom, intel-gfx, llvm, ndesaulniers, patches, dri-devel, andi.shyti
> Subject: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
>
> When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode() via an indirect call:
>
> [ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
>
> With kCFI, indirect calls are validated against their expected type versus actual type and failures occur when the two types do not match.
>
> clang's -Wincompatible-function-pointer-types-strict can catch this at compile time but it is not enabled for the kernel yet:
>
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = iris_pte_encode;
> ^ ~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = hsw_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = byt_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = ivb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = snb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> 5 errors generated.
>
> In this case, the pre-gen8 pte_encode functions have a second parameter type of 'enum i915_cache_level' whereas the function pointer prototype in 'struct i915_address_space' expects a second parameter type of 'unsigned int'.
>
> Update the second parameter of the callbacks and the comment above them noting that these statements are still valid, which matches other functions and files, to clear up the kCFI failures at run time.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 2a7942fac798..122197737ef2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -1015,16 +1015,16 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>
> /*
> * For pre-gen8 platforms pat_index is the same as enum i915_cache_level,
> - * so these PTE encode functions are left with using cache_level.
> + * so the switch-case statements in these PTE encode functions are still valid.
> * See translation table LEGACY_CACHELEVEL.
> */
> static u64 snb_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_L3_LLC:
> case I915_CACHE_LLC:
> pte |= GEN6_PTE_CACHE_LLC;
> @@ -1033,19 +1033,19 @@ static u64 snb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - MISSING_CASE(level);
> + MISSING_CASE(pat_index);
> }
>
> return pte;
> }
>
> static u64 ivb_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_L3_LLC:
> pte |= GEN7_PTE_CACHE_L3_LLC;
> break;
> @@ -1056,14 +1056,14 @@ static u64 ivb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - MISSING_CASE(level);
> + MISSING_CASE(pat_index);
> }
>
> return pte;
> }
>
> static u64 byt_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID; @@ -1071,31 +1071,31 @@ static u64 byt_pte_encode(dma_addr_t addr,
> if (!(flags & PTE_READ_ONLY))
> pte |= BYT_PTE_WRITEABLE;
>
> - if (level != I915_CACHE_NONE)
> + if (pat_index != I915_CACHE_NONE)
> pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
>
> return pte;
> }
>
> static u64 hsw_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - if (level != I915_CACHE_NONE)
> + if (pat_index != I915_CACHE_NONE)
> pte |= HSW_WB_LLC_AGE3;
>
> return pte;
> }
>
> static u64 iris_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_NONE:
> break;
> case I915_CACHE_WT:
>
> --
> 2.40.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
@ 2023-05-30 19:05 ` Yang, Fei
0 siblings, 0 replies; 28+ messages in thread
From: Yang, Fei @ 2023-05-30 19:05 UTC (permalink / raw)
To: Nathan Chancellor, jani.nikula, joonas.lahtinen, Vivi, Rodrigo,
tvrtko.ursulin
Cc: Rix, Tom, intel-gfx, llvm, ndesaulniers, patches, dri-devel
> Subject: [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
>
> When booting a kernel compiled with CONFIG_CFI_CLANG (kCFI), there is a CFI failure in ggtt_probe_common() when trying to call hsw_pte_encode() via an indirect call:
>
> [ 5.030027] CFI failure at ggtt_probe_common+0xd1/0x130 [i915] (target: hsw_pte_encode+0x0/0x30 [i915]; expected type: 0xf5c1d0fc)
>
> With kCFI, indirect calls are validated against their expected type versus actual type and failures occur when the two types do not match.
>
> clang's -Wincompatible-function-pointer-types-strict can catch this at compile time but it is not enabled for the kernel yet:
>
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1155:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = iris_pte_encode;
> ^ ~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1157:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = hsw_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1159:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = byt_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1161:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = ivb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt.c:1163:23: error: incompatible function pointer types assigning to 'u64 (*)(dma_addr_t, unsigned int, u32)' (aka 'unsigned long long (*)(unsigned int, unsigned int, unsigned int)') from 'u64 (dma_addr_t,
> enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.pte_encode = snb_pte_encode;
> ^ ~~~~~~~~~~~~~~
> 5 errors generated.
>
> In this case, the pre-gen8 pte_encode functions have a second parameter type of 'enum i915_cache_level' whereas the function pointer prototype in 'struct i915_address_space' expects a second parameter type of 'unsigned int'.
>
> Update the second parameter of the callbacks and the comment above them noting that these statements are still valid, which matches other functions and files, to clear up the kCFI failures at run time.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 2a7942fac798..122197737ef2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -1015,16 +1015,16 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>
> /*
> * For pre-gen8 platforms pat_index is the same as enum i915_cache_level,
> - * so these PTE encode functions are left with using cache_level.
> + * so the switch-case statements in these PTE encode functions are still valid.
> * See translation table LEGACY_CACHELEVEL.
> */
> static u64 snb_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_L3_LLC:
> case I915_CACHE_LLC:
> pte |= GEN6_PTE_CACHE_LLC;
> @@ -1033,19 +1033,19 @@ static u64 snb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - MISSING_CASE(level);
> + MISSING_CASE(pat_index);
> }
>
> return pte;
> }
>
> static u64 ivb_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_L3_LLC:
> pte |= GEN7_PTE_CACHE_L3_LLC;
> break;
> @@ -1056,14 +1056,14 @@ static u64 ivb_pte_encode(dma_addr_t addr,
> pte |= GEN6_PTE_UNCACHED;
> break;
> default:
> - MISSING_CASE(level);
> + MISSING_CASE(pat_index);
> }
>
> return pte;
> }
>
> static u64 byt_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = GEN6_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID; @@ -1071,31 +1071,31 @@ static u64 byt_pte_encode(dma_addr_t addr,
> if (!(flags & PTE_READ_ONLY))
> pte |= BYT_PTE_WRITEABLE;
>
> - if (level != I915_CACHE_NONE)
> + if (pat_index != I915_CACHE_NONE)
> pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
>
> return pte;
> }
>
> static u64 hsw_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - if (level != I915_CACHE_NONE)
> + if (pat_index != I915_CACHE_NONE)
> pte |= HSW_WB_LLC_AGE3;
>
> return pte;
> }
>
> static u64 iris_pte_encode(dma_addr_t addr,
> - enum i915_cache_level level,
> + unsigned int pat_index,
> u32 flags)
> {
> gen6_pte_t pte = HSW_PTE_ADDR_ENCODE(addr) | GEN6_PTE_VALID;
>
> - switch (level) {
> + switch (pat_index) {
> case I915_CACHE_NONE:
> break;
> case I915_CACHE_WT:
>
> --
> 2.40.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
2023-05-30 18:24 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}() Nathan Chancellor
(?)
@ 2023-05-30 19:08 ` Yang, Fei
-1 siblings, 0 replies; 28+ messages in thread
From: Yang, Fei @ 2023-05-30 19:08 UTC (permalink / raw)
To: Nathan Chancellor, jani.nikula, joonas.lahtinen, Vivi, Rodrigo,
tvrtko.ursulin
Cc: ndesaulniers, Rix, Tom, andi.shyti, intel-gfx, dri-devel, llvm, patches
> Subject: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
>
> When building with clang's -Wincompatible-function-pointer-types-strict,
> the following warnings occur:
>
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_page = gmch_ggtt_insert_page;
> ^ ~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
> ^ ~~~~~~~~~~~~~~~~~~~~~~~~
> 2 errors generated.
>
> The warning is pointing out that while 'enum i915_cache_level' and 'unsigned int' are ABI compatible, these indirect calls will fail clang's kernel Control Flow Integrity (kCFI) checks, as the callback's signature does not exactly match the prototype's signature.
>
> To fix this, replace the cache_level parameter with pat_index, as was done in other places within i915 where there is no difference between cache_level and pat_index on certain generations.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> index d6a74ae2527b..866c416afb73 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> @@ -18,10 +18,10 @@
> static void gmch_ggtt_insert_page(struct i915_address_space *vm,
> dma_addr_t addr,
> u64 offset,
> - enum i915_cache_level cache_level,
> + unsigned int pat_index,
> u32 unused)
> {
> - unsigned int flags = (cache_level == I915_CACHE_NONE) ?
> + unsigned int flags = (pat_index == I915_CACHE_NONE) ?
> AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
>
> intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags); @@ -29,10 +29,10 @@ static void gmch_ggtt_insert_page(struct i915_address_space *vm,
>
> static void gmch_ggtt_insert_entries(struct i915_address_space *vm,
> struct i915_vma_resource *vma_res,
> - enum i915_cache_level cache_level,
> + unsigned int pat_index,
> u32 unused)
> {
> - unsigned int flags = (cache_level == I915_CACHE_NONE) ?
> + unsigned int flags = (pat_index == I915_CACHE_NONE) ?
> AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
>
> intel_gmch_gtt_insert_sg_entries(vma_res->bi.pages, vma_res->start >> PAGE_SHIFT,
>
> --
> 2.40.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* RE: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
@ 2023-05-30 19:08 ` Yang, Fei
0 siblings, 0 replies; 28+ messages in thread
From: Yang, Fei @ 2023-05-30 19:08 UTC (permalink / raw)
To: Nathan Chancellor, jani.nikula, joonas.lahtinen, Vivi, Rodrigo,
tvrtko.ursulin
Cc: Rix, Tom, intel-gfx, llvm, ndesaulniers, patches, dri-devel, andi.shyti
> Subject: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
>
> When building with clang's -Wincompatible-function-pointer-types-strict,
> the following warnings occur:
>
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_page = gmch_ggtt_insert_page;
> ^ ~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
> ^ ~~~~~~~~~~~~~~~~~~~~~~~~
> 2 errors generated.
>
> The warning is pointing out that while 'enum i915_cache_level' and 'unsigned int' are ABI compatible, these indirect calls will fail clang's kernel Control Flow Integrity (kCFI) checks, as the callback's signature does not exactly match the prototype's signature.
>
> To fix this, replace the cache_level parameter with pat_index, as was done in other places within i915 where there is no difference between cache_level and pat_index on certain generations.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> index d6a74ae2527b..866c416afb73 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> @@ -18,10 +18,10 @@
> static void gmch_ggtt_insert_page(struct i915_address_space *vm,
> dma_addr_t addr,
> u64 offset,
> - enum i915_cache_level cache_level,
> + unsigned int pat_index,
> u32 unused)
> {
> - unsigned int flags = (cache_level == I915_CACHE_NONE) ?
> + unsigned int flags = (pat_index == I915_CACHE_NONE) ?
> AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
>
> intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags); @@ -29,10 +29,10 @@ static void gmch_ggtt_insert_page(struct i915_address_space *vm,
>
> static void gmch_ggtt_insert_entries(struct i915_address_space *vm,
> struct i915_vma_resource *vma_res,
> - enum i915_cache_level cache_level,
> + unsigned int pat_index,
> u32 unused)
> {
> - unsigned int flags = (cache_level == I915_CACHE_NONE) ?
> + unsigned int flags = (pat_index == I915_CACHE_NONE) ?
> AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
>
> intel_gmch_gtt_insert_sg_entries(vma_res->bi.pages, vma_res->start >> PAGE_SHIFT,
>
> --
> 2.40.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}()
@ 2023-05-30 19:08 ` Yang, Fei
0 siblings, 0 replies; 28+ messages in thread
From: Yang, Fei @ 2023-05-30 19:08 UTC (permalink / raw)
To: Nathan Chancellor, jani.nikula, joonas.lahtinen, Vivi, Rodrigo,
tvrtko.ursulin
Cc: Rix, Tom, intel-gfx, llvm, ndesaulniers, patches, dri-devel
> Subject: [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
>
> When building with clang's -Wincompatible-function-pointer-types-strict,
> the following warnings occur:
>
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:102:23: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, dma_addr_t, u64, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, unsigned int, unsigned long long, unsigned int, unsigned int)') from 'void (struct i915_address_space *, dma_addr_t, u64, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, unsigned int, unsigned long long, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_page = gmch_ggtt_insert_page;
> ^ ~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c:103:26: error: incompatible function pointer types assigning to 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, u32)' (aka 'void (*)(struct i915_address_space *, struct i915_vma_resource *, unsigned int, unsigned int)') from 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, u32)' (aka 'void (struct i915_address_space *, struct i915_vma_resource *, enum i915_cache_level, unsigned int)') [-Werror, -Wincompatible-function-pointer-types-strict]
> ggtt->vm.insert_entries = gmch_ggtt_insert_entries;
> ^ ~~~~~~~~~~~~~~~~~~~~~~~~
> 2 errors generated.
>
> The warning is pointing out that while 'enum i915_cache_level' and 'unsigned int' are ABI compatible, these indirect calls will fail clang's kernel Control Flow Integrity (kCFI) checks, as the callback's signature does not exactly match the prototype's signature.
>
> To fix this, replace the cache_level parameter with pat_index, as was done in other places within i915 where there is no difference between cache_level and pat_index on certain generations.
>
> Fixes: 9275277d5324 ("drm/i915: use pat_index instead of cache_level")
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> index d6a74ae2527b..866c416afb73 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c
> @@ -18,10 +18,10 @@
> static void gmch_ggtt_insert_page(struct i915_address_space *vm,
> dma_addr_t addr,
> u64 offset,
> - enum i915_cache_level cache_level,
> + unsigned int pat_index,
> u32 unused)
> {
> - unsigned int flags = (cache_level == I915_CACHE_NONE) ?
> + unsigned int flags = (pat_index == I915_CACHE_NONE) ?
> AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
>
> intel_gmch_gtt_insert_page(addr, offset >> PAGE_SHIFT, flags); @@ -29,10 +29,10 @@ static void gmch_ggtt_insert_page(struct i915_address_space *vm,
>
> static void gmch_ggtt_insert_entries(struct i915_address_space *vm,
> struct i915_vma_resource *vma_res,
> - enum i915_cache_level cache_level,
> + unsigned int pat_index,
> u32 unused)
> {
> - unsigned int flags = (cache_level == I915_CACHE_NONE) ?
> + unsigned int flags = (pat_index == I915_CACHE_NONE) ?
> AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
>
> intel_gmch_gtt_insert_sg_entries(vma_res->bi.pages, vma_res->start >> PAGE_SHIFT,
>
> --
> 2.40.1
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Fix recent kCFI violations
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
` (3 preceding siblings ...)
(?)
@ 2023-05-31 13:25 ` Patchwork
-1 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2023-05-31 13:25 UTC (permalink / raw)
To: Nathan Chancellor; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : warning
== Summary ==
Error: dim checkpatch failed
566454e9806c drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
-:20: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#20:
enum i915_cache_level, u32)' (aka 'unsigned long long (unsigned int, enum i915_cache_level, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict]
total: 0 errors, 1 warnings, 0 checks, 93 lines checked
56f71fe069d1 drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}()
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Fix recent kCFI violations
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
` (4 preceding siblings ...)
(?)
@ 2023-05-31 13:25 ` Patchwork
-1 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2023-05-31 13:25 UTC (permalink / raw)
To: Nathan Chancellor; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./drivers/gpu/drm/i915/intel_uncore.h:346:1: warning: trying to copy expression type 31
+./drivers/gpu/drm/i915/intel_uncore.h:351:1: warning: trying to copy expression type 31
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Fix recent kCFI violations
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
` (5 preceding siblings ...)
(?)
@ 2023-05-31 13:33 ` Patchwork
-1 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2023-05-31 13:33 UTC (permalink / raw)
To: Nathan Chancellor; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6012 bytes --]
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206 -> Patchwork_118591v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/index.html
Participating hosts (35 -> 35)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_118591v1 that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- fi-kbl-8809g: [PASS][1] -> [FAIL][2] ([i915#8293] / [i915#8298])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/fi-kbl-8809g/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/fi-kbl-8809g/boot.html
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][3] ([i915#7077])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/bat-rplp-1/igt@i915_pm_backlight@basic-brightness@edp-1.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770: [PASS][4] -> [SKIP][5] ([fdo#109271])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/fi-hsw-4770/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_pm_rpm@basic-rte:
- fi-hsw-4770: [PASS][6] -> [FAIL][7] ([i915#7364])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/fi-hsw-4770/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@guc:
- bat-rpls-1: [PASS][8] -> [DMESG-WARN][9] ([i915#7852])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/bat-rpls-1/igt@i915_selftest@live@guc.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/bat-rpls-1/igt@i915_selftest@live@guc.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-bsw-n3050: NOTRUN -> [SKIP][10] ([fdo#109271])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/fi-bsw-n3050/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@read-crc:
- bat-adlp-9: NOTRUN -> [SKIP][11] ([i915#3546]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/bat-adlp-9/igt@kms_pipe_crc_basic@read-crc.html
#### Possible fixes ####
* igt@i915_module_load@load:
- {bat-adlp-11}: [ABORT][12] ([i915#4423] / [i915#8189]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/bat-adlp-11/igt@i915_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/bat-adlp-11/igt@i915_module_load@load.html
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-n3050: [ABORT][14] ([i915#6217]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
#### Warnings ####
* igt@kms_setmode@basic-clone-single-crtc:
- bat-rplp-1: [ABORT][16] ([i915#4579] / [i915#8260]) -> [SKIP][17] ([i915#3555] / [i915#4579])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4309]: https://gitlab.freedesktop.org/drm/intel/issues/4309
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#6217]: https://gitlab.freedesktop.org/drm/intel/issues/6217
[i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
[i915#7364]: https://gitlab.freedesktop.org/drm/intel/issues/7364
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7852]: https://gitlab.freedesktop.org/drm/intel/issues/7852
[i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
[i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#8298]: https://gitlab.freedesktop.org/drm/intel/issues/8298
Build changes
-------------
* Linux: CI_DRM_13206 -> Patchwork_118591v1
CI-20190529: 20190529
CI_DRM_13206: 1f26581192d798031ff95fcbce2c2fe4ac953c65 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7313: 989920cfc4aa76d04c3af0acf8a0319c4e8f4f4c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_118591v1: 1f26581192d798031ff95fcbce2c2fe4ac953c65 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
2151aeca19e1 drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}()
d98eb0ea7ab3 drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/index.html
[-- Attachment #2: Type: text/html, Size: 6520 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Fix recent kCFI violations
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
` (6 preceding siblings ...)
(?)
@ 2023-06-01 22:20 ` Patchwork
-1 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2023-06-01 22:20 UTC (permalink / raw)
To: Nathan Chancellor; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 11450 bytes --]
== Series Details ==
Series: drm/i915/gt: Fix recent kCFI violations
URL : https://patchwork.freedesktop.org/series/118591/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13206_full -> Patchwork_118591v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_118591v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rps@reset:
- shard-snb: [PASS][1] -> [DMESG-FAIL][2] ([i915#8319])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-snb5/igt@i915_pm_rps@reset.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-snb4/igt@i915_pm_rps@reset.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4579]) +4 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-snb1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][4] -> [FAIL][5] ([i915#4767])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-suspend@b-dp1:
- shard-apl: [PASS][6] -> [ABORT][7] ([i915#180]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-apl1/igt@kms_flip@flip-vs-suspend@b-dp1.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-apl2/igt@kms_flip@flip-vs-suspend@b-dp1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][8] ([fdo#109271]) +7 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-snb1/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-20x20@pipe-a-hdmi-a-1.html
* igt@prime_busy@hang@vecs0:
- shard-glk: [PASS][9] -> [INCOMPLETE][10] ([i915#8218])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-glk9/igt@prime_busy@hang@vecs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-glk7/igt@prime_busy@hang@vecs0.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- {shard-rkl}: [FAIL][11] ([i915#7742]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-rkl-1/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-rkl-3/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@gem_eio@hibernate:
- {shard-tglu}: [ABORT][13] ([i915#7975] / [i915#8213] / [i915#8398]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-tglu-10/igt@gem_eio@hibernate.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-tglu-9/igt@gem_eio@hibernate.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [FAIL][15] ([i915#2846]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-glk5/igt@gem_exec_fair@basic-deadline.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-glk9/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [FAIL][17] ([i915#2842]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-apl6/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@bcs0:
- {shard-dg1}: [FAIL][19] ([i915#3591]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
- {shard-rkl}: [SKIP][21] ([i915#1397]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-rkl-6/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_cursor_legacy@single-move@pipe-b:
- {shard-rkl}: [INCOMPLETE][23] ([i915#8011]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-rkl-7/igt@kms_cursor_legacy@single-move@pipe-b.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-rkl-6/igt@kms_cursor_legacy@single-move@pipe-b.html
* igt@kms_hdmi_inject@inject-audio:
- {shard-tglu}: [SKIP][25] ([i915#433]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13206/shard-tglu-5/igt@kms_hdmi_inject@inject-audio.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/shard-tglu-4/igt@kms_hdmi_inject@inject-audio.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8218]: https://gitlab.freedesktop.org/drm/intel/issues/8218
[i915#8319]: https://gitlab.freedesktop.org/drm/intel/issues/8319
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8398]: https://gitlab.freedesktop.org/drm/intel/issues/8398
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
Build changes
-------------
* Linux: CI_DRM_13206 -> Patchwork_118591v1
CI-20190529: 20190529
CI_DRM_13206: 1f26581192d798031ff95fcbce2c2fe4ac953c65 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7313: 989920cfc4aa76d04c3af0acf8a0319c4e8f4f4c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_118591v1: 1f26581192d798031ff95fcbce2c2fe4ac953c65 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118591v1/index.html
[-- Attachment #2: Type: text/html, Size: 8245 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
(?)
@ 2023-06-02 1:03 ` Andi Shyti
-1 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-06-02 1:03 UTC (permalink / raw)
To: Nathan Chancellor
Cc: tvrtko.ursulin, llvm, fei.yang, trix, intel-gfx, ndesaulniers,
patches, dri-devel, andi.shyti, rodrigo.vivi
Hi Nathan,
On Tue, May 30, 2023 at 11:24:37AM -0700, Nathan Chancellor wrote:
> Hi all,
>
> This series fixes a few clang kernel Control Flow Integrity (kCFI)
> violations that appear after commit 9275277d5324 ("drm/i915: use
> pat_index instead of cache_level"). They were found between run time
> testing on real hardware and compile time testing with
> -Wincompatible-function-pointer-types-strict (which is not yet enabled
> for the kernel but I build with it locally to catch new instances).
>
> If there are any problems or questions, please let me know.
>
> ---
> Nathan Chancellor (2):
> drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
> drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
pushed in drm-intel-gt-next.
Thank you,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Intel-gfx] [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations
@ 2023-06-02 1:03 ` Andi Shyti
0 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-06-02 1:03 UTC (permalink / raw)
To: Nathan Chancellor
Cc: llvm, trix, intel-gfx, ndesaulniers, patches, dri-devel, rodrigo.vivi
Hi Nathan,
On Tue, May 30, 2023 at 11:24:37AM -0700, Nathan Chancellor wrote:
> Hi all,
>
> This series fixes a few clang kernel Control Flow Integrity (kCFI)
> violations that appear after commit 9275277d5324 ("drm/i915: use
> pat_index instead of cache_level"). They were found between run time
> testing on real hardware and compile time testing with
> -Wincompatible-function-pointer-types-strict (which is not yet enabled
> for the kernel but I build with it locally to catch new instances).
>
> If there are any problems or questions, please let me know.
>
> ---
> Nathan Chancellor (2):
> drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
> drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
pushed in drm-intel-gt-next.
Thank you,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations
@ 2023-06-02 1:03 ` Andi Shyti
0 siblings, 0 replies; 28+ messages in thread
From: Andi Shyti @ 2023-06-02 1:03 UTC (permalink / raw)
To: Nathan Chancellor
Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin,
ndesaulniers, trix, andi.shyti, fei.yang, intel-gfx, dri-devel,
llvm, patches
Hi Nathan,
On Tue, May 30, 2023 at 11:24:37AM -0700, Nathan Chancellor wrote:
> Hi all,
>
> This series fixes a few clang kernel Control Flow Integrity (kCFI)
> violations that appear after commit 9275277d5324 ("drm/i915: use
> pat_index instead of cache_level"). They were found between run time
> testing on real hardware and compile time testing with
> -Wincompatible-function-pointer-types-strict (which is not yet enabled
> for the kernel but I build with it locally to catch new instances).
>
> If there are any problems or questions, please let me know.
>
> ---
> Nathan Chancellor (2):
> drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks
> drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}()
pushed in drm-intel-gt-next.
Thank you,
Andi
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2023-06-02 1:03 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-30 18:24 [PATCH 0/2] drm/i915/gt: Fix recent kCFI violations Nathan Chancellor
2023-05-30 18:24 ` Nathan Chancellor
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
2023-05-30 18:24 ` [PATCH 1/2] drm/i915/gt: Fix second parameter type of pre-gen8 pte_encode callbacks Nathan Chancellor
2023-05-30 18:24 ` Nathan Chancellor
2023-05-30 18:24 ` [Intel-gfx] " Nathan Chancellor
2023-05-30 18:54 ` Andi Shyti
2023-05-30 18:54 ` Andi Shyti
2023-05-30 18:54 ` [Intel-gfx] " Andi Shyti
2023-05-30 19:05 ` Yang, Fei
2023-05-30 19:05 ` [Intel-gfx] " Yang, Fei
2023-05-30 19:05 ` Yang, Fei
2023-05-30 18:24 ` [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}() Nathan Chancellor
2023-05-30 18:24 ` Nathan Chancellor
2023-05-30 18:24 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}() Nathan Chancellor
2023-05-30 18:55 ` [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}() Andi Shyti
2023-05-30 18:55 ` Andi Shyti
2023-05-30 18:55 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}() Andi Shyti
2023-05-30 19:08 ` [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}() Yang, Fei
2023-05-30 19:08 ` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries, page}() Yang, Fei
2023-05-30 19:08 ` [PATCH 2/2] drm/i915/gt: Fix parameter in gmch_ggtt_insert_{entries,page}() Yang, Fei
2023-05-31 13:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Fix recent kCFI violations Patchwork
2023-05-31 13:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-31 13:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-06-01 22:20 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-06-02 1:03 ` [PATCH 0/2] " Andi Shyti
2023-06-02 1:03 ` Andi Shyti
2023-06-02 1:03 ` [Intel-gfx] " Andi Shyti
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