* [PATCH]: blacklist new AMD CPUID bits for PV domains
@ 2011-01-25 14:14 Andre Przywara
2011-01-25 14:56 ` Keir Fraser
0 siblings, 1 reply; 2+ messages in thread
From: Andre Przywara @ 2011-01-25 14:14 UTC (permalink / raw)
To: Keir Fraser; +Cc: xen-devel
[-- Attachment #1: Type: text/plain, Size: 510 bytes --]
Hi,
there are some new CPUID bits (and leaves) which Dom0 and PV domains
should not see to avoid trouble, since we don't emulate the features.
The most prominent one is a topology leaf, which contains information
specific to the physical CPU, not the virtual one. To avoid confusion
(and possibly crashes) due to a confused Dom0 scheduler simply disable
these bits.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
--
Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
[-- Attachment #2: pv_mask_new_cpuid.patch --]
[-- Type: text/x-patch, Size: 869 bytes --]
diff -r 003acf02d416 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c Thu Jan 20 17:04:06 2011 +0000
+++ b/xen/arch/x86/traps.c Fri Jan 21 13:51:38 2011 +0100
@@ -802,11 +802,16 @@
__clear_bit(X86_FEATURE_IBS % 32, &c);
__clear_bit(X86_FEATURE_SKINIT % 32, &c);
__clear_bit(X86_FEATURE_WDT % 32, &c);
+ __clear_bit(X86_FEATURE_LWP % 32, &c);
+ __clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
+ __clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
break;
case 5: /* MONITOR/MWAIT */
case 0xa: /* Architectural Performance Monitor Features */
case 0x8000000a: /* SVM revision and features */
case 0x8000001b: /* Instruction Based Sampling */
+ case 0x8000001c: /* Light Weight Profiling */
+ case 0x8000001e: /* Extended topology reporting */
a = b = c = d = 0;
break;
default:
[-- Attachment #3: Type: text/plain, Size: 138 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
http://lists.xensource.com/xen-devel
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH]: blacklist new AMD CPUID bits for PV domains
2011-01-25 14:14 [PATCH]: blacklist new AMD CPUID bits for PV domains Andre Przywara
@ 2011-01-25 14:56 ` Keir Fraser
0 siblings, 0 replies; 2+ messages in thread
From: Keir Fraser @ 2011-01-25 14:56 UTC (permalink / raw)
To: Andre Przywara; +Cc: xen-devel
On 25/01/2011 14:14, "Andre Przywara" <andre.przywara@amd.com> wrote:
> Hi,
>
> there are some new CPUID bits (and leaves) which Dom0 and PV domains
> should not see to avoid trouble, since we don't emulate the features.
> The most prominent one is a topology leaf, which contains information
> specific to the physical CPU, not the virtual one. To avoid confusion
> (and possibly crashes) due to a confused Dom0 scheduler simply disable
> these bits.
>
> Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Andre,
You also need to mask these in tools/libxc/xc_cpuid_x86.c, right? The
hypervisor code you modify affects only dom0.
-- Keir
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2011-01-25 14:56 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-01-25 14:14 [PATCH]: blacklist new AMD CPUID bits for PV domains Andre Przywara
2011-01-25 14:56 ` Keir Fraser
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.