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From: Fuad Tabba <tabba@google.com>
To: Will Deacon <will@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu, maz@kernel.org,
	james.morse@arm.com, alexandru.elisei@arm.com,
	suzuki.poulose@arm.com, mark.rutland@arm.com,
	christoffer.dall@arm.com, pbonzini@redhat.com,
	drjones@redhat.com, qperret@google.com, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kernel-team@android.com
Subject: Re: [PATCH v3 08/15] KVM: arm64: Add feature register flag definitions
Date: Thu, 12 Aug 2021 11:21:01 +0200	[thread overview]
Message-ID: <CA+EHjTyXtVXEU7FMq53rmrgWuiikPzNnWJ7cj4EJkR5FCgj6Sg@mail.gmail.com> (raw)
In-Reply-To: <20210812085939.GF5912@willie-the-truck>

Hi Will,

On Thu, Aug 12, 2021 at 10:59 AM Will Deacon <will@kernel.org> wrote:
>
> On Mon, Jul 19, 2021 at 05:03:39PM +0100, Fuad Tabba wrote:
> > Add feature register flag definitions to clarify which features
> > might be supported.
> >
> > Consolidate the various ID_AA64PFR0_ELx flags for all ELs.
> >
> > No functional change intended.
> >
> > Signed-off-by: Fuad Tabba <tabba@google.com>
> > ---
> >  arch/arm64/include/asm/cpufeature.h |  4 ++--
> >  arch/arm64/include/asm/sysreg.h     | 12 ++++++++----
> >  arch/arm64/kernel/cpufeature.c      |  8 ++++----
> >  3 files changed, 14 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> > index 9bb9d11750d7..b7d9bb17908d 100644
> > --- a/arch/arm64/include/asm/cpufeature.h
> > +++ b/arch/arm64/include/asm/cpufeature.h
> > @@ -602,14 +602,14 @@ static inline bool id_aa64pfr0_32bit_el1(u64 pfr0)
> >  {
> >       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_SHIFT);
> >
> > -     return val == ID_AA64PFR0_EL1_32BIT_64BIT;
> > +     return val == ID_AA64PFR0_ELx_32BIT_64BIT;
> >  }
> >
> >  static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
> >  {
> >       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
> >
> > -     return val == ID_AA64PFR0_EL0_32BIT_64BIT;
> > +     return val == ID_AA64PFR0_ELx_32BIT_64BIT;
> >  }
> >
> >  static inline bool id_aa64pfr0_sve(u64 pfr0)
> > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > index 326f49e7bd42..0b773037251c 100644
> > --- a/arch/arm64/include/asm/sysreg.h
> > +++ b/arch/arm64/include/asm/sysreg.h
> > @@ -784,14 +784,13 @@
> >  #define ID_AA64PFR0_AMU                      0x1
> >  #define ID_AA64PFR0_SVE                      0x1
> >  #define ID_AA64PFR0_RAS_V1           0x1
> > +#define ID_AA64PFR0_RAS_ANY          0xf
>
> This doesn't correspond to an architectural definition afaict: the manual
> says that any values other than 0, 1 or 2 are "reserved" so we should avoid
> defining our own definitions here.

I'll add a ID_AA64PFR0_RAS_V2 definition in that case and use it for
the checking later. That would achieve the same goal and I wouldn't be
adding definitions to the reserved area.

Cheers,
/fuad

WARNING: multiple messages have this Message-ID (diff)
From: Fuad Tabba <tabba@google.com>
To: Will Deacon <will@kernel.org>
Cc: kernel-team@android.com, kvm@vger.kernel.org, maz@kernel.org,
	pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 08/15] KVM: arm64: Add feature register flag definitions
Date: Thu, 12 Aug 2021 11:21:01 +0200	[thread overview]
Message-ID: <CA+EHjTyXtVXEU7FMq53rmrgWuiikPzNnWJ7cj4EJkR5FCgj6Sg@mail.gmail.com> (raw)
In-Reply-To: <20210812085939.GF5912@willie-the-truck>

Hi Will,

On Thu, Aug 12, 2021 at 10:59 AM Will Deacon <will@kernel.org> wrote:
>
> On Mon, Jul 19, 2021 at 05:03:39PM +0100, Fuad Tabba wrote:
> > Add feature register flag definitions to clarify which features
> > might be supported.
> >
> > Consolidate the various ID_AA64PFR0_ELx flags for all ELs.
> >
> > No functional change intended.
> >
> > Signed-off-by: Fuad Tabba <tabba@google.com>
> > ---
> >  arch/arm64/include/asm/cpufeature.h |  4 ++--
> >  arch/arm64/include/asm/sysreg.h     | 12 ++++++++----
> >  arch/arm64/kernel/cpufeature.c      |  8 ++++----
> >  3 files changed, 14 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> > index 9bb9d11750d7..b7d9bb17908d 100644
> > --- a/arch/arm64/include/asm/cpufeature.h
> > +++ b/arch/arm64/include/asm/cpufeature.h
> > @@ -602,14 +602,14 @@ static inline bool id_aa64pfr0_32bit_el1(u64 pfr0)
> >  {
> >       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_SHIFT);
> >
> > -     return val == ID_AA64PFR0_EL1_32BIT_64BIT;
> > +     return val == ID_AA64PFR0_ELx_32BIT_64BIT;
> >  }
> >
> >  static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
> >  {
> >       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
> >
> > -     return val == ID_AA64PFR0_EL0_32BIT_64BIT;
> > +     return val == ID_AA64PFR0_ELx_32BIT_64BIT;
> >  }
> >
> >  static inline bool id_aa64pfr0_sve(u64 pfr0)
> > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > index 326f49e7bd42..0b773037251c 100644
> > --- a/arch/arm64/include/asm/sysreg.h
> > +++ b/arch/arm64/include/asm/sysreg.h
> > @@ -784,14 +784,13 @@
> >  #define ID_AA64PFR0_AMU                      0x1
> >  #define ID_AA64PFR0_SVE                      0x1
> >  #define ID_AA64PFR0_RAS_V1           0x1
> > +#define ID_AA64PFR0_RAS_ANY          0xf
>
> This doesn't correspond to an architectural definition afaict: the manual
> says that any values other than 0, 1 or 2 are "reserved" so we should avoid
> defining our own definitions here.

I'll add a ID_AA64PFR0_RAS_V2 definition in that case and use it for
the checking later. That would achieve the same goal and I wouldn't be
adding definitions to the reserved area.

Cheers,
/fuad
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Fuad Tabba <tabba@google.com>
To: Will Deacon <will@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu, maz@kernel.org,
	james.morse@arm.com,  alexandru.elisei@arm.com,
	suzuki.poulose@arm.com, mark.rutland@arm.com,
	 christoffer.dall@arm.com, pbonzini@redhat.com,
	drjones@redhat.com,  qperret@google.com, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,  kernel-team@android.com
Subject: Re: [PATCH v3 08/15] KVM: arm64: Add feature register flag definitions
Date: Thu, 12 Aug 2021 11:21:01 +0200	[thread overview]
Message-ID: <CA+EHjTyXtVXEU7FMq53rmrgWuiikPzNnWJ7cj4EJkR5FCgj6Sg@mail.gmail.com> (raw)
In-Reply-To: <20210812085939.GF5912@willie-the-truck>

Hi Will,

On Thu, Aug 12, 2021 at 10:59 AM Will Deacon <will@kernel.org> wrote:
>
> On Mon, Jul 19, 2021 at 05:03:39PM +0100, Fuad Tabba wrote:
> > Add feature register flag definitions to clarify which features
> > might be supported.
> >
> > Consolidate the various ID_AA64PFR0_ELx flags for all ELs.
> >
> > No functional change intended.
> >
> > Signed-off-by: Fuad Tabba <tabba@google.com>
> > ---
> >  arch/arm64/include/asm/cpufeature.h |  4 ++--
> >  arch/arm64/include/asm/sysreg.h     | 12 ++++++++----
> >  arch/arm64/kernel/cpufeature.c      |  8 ++++----
> >  3 files changed, 14 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
> > index 9bb9d11750d7..b7d9bb17908d 100644
> > --- a/arch/arm64/include/asm/cpufeature.h
> > +++ b/arch/arm64/include/asm/cpufeature.h
> > @@ -602,14 +602,14 @@ static inline bool id_aa64pfr0_32bit_el1(u64 pfr0)
> >  {
> >       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_SHIFT);
> >
> > -     return val == ID_AA64PFR0_EL1_32BIT_64BIT;
> > +     return val == ID_AA64PFR0_ELx_32BIT_64BIT;
> >  }
> >
> >  static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
> >  {
> >       u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
> >
> > -     return val == ID_AA64PFR0_EL0_32BIT_64BIT;
> > +     return val == ID_AA64PFR0_ELx_32BIT_64BIT;
> >  }
> >
> >  static inline bool id_aa64pfr0_sve(u64 pfr0)
> > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > index 326f49e7bd42..0b773037251c 100644
> > --- a/arch/arm64/include/asm/sysreg.h
> > +++ b/arch/arm64/include/asm/sysreg.h
> > @@ -784,14 +784,13 @@
> >  #define ID_AA64PFR0_AMU                      0x1
> >  #define ID_AA64PFR0_SVE                      0x1
> >  #define ID_AA64PFR0_RAS_V1           0x1
> > +#define ID_AA64PFR0_RAS_ANY          0xf
>
> This doesn't correspond to an architectural definition afaict: the manual
> says that any values other than 0, 1 or 2 are "reserved" so we should avoid
> defining our own definitions here.

I'll add a ID_AA64PFR0_RAS_V2 definition in that case and use it for
the checking later. That would achieve the same goal and I wouldn't be
adding definitions to the reserved area.

Cheers,
/fuad

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-08-12  9:21 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19 16:03 [PATCH v3 00/15] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-07-19 16:03 ` Fuad Tabba
2021-07-19 16:03 ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 01/15] KVM: arm64: placeholder to check if VM is protected Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  8:58   ` Will Deacon
2021-08-12  8:58     ` Will Deacon
2021-08-12  8:58     ` Will Deacon
2021-08-12  9:22     ` Fuad Tabba
2021-08-12  9:22       ` Fuad Tabba
2021-08-12  9:22       ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 02/15] KVM: arm64: Remove trailing whitespace in comment Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 03/15] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 04/15] KVM: arm64: Fix names of config register fields Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-20 13:38   ` Andrew Jones
2021-07-20 13:38     ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h, c " Andrew Jones
2021-07-20 13:38     ` Andrew Jones
2021-07-20 14:03     ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h,c " Fuad Tabba
2021-07-20 14:03       ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h, c " Fuad Tabba
2021-07-20 14:03       ` Fuad Tabba
2021-08-12  8:59   ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h,c " Will Deacon
2021-08-12  8:59     ` [PATCH v3 05/15] KVM: arm64: Refactor sys_regs.h, c " Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 06/15] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-20 14:52   ` Andrew Jones
2021-07-20 14:52     ` Andrew Jones
2021-07-20 14:52     ` Andrew Jones
2021-07-21  7:37     ` Fuad Tabba
2021-07-21  7:37       ` Fuad Tabba
2021-07-21  7:37       ` Fuad Tabba
2021-08-12  8:46       ` Will Deacon
2021-08-12  8:46         ` Will Deacon
2021-08-12  8:46         ` Will Deacon
2021-08-12  9:28         ` Fuad Tabba
2021-08-12  9:28           ` Fuad Tabba
2021-08-12  9:28           ` Fuad Tabba
2021-08-12  9:49           ` Will Deacon
2021-08-12  9:49             ` Will Deacon
2021-08-12  9:49             ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 07/15] KVM: arm64: Track value of cptr_el2 in struct kvm_vcpu_arch Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 08/15] KVM: arm64: Add feature register flag definitions Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-08-12  9:21     ` Fuad Tabba [this message]
2021-08-12  9:21       ` Fuad Tabba
2021-08-12  9:21       ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 09/15] KVM: arm64: Add config register bit definitions Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  8:59   ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-08-12  8:59     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 10/15] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-03 15:32   ` Will Deacon
2021-08-03 15:32     ` Will Deacon
2021-08-03 15:32     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 11/15] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  9:45   ` Will Deacon
2021-08-12  9:45     ` Will Deacon
2021-08-12  9:45     ` Will Deacon
2021-08-16 14:39     ` Fuad Tabba
2021-08-16 14:39       ` Fuad Tabba
2021-08-16 14:39       ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 12/15] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  9:46   ` Will Deacon
2021-08-12  9:46     ` Will Deacon
2021-08-12  9:46     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 13/15] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  9:53   ` Will Deacon
2021-08-12  9:53     ` Will Deacon
2021-08-12  9:53     ` Will Deacon
2021-07-19 16:03 ` [PATCH v3 14/15] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 19:43   ` Oliver Upton
2021-07-19 19:43     ` Oliver Upton
2021-07-19 19:43     ` Oliver Upton
2021-07-21  8:39     ` Fuad Tabba
2021-07-21  8:39       ` Fuad Tabba
2021-07-21  8:39       ` Fuad Tabba
2021-08-12  9:57   ` Will Deacon
2021-08-12  9:57     ` Will Deacon
2021-08-12  9:57     ` Will Deacon
2021-08-12 13:08     ` Fuad Tabba
2021-08-12 13:08       ` Fuad Tabba
2021-08-12 13:08       ` Fuad Tabba
2021-07-19 16:03 ` [PATCH v3 15/15] KVM: arm64: Restrict protected VM capabilities Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-07-19 16:03   ` Fuad Tabba
2021-08-12  9:59   ` Will Deacon
2021-08-12  9:59     ` Will Deacon
2021-08-12  9:59     ` Will Deacon
2021-08-16 14:40     ` Fuad Tabba
2021-08-16 14:40       ` Fuad Tabba
2021-08-16 14:40       ` Fuad Tabba

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