Re: [PATCH v2 4/4] cpuidle: psci: Allow WFI to be the only state for the hierarchical topology

From: Benjamin Gaignard <benjamin.gaignard@linaro.org>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Benjamin Gaignard <benjamin.gaignard@st.com>,
	Linux PM <linux-pm@vger.kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Lina Iyer <ilina@codeaurora.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 4/4] cpuidle: psci: Allow WFI to be the only state for the hierarchical topology
Date: Fri, 6 Mar 2020 11:47:40 +0100	[thread overview]
Message-ID: <CA+M3ks764moVU2h9iZJuN6B-e4wBUMymBfPnob_zraf50xqezA@mail.gmail.com> (raw)
In-Reply-To: <20200306100431.GA16541@bogus>

Le ven. 6 mars 2020 à 11:04, Sudeep Holla <sudeep.holla@arm.com> a écrit :
>
> On Fri, Mar 06, 2020 at 10:28:10AM +0100, Ulf Hansson wrote:
> > On Thu, 5 Mar 2020 at 17:23, Sudeep Holla <sudeep.holla@arm.com> wrote:
> > >
>
> [...]
>
> > > OK. The only state that cluster can enter when CPUs are in WFI are
> > > cluster WFI and most hardware can handle it automatically. I don't see
> > > the need to do any extra work for that.
> >
> > This isn't about cluster WFI, but about deeper cluster states, such as
> > a cluster-clock-gated-state and a cluster-power-off-state. It's an ST
> > platform, which Benjamin is working on.
> >
>
> Then definitely something is completely wrong. You can't enter deeper
> cluster states(clock-gated and power-off to be specific) with CPU in
> just WFI state. So, if the attempt here is to enter those states, I
> disagree with the change.
>
> Benjamin, please share the complete hierarchical topology for your platform.

The platform is stm32mp157 SoC which embedded two Cortex A7 in one cluster.
I would like to be able to put the system in a state where clocks of CPUs and
hardware blocks are gated. In this state local timer are off.
The platform should be allowed to go in this state when the devices
within the power
domain are pm_runtime_suspend and the CPUs in WFI.
In DT I have one system power domain where the hardware blocks (i2,
uart; spi, etc..)
are attached + a power per CPU.

Benjamin

>
> > >
> > > > Then, after we have called pm_runtime_put_sync_suspend() a few lines
> > > > above, we may potentially have a "domain state" to use, instead of the
> > > > WFI state.
> > > >
> > >
> > > Are they any platforms with this potential "domain state" to use with
> > > CPU WFI. I want to understand this better.
> > >
> > > > In this case, if we would have called psci_enter_state(), that would
> > > > lead us to calling cpu_do_idle() from the __CPU_PM_CPU_IDLE_ENTER()
> > > > macro, becuase idx is zero. In other words, the domain state would
> > > > become unused.
> > > >
> > >
> > > For a domain state to become unused with WFI, it needs to be available
> > > and I am not 100% sure of that.
> >
> > With these changes from the series, we can fully conform to the
> > hierarchical DT bindings for PSCI.
> >
>
> Theoretically may be, but may not confirm to the hardware states.
>
> > I am not sure I understand your concern, is there a cost involved by
> > applying this?
> >
>
> Yes as mentioned above.
>
> --
> Regards,
> Sudeep
>
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